qemu/target-sparc/fop_helper.c
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   1/*
   2 * FPU op helpers
   3 *
   4 *  Copyright (c) 2003-2005 Fabrice Bellard
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "cpu.h"
  22#include "exec/helper-proto.h"
  23
  24#define QT0 (env->qt0)
  25#define QT1 (env->qt1)
  26
  27static void check_ieee_exceptions(CPUSPARCState *env)
  28{
  29    target_ulong status;
  30
  31    status = get_float_exception_flags(&env->fp_status);
  32    if (status) {
  33        /* Copy IEEE 754 flags into FSR */
  34        if (status & float_flag_invalid) {
  35            env->fsr |= FSR_NVC;
  36        }
  37        if (status & float_flag_overflow) {
  38            env->fsr |= FSR_OFC;
  39        }
  40        if (status & float_flag_underflow) {
  41            env->fsr |= FSR_UFC;
  42        }
  43        if (status & float_flag_divbyzero) {
  44            env->fsr |= FSR_DZC;
  45        }
  46        if (status & float_flag_inexact) {
  47            env->fsr |= FSR_NXC;
  48        }
  49
  50        if ((env->fsr & FSR_CEXC_MASK) & ((env->fsr & FSR_TEM_MASK) >> 23)) {
  51            /* Unmasked exception, generate a trap */
  52            env->fsr |= FSR_FTT_IEEE_EXCP;
  53            helper_raise_exception(env, TT_FP_EXCP);
  54        } else {
  55            /* Accumulate exceptions */
  56            env->fsr |= (env->fsr & FSR_CEXC_MASK) << 5;
  57        }
  58    }
  59}
  60
  61static inline void clear_float_exceptions(CPUSPARCState *env)
  62{
  63    set_float_exception_flags(0, &env->fp_status);
  64}
  65
  66#define F_HELPER(name, p) void helper_f##name##p(CPUSPARCState *env)
  67
  68#define F_BINOP(name)                                           \
  69    float32 helper_f ## name ## s (CPUSPARCState *env, float32 src1, \
  70                                   float32 src2)                \
  71    {                                                           \
  72        float32 ret;                                            \
  73        clear_float_exceptions(env);                            \
  74        ret = float32_ ## name (src1, src2, &env->fp_status);   \
  75        check_ieee_exceptions(env);                             \
  76        return ret;                                             \
  77    }                                                           \
  78    float64 helper_f ## name ## d (CPUSPARCState * env, float64 src1,\
  79                                   float64 src2)                \
  80    {                                                           \
  81        float64 ret;                                            \
  82        clear_float_exceptions(env);                            \
  83        ret = float64_ ## name (src1, src2, &env->fp_status);   \
  84        check_ieee_exceptions(env);                             \
  85        return ret;                                             \
  86    }                                                           \
  87    F_HELPER(name, q)                                           \
  88    {                                                           \
  89        clear_float_exceptions(env);                            \
  90        QT0 = float128_ ## name (QT0, QT1, &env->fp_status);    \
  91        check_ieee_exceptions(env);                             \
  92    }
  93
  94F_BINOP(add);
  95F_BINOP(sub);
  96F_BINOP(mul);
  97F_BINOP(div);
  98#undef F_BINOP
  99
 100float64 helper_fsmuld(CPUSPARCState *env, float32 src1, float32 src2)
 101{
 102    float64 ret;
 103    clear_float_exceptions(env);
 104    ret = float64_mul(float32_to_float64(src1, &env->fp_status),
 105                      float32_to_float64(src2, &env->fp_status),
 106                      &env->fp_status);
 107    check_ieee_exceptions(env);
 108    return ret;
 109}
 110
 111void helper_fdmulq(CPUSPARCState *env, float64 src1, float64 src2)
 112{
 113    clear_float_exceptions(env);
 114    QT0 = float128_mul(float64_to_float128(src1, &env->fp_status),
 115                       float64_to_float128(src2, &env->fp_status),
 116                       &env->fp_status);
 117    check_ieee_exceptions(env);
 118}
 119
 120float32 helper_fnegs(float32 src)
 121{
 122    return float32_chs(src);
 123}
 124
 125#ifdef TARGET_SPARC64
 126float64 helper_fnegd(float64 src)
 127{
 128    return float64_chs(src);
 129}
 130
 131F_HELPER(neg, q)
 132{
 133    QT0 = float128_chs(QT1);
 134}
 135#endif
 136
 137/* Integer to float conversion.  */
 138float32 helper_fitos(CPUSPARCState *env, int32_t src)
 139{
 140    /* Inexact error possible converting int to float.  */
 141    float32 ret;
 142    clear_float_exceptions(env);
 143    ret = int32_to_float32(src, &env->fp_status);
 144    check_ieee_exceptions(env);
 145    return ret;
 146}
 147
 148float64 helper_fitod(CPUSPARCState *env, int32_t src)
 149{
 150    /* No possible exceptions converting int to double.  */
 151    return int32_to_float64(src, &env->fp_status);
 152}
 153
 154void helper_fitoq(CPUSPARCState *env, int32_t src)
 155{
 156    /* No possible exceptions converting int to long double.  */
 157    QT0 = int32_to_float128(src, &env->fp_status);
 158}
 159
 160#ifdef TARGET_SPARC64
 161float32 helper_fxtos(CPUSPARCState *env, int64_t src)
 162{
 163    float32 ret;
 164    clear_float_exceptions(env);
 165    ret = int64_to_float32(src, &env->fp_status);
 166    check_ieee_exceptions(env);
 167    return ret;
 168}
 169
 170float64 helper_fxtod(CPUSPARCState *env, int64_t src)
 171{
 172    float64 ret;
 173    clear_float_exceptions(env);
 174    ret = int64_to_float64(src, &env->fp_status);
 175    check_ieee_exceptions(env);
 176    return ret;
 177}
 178
 179void helper_fxtoq(CPUSPARCState *env, int64_t src)
 180{
 181    /* No possible exceptions converting long long to long double.  */
 182    QT0 = int64_to_float128(src, &env->fp_status);
 183}
 184#endif
 185#undef F_HELPER
 186
 187/* floating point conversion */
 188float32 helper_fdtos(CPUSPARCState *env, float64 src)
 189{
 190    float32 ret;
 191    clear_float_exceptions(env);
 192    ret = float64_to_float32(src, &env->fp_status);
 193    check_ieee_exceptions(env);
 194    return ret;
 195}
 196
 197float64 helper_fstod(CPUSPARCState *env, float32 src)
 198{
 199    float64 ret;
 200    clear_float_exceptions(env);
 201    ret = float32_to_float64(src, &env->fp_status);
 202    check_ieee_exceptions(env);
 203    return ret;
 204}
 205
 206float32 helper_fqtos(CPUSPARCState *env)
 207{
 208    float32 ret;
 209    clear_float_exceptions(env);
 210    ret = float128_to_float32(QT1, &env->fp_status);
 211    check_ieee_exceptions(env);
 212    return ret;
 213}
 214
 215void helper_fstoq(CPUSPARCState *env, float32 src)
 216{
 217    clear_float_exceptions(env);
 218    QT0 = float32_to_float128(src, &env->fp_status);
 219    check_ieee_exceptions(env);
 220}
 221
 222float64 helper_fqtod(CPUSPARCState *env)
 223{
 224    float64 ret;
 225    clear_float_exceptions(env);
 226    ret = float128_to_float64(QT1, &env->fp_status);
 227    check_ieee_exceptions(env);
 228    return ret;
 229}
 230
 231void helper_fdtoq(CPUSPARCState *env, float64 src)
 232{
 233    clear_float_exceptions(env);
 234    QT0 = float64_to_float128(src, &env->fp_status);
 235    check_ieee_exceptions(env);
 236}
 237
 238/* Float to integer conversion.  */
 239int32_t helper_fstoi(CPUSPARCState *env, float32 src)
 240{
 241    int32_t ret;
 242    clear_float_exceptions(env);
 243    ret = float32_to_int32_round_to_zero(src, &env->fp_status);
 244    check_ieee_exceptions(env);
 245    return ret;
 246}
 247
 248int32_t helper_fdtoi(CPUSPARCState *env, float64 src)
 249{
 250    int32_t ret;
 251    clear_float_exceptions(env);
 252    ret = float64_to_int32_round_to_zero(src, &env->fp_status);
 253    check_ieee_exceptions(env);
 254    return ret;
 255}
 256
 257int32_t helper_fqtoi(CPUSPARCState *env)
 258{
 259    int32_t ret;
 260    clear_float_exceptions(env);
 261    ret = float128_to_int32_round_to_zero(QT1, &env->fp_status);
 262    check_ieee_exceptions(env);
 263    return ret;
 264}
 265
 266#ifdef TARGET_SPARC64
 267int64_t helper_fstox(CPUSPARCState *env, float32 src)
 268{
 269    int64_t ret;
 270    clear_float_exceptions(env);
 271    ret = float32_to_int64_round_to_zero(src, &env->fp_status);
 272    check_ieee_exceptions(env);
 273    return ret;
 274}
 275
 276int64_t helper_fdtox(CPUSPARCState *env, float64 src)
 277{
 278    int64_t ret;
 279    clear_float_exceptions(env);
 280    ret = float64_to_int64_round_to_zero(src, &env->fp_status);
 281    check_ieee_exceptions(env);
 282    return ret;
 283}
 284
 285int64_t helper_fqtox(CPUSPARCState *env)
 286{
 287    int64_t ret;
 288    clear_float_exceptions(env);
 289    ret = float128_to_int64_round_to_zero(QT1, &env->fp_status);
 290    check_ieee_exceptions(env);
 291    return ret;
 292}
 293#endif
 294
 295float32 helper_fabss(float32 src)
 296{
 297    return float32_abs(src);
 298}
 299
 300#ifdef TARGET_SPARC64
 301float64 helper_fabsd(float64 src)
 302{
 303    return float64_abs(src);
 304}
 305
 306void helper_fabsq(CPUSPARCState *env)
 307{
 308    QT0 = float128_abs(QT1);
 309}
 310#endif
 311
 312float32 helper_fsqrts(CPUSPARCState *env, float32 src)
 313{
 314    float32 ret;
 315    clear_float_exceptions(env);
 316    ret = float32_sqrt(src, &env->fp_status);
 317    check_ieee_exceptions(env);
 318    return ret;
 319}
 320
 321float64 helper_fsqrtd(CPUSPARCState *env, float64 src)
 322{
 323    float64 ret;
 324    clear_float_exceptions(env);
 325    ret = float64_sqrt(src, &env->fp_status);
 326    check_ieee_exceptions(env);
 327    return ret;
 328}
 329
 330void helper_fsqrtq(CPUSPARCState *env)
 331{
 332    clear_float_exceptions(env);
 333    QT0 = float128_sqrt(QT1, &env->fp_status);
 334    check_ieee_exceptions(env);
 335}
 336
 337#define GEN_FCMP(name, size, reg1, reg2, FS, E)                         \
 338    void glue(helper_, name) (CPUSPARCState *env)                       \
 339    {                                                                   \
 340        int ret;                                                        \
 341        clear_float_exceptions(env);                                    \
 342        if (E) {                                                        \
 343            ret = glue(size, _compare)(reg1, reg2, &env->fp_status);    \
 344        } else {                                                        \
 345            ret = glue(size, _compare_quiet)(reg1, reg2,                \
 346                                             &env->fp_status);          \
 347        }                                                               \
 348        check_ieee_exceptions(env);                                     \
 349        switch (ret) {                                                  \
 350        case float_relation_unordered:                                  \
 351            env->fsr |= (FSR_FCC1 | FSR_FCC0) << FS;                    \
 352            env->fsr |= FSR_NVA;                                        \
 353            break;                                                      \
 354        case float_relation_less:                                       \
 355            env->fsr &= ~(FSR_FCC1) << FS;                              \
 356            env->fsr |= FSR_FCC0 << FS;                                 \
 357            break;                                                      \
 358        case float_relation_greater:                                    \
 359            env->fsr &= ~(FSR_FCC0) << FS;                              \
 360            env->fsr |= FSR_FCC1 << FS;                                 \
 361            break;                                                      \
 362        default:                                                        \
 363            env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS);                 \
 364            break;                                                      \
 365        }                                                               \
 366    }
 367#define GEN_FCMP_T(name, size, FS, E)                                   \
 368    void glue(helper_, name)(CPUSPARCState *env, size src1, size src2)  \
 369    {                                                                   \
 370        int ret;                                                        \
 371        clear_float_exceptions(env);                                    \
 372        if (E) {                                                        \
 373            ret = glue(size, _compare)(src1, src2, &env->fp_status);    \
 374        } else {                                                        \
 375            ret = glue(size, _compare_quiet)(src1, src2,                \
 376                                             &env->fp_status);          \
 377        }                                                               \
 378        check_ieee_exceptions(env);                                     \
 379        switch (ret) {                                                  \
 380        case float_relation_unordered:                                  \
 381            env->fsr |= (FSR_FCC1 | FSR_FCC0) << FS;                    \
 382            break;                                                      \
 383        case float_relation_less:                                       \
 384            env->fsr &= ~(FSR_FCC1 << FS);                              \
 385            env->fsr |= FSR_FCC0 << FS;                                 \
 386            break;                                                      \
 387        case float_relation_greater:                                    \
 388            env->fsr &= ~(FSR_FCC0 << FS);                              \
 389            env->fsr |= FSR_FCC1 << FS;                                 \
 390            break;                                                      \
 391        default:                                                        \
 392            env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS);                 \
 393            break;                                                      \
 394        }                                                               \
 395    }
 396
 397GEN_FCMP_T(fcmps, float32, 0, 0);
 398GEN_FCMP_T(fcmpd, float64, 0, 0);
 399
 400GEN_FCMP_T(fcmpes, float32, 0, 1);
 401GEN_FCMP_T(fcmped, float64, 0, 1);
 402
 403GEN_FCMP(fcmpq, float128, QT0, QT1, 0, 0);
 404GEN_FCMP(fcmpeq, float128, QT0, QT1, 0, 1);
 405
 406#ifdef TARGET_SPARC64
 407GEN_FCMP_T(fcmps_fcc1, float32, 22, 0);
 408GEN_FCMP_T(fcmpd_fcc1, float64, 22, 0);
 409GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0);
 410
 411GEN_FCMP_T(fcmps_fcc2, float32, 24, 0);
 412GEN_FCMP_T(fcmpd_fcc2, float64, 24, 0);
 413GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0);
 414
 415GEN_FCMP_T(fcmps_fcc3, float32, 26, 0);
 416GEN_FCMP_T(fcmpd_fcc3, float64, 26, 0);
 417GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0);
 418
 419GEN_FCMP_T(fcmpes_fcc1, float32, 22, 1);
 420GEN_FCMP_T(fcmped_fcc1, float64, 22, 1);
 421GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1);
 422
 423GEN_FCMP_T(fcmpes_fcc2, float32, 24, 1);
 424GEN_FCMP_T(fcmped_fcc2, float64, 24, 1);
 425GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1);
 426
 427GEN_FCMP_T(fcmpes_fcc3, float32, 26, 1);
 428GEN_FCMP_T(fcmped_fcc3, float64, 26, 1);
 429GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1);
 430#endif
 431#undef GEN_FCMP_T
 432#undef GEN_FCMP
 433
 434static inline void set_fsr(CPUSPARCState *env)
 435{
 436    int rnd_mode;
 437
 438    switch (env->fsr & FSR_RD_MASK) {
 439    case FSR_RD_NEAREST:
 440        rnd_mode = float_round_nearest_even;
 441        break;
 442    default:
 443    case FSR_RD_ZERO:
 444        rnd_mode = float_round_to_zero;
 445        break;
 446    case FSR_RD_POS:
 447        rnd_mode = float_round_up;
 448        break;
 449    case FSR_RD_NEG:
 450        rnd_mode = float_round_down;
 451        break;
 452    }
 453    set_float_rounding_mode(rnd_mode, &env->fp_status);
 454}
 455
 456void helper_ldfsr(CPUSPARCState *env, uint32_t new_fsr)
 457{
 458    env->fsr = (new_fsr & FSR_LDFSR_MASK) | (env->fsr & FSR_LDFSR_OLDMASK);
 459    set_fsr(env);
 460}
 461
 462#ifdef TARGET_SPARC64
 463void helper_ldxfsr(CPUSPARCState *env, uint64_t new_fsr)
 464{
 465    env->fsr = (new_fsr & FSR_LDXFSR_MASK) | (env->fsr & FSR_LDXFSR_OLDMASK);
 466    set_fsr(env);
 467}
 468#endif
 469