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11#include "qemu/osdep.h"
12#include <glib.h>
13#include <glib/gstdio.h>
14#include <sys/mman.h>
15#include "contrib/ivshmem-server/ivshmem-server.h"
16#include "libqos/pci-pc.h"
17#include "libqtest.h"
18#include "qemu-common.h"
19
20#define TMPSHMSIZE (1 << 20)
21static char *tmpshm;
22static void *tmpshmem;
23static char *tmpdir;
24static char *tmpserver;
25
26static void save_fn(QPCIDevice *dev, int devfn, void *data)
27{
28 QPCIDevice **pdev = (QPCIDevice **) data;
29
30 *pdev = dev;
31}
32
33static QPCIDevice *get_device(QPCIBus *pcibus)
34{
35 QPCIDevice *dev;
36
37 dev = NULL;
38 qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
39 g_assert(dev != NULL);
40
41 return dev;
42}
43
44typedef struct _IVState {
45 QTestState *qtest;
46 void *reg_base, *mem_base;
47 QPCIBus *pcibus;
48 QPCIDevice *dev;
49} IVState;
50
51enum Reg {
52 INTRMASK = 0,
53 INTRSTATUS = 4,
54 IVPOSITION = 8,
55 DOORBELL = 12,
56};
57
58static const char* reg2str(enum Reg reg) {
59 switch (reg) {
60 case INTRMASK:
61 return "IntrMask";
62 case INTRSTATUS:
63 return "IntrStatus";
64 case IVPOSITION:
65 return "IVPosition";
66 case DOORBELL:
67 return "DoorBell";
68 default:
69 return NULL;
70 }
71}
72
73static inline unsigned in_reg(IVState *s, enum Reg reg)
74{
75 const char *name = reg2str(reg);
76 QTestState *qtest = global_qtest;
77 unsigned res;
78
79 global_qtest = s->qtest;
80 res = qpci_io_readl(s->dev, s->reg_base + reg);
81 g_test_message("*%s -> %x\n", name, res);
82 global_qtest = qtest;
83
84 return res;
85}
86
87static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
88{
89 const char *name = reg2str(reg);
90 QTestState *qtest = global_qtest;
91
92 global_qtest = s->qtest;
93 g_test_message("%x -> *%s\n", v, name);
94 qpci_io_writel(s->dev, s->reg_base + reg, v);
95 global_qtest = qtest;
96}
97
98static void cleanup_vm(IVState *s)
99{
100 g_free(s->dev);
101 qpci_free_pc(s->pcibus);
102 qtest_quit(s->qtest);
103}
104
105static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
106{
107 uint64_t barsize;
108
109 s->qtest = qtest_start(cmd);
110 s->pcibus = qpci_init_pc();
111 s->dev = get_device(s->pcibus);
112
113 s->reg_base = qpci_iomap(s->dev, 0, &barsize);
114 g_assert_nonnull(s->reg_base);
115 g_assert_cmpuint(barsize, ==, 256);
116
117 if (msix) {
118 qpci_msix_enable(s->dev);
119 }
120
121 s->mem_base = qpci_iomap(s->dev, 2, &barsize);
122 g_assert_nonnull(s->mem_base);
123 g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
124
125 qpci_device_enable(s->dev);
126}
127
128static void setup_vm(IVState *s)
129{
130 char *cmd = g_strdup_printf("-object memory-backend-file"
131 ",id=mb1,size=1M,share,mem-path=/dev/shm%s"
132 " -device ivshmem-plain,memdev=mb1", tmpshm);
133
134 setup_vm_cmd(s, cmd, false);
135
136 g_free(cmd);
137}
138
139static void test_ivshmem_single(void)
140{
141 IVState state, *s;
142 uint32_t data[1024];
143 int i;
144
145 setup_vm(&state);
146 s = &state;
147
148
149 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0);
150 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
151 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0);
152
153
154 out_reg(s, INTRMASK, 0xffffffff);
155 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
156 out_reg(s, INTRSTATUS, 1);
157
158 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
159
160 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
161
162
163
164 out_reg(s, IVPOSITION, 1);
165 in_reg(s, DOORBELL);
166
167
168 out_reg(s, DOORBELL, 8 << 16);
169
170
171 for (i = 0; i < G_N_ELEMENTS(data); i++) {
172 data[i] = i;
173 }
174 qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
175
176
177 for (i = 0; i < G_N_ELEMENTS(data); i++) {
178 g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
179 }
180
181
182 memset(data, 0, sizeof(data));
183 qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
184 for (i = 0; i < G_N_ELEMENTS(data); i++) {
185 g_assert_cmpuint(data[i], ==, i);
186 }
187
188 cleanup_vm(s);
189}
190
191static void test_ivshmem_pair(void)
192{
193 IVState state1, state2, *s1, *s2;
194 char *data;
195 int i;
196
197 setup_vm(&state1);
198 s1 = &state1;
199 setup_vm(&state2);
200 s2 = &state2;
201
202 data = g_malloc0(TMPSHMSIZE);
203
204
205 memset(tmpshmem, 0x42, TMPSHMSIZE);
206 qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
207 for (i = 0; i < TMPSHMSIZE; i++) {
208 g_assert_cmpuint(data[i], ==, 0x42);
209 }
210 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
211 for (i = 0; i < TMPSHMSIZE; i++) {
212 g_assert_cmpuint(data[i], ==, 0x42);
213 }
214
215
216 memset(data, 0x43, TMPSHMSIZE);
217 qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
218 memset(data, 0, TMPSHMSIZE);
219 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
220 for (i = 0; i < TMPSHMSIZE; i++) {
221 g_assert_cmpuint(data[i], ==, 0x43);
222 }
223
224
225 memset(data, 0x44, TMPSHMSIZE);
226 qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
227 memset(data, 0, TMPSHMSIZE);
228 qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
229 for (i = 0; i < TMPSHMSIZE; i++) {
230 g_assert_cmpuint(data[i], ==, 0x44);
231 }
232
233 cleanup_vm(s1);
234 cleanup_vm(s2);
235 g_free(data);
236}
237
238typedef struct ServerThread {
239 GThread *thread;
240 IvshmemServer *server;
241 int pipe[2];
242} ServerThread;
243
244static void *server_thread(void *data)
245{
246 ServerThread *t = data;
247 IvshmemServer *server = t->server;
248
249 while (true) {
250 fd_set fds;
251 int maxfd, ret;
252
253 FD_ZERO(&fds);
254 FD_SET(t->pipe[0], &fds);
255 maxfd = t->pipe[0] + 1;
256
257 ivshmem_server_get_fds(server, &fds, &maxfd);
258
259 ret = select(maxfd, &fds, NULL, NULL, NULL);
260
261 if (ret < 0) {
262 if (errno == EINTR) {
263 continue;
264 }
265
266 g_critical("select error: %s\n", strerror(errno));
267 break;
268 }
269 if (ret == 0) {
270 continue;
271 }
272
273 if (FD_ISSET(t->pipe[0], &fds)) {
274 break;
275 }
276
277 if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
278 g_critical("ivshmem_server_handle_fds() failed\n");
279 break;
280 }
281 }
282
283 return NULL;
284}
285
286static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
287{
288 char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
289 "-device ivshmem%s,chardev=chr0,vectors=%d",
290 tmpserver,
291 msi ? "-doorbell" : ",size=1M,msi=off",
292 nvectors);
293
294 setup_vm_cmd(s, cmd, msi);
295
296 g_free(cmd);
297}
298
299static void test_ivshmem_server(bool msi)
300{
301 IVState state1, state2, *s1, *s2;
302 ServerThread thread;
303 IvshmemServer server;
304 int ret, vm1, vm2;
305 int nvectors = 2;
306 guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
307
308 ret = ivshmem_server_init(&server, tmpserver, tmpshm, true,
309 TMPSHMSIZE, nvectors,
310 g_test_verbose());
311 g_assert_cmpint(ret, ==, 0);
312
313 ret = ivshmem_server_start(&server);
314 g_assert_cmpint(ret, ==, 0);
315
316 thread.server = &server;
317 ret = pipe(thread.pipe);
318 g_assert_cmpint(ret, ==, 0);
319 thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
320 g_assert(thread.thread != NULL);
321
322 setup_vm_with_server(&state1, nvectors, msi);
323 s1 = &state1;
324 setup_vm_with_server(&state2, nvectors, msi);
325 s2 = &state2;
326
327
328 vm1 = in_reg(s1, IVPOSITION);
329 vm2 = in_reg(s2, IVPOSITION);
330 g_assert_cmpint(vm1, >=, 0);
331 g_assert_cmpint(vm2, >=, 0);
332 g_assert_cmpint(vm1, !=, vm2);
333
334
335 global_qtest = s1->qtest;
336 if (msi) {
337 ret = qpci_msix_table_size(s1->dev);
338 g_assert_cmpuint(ret, ==, nvectors);
339 }
340
341
342
343
344 if (msi) {
345 ret = qpci_msix_pending(s1->dev, 0);
346 g_assert_cmpuint(ret, ==, 0);
347 } else {
348 g_assert_cmpuint(in_reg(s1, INTRSTATUS), ==, 0);
349 }
350 out_reg(s2, DOORBELL, vm1 << 16);
351 do {
352 g_usleep(10000);
353 ret = msi ? qpci_msix_pending(s1->dev, 0) : in_reg(s1, INTRSTATUS);
354 } while (ret == 0 && g_get_monotonic_time() < end_time);
355 g_assert_cmpuint(ret, !=, 0);
356
357
358 global_qtest = s2->qtest;
359 if (msi) {
360 ret = qpci_msix_pending(s2->dev, 1);
361 g_assert_cmpuint(ret, ==, 0);
362 } else {
363 g_assert_cmpuint(in_reg(s2, INTRSTATUS), ==, 0);
364 }
365 out_reg(s1, DOORBELL, vm2 << 16 | 1);
366 do {
367 g_usleep(10000);
368 ret = msi ? qpci_msix_pending(s2->dev, 1) : in_reg(s2, INTRSTATUS);
369 } while (ret == 0 && g_get_monotonic_time() < end_time);
370 g_assert_cmpuint(ret, !=, 0);
371
372 cleanup_vm(s2);
373 cleanup_vm(s1);
374
375 if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
376 g_error("qemu_write_full: %s", g_strerror(errno));
377 }
378
379 g_thread_join(thread.thread);
380
381 ivshmem_server_close(&server);
382 close(thread.pipe[1]);
383 close(thread.pipe[0]);
384}
385
386static void test_ivshmem_server_msi(void)
387{
388 test_ivshmem_server(true);
389}
390
391static void test_ivshmem_server_irq(void)
392{
393 test_ivshmem_server(false);
394}
395
396#define PCI_SLOT_HP 0x06
397
398static void test_ivshmem_hotplug(void)
399{
400 gchar *opts;
401
402 qtest_start("");
403
404 opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
405
406 qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
407 qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
408
409 qtest_end();
410 g_free(opts);
411}
412
413static void test_ivshmem_memdev(void)
414{
415 IVState state;
416
417
418 setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
419 " -device ivshmem-plain,memdev=mb1", false);
420
421 cleanup_vm(&state);
422}
423
424static void cleanup(void)
425{
426 if (tmpshmem) {
427 munmap(tmpshmem, TMPSHMSIZE);
428 tmpshmem = NULL;
429 }
430
431 if (tmpshm) {
432 shm_unlink(tmpshm);
433 g_free(tmpshm);
434 tmpshm = NULL;
435 }
436
437 if (tmpserver) {
438 g_unlink(tmpserver);
439 g_free(tmpserver);
440 tmpserver = NULL;
441 }
442
443 if (tmpdir) {
444 g_rmdir(tmpdir);
445 tmpdir = NULL;
446 }
447}
448
449static void abrt_handler(void *data)
450{
451 cleanup();
452}
453
454static gchar *mktempshm(int size, int *fd)
455{
456 while (true) {
457 gchar *name;
458
459 name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
460 *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
461 S_IRWXU|S_IRWXG|S_IRWXO);
462 if (*fd > 0) {
463 g_assert(ftruncate(*fd, size) == 0);
464 return name;
465 }
466
467 g_free(name);
468
469 if (errno != EEXIST) {
470 perror("shm_open");
471 return NULL;
472 }
473 }
474}
475
476int main(int argc, char **argv)
477{
478 int ret, fd;
479 gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
480
481#if !GLIB_CHECK_VERSION(2, 31, 0)
482 if (!g_thread_supported()) {
483 g_thread_init(NULL);
484 }
485#endif
486
487 g_test_init(&argc, &argv, NULL);
488
489 qtest_add_abrt_handler(abrt_handler, NULL);
490
491 tmpshm = mktempshm(TMPSHMSIZE, &fd);
492 if (!tmpshm) {
493 return 0;
494 }
495 tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
496 g_assert(tmpshmem != MAP_FAILED);
497
498 if (mkdtemp(dir) == NULL) {
499 g_error("mkdtemp: %s", g_strerror(errno));
500 }
501 tmpdir = dir;
502 tmpserver = g_strconcat(tmpdir, "/server", NULL);
503
504 qtest_add_func("/ivshmem/single", test_ivshmem_single);
505 qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
506 qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
507 if (g_test_slow()) {
508 qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
509 qtest_add_func("/ivshmem/server-msi", test_ivshmem_server_msi);
510 qtest_add_func("/ivshmem/server-irq", test_ivshmem_server_irq);
511 }
512
513 ret = g_test_run();
514
515 cleanup();
516
517 return ret;
518}
519
