LXR qemu/tests/tcg/mips/mips32-dspr2/dpsqx_s_w

   1#include<stdio.h>
   2#include<assert.h>
   3
   4int main()
   5{
   6    int rs, rt, dsp;
   7    int ach = 5, acl = 5;
   8    int resulth, resultl, resultdsp;
   9
  10    rs      = 0xBC0123AD;
  11    rt      = 0x01643721;
  12    resulth = 0x00000005;
  13    resultl = 0x1CE5E09B;
  14    resultdsp = 0x00;
  15    __asm
  16        ("mthi  %0, $ac1\n\t"
  17         "mtlo  %1, $ac1\n\t"
  18         "dpsqx_s.w.ph $ac1, %3, %4\n\t"
  19         "mfhi  %0, $ac1\n\t"
  20         "mflo  %1, $ac1\n\t"
  21         "rddsp %2\n\t"
  22         : "+r"(ach), "+r"(acl), "=r"(dsp)
  23         : "r"(rs), "r"(rt)
  24        );
  25    dsp = (dsp >> 17) & 0x01;
  26    assert(dsp == resultdsp);
  27    assert(ach == resulth);
  28    assert(acl == resultl);
  29
  30    ach = 0x99F13005;
  31    acl = 0x51730062;
  32    rs      = 0x80008000;
  33    rt      = 0x80008000;
  34
  35    resulth = 0x99F13004;
  36    resultl = 0x51730064;
  37    resultdsp = 0x01;
  38    __asm
  39        ("mthi  %0, $ac1\n\t"
  40         "mtlo  %1, $ac1\n\t"
  41         "dpsqx_s.w.ph $ac1, %3, %4\n\t"
  42         "mfhi  %0, $ac1\n\t"
  43         "mflo  %1, $ac1\n\t"
  44         "rddsp %2\n\t"
  45         : "+r"(ach), "+r"(acl), "=r"(dsp)
  46         : "r"(rs), "r"(rt)
  47        );
  48    dsp = (dsp >> 17) & 0x01;
  49    assert(dsp == resultdsp);
  50    assert(ach == resulth);
  51    assert(acl == resultl);
  52
  53    return 0;
  54}
  55