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25#include "qemu/osdep.h"
26#include "qapi/error.h"
27#include "hw/hw.h"
28#include "hw/ppc/mac.h"
29#include "hw/pci/pci.h"
30#include "hw/ppc/mac_dbdma.h"
31#include "hw/char/escc.h"
32
33#define TYPE_MACIO "macio"
34#define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
35
36typedef struct MacIOState
37{
38
39 PCIDevice parent;
40
41
42 MemoryRegion bar;
43 CUDAState cuda;
44 void *dbdma;
45 MemoryRegion *pic_mem;
46 MemoryRegion *escc_mem;
47 uint64_t frequency;
48} MacIOState;
49
50#define OLDWORLD_MACIO(obj) \
51 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
52
53typedef struct OldWorldMacIOState {
54
55 MacIOState parent_obj;
56
57
58 qemu_irq irqs[5];
59
60 MacIONVRAMState nvram;
61 MACIOIDEState ide[2];
62} OldWorldMacIOState;
63
64#define NEWWORLD_MACIO(obj) \
65 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
66
67typedef struct NewWorldMacIOState {
68
69 MacIOState parent_obj;
70
71 qemu_irq irqs[5];
72 MACIOIDEState ide[2];
73} NewWorldMacIOState;
74
75
76
77
78
79
80
81
82
83
84
85
86static void macio_escc_legacy_setup(MacIOState *macio_state)
87{
88 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
89 MemoryRegion *bar = &macio_state->bar;
90 int i;
91 static const int maps[] = {
92 0x00, 0x00,
93 0x02, 0x20,
94 0x04, 0x10,
95 0x06, 0x30,
96 0x08, 0x40,
97 0x0A, 0x50,
98 0x60, 0x60,
99 0x70, 0x70,
100 0x80, 0x70,
101 0x90, 0x80,
102 0xA0, 0x90,
103 0xB0, 0xA0,
104 0xC0, 0xB0,
105 0xD0, 0xC0,
106 0xE0, 0xD0,
107 0xF0, 0xE0,
108 };
109
110 memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256);
111 for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
112 MemoryRegion *port = g_new(MemoryRegion, 1);
113 memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port",
114 macio_state->escc_mem, maps[i+1], 0x2);
115 memory_region_add_subregion(escc_legacy, maps[i], port);
116 }
117
118 memory_region_add_subregion(bar, 0x12000, escc_legacy);
119}
120
121static void macio_bar_setup(MacIOState *macio_state)
122{
123 MemoryRegion *bar = &macio_state->bar;
124
125 if (macio_state->escc_mem) {
126 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
127 macio_escc_legacy_setup(macio_state);
128 }
129}
130
131static void macio_common_realize(PCIDevice *d, Error **errp)
132{
133 MacIOState *s = MACIO(d);
134 SysBusDevice *sysbus_dev;
135 Error *err = NULL;
136 MemoryRegion *dbdma_mem;
137
138 s->dbdma = DBDMA_init(&dbdma_mem);
139 memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
140
141 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
142 if (err) {
143 error_propagate(errp, err);
144 return;
145 }
146 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
147 memory_region_add_subregion(&s->bar, 0x16000,
148 sysbus_mmio_get_region(sysbus_dev, 0));
149
150 macio_bar_setup(s);
151 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
152}
153
154static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
155 qemu_irq irq0, qemu_irq irq1, int dmaid,
156 Error **errp)
157{
158 SysBusDevice *sysbus_dev;
159
160 sysbus_dev = SYS_BUS_DEVICE(ide);
161 sysbus_connect_irq(sysbus_dev, 0, irq0);
162 sysbus_connect_irq(sysbus_dev, 1, irq1);
163 macio_ide_register_dma(ide, s->dbdma, dmaid);
164 object_property_set_bool(OBJECT(ide), true, "realized", errp);
165}
166
167static void macio_oldworld_realize(PCIDevice *d, Error **errp)
168{
169 MacIOState *s = MACIO(d);
170 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
171 Error *err = NULL;
172 SysBusDevice *sysbus_dev;
173 int i;
174 int cur_irq = 0;
175
176 macio_common_realize(d, &err);
177 if (err) {
178 error_propagate(errp, err);
179 return;
180 }
181
182 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
183 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
184
185 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
186 if (err) {
187 error_propagate(errp, err);
188 return;
189 }
190 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
191 memory_region_add_subregion(&s->bar, 0x60000,
192 sysbus_mmio_get_region(sysbus_dev, 0));
193 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
194
195 if (s->pic_mem) {
196
197 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
198 }
199
200
201 for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
202 qemu_irq irq0 = os->irqs[cur_irq++];
203 qemu_irq irq1 = os->irqs[cur_irq++];
204
205 macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
206 if (err) {
207 error_propagate(errp, err);
208 return;
209 }
210 }
211}
212
213static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
214 int index)
215{
216 gchar *name;
217
218 object_initialize(ide, ide_size, TYPE_MACIO_IDE);
219 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
220 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
221 &ide->mem);
222 name = g_strdup_printf("ide[%i]", index);
223 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
224 g_free(name);
225}
226
227static void macio_oldworld_init(Object *obj)
228{
229 MacIOState *s = MACIO(obj);
230 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
231 DeviceState *dev;
232 int i;
233
234 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
235
236 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
237 dev = DEVICE(&os->nvram);
238 qdev_prop_set_uint32(dev, "size", 0x2000);
239 qdev_prop_set_uint32(dev, "it_shift", 4);
240
241 for (i = 0; i < 2; i++) {
242 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
243 }
244}
245
246static void timer_write(void *opaque, hwaddr addr, uint64_t value,
247 unsigned size)
248{
249}
250
251static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
252{
253 uint32_t value = 0;
254 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
255 uint64_t kltime;
256
257 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
258 kltime = muldiv64(kltime, 18432000, 1048575);
259
260 switch (addr) {
261 case 0x38:
262 value = kltime;
263 break;
264 case 0x3c:
265 value = kltime >> 32;
266 break;
267 }
268
269 return value;
270}
271
272static const MemoryRegionOps timer_ops = {
273 .read = timer_read,
274 .write = timer_write,
275 .endianness = DEVICE_LITTLE_ENDIAN,
276};
277
278static void macio_newworld_realize(PCIDevice *d, Error **errp)
279{
280 MacIOState *s = MACIO(d);
281 NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
282 Error *err = NULL;
283 SysBusDevice *sysbus_dev;
284 MemoryRegion *timer_memory = NULL;
285 int i;
286 int cur_irq = 0;
287
288 macio_common_realize(d, &err);
289 if (err) {
290 error_propagate(errp, err);
291 return;
292 }
293
294 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
295 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
296
297 if (s->pic_mem) {
298
299 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
300 }
301
302
303 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
304 qemu_irq irq0 = ns->irqs[cur_irq++];
305 qemu_irq irq1 = ns->irqs[cur_irq++];
306
307 macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
308 if (err) {
309 error_propagate(errp, err);
310 return;
311 }
312 }
313
314
315 timer_memory = g_new(MemoryRegion, 1);
316 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
317 0x1000);
318 memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
319}
320
321static void macio_newworld_init(Object *obj)
322{
323 MacIOState *s = MACIO(obj);
324 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
325 int i;
326
327 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
328
329 for (i = 0; i < 2; i++) {
330 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
331 }
332}
333
334static void macio_instance_init(Object *obj)
335{
336 MacIOState *s = MACIO(obj);
337
338 memory_region_init(&s->bar, obj, "macio", 0x80000);
339
340 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
341 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
342 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
343}
344
345static const VMStateDescription vmstate_macio_oldworld = {
346 .name = "macio-oldworld",
347 .version_id = 0,
348 .minimum_version_id = 0,
349 .fields = (VMStateField[]) {
350 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
351 VMSTATE_END_OF_LIST()
352 }
353};
354
355static void macio_oldworld_class_init(ObjectClass *oc, void *data)
356{
357 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
358 DeviceClass *dc = DEVICE_CLASS(oc);
359
360 pdc->realize = macio_oldworld_realize;
361 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
362 dc->vmsd = &vmstate_macio_oldworld;
363}
364
365static const VMStateDescription vmstate_macio_newworld = {
366 .name = "macio-newworld",
367 .version_id = 0,
368 .minimum_version_id = 0,
369 .fields = (VMStateField[]) {
370 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
371 VMSTATE_END_OF_LIST()
372 }
373};
374
375static void macio_newworld_class_init(ObjectClass *oc, void *data)
376{
377 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
378 DeviceClass *dc = DEVICE_CLASS(oc);
379
380 pdc->realize = macio_newworld_realize;
381 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
382 dc->vmsd = &vmstate_macio_newworld;
383}
384
385static Property macio_properties[] = {
386 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
387 DEFINE_PROP_END_OF_LIST()
388};
389
390static void macio_class_init(ObjectClass *klass, void *data)
391{
392 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
393 DeviceClass *dc = DEVICE_CLASS(klass);
394
395 k->vendor_id = PCI_VENDOR_ID_APPLE;
396 k->class_id = PCI_CLASS_OTHERS << 8;
397 dc->props = macio_properties;
398 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
399}
400
401static const TypeInfo macio_oldworld_type_info = {
402 .name = TYPE_OLDWORLD_MACIO,
403 .parent = TYPE_MACIO,
404 .instance_size = sizeof(OldWorldMacIOState),
405 .instance_init = macio_oldworld_init,
406 .class_init = macio_oldworld_class_init,
407};
408
409static const TypeInfo macio_newworld_type_info = {
410 .name = TYPE_NEWWORLD_MACIO,
411 .parent = TYPE_MACIO,
412 .instance_size = sizeof(NewWorldMacIOState),
413 .instance_init = macio_newworld_init,
414 .class_init = macio_newworld_class_init,
415};
416
417static const TypeInfo macio_type_info = {
418 .name = TYPE_MACIO,
419 .parent = TYPE_PCI_DEVICE,
420 .instance_size = sizeof(MacIOState),
421 .instance_init = macio_instance_init,
422 .abstract = true,
423 .class_init = macio_class_init,
424};
425
426static void macio_register_types(void)
427{
428 type_register_static(&macio_type_info);
429 type_register_static(&macio_oldworld_type_info);
430 type_register_static(&macio_newworld_type_info);
431}
432
433type_init(macio_register_types)
434
435void macio_init(PCIDevice *d,
436 MemoryRegion *pic_mem,
437 MemoryRegion *escc_mem)
438{
439 MacIOState *macio_state = MACIO(d);
440
441 macio_state->pic_mem = pic_mem;
442 macio_state->escc_mem = escc_mem;
443
444
445 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
446 macio_state->frequency);
447
448 qdev_init_nofail(DEVICE(d));
449}
450
