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20#include "qemu/osdep.h"
21#include "hw/hw.h"
22#include "hw/pci/pci.h"
23#include "qemu/event_notifier.h"
24#include "sysemu/kvm.h"
25
26typedef struct PCITestDevHdr {
27 uint8_t test;
28 uint8_t width;
29 uint8_t pad0[2];
30 uint32_t offset;
31 uint8_t data;
32 uint8_t pad1[3];
33 uint32_t count;
34 uint8_t name[];
35} PCITestDevHdr;
36
37typedef struct IOTest {
38 MemoryRegion *mr;
39 EventNotifier notifier;
40 bool hasnotifier;
41 unsigned size;
42 bool match_data;
43 PCITestDevHdr *hdr;
44 unsigned bufsize;
45} IOTest;
46
47#define IOTEST_DATAMATCH 0xFA
48#define IOTEST_NOMATCH 0xCE
49
50#define IOTEST_IOSIZE 128
51#define IOTEST_MEMSIZE 2048
52
53static const char *iotest_test[] = {
54 "no-eventfd",
55 "wildcard-eventfd",
56 "datamatch-eventfd"
57};
58
59static const char *iotest_type[] = {
60 "mmio",
61 "portio"
62};
63
64#define IOTEST_TEST(i) (iotest_test[((i) % ARRAY_SIZE(iotest_test))])
65#define IOTEST_TYPE(i) (iotest_type[((i) / ARRAY_SIZE(iotest_test))])
66#define IOTEST_MAX_TEST (ARRAY_SIZE(iotest_test))
67#define IOTEST_MAX_TYPE (ARRAY_SIZE(iotest_type))
68#define IOTEST_MAX (IOTEST_MAX_TEST * IOTEST_MAX_TYPE)
69
70enum {
71 IOTEST_ACCESS_NAME,
72 IOTEST_ACCESS_DATA,
73 IOTEST_ACCESS_MAX,
74};
75
76#define IOTEST_ACCESS_TYPE uint8_t
77#define IOTEST_ACCESS_WIDTH (sizeof(uint8_t))
78
79typedef struct PCITestDevState {
80
81 PCIDevice parent_obj;
82
83
84 MemoryRegion mmio;
85 MemoryRegion portio;
86 IOTest *tests;
87 int current;
88} PCITestDevState;
89
90#define TYPE_PCI_TEST_DEV "pci-testdev"
91
92#define PCI_TEST_DEV(obj) \
93 OBJECT_CHECK(PCITestDevState, (obj), TYPE_PCI_TEST_DEV)
94
95#define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio"))
96#define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ? &(d)->mmio : &(d)->portio)
97#define IOTEST_SIZE(i) (IOTEST_IS_MEM(i) ? IOTEST_MEMSIZE : IOTEST_IOSIZE)
98#define IOTEST_PCI_BAR(i) (IOTEST_IS_MEM(i) ? PCI_BASE_ADDRESS_SPACE_MEMORY : \
99 PCI_BASE_ADDRESS_SPACE_IO)
100
101static int pci_testdev_start(IOTest *test)
102{
103 test->hdr->count = 0;
104 if (!test->hasnotifier) {
105 return 0;
106 }
107 event_notifier_test_and_clear(&test->notifier);
108 memory_region_add_eventfd(test->mr,
109 le32_to_cpu(test->hdr->offset),
110 test->size,
111 test->match_data,
112 test->hdr->data,
113 &test->notifier);
114 return 0;
115}
116
117static void pci_testdev_stop(IOTest *test)
118{
119 if (!test->hasnotifier) {
120 return;
121 }
122 memory_region_del_eventfd(test->mr,
123 le32_to_cpu(test->hdr->offset),
124 test->size,
125 test->match_data,
126 test->hdr->data,
127 &test->notifier);
128}
129
130static void
131pci_testdev_reset(PCITestDevState *d)
132{
133 if (d->current == -1) {
134 return;
135 }
136 pci_testdev_stop(&d->tests[d->current]);
137 d->current = -1;
138}
139
140static void pci_testdev_inc(IOTest *test, unsigned inc)
141{
142 uint32_t c = le32_to_cpu(test->hdr->count);
143 test->hdr->count = cpu_to_le32(c + inc);
144}
145
146static void
147pci_testdev_write(void *opaque, hwaddr addr, uint64_t val,
148 unsigned size, int type)
149{
150 PCITestDevState *d = opaque;
151 IOTest *test;
152 int t, r;
153
154 if (addr == offsetof(PCITestDevHdr, test)) {
155 pci_testdev_reset(d);
156 if (val >= IOTEST_MAX_TEST) {
157 return;
158 }
159 t = type * IOTEST_MAX_TEST + val;
160 r = pci_testdev_start(&d->tests[t]);
161 if (r < 0) {
162 return;
163 }
164 d->current = t;
165 return;
166 }
167 if (d->current < 0) {
168 return;
169 }
170 test = &d->tests[d->current];
171 if (addr != le32_to_cpu(test->hdr->offset)) {
172 return;
173 }
174 if (test->match_data && test->size != size) {
175 return;
176 }
177 if (test->match_data && val != test->hdr->data) {
178 return;
179 }
180 pci_testdev_inc(test, 1);
181}
182
183static uint64_t
184pci_testdev_read(void *opaque, hwaddr addr, unsigned size)
185{
186 PCITestDevState *d = opaque;
187 const char *buf;
188 IOTest *test;
189 if (d->current < 0) {
190 return 0;
191 }
192 test = &d->tests[d->current];
193 buf = (const char *)test->hdr;
194 if (addr + size >= test->bufsize) {
195 return 0;
196 }
197 if (test->hasnotifier) {
198 event_notifier_test_and_clear(&test->notifier);
199 }
200 return buf[addr];
201}
202
203static void
204pci_testdev_mmio_write(void *opaque, hwaddr addr, uint64_t val,
205 unsigned size)
206{
207 pci_testdev_write(opaque, addr, val, size, 0);
208}
209
210static void
211pci_testdev_pio_write(void *opaque, hwaddr addr, uint64_t val,
212 unsigned size)
213{
214 pci_testdev_write(opaque, addr, val, size, 1);
215}
216
217static const MemoryRegionOps pci_testdev_mmio_ops = {
218 .read = pci_testdev_read,
219 .write = pci_testdev_mmio_write,
220 .endianness = DEVICE_LITTLE_ENDIAN,
221 .impl = {
222 .min_access_size = 1,
223 .max_access_size = 1,
224 },
225};
226
227static const MemoryRegionOps pci_testdev_pio_ops = {
228 .read = pci_testdev_read,
229 .write = pci_testdev_pio_write,
230 .endianness = DEVICE_LITTLE_ENDIAN,
231 .impl = {
232 .min_access_size = 1,
233 .max_access_size = 1,
234 },
235};
236
237static void pci_testdev_realize(PCIDevice *pci_dev, Error **errp)
238{
239 PCITestDevState *d = PCI_TEST_DEV(pci_dev);
240 uint8_t *pci_conf;
241 char *name;
242 int r, i;
243 bool fastmmio = kvm_ioeventfd_any_length_enabled();
244
245 pci_conf = pci_dev->config;
246
247 pci_conf[PCI_INTERRUPT_PIN] = 0;
248
249 memory_region_init_io(&d->mmio, OBJECT(d), &pci_testdev_mmio_ops, d,
250 "pci-testdev-mmio", IOTEST_MEMSIZE * 2);
251 memory_region_init_io(&d->portio, OBJECT(d), &pci_testdev_pio_ops, d,
252 "pci-testdev-portio", IOTEST_IOSIZE * 2);
253 pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
254 pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
255
256 d->current = -1;
257 d->tests = g_malloc0(IOTEST_MAX * sizeof *d->tests);
258 for (i = 0; i < IOTEST_MAX; ++i) {
259 IOTest *test = &d->tests[i];
260 name = g_strdup_printf("%s-%s", IOTEST_TYPE(i), IOTEST_TEST(i));
261 test->bufsize = sizeof(PCITestDevHdr) + strlen(name) + 1;
262 test->hdr = g_malloc0(test->bufsize);
263 memcpy(test->hdr->name, name, strlen(name) + 1);
264 g_free(name);
265 test->hdr->offset = cpu_to_le32(IOTEST_SIZE(i) + i * IOTEST_ACCESS_WIDTH);
266 test->match_data = strcmp(IOTEST_TEST(i), "wildcard-eventfd");
267 if (fastmmio && IOTEST_IS_MEM(i) && !test->match_data) {
268 test->size = 0;
269 } else {
270 test->size = IOTEST_ACCESS_WIDTH;
271 }
272 test->hdr->test = i;
273 test->hdr->data = test->match_data ? IOTEST_DATAMATCH : IOTEST_NOMATCH;
274 test->hdr->width = IOTEST_ACCESS_WIDTH;
275 test->mr = IOTEST_REGION(d, i);
276 if (!strcmp(IOTEST_TEST(i), "no-eventfd")) {
277 test->hasnotifier = false;
278 continue;
279 }
280 r = event_notifier_init(&test->notifier, 0);
281 assert(r >= 0);
282 test->hasnotifier = true;
283 }
284}
285
286static void
287pci_testdev_uninit(PCIDevice *dev)
288{
289 PCITestDevState *d = PCI_TEST_DEV(dev);
290 int i;
291
292 pci_testdev_reset(d);
293 for (i = 0; i < IOTEST_MAX; ++i) {
294 if (d->tests[i].hasnotifier) {
295 event_notifier_cleanup(&d->tests[i].notifier);
296 }
297 g_free(d->tests[i].hdr);
298 }
299 g_free(d->tests);
300}
301
302static void qdev_pci_testdev_reset(DeviceState *dev)
303{
304 PCITestDevState *d = PCI_TEST_DEV(dev);
305 pci_testdev_reset(d);
306}
307
308static void pci_testdev_class_init(ObjectClass *klass, void *data)
309{
310 DeviceClass *dc = DEVICE_CLASS(klass);
311 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
312
313 k->realize = pci_testdev_realize;
314 k->exit = pci_testdev_uninit;
315 k->vendor_id = PCI_VENDOR_ID_REDHAT;
316 k->device_id = PCI_DEVICE_ID_REDHAT_TEST;
317 k->revision = 0x00;
318 k->class_id = PCI_CLASS_OTHERS;
319 dc->desc = "PCI Test Device";
320 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
321 dc->reset = qdev_pci_testdev_reset;
322}
323
324static const TypeInfo pci_testdev_info = {
325 .name = TYPE_PCI_TEST_DEV,
326 .parent = TYPE_PCI_DEVICE,
327 .instance_size = sizeof(PCITestDevState),
328 .class_init = pci_testdev_class_init,
329};
330
331static void pci_testdev_register_types(void)
332{
333 type_register_static(&pci_testdev_info);
334}
335
336type_init(pci_testdev_register_types)
337
