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25#include "qemu/osdep.h"
26#include "qapi/error.h"
27#include "qemu-common.h"
28#include "cpu.h"
29#include <libfdt.h>
30
31#include "sysemu/block-backend.h"
32#include "sysemu/device_tree.h"
33#include "hw/sysbus.h"
34#include "hw/ppc/spapr.h"
35#include "hw/ppc/spapr_vio.h"
36
37typedef struct sPAPRNVRAM {
38 VIOsPAPRDevice sdev;
39 uint32_t size;
40 uint8_t *buf;
41 BlockBackend *blk;
42} sPAPRNVRAM;
43
44#define TYPE_VIO_SPAPR_NVRAM "spapr-nvram"
45#define VIO_SPAPR_NVRAM(obj) \
46 OBJECT_CHECK(sPAPRNVRAM, (obj), TYPE_VIO_SPAPR_NVRAM)
47
48#define MIN_NVRAM_SIZE 8192
49#define DEFAULT_NVRAM_SIZE 65536
50#define MAX_NVRAM_SIZE 1048576
51
52static void rtas_nvram_fetch(PowerPCCPU *cpu, sPAPRMachineState *spapr,
53 uint32_t token, uint32_t nargs,
54 target_ulong args,
55 uint32_t nret, target_ulong rets)
56{
57 sPAPRNVRAM *nvram = spapr->nvram;
58 hwaddr offset, buffer, len;
59 void *membuf;
60
61 if ((nargs != 3) || (nret != 2)) {
62 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
63 return;
64 }
65
66 if (!nvram) {
67 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
68 rtas_st(rets, 1, 0);
69 return;
70 }
71
72 offset = rtas_ld(args, 0);
73 buffer = rtas_ld(args, 1);
74 len = rtas_ld(args, 2);
75
76 if (((offset + len) < offset)
77 || ((offset + len) > nvram->size)) {
78 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
79 rtas_st(rets, 1, 0);
80 return;
81 }
82
83 assert(nvram->buf);
84
85 membuf = cpu_physical_memory_map(buffer, &len, 1);
86 memcpy(membuf, nvram->buf + offset, len);
87 cpu_physical_memory_unmap(membuf, len, 1, len);
88
89 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
90 rtas_st(rets, 1, len);
91}
92
93static void rtas_nvram_store(PowerPCCPU *cpu, sPAPRMachineState *spapr,
94 uint32_t token, uint32_t nargs,
95 target_ulong args,
96 uint32_t nret, target_ulong rets)
97{
98 sPAPRNVRAM *nvram = spapr->nvram;
99 hwaddr offset, buffer, len;
100 int alen;
101 void *membuf;
102
103 if ((nargs != 3) || (nret != 2)) {
104 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
105 return;
106 }
107
108 if (!nvram) {
109 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
110 return;
111 }
112
113 offset = rtas_ld(args, 0);
114 buffer = rtas_ld(args, 1);
115 len = rtas_ld(args, 2);
116
117 if (((offset + len) < offset)
118 || ((offset + len) > nvram->size)) {
119 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
120 return;
121 }
122
123 membuf = cpu_physical_memory_map(buffer, &len, 0);
124
125 alen = len;
126 if (nvram->blk) {
127 alen = blk_pwrite(nvram->blk, offset, membuf, len);
128 }
129
130 assert(nvram->buf);
131 memcpy(nvram->buf + offset, membuf, len);
132
133 cpu_physical_memory_unmap(membuf, len, 0, len);
134
135 rtas_st(rets, 0, (alen < len) ? RTAS_OUT_HW_ERROR : RTAS_OUT_SUCCESS);
136 rtas_st(rets, 1, (alen < 0) ? 0 : alen);
137}
138
139static void spapr_nvram_realize(VIOsPAPRDevice *dev, Error **errp)
140{
141 sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(dev);
142
143 if (nvram->blk) {
144 nvram->size = blk_getlength(nvram->blk);
145 } else {
146 nvram->size = DEFAULT_NVRAM_SIZE;
147 }
148
149 nvram->buf = g_malloc0(nvram->size);
150
151 if ((nvram->size < MIN_NVRAM_SIZE) || (nvram->size > MAX_NVRAM_SIZE)) {
152 error_setg(errp, "spapr-nvram must be between %d and %d bytes in size",
153 MIN_NVRAM_SIZE, MAX_NVRAM_SIZE);
154 return;
155 }
156
157 if (nvram->blk) {
158 int alen = blk_pread(nvram->blk, 0, nvram->buf, nvram->size);
159
160 if (alen != nvram->size) {
161 error_setg(errp, "can't read spapr-nvram contents");
162 return;
163 }
164 }
165
166 spapr_rtas_register(RTAS_NVRAM_FETCH, "nvram-fetch", rtas_nvram_fetch);
167 spapr_rtas_register(RTAS_NVRAM_STORE, "nvram-store", rtas_nvram_store);
168}
169
170static int spapr_nvram_devnode(VIOsPAPRDevice *dev, void *fdt, int node_off)
171{
172 sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(dev);
173
174 return fdt_setprop_cell(fdt, node_off, "#bytes", nvram->size);
175}
176
177static int spapr_nvram_pre_load(void *opaque)
178{
179 sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(opaque);
180
181 g_free(nvram->buf);
182 nvram->buf = NULL;
183 nvram->size = 0;
184
185 return 0;
186}
187
188static int spapr_nvram_post_load(void *opaque, int version_id)
189{
190 sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(opaque);
191
192 if (nvram->blk) {
193 int alen = blk_pwrite(nvram->blk, 0, nvram->buf, nvram->size);
194
195 if (alen < 0) {
196 return alen;
197 }
198 if (alen != nvram->size) {
199 return -1;
200 }
201 }
202
203 return 0;
204}
205
206static const VMStateDescription vmstate_spapr_nvram = {
207 .name = "spapr_nvram",
208 .version_id = 1,
209 .minimum_version_id = 1,
210 .pre_load = spapr_nvram_pre_load,
211 .post_load = spapr_nvram_post_load,
212 .fields = (VMStateField[]) {
213 VMSTATE_UINT32(size, sPAPRNVRAM),
214 VMSTATE_VBUFFER_ALLOC_UINT32(buf, sPAPRNVRAM, 1, NULL, 0, size),
215 VMSTATE_END_OF_LIST()
216 },
217};
218
219static Property spapr_nvram_properties[] = {
220 DEFINE_SPAPR_PROPERTIES(sPAPRNVRAM, sdev),
221 DEFINE_PROP_DRIVE("drive", sPAPRNVRAM, blk),
222 DEFINE_PROP_END_OF_LIST(),
223};
224
225static void spapr_nvram_class_init(ObjectClass *klass, void *data)
226{
227 DeviceClass *dc = DEVICE_CLASS(klass);
228 VIOsPAPRDeviceClass *k = VIO_SPAPR_DEVICE_CLASS(klass);
229
230 k->realize = spapr_nvram_realize;
231 k->devnode = spapr_nvram_devnode;
232 k->dt_name = "nvram";
233 k->dt_type = "nvram";
234 k->dt_compatible = "qemu,spapr-nvram";
235 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
236 dc->props = spapr_nvram_properties;
237 dc->vmsd = &vmstate_spapr_nvram;
238}
239
240static const TypeInfo spapr_nvram_type_info = {
241 .name = TYPE_VIO_SPAPR_NVRAM,
242 .parent = TYPE_VIO_SPAPR_DEVICE,
243 .instance_size = sizeof(sPAPRNVRAM),
244 .class_init = spapr_nvram_class_init,
245};
246
247static void spapr_nvram_register_types(void)
248{
249 type_register_static(&spapr_nvram_type_info);
250}
251
252type_init(spapr_nvram_register_types)
253
