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19#include "qemu/osdep.h"
20#include "hw/hw.h"
21#include "qemu/log.h"
22#include "sysemu/kvm.h"
23#include "hw/qdev.h"
24#include "kvm_ppc.h"
25#include "sysemu/dma.h"
26#include "exec/address-spaces.h"
27#include "trace.h"
28
29#include "hw/ppc/spapr.h"
30#include "hw/ppc/spapr_vio.h"
31
32#include <libfdt.h>
33
34enum sPAPRTCEAccess {
35 SPAPR_TCE_FAULT = 0,
36 SPAPR_TCE_RO = 1,
37 SPAPR_TCE_WO = 2,
38 SPAPR_TCE_RW = 3,
39};
40
41#define IOMMU_PAGE_SIZE(shift) (1ULL << (shift))
42#define IOMMU_PAGE_MASK(shift) (~(IOMMU_PAGE_SIZE(shift) - 1))
43
44static QLIST_HEAD(spapr_tce_tables, sPAPRTCETable) spapr_tce_tables;
45
46sPAPRTCETable *spapr_tce_find_by_liobn(target_ulong liobn)
47{
48 sPAPRTCETable *tcet;
49
50 if (liobn & 0xFFFFFFFF00000000ULL) {
51 hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx "\n",
52 liobn);
53 return NULL;
54 }
55
56 QLIST_FOREACH(tcet, &spapr_tce_tables, list) {
57 if (tcet->liobn == (uint32_t)liobn) {
58 return tcet;
59 }
60 }
61
62 return NULL;
63}
64
65static IOMMUAccessFlags spapr_tce_iommu_access_flags(uint64_t tce)
66{
67 switch (tce & SPAPR_TCE_RW) {
68 case SPAPR_TCE_FAULT:
69 return IOMMU_NONE;
70 case SPAPR_TCE_RO:
71 return IOMMU_RO;
72 case SPAPR_TCE_WO:
73 return IOMMU_WO;
74 default:
75 return IOMMU_RW;
76 }
77}
78
79
80static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr,
81 bool is_write)
82{
83 sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
84 uint64_t tce;
85 IOMMUTLBEntry ret = {
86 .target_as = &address_space_memory,
87 .iova = 0,
88 .translated_addr = 0,
89 .addr_mask = ~(hwaddr)0,
90 .perm = IOMMU_NONE,
91 };
92
93 if ((addr >> tcet->page_shift) < tcet->nb_table) {
94
95 hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
96
97 tce = tcet->table[addr >> tcet->page_shift];
98 ret.iova = addr & page_mask;
99 ret.translated_addr = tce & page_mask;
100 ret.addr_mask = ~page_mask;
101 ret.perm = spapr_tce_iommu_access_flags(tce);
102 }
103 trace_spapr_iommu_xlate(tcet->liobn, addr, ret.iova, ret.perm,
104 ret.addr_mask);
105
106 return ret;
107}
108
109static int spapr_tce_table_post_load(void *opaque, int version_id)
110{
111 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(opaque);
112
113 if (tcet->vdev) {
114 spapr_vio_set_bypass(tcet->vdev, tcet->bypass);
115 }
116
117 return 0;
118}
119
120static const VMStateDescription vmstate_spapr_tce_table = {
121 .name = "spapr_iommu",
122 .version_id = 2,
123 .minimum_version_id = 2,
124 .post_load = spapr_tce_table_post_load,
125 .fields = (VMStateField []) {
126
127 VMSTATE_UINT32_EQUAL(liobn, sPAPRTCETable),
128 VMSTATE_UINT32_EQUAL(nb_table, sPAPRTCETable),
129
130
131 VMSTATE_BOOL(bypass, sPAPRTCETable),
132 VMSTATE_VARRAY_UINT32(table, sPAPRTCETable, nb_table, 0, vmstate_info_uint64, uint64_t),
133
134 VMSTATE_END_OF_LIST()
135 },
136};
137
138static MemoryRegionIOMMUOps spapr_iommu_ops = {
139 .translate = spapr_tce_translate_iommu,
140};
141
142static int spapr_tce_table_realize(DeviceState *dev)
143{
144 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
145 uint64_t window_size = (uint64_t)tcet->nb_table << tcet->page_shift;
146
147 if (kvm_enabled() && !(window_size >> 32)) {
148 tcet->table = kvmppc_create_spapr_tce(tcet->liobn,
149 window_size,
150 &tcet->fd,
151 tcet->need_vfio);
152 }
153
154 if (!tcet->table) {
155 size_t table_size = tcet->nb_table * sizeof(uint64_t);
156 tcet->table = g_malloc0(table_size);
157 }
158
159 trace_spapr_iommu_new_table(tcet->liobn, tcet, tcet->table, tcet->fd);
160
161 memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops,
162 "iommu-spapr",
163 (uint64_t)tcet->nb_table << tcet->page_shift);
164
165 QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
166
167 vmstate_register(DEVICE(tcet), tcet->liobn, &vmstate_spapr_tce_table,
168 tcet);
169
170 return 0;
171}
172
173void spapr_tce_set_need_vfio(sPAPRTCETable *tcet, bool need_vfio)
174{
175 size_t table_size = tcet->nb_table * sizeof(uint64_t);
176 void *newtable;
177
178 if (need_vfio == tcet->need_vfio) {
179
180 return;
181 }
182
183 if (!need_vfio) {
184
185
186 return;
187 }
188
189 tcet->need_vfio = true;
190
191 if (tcet->fd < 0) {
192
193 return;
194 }
195
196 newtable = g_malloc(table_size);
197 memcpy(newtable, tcet->table, table_size);
198
199 kvmppc_remove_spapr_tce(tcet->table, tcet->fd, tcet->nb_table);
200
201 tcet->fd = -1;
202 tcet->table = newtable;
203}
204
205sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn,
206 uint64_t bus_offset,
207 uint32_t page_shift,
208 uint32_t nb_table,
209 bool need_vfio)
210{
211 sPAPRTCETable *tcet;
212 char tmp[64];
213
214 if (spapr_tce_find_by_liobn(liobn)) {
215 fprintf(stderr, "Attempted to create TCE table with duplicate"
216 " LIOBN 0x%x\n", liobn);
217 return NULL;
218 }
219
220 if (!nb_table) {
221 return NULL;
222 }
223
224 tcet = SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE));
225 tcet->liobn = liobn;
226 tcet->bus_offset = bus_offset;
227 tcet->page_shift = page_shift;
228 tcet->nb_table = nb_table;
229 tcet->need_vfio = need_vfio;
230
231 snprintf(tmp, sizeof(tmp), "tce-table-%x", liobn);
232 object_property_add_child(OBJECT(owner), tmp, OBJECT(tcet), NULL);
233
234 object_property_set_bool(OBJECT(tcet), true, "realized", NULL);
235
236 return tcet;
237}
238
239static void spapr_tce_table_unrealize(DeviceState *dev, Error **errp)
240{
241 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
242
243 QLIST_REMOVE(tcet, list);
244
245 if (!kvm_enabled() ||
246 (kvmppc_remove_spapr_tce(tcet->table, tcet->fd,
247 tcet->nb_table) != 0)) {
248 g_free(tcet->table);
249 }
250}
251
252MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
253{
254 return &tcet->iommu;
255}
256
257static void spapr_tce_reset(DeviceState *dev)
258{
259 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
260 size_t table_size = tcet->nb_table * sizeof(uint64_t);
261
262 memset(tcet->table, 0, table_size);
263}
264
265static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
266 target_ulong tce)
267{
268 IOMMUTLBEntry entry;
269 hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
270 unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift;
271
272 if (index >= tcet->nb_table) {
273 hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
274 TARGET_FMT_lx "\n", ioba);
275 return H_PARAMETER;
276 }
277
278 tcet->table[index] = tce;
279
280 entry.target_as = &address_space_memory,
281 entry.iova = ioba & page_mask;
282 entry.translated_addr = tce & page_mask;
283 entry.addr_mask = ~page_mask;
284 entry.perm = spapr_tce_iommu_access_flags(tce);
285 memory_region_notify_iommu(&tcet->iommu, entry);
286
287 return H_SUCCESS;
288}
289
290static target_ulong h_put_tce_indirect(PowerPCCPU *cpu,
291 sPAPRMachineState *spapr,
292 target_ulong opcode, target_ulong *args)
293{
294 int i;
295 target_ulong liobn = args[0];
296 target_ulong ioba = args[1];
297 target_ulong ioba1 = ioba;
298 target_ulong tce_list = args[2];
299 target_ulong npages = args[3];
300 target_ulong ret = H_PARAMETER, tce = 0;
301 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
302 CPUState *cs = CPU(cpu);
303 hwaddr page_mask, page_size;
304
305 if (!tcet) {
306 return H_PARAMETER;
307 }
308
309 if ((npages > 512) || (tce_list & SPAPR_TCE_PAGE_MASK)) {
310 return H_PARAMETER;
311 }
312
313 page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
314 page_size = IOMMU_PAGE_SIZE(tcet->page_shift);
315 ioba &= page_mask;
316
317 for (i = 0; i < npages; ++i, ioba += page_size) {
318 tce = ldq_be_phys(cs->as, tce_list + i * sizeof(target_ulong));
319
320 ret = put_tce_emu(tcet, ioba, tce);
321 if (ret) {
322 break;
323 }
324 }
325
326
327 i = i ? (i - 1) : 0;
328 if (SPAPR_IS_PCI_LIOBN(liobn)) {
329 trace_spapr_iommu_pci_indirect(liobn, ioba1, tce_list, i, tce, ret);
330 } else {
331 trace_spapr_iommu_indirect(liobn, ioba1, tce_list, i, tce, ret);
332 }
333 return ret;
334}
335
336static target_ulong h_stuff_tce(PowerPCCPU *cpu, sPAPRMachineState *spapr,
337 target_ulong opcode, target_ulong *args)
338{
339 int i;
340 target_ulong liobn = args[0];
341 target_ulong ioba = args[1];
342 target_ulong tce_value = args[2];
343 target_ulong npages = args[3];
344 target_ulong ret = H_PARAMETER;
345 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
346 hwaddr page_mask, page_size;
347
348 if (!tcet) {
349 return H_PARAMETER;
350 }
351
352 if (npages > tcet->nb_table) {
353 return H_PARAMETER;
354 }
355
356 page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
357 page_size = IOMMU_PAGE_SIZE(tcet->page_shift);
358 ioba &= page_mask;
359
360 for (i = 0; i < npages; ++i, ioba += page_size) {
361 ret = put_tce_emu(tcet, ioba, tce_value);
362 if (ret) {
363 break;
364 }
365 }
366 if (SPAPR_IS_PCI_LIOBN(liobn)) {
367 trace_spapr_iommu_pci_stuff(liobn, ioba, tce_value, npages, ret);
368 } else {
369 trace_spapr_iommu_stuff(liobn, ioba, tce_value, npages, ret);
370 }
371
372 return ret;
373}
374
375static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPRMachineState *spapr,
376 target_ulong opcode, target_ulong *args)
377{
378 target_ulong liobn = args[0];
379 target_ulong ioba = args[1];
380 target_ulong tce = args[2];
381 target_ulong ret = H_PARAMETER;
382 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
383
384 if (tcet) {
385 hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
386
387 ioba &= page_mask;
388
389 ret = put_tce_emu(tcet, ioba, tce);
390 }
391 if (SPAPR_IS_PCI_LIOBN(liobn)) {
392 trace_spapr_iommu_pci_put(liobn, ioba, tce, ret);
393 } else {
394 trace_spapr_iommu_put(liobn, ioba, tce, ret);
395 }
396
397 return ret;
398}
399
400static target_ulong get_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
401 target_ulong *tce)
402{
403 unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift;
404
405 if (index >= tcet->nb_table) {
406 hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x"
407 TARGET_FMT_lx "\n", ioba);
408 return H_PARAMETER;
409 }
410
411 *tce = tcet->table[index];
412
413 return H_SUCCESS;
414}
415
416static target_ulong h_get_tce(PowerPCCPU *cpu, sPAPRMachineState *spapr,
417 target_ulong opcode, target_ulong *args)
418{
419 target_ulong liobn = args[0];
420 target_ulong ioba = args[1];
421 target_ulong tce = 0;
422 target_ulong ret = H_PARAMETER;
423 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
424
425 if (tcet) {
426 hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
427
428 ioba &= page_mask;
429
430 ret = get_tce_emu(tcet, ioba, &tce);
431 if (!ret) {
432 args[0] = tce;
433 }
434 }
435 if (SPAPR_IS_PCI_LIOBN(liobn)) {
436 trace_spapr_iommu_pci_get(liobn, ioba, ret, tce);
437 } else {
438 trace_spapr_iommu_get(liobn, ioba, ret, tce);
439 }
440
441 return ret;
442}
443
444int spapr_dma_dt(void *fdt, int node_off, const char *propname,
445 uint32_t liobn, uint64_t window, uint32_t size)
446{
447 uint32_t dma_prop[5];
448 int ret;
449
450 dma_prop[0] = cpu_to_be32(liobn);
451 dma_prop[1] = cpu_to_be32(window >> 32);
452 dma_prop[2] = cpu_to_be32(window & 0xFFFFFFFF);
453 dma_prop[3] = 0;
454 dma_prop[4] = cpu_to_be32(size);
455
456 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
457 if (ret < 0) {
458 return ret;
459 }
460
461 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
462 if (ret < 0) {
463 return ret;
464 }
465
466 ret = fdt_setprop(fdt, node_off, propname, dma_prop, sizeof(dma_prop));
467 if (ret < 0) {
468 return ret;
469 }
470
471 return 0;
472}
473
474int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
475 sPAPRTCETable *tcet)
476{
477 if (!tcet) {
478 return 0;
479 }
480
481 return spapr_dma_dt(fdt, node_off, propname,
482 tcet->liobn, 0, tcet->nb_table << tcet->page_shift);
483}
484
485static void spapr_tce_table_class_init(ObjectClass *klass, void *data)
486{
487 DeviceClass *dc = DEVICE_CLASS(klass);
488 dc->init = spapr_tce_table_realize;
489 dc->reset = spapr_tce_reset;
490 dc->unrealize = spapr_tce_table_unrealize;
491
492 QLIST_INIT(&spapr_tce_tables);
493
494
495 spapr_register_hypercall(H_PUT_TCE, h_put_tce);
496 spapr_register_hypercall(H_GET_TCE, h_get_tce);
497 spapr_register_hypercall(H_PUT_TCE_INDIRECT, h_put_tce_indirect);
498 spapr_register_hypercall(H_STUFF_TCE, h_stuff_tce);
499}
500
501static TypeInfo spapr_tce_table_info = {
502 .name = TYPE_SPAPR_TCE_TABLE,
503 .parent = TYPE_DEVICE,
504 .instance_size = sizeof(sPAPRTCETable),
505 .class_init = spapr_tce_table_class_init,
506};
507
508static void register_types(void)
509{
510 type_register_static(&spapr_tce_table_info);
511}
512
513type_init(register_types);
514