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15#include "qemu/osdep.h"
16#include "hw/ssi/ssi.h"
17#include "hw/fdt_generic_util.h"
18
19struct SSIBus {
20 BusState parent_obj;
21};
22
23#define TYPE_SSI_BUS "SSI"
24#define SSI_BUS(obj) OBJECT_CHECK(SSIBus, (obj), TYPE_SSI_BUS)
25
26static const TypeInfo ssi_bus_info = {
27 .name = TYPE_SSI_BUS,
28 .parent = TYPE_BUS,
29 .instance_size = sizeof(SSIBus),
30};
31
32static void ssi_cs_default(void *opaque, int n, int level)
33{
34 SSISlave *s = SSI_SLAVE(opaque);
35 bool cs = !!level;
36 assert(n == 0);
37 if (s->cs != cs) {
38 SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(s);
39 if (ssc->set_cs) {
40 ssc->set_cs(s, cs);
41 }
42 }
43 s->cs = cs;
44}
45
46static uint32_t ssi_transfer_raw_default(SSISlave *dev, uint32_t val,
47 int num_bits)
48{
49 SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(dev);
50
51 if ((dev->cs && ssc->cs_polarity == SSI_CS_HIGH) ||
52 (!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
53 ssc->cs_polarity == SSI_CS_NONE) {
54 if (ssc->transfer_bits) {
55 return ssc->transfer_bits(dev, val, num_bits);
56 } else if (ssc->transfer) {
57 return ssc->transfer(dev, val);
58 }
59 }
60 return 0;
61}
62
63static bool ssi_slave_parse_reg(FDTGenericMMap *obj, FDTGenericRegPropInfo reg,
64 Error **errp)
65{
66 SSISlave *s = SSI_SLAVE(obj);
67 SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(s);
68 DeviceState *parent = DEVICE(reg.parents[0]);
69 BusState *parent_bus;
70 char bus_name[16];
71
72 if (!parent->realized) {
73 return true;
74 }
75
76 if (ssc->transfer_raw == ssi_transfer_raw_default &&
77 ssc->cs_polarity != SSI_CS_NONE) {
78 qdev_connect_gpio_out(parent, reg.a[0],
79 qdev_get_gpio_in_named(DEVICE(s),
80 SSI_GPIO_CS, 0));
81 }
82
83 snprintf(bus_name, 16, "spi%" PRIx64, reg.b[0]);
84 parent_bus = qdev_get_child_bus(parent, bus_name);
85 if (!parent_bus) {
86
87
88
89 snprintf(bus_name, 16, "spi");
90 parent_bus = qdev_get_child_bus(parent, bus_name);
91 }
92 qdev_set_parent_bus(DEVICE(s), parent_bus);
93 return false;
94}
95
96static int ssi_slave_init(DeviceState *dev)
97{
98 SSISlave *s = SSI_SLAVE(dev);
99 SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(s);
100
101 if (ssc->transfer_raw == ssi_transfer_raw_default &&
102 ssc->cs_polarity != SSI_CS_NONE) {
103 qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1);
104 }
105
106 return ssc->init(s);
107}
108
109static void ssi_slave_class_init(ObjectClass *klass, void *data)
110{
111 SSISlaveClass *ssc = SSI_SLAVE_CLASS(klass);
112 DeviceClass *dc = DEVICE_CLASS(klass);
113 FDTGenericMMapClass *fmc = FDT_GENERIC_MMAP_CLASS(klass);
114
115 dc->init = ssi_slave_init;
116 dc->bus_type = TYPE_SSI_BUS;
117 if (!ssc->transfer_raw) {
118 ssc->transfer_raw = ssi_transfer_raw_default;
119 }
120 fmc->parse_reg = ssi_slave_parse_reg;
121}
122
123static const TypeInfo ssi_slave_info = {
124 .name = TYPE_SSI_SLAVE,
125 .parent = TYPE_DEVICE,
126 .class_init = ssi_slave_class_init,
127 .class_size = sizeof(SSISlaveClass),
128 .interfaces = (InterfaceInfo []) {
129 { TYPE_FDT_GENERIC_MMAP },
130 {},
131 },
132 .abstract = true,
133};
134
135DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name)
136{
137 return qdev_create(BUS(bus), name);
138}
139
140DeviceState *ssi_create_slave(SSIBus *bus, const char *name)
141{
142 DeviceState *dev = ssi_create_slave_no_init(bus, name);
143
144 qdev_init_nofail(dev);
145 return dev;
146}
147
148SSIBus *ssi_create_bus(DeviceState *parent, const char *name)
149{
150 BusState *bus;
151 bus = qbus_create(TYPE_SSI_BUS, parent, name);
152 return SSI_BUS(bus);
153}
154
155uint32_t ssi_transfer_bits(SSIBus *bus, uint32_t val, int num_bits)
156{
157 BusState *b = BUS(bus);
158 BusChild *kid;
159 SSISlaveClass *ssc;
160 uint32_t r = 0;
161
162 QTAILQ_FOREACH(kid, &b->children, sibling) {
163 SSISlave *slave = SSI_SLAVE(kid->child);
164 ssc = SSI_SLAVE_GET_CLASS(slave);
165 r |= ssc->transfer_raw(slave, val, num_bits);
166 }
167
168 return r;
169}
170
171uint32_t ssi_transfer(SSIBus *bus, uint32_t val)
172{
173 return ssi_transfer_bits(bus, val, 0);
174}
175
176void ssi_set_datalines(SSIBus *bus, uint8_t val)
177{
178 BusState *b = BUS(bus);
179 BusChild *kid;
180 SSISlaveClass *ssc;
181 SSISlave *slave;
182
183 QTAILQ_FOREACH(kid, &b->children, sibling) {
184 slave = SSI_SLAVE(kid->child);
185 ssc = SSI_SLAVE_GET_CLASS(slave);
186 ssc->set_data_lines(slave, val);
187 }
188
189}
190
191const VMStateDescription vmstate_ssi_slave = {
192 .name = "SSISlave",
193 .version_id = 1,
194 .minimum_version_id = 1,
195 .fields = (VMStateField[]) {
196 VMSTATE_BOOL(cs, SSISlave),
197 VMSTATE_END_OF_LIST()
198 }
199};
200
201static void ssi_slave_register_types(void)
202{
203 type_register_static(&ssi_bus_info);
204 type_register_static(&ssi_slave_info);
205}
206
207type_init(ssi_slave_register_types)
208
209typedef struct SSIAutoConnectArg {
210 qemu_irq **cs_linep;
211 SSIBus *bus;
212} SSIAutoConnectArg;
213
214static int ssi_auto_connect_slave(Object *child, void *opaque)
215{
216 SSIAutoConnectArg *arg = opaque;
217 SSISlave *dev = (SSISlave *)object_dynamic_cast(child, TYPE_SSI_SLAVE);
218 qemu_irq cs_line;
219
220 if (!dev) {
221 return 0;
222 }
223
224 cs_line = qdev_get_gpio_in_named(DEVICE(dev), SSI_GPIO_CS, 0);
225 qdev_set_parent_bus(DEVICE(dev), BUS(arg->bus));
226 **arg->cs_linep = cs_line;
227 (*arg->cs_linep)++;
228 return 0;
229}
230
231void ssi_auto_connect_slaves(DeviceState *parent, qemu_irq *cs_line,
232 SSIBus *bus)
233{
234 SSIAutoConnectArg arg = {
235 .cs_linep = &cs_line,
236 .bus = bus
237 };
238
239 object_child_foreach(OBJECT(parent), ssi_auto_connect_slave, &arg);
240}
241
