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11#ifndef REGISTER_H
12#define REGISTER_H
13
14#include "hw/qdev-core.h"
15#include "exec/memory.h"
16#include "hw/irq.h"
17
18typedef struct RegisterInfo RegisterInfo;
19typedef struct RegisterAccessInfo RegisterAccessInfo;
20typedef struct RegisterDecodeInfo RegisterDecodeInfo;
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28typedef struct RegisterAccessError {
29 uint64_t mask;
30 const char *reason;
31} RegisterAccessError;
32
33#define REG_GPIO_POL_HIGH 0
34#define REG_GPIO_POL_LOW 1
35typedef struct RegisterGPIOMapping {
36 const char *name;
37 uint8_t bit_pos;
38 bool input;
39 bool polarity;
40 uint8_t num;
41 uint8_t width;
42} RegisterGPIOMapping;
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71#define REG_DECODE_READ (1 << 0)
72#define REG_DECODE_WRITE (1 << 1)
73#define REG_DECODE_EXECUTE (1 << 2)
74#define REG_DECODE_RW (REG_DECODE_READ | REG_DECODE_WRITE)
75
76struct RegisterAccessInfo {
77 const char *name;
78 uint64_t ro;
79 uint64_t w1c;
80 uint64_t reset;
81 uint64_t cor;
82 uint64_t rsvd;
83
84 uint64_t inhibit_reset;
85
86 const RegisterAccessError *ge0;
87 const RegisterAccessError *ge1;
88 const RegisterAccessError *ui0;
89 const RegisterAccessError *ui1;
90
91 uint64_t (*pre_write)(RegisterInfo *reg, uint64_t val);
92 void (*post_write)(RegisterInfo *reg, uint64_t val);
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94 uint64_t (*post_read)(RegisterInfo *reg, uint64_t val);
95
96 const RegisterGPIOMapping *gpios;
97
98 size_t storage;
99 int data_size;
100
101 struct {
102 hwaddr addr;
103 uint8_t flags;
104 } decode;
105
106 void *opaque;
107};
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127struct RegisterInfo {
128 DeviceState parent_obj;
129
130 void *data;
131 int data_size;
132
133 const RegisterAccessInfo *access;
134
135 bool debug;
136 const char *prefix;
137
138 void *opaque;
139
140 bool read_lite;
141 bool write_lite;
142
143 MemoryRegion mem;
144};
145
146#define TYPE_REGISTER "qemu,register"
147#define REGISTER(obj) OBJECT_CHECK(RegisterInfo, (obj), TYPE_REGISTER)
148
149struct RegisterDecodeInfo {
150 RegisterInfo *reg;
151 hwaddr addr;
152 unsigned len;
153};
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162void register_write(RegisterInfo *reg, uint64_t val, uint64_t we);
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170uint64_t register_read(RegisterInfo *reg);
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177void register_reset(RegisterInfo *reg);
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184void register_init(RegisterInfo *reg);
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195void register_refresh_gpios(RegisterInfo *reg, uint64_t old_value);
196
197void register_write_memory_be(void *opaque, hwaddr addr, uint64_t value,
198 unsigned size);
199void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value,
200 unsigned size);
201
202uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size);
203uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size);
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207#define REG32(reg, addr) \
208enum { A_ ## reg = (addr) }; \
209enum { R_ ## reg = (addr) / 4 };
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213#define FIELD(reg, field, length, shift) \
214enum { R_ ## reg ## _ ## field ## _SHIFT = (shift)}; \
215enum { R_ ## reg ## _ ## field ## _LENGTH = (length)}; \
216enum { R_ ## reg ## _ ## field ## _MASK = (((1ULL << (length)) - 1) \
217 << (shift)) };
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221#define F_EX32(storage, reg, field) \
222 extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
223 R_ ## reg ## _ ## field ## _LENGTH)
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227#define AF_EX32(regs, reg, field) \
228 F_EX32((regs)[R_ ## reg], reg, field)
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232#define F_DP32(storage, reg, field, val) ({ \
233 struct { \
234 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
235 } v = { .v = val }; \
236 uint32_t d; \
237 d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
238 R_ ## reg ## _ ## field ## _LENGTH, v.v); \
239 d; })
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243#define AF_DP32(regs, reg, field, val) \
244 (regs)[R_ ## reg] = F_DP32((regs)[R_ ## reg], reg, field, val);
245#endif
246