1/* 2 * Virtio PCI driver 3 * 4 * This module allows virtio devices to be used over a virtual PCI device. 5 * This can be used with QEMU based VMMs like KVM or Xen. 6 * 7 * Copyright IBM Corp. 2007 8 * 9 * Authors: 10 * Anthony Liguori <aliguori@us.ibm.com> 11 * 12 * This header is BSD licensed so anyone can use the definitions to implement 13 * compatible drivers/servers. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. Neither the name of IBM nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 */ 38 39#ifndef _LINUX_VIRTIO_PCI_H 40#define _LINUX_VIRTIO_PCI_H 41 42#include "standard-headers/linux/types.h" 43 44#ifndef VIRTIO_PCI_NO_LEGACY 45 46/* A 32-bit r/o bitmask of the features supported by the host */ 47#define VIRTIO_PCI_HOST_FEATURES 0 48 49/* A 32-bit r/w bitmask of features activated by the guest */ 50#define VIRTIO_PCI_GUEST_FEATURES 4 51 52/* A 32-bit r/w PFN for the currently selected queue */ 53#define VIRTIO_PCI_QUEUE_PFN 8 54 55/* A 16-bit r/o queue size for the currently selected queue */ 56#define VIRTIO_PCI_QUEUE_NUM 12 57 58/* A 16-bit r/w queue selector */ 59#define VIRTIO_PCI_QUEUE_SEL 14 60 61/* A 16-bit r/w queue notifier */ 62#define VIRTIO_PCI_QUEUE_NOTIFY 16 63 64/* An 8-bit device status register. */ 65#define VIRTIO_PCI_STATUS 18 66 67/* An 8-bit r/o interrupt status register. Reading the value will return the 68 * current contents of the ISR and will also clear it. This is effectively 69 * a read-and-acknowledge. */ 70#define VIRTIO_PCI_ISR 19 71 72/* MSI-X registers: only enabled if MSI-X is enabled. */ 73/* A 16-bit vector for configuration changes. */ 74#define VIRTIO_MSI_CONFIG_VECTOR 20 75/* A 16-bit vector for selected queue notifications. */ 76#define VIRTIO_MSI_QUEUE_VECTOR 22 77 78/* The remaining space is defined by each driver as the per-driver 79 * configuration space */ 80#define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20) 81/* Deprecated: please use VIRTIO_PCI_CONFIG_OFF instead */ 82#define VIRTIO_PCI_CONFIG(dev) VIRTIO_PCI_CONFIG_OFF((dev)->msix_enabled) 83 84/* Virtio ABI version, this must match exactly */ 85#define VIRTIO_PCI_ABI_VERSION 0 86 87/* How many bits to shift physical queue address written to QUEUE_PFN. 88 * 12 is historical, and due to x86 page size. */ 89#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 90 91/* The alignment to use between consumer and producer parts of vring. 92 * x86 pagesize again. */ 93#define VIRTIO_PCI_VRING_ALIGN 4096 94 95#endif /* VIRTIO_PCI_NO_LEGACY */ 96 97/* The bit of the ISR which indicates a device configuration change. */ 98#define VIRTIO_PCI_ISR_CONFIG 0x2 99/* Vector value used to disable MSI for queue */ 100#define VIRTIO_MSI_NO_VECTOR 0xffff 101 102#ifndef VIRTIO_PCI_NO_MODERN 103 104/* IDs for different capabilities. Must all exist. */ 105 106/* Common configuration */ 107#define VIRTIO_PCI_CAP_COMMON_CFG 1 108/* Notifications */ 109#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 110/* ISR access */ 111#define VIRTIO_PCI_CAP_ISR_CFG 3 112/* Device specific configuration */ 113#define VIRTIO_PCI_CAP_DEVICE_CFG 4 114/* PCI configuration access */ 115#define VIRTIO_PCI_CAP_PCI_CFG 5 116 117/* This is the PCI capability header: */ 118struct virtio_pci_cap { 119 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 120 uint8_t cap_next; /* Generic PCI field: next ptr. */ 121 uint8_t cap_len; /* Generic PCI field: capability length */ 122 uint8_t cfg_type; /* Identifies the structure. */ 123 uint8_t bar; /* Where to find it. */ 124 uint8_t padding[3]; /* Pad to full dword. */ 125 uint32_t offset; /* Offset within bar. */ 126 uint32_t length; /* Length of the structure, in bytes. */ 127}; 128 129struct virtio_pci_notify_cap { 130 struct virtio_pci_cap cap; 131 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 132}; 133 134/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ 135struct virtio_pci_common_cfg { 136 /* About the whole device. */ 137 uint32_t device_feature_select; /* read-write */ 138 uint32_t device_feature; /* read-only */ 139 uint32_t guest_feature_select; /* read-write */ 140 uint32_t guest_feature; /* read-write */ 141 uint16_t msix_config; /* read-write */ 142 uint16_t num_queues; /* read-only */ 143 uint8_t device_status; /* read-write */ 144 uint8_t config_generation; /* read-only */ 145 146 /* About a specific virtqueue. */ 147 uint16_t queue_select; /* read-write */ 148 uint16_t queue_size; /* read-write, power of 2. */ 149 uint16_t queue_msix_vector; /* read-write */ 150 uint16_t queue_enable; /* read-write */ 151 uint16_t queue_notify_off; /* read-only */ 152 uint32_t queue_desc_lo; /* read-write */ 153 uint32_t queue_desc_hi; /* read-write */ 154 uint32_t queue_avail_lo; /* read-write */ 155 uint32_t queue_avail_hi; /* read-write */ 156 uint32_t queue_used_lo; /* read-write */ 157 uint32_t queue_used_hi; /* read-write */ 158}; 159 160/* Fields in VIRTIO_PCI_CAP_PCI_CFG: */ 161struct virtio_pci_cfg_cap { 162 struct virtio_pci_cap cap; 163 uint8_t pci_cfg_data[4]; /* Data for BAR access. */ 164}; 165 166/* Macro versions of offsets for the Old Timers! */ 167#define VIRTIO_PCI_CAP_VNDR 0 168#define VIRTIO_PCI_CAP_NEXT 1 169#define VIRTIO_PCI_CAP_LEN 2 170#define VIRTIO_PCI_CAP_CFG_TYPE 3 171#define VIRTIO_PCI_CAP_BAR 4 172#define VIRTIO_PCI_CAP_OFFSET 8 173#define VIRTIO_PCI_CAP_LENGTH 12 174 175#define VIRTIO_PCI_NOTIFY_CAP_MULT 16 176 177#define VIRTIO_PCI_COMMON_DFSELECT 0 178#define VIRTIO_PCI_COMMON_DF 4 179#define VIRTIO_PCI_COMMON_GFSELECT 8 180#define VIRTIO_PCI_COMMON_GF 12 181#define VIRTIO_PCI_COMMON_MSIX 16 182#define VIRTIO_PCI_COMMON_NUMQ 18 183#define VIRTIO_PCI_COMMON_STATUS 20 184#define VIRTIO_PCI_COMMON_CFGGENERATION 21 185#define VIRTIO_PCI_COMMON_Q_SELECT 22 186#define VIRTIO_PCI_COMMON_Q_SIZE 24 187#define VIRTIO_PCI_COMMON_Q_MSIX 26 188#define VIRTIO_PCI_COMMON_Q_ENABLE 28 189#define VIRTIO_PCI_COMMON_Q_NOFF 30 190#define VIRTIO_PCI_COMMON_Q_DESCLO 32 191#define VIRTIO_PCI_COMMON_Q_DESCHI 36 192#define VIRTIO_PCI_COMMON_Q_AVAILLO 40 193#define VIRTIO_PCI_COMMON_Q_AVAILHI 44 194#define VIRTIO_PCI_COMMON_Q_USEDLO 48 195#define VIRTIO_PCI_COMMON_Q_USEDHI 52 196 197#endif /* VIRTIO_PCI_NO_MODERN */ 198 199#endif 200