qemu/target-alpha/cpu.c
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   1/*
   2 * QEMU Alpha CPU
   3 *
   4 * Copyright (c) 2007 Jocelyn Mayer
   5 * Copyright (c) 2012 SUSE LINUX Products GmbH
   6 *
   7 * This library is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU Lesser General Public
   9 * License as published by the Free Software Foundation; either
  10 * version 2.1 of the License, or (at your option) any later version.
  11 *
  12 * This library is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * Lesser General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU Lesser General Public
  18 * License along with this library; if not, see
  19 * <http://www.gnu.org/licenses/lgpl-2.1.html>
  20 */
  21
  22#include "qemu/osdep.h"
  23#include "qapi/error.h"
  24#include "cpu.h"
  25#include "qemu-common.h"
  26#include "migration/vmstate.h"
  27
  28
  29static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
  30{
  31    AlphaCPU *cpu = ALPHA_CPU(cs);
  32
  33    cpu->env.pc = value;
  34}
  35
  36static bool alpha_cpu_has_work(CPUState *cs)
  37{
  38    /* Here we are checking to see if the CPU should wake up from HALT.
  39       We will have gotten into this state only for WTINT from PALmode.  */
  40    /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
  41       asleep even if (some) interrupts have been asserted.  For now,
  42       assume that if a CPU really wants to stay asleep, it will mask
  43       interrupts at the chipset level, which will prevent these bits
  44       from being set in the first place.  */
  45    return cs->interrupt_request & (CPU_INTERRUPT_HARD
  46                                    | CPU_INTERRUPT_TIMER
  47                                    | CPU_INTERRUPT_SMP
  48                                    | CPU_INTERRUPT_MCHK);
  49}
  50
  51static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
  52{
  53    info->mach = bfd_mach_alpha_ev6;
  54    info->print_insn = print_insn_alpha;
  55}
  56
  57static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
  58{
  59    CPUState *cs = CPU(dev);
  60    AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev);
  61
  62    qemu_init_vcpu(cs);
  63
  64    acc->parent_realize(dev, errp);
  65}
  66
  67/* Sort alphabetically by type name. */
  68static gint alpha_cpu_list_compare(gconstpointer a, gconstpointer b)
  69{
  70    ObjectClass *class_a = (ObjectClass *)a;
  71    ObjectClass *class_b = (ObjectClass *)b;
  72    const char *name_a, *name_b;
  73
  74    name_a = object_class_get_name(class_a);
  75    name_b = object_class_get_name(class_b);
  76    return strcmp(name_a, name_b);
  77}
  78
  79static void alpha_cpu_list_entry(gpointer data, gpointer user_data)
  80{
  81    ObjectClass *oc = data;
  82    CPUListState *s = user_data;
  83
  84    (*s->cpu_fprintf)(s->file, "  %s\n",
  85                      object_class_get_name(oc));
  86}
  87
  88void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf)
  89{
  90    CPUListState s = {
  91        .file = f,
  92        .cpu_fprintf = cpu_fprintf,
  93    };
  94    GSList *list;
  95
  96    list = object_class_get_list(TYPE_ALPHA_CPU, false);
  97    list = g_slist_sort(list, alpha_cpu_list_compare);
  98    (*cpu_fprintf)(f, "Available CPUs:\n");
  99    g_slist_foreach(list, alpha_cpu_list_entry, &s);
 100    g_slist_free(list);
 101}
 102
 103/* Models */
 104
 105#define TYPE(model) model "-" TYPE_ALPHA_CPU
 106
 107typedef struct AlphaCPUAlias {
 108    const char *alias;
 109    const char *typename;
 110} AlphaCPUAlias;
 111
 112static const AlphaCPUAlias alpha_cpu_aliases[] = {
 113    { "21064",   TYPE("ev4") },
 114    { "21164",   TYPE("ev5") },
 115    { "21164a",  TYPE("ev56") },
 116    { "21164pc", TYPE("pca56") },
 117    { "21264",   TYPE("ev6") },
 118    { "21264a",  TYPE("ev67") },
 119};
 120
 121static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
 122{
 123    ObjectClass *oc = NULL;
 124    char *typename;
 125    int i;
 126
 127    if (cpu_model == NULL) {
 128        return NULL;
 129    }
 130
 131    oc = object_class_by_name(cpu_model);
 132    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL &&
 133        !object_class_is_abstract(oc)) {
 134        return oc;
 135    }
 136
 137    for (i = 0; i < ARRAY_SIZE(alpha_cpu_aliases); i++) {
 138        if (strcmp(cpu_model, alpha_cpu_aliases[i].alias) == 0) {
 139            oc = object_class_by_name(alpha_cpu_aliases[i].typename);
 140            assert(oc != NULL && !object_class_is_abstract(oc));
 141            return oc;
 142        }
 143    }
 144
 145    typename = g_strdup_printf("%s-" TYPE_ALPHA_CPU, cpu_model);
 146    oc = object_class_by_name(typename);
 147    g_free(typename);
 148    if (oc != NULL && object_class_is_abstract(oc)) {
 149        oc = NULL;
 150    }
 151    return oc;
 152}
 153
 154AlphaCPU *cpu_alpha_init(const char *cpu_model)
 155{
 156    AlphaCPU *cpu;
 157    ObjectClass *cpu_class;
 158
 159    cpu_class = alpha_cpu_class_by_name(cpu_model);
 160    if (cpu_class == NULL) {
 161        /* Default to ev67; no reason not to emulate insns by default.  */
 162        cpu_class = object_class_by_name(TYPE("ev67"));
 163    }
 164    cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class)));
 165
 166    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 167
 168    return cpu;
 169}
 170
 171static void ev4_cpu_initfn(Object *obj)
 172{
 173    AlphaCPU *cpu = ALPHA_CPU(obj);
 174    CPUAlphaState *env = &cpu->env;
 175
 176    env->implver = IMPLVER_2106x;
 177}
 178
 179static const TypeInfo ev4_cpu_type_info = {
 180    .name = TYPE("ev4"),
 181    .parent = TYPE_ALPHA_CPU,
 182    .instance_init = ev4_cpu_initfn,
 183};
 184
 185static void ev5_cpu_initfn(Object *obj)
 186{
 187    AlphaCPU *cpu = ALPHA_CPU(obj);
 188    CPUAlphaState *env = &cpu->env;
 189
 190    env->implver = IMPLVER_21164;
 191}
 192
 193static const TypeInfo ev5_cpu_type_info = {
 194    .name = TYPE("ev5"),
 195    .parent = TYPE_ALPHA_CPU,
 196    .instance_init = ev5_cpu_initfn,
 197};
 198
 199static void ev56_cpu_initfn(Object *obj)
 200{
 201    AlphaCPU *cpu = ALPHA_CPU(obj);
 202    CPUAlphaState *env = &cpu->env;
 203
 204    env->amask |= AMASK_BWX;
 205}
 206
 207static const TypeInfo ev56_cpu_type_info = {
 208    .name = TYPE("ev56"),
 209    .parent = TYPE("ev5"),
 210    .instance_init = ev56_cpu_initfn,
 211};
 212
 213static void pca56_cpu_initfn(Object *obj)
 214{
 215    AlphaCPU *cpu = ALPHA_CPU(obj);
 216    CPUAlphaState *env = &cpu->env;
 217
 218    env->amask |= AMASK_MVI;
 219}
 220
 221static const TypeInfo pca56_cpu_type_info = {
 222    .name = TYPE("pca56"),
 223    .parent = TYPE("ev56"),
 224    .instance_init = pca56_cpu_initfn,
 225};
 226
 227static void ev6_cpu_initfn(Object *obj)
 228{
 229    AlphaCPU *cpu = ALPHA_CPU(obj);
 230    CPUAlphaState *env = &cpu->env;
 231
 232    env->implver = IMPLVER_21264;
 233    env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP;
 234}
 235
 236static const TypeInfo ev6_cpu_type_info = {
 237    .name = TYPE("ev6"),
 238    .parent = TYPE_ALPHA_CPU,
 239    .instance_init = ev6_cpu_initfn,
 240};
 241
 242static void ev67_cpu_initfn(Object *obj)
 243{
 244    AlphaCPU *cpu = ALPHA_CPU(obj);
 245    CPUAlphaState *env = &cpu->env;
 246
 247    env->amask |= AMASK_CIX | AMASK_PREFETCH;
 248}
 249
 250static const TypeInfo ev67_cpu_type_info = {
 251    .name = TYPE("ev67"),
 252    .parent = TYPE("ev6"),
 253    .instance_init = ev67_cpu_initfn,
 254};
 255
 256static const TypeInfo ev68_cpu_type_info = {
 257    .name = TYPE("ev68"),
 258    .parent = TYPE("ev67"),
 259};
 260
 261static void alpha_cpu_initfn(Object *obj)
 262{
 263    CPUState *cs = CPU(obj);
 264    AlphaCPU *cpu = ALPHA_CPU(obj);
 265    CPUAlphaState *env = &cpu->env;
 266
 267    cs->env_ptr = env;
 268    cpu_exec_init(cs, &error_abort);
 269    tlb_flush(cs, 1);
 270
 271    alpha_translate_init();
 272
 273#if defined(CONFIG_USER_ONLY)
 274    env->ps = PS_USER_MODE;
 275    cpu_alpha_store_fpcr(env, (FPCR_INVD | FPCR_DZED | FPCR_OVFD
 276                               | FPCR_UNFD | FPCR_INED | FPCR_DNOD
 277                               | FPCR_DYN_NORMAL));
 278#endif
 279    env->lock_addr = -1;
 280    env->fen = 1;
 281}
 282
 283static void alpha_cpu_class_init(ObjectClass *oc, void *data)
 284{
 285    DeviceClass *dc = DEVICE_CLASS(oc);
 286    CPUClass *cc = CPU_CLASS(oc);
 287    AlphaCPUClass *acc = ALPHA_CPU_CLASS(oc);
 288
 289    acc->parent_realize = dc->realize;
 290    dc->realize = alpha_cpu_realizefn;
 291
 292    cc->class_by_name = alpha_cpu_class_by_name;
 293    cc->has_work = alpha_cpu_has_work;
 294    cc->do_interrupt = alpha_cpu_do_interrupt;
 295    cc->cpu_exec_interrupt = alpha_cpu_exec_interrupt;
 296    cc->dump_state = alpha_cpu_dump_state;
 297    cc->set_pc = alpha_cpu_set_pc;
 298    cc->gdb_read_register = alpha_cpu_gdb_read_register;
 299    cc->gdb_write_register = alpha_cpu_gdb_write_register;
 300#ifdef CONFIG_USER_ONLY
 301    cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;
 302#else
 303    cc->do_unassigned_access = alpha_cpu_unassigned_access;
 304    cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
 305    cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
 306    dc->vmsd = &vmstate_alpha_cpu;
 307#endif
 308    cc->disas_set_info = alpha_cpu_disas_set_info;
 309
 310    cc->gdb_num_core_regs = 67;
 311
 312    /*
 313     * Reason: alpha_cpu_initfn() calls cpu_exec_init(), which saves
 314     * the object in cpus -> dangling pointer after final
 315     * object_unref().
 316     */
 317    dc->cannot_destroy_with_object_finalize_yet = true;
 318}
 319
 320static const TypeInfo alpha_cpu_type_info = {
 321    .name = TYPE_ALPHA_CPU,
 322    .parent = TYPE_CPU,
 323    .instance_size = sizeof(AlphaCPU),
 324    .instance_init = alpha_cpu_initfn,
 325    .abstract = true,
 326    .class_size = sizeof(AlphaCPUClass),
 327    .class_init = alpha_cpu_class_init,
 328};
 329
 330static void alpha_cpu_register_types(void)
 331{
 332    type_register_static(&alpha_cpu_type_info);
 333    type_register_static(&ev4_cpu_type_info);
 334    type_register_static(&ev5_cpu_type_info);
 335    type_register_static(&ev56_cpu_type_info);
 336    type_register_static(&pca56_cpu_type_info);
 337    type_register_static(&ev6_cpu_type_info);
 338    type_register_static(&ev67_cpu_type_info);
 339    type_register_static(&ev68_cpu_type_info);
 340}
 341
 342type_init(alpha_cpu_register_types)
 343