1#ifndef TARGET_ARM_TRANSLATE_H
2#define TARGET_ARM_TRANSLATE_H
3
4
5typedef struct DisasContext {
6 target_ulong pc;
7 uint32_t insn;
8 int is_jmp;
9
10 int condjmp;
11
12 TCGLabel *condlabel;
13
14 int condexec_mask;
15 int condexec_cond;
16 struct TranslationBlock *tb;
17 int singlestep_enabled;
18 int thumb;
19 int sctlr_b;
20 TCGMemOp be_data;
21#if !defined(CONFIG_USER_ONLY)
22 int user;
23#endif
24 ARMMMUIdx mmu_idx;
25 bool ns;
26 int fp_excp_el;
27
28 bool secure_routed_to_el3;
29 bool vfp_enabled;
30 int vec_len;
31 int vec_stride;
32
33
34
35 uint32_t svc_imm;
36 int aarch64;
37 int current_el;
38 GHashTable *cp_regs;
39 uint64_t features;
40
41
42
43
44
45
46
47 bool fp_access_checked;
48
49
50
51 bool ss_active;
52 bool pstate_ss;
53
54
55
56
57 bool is_ldex;
58
59 bool ss_same_el;
60
61 int c15_cpar;
62
63 int insn_start_idx;
64#define TMP_A64_MAX 16
65 int tmp_a64_count;
66 TCGv_i64 tmp_a64[TMP_A64_MAX];
67} DisasContext;
68
69typedef struct DisasCompare {
70 TCGCond cond;
71 TCGv_i32 value;
72 bool value_global;
73} DisasCompare;
74
75
76extern TCGv_env cpu_env;
77extern TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF;
78extern TCGv_i64 cpu_exclusive_addr;
79extern TCGv_i64 cpu_exclusive_val;
80#ifdef CONFIG_USER_ONLY
81extern TCGv_i64 cpu_exclusive_test;
82extern TCGv_i32 cpu_exclusive_info;
83#endif
84
85static inline int arm_dc_feature(DisasContext *dc, int feature)
86{
87 return (dc->features & (1ULL << feature)) != 0;
88}
89
90static inline int get_mem_index(DisasContext *s)
91{
92 return s->mmu_idx;
93}
94
95
96
97
98static inline int default_exception_el(DisasContext *s)
99{
100
101
102
103
104
105 return (s->mmu_idx == ARMMMUIdx_S1SE0 && s->secure_routed_to_el3)
106 ? 3 : MAX(1, s->current_el);
107}
108
109
110
111
112
113
114#define DISAS_WFI 4
115#define DISAS_SWI 5
116
117
118
119#define DISAS_EXC 6
120
121#define DISAS_WFE 7
122#define DISAS_HVC 8
123#define DISAS_SMC 9
124#define DISAS_YIELD 10
125
126#ifdef TARGET_AARCH64
127void a64_translate_init(void);
128void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb);
129void gen_a64_set_pc_im(uint64_t val);
130void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
131 fprintf_function cpu_fprintf, int flags);
132#else
133static inline void a64_translate_init(void)
134{
135}
136
137static inline void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb)
138{
139}
140
141static inline void gen_a64_set_pc_im(uint64_t val)
142{
143}
144
145static inline void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
146 fprintf_function cpu_fprintf,
147 int flags)
148{
149}
150#endif
151
152void arm_test_cc(DisasCompare *cmp, int cc);
153void arm_free_cc(DisasCompare *cmp);
154void arm_jump_cc(DisasCompare *cmp, TCGLabel *label);
155void arm_gen_test_cc(int cc, TCGLabel *label);
156
157#endif
158