1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20#ifndef QEMU_I386_CPU_QOM_H
21#define QEMU_I386_CPU_QOM_H
22
23#include "qom/cpu.h"
24#include "cpu.h"
25#include "qemu/notify.h"
26
27#ifdef TARGET_X86_64
28#define TYPE_X86_CPU "x86_64-cpu"
29#else
30#define TYPE_X86_CPU "i386-cpu"
31#endif
32
33#define X86_CPU_CLASS(klass) \
34 OBJECT_CLASS_CHECK(X86CPUClass, (klass), TYPE_X86_CPU)
35#define X86_CPU(obj) \
36 OBJECT_CHECK(X86CPU, (obj), TYPE_X86_CPU)
37#define X86_CPU_GET_CLASS(obj) \
38 OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU)
39
40
41
42
43
44
45
46typedef struct X86CPUDefinition X86CPUDefinition;
47
48
49
50
51
52
53
54
55
56
57typedef struct X86CPUClass {
58
59 CPUClass parent_class;
60
61
62
63 X86CPUDefinition *cpu_def;
64
65 bool kvm_required;
66
67 DeviceRealize parent_realize;
68 void (*parent_reset)(CPUState *cpu);
69} X86CPUClass;
70
71
72
73
74
75
76
77
78
79
80typedef struct X86CPU {
81
82 CPUState parent_obj;
83
84
85 CPUX86State env;
86
87 bool hyperv_vapic;
88 bool hyperv_relaxed_timing;
89 int hyperv_spinlock_attempts;
90 char *hyperv_vendor_id;
91 bool hyperv_time;
92 bool hyperv_crash;
93 bool hyperv_reset;
94 bool hyperv_vpindex;
95 bool hyperv_runtime;
96 bool hyperv_synic;
97 bool hyperv_stimer;
98 bool check_cpuid;
99 bool enforce_cpuid;
100 bool expose_kvm;
101 bool migratable;
102 bool host_features;
103 int64_t apic_id;
104
105
106 bool cache_info_passthrough;
107
108
109 uint32_t filtered_features[FEATURE_WORDS];
110
111
112
113
114
115
116 bool enable_pmu;
117
118
119
120 struct DeviceState *apic_state;
121 struct MemoryRegion *cpu_as_root, *cpu_as_mem, *smram;
122 Notifier machine_done;
123} X86CPU;
124
125static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
126{
127 return container_of(env, X86CPU, env);
128}
129
130#define ENV_GET_CPU(e) CPU(x86_env_get_cpu(e))
131
132#define ENV_OFFSET offsetof(X86CPU, env)
133
134#ifndef CONFIG_USER_ONLY
135extern struct VMStateDescription vmstate_x86_cpu;
136#endif
137
138
139
140
141
142void x86_cpu_do_interrupt(CPUState *cpu);
143bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);
144
145int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
146 int cpuid, void *opaque);
147int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
148 int cpuid, void *opaque);
149int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
150 void *opaque);
151int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
152 void *opaque);
153
154void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
155 Error **errp);
156
157void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
158 int flags);
159
160hwaddr x86_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
161
162int x86_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
163int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
164
165void x86_cpu_exec_enter(CPUState *cpu);
166void x86_cpu_exec_exit(CPUState *cpu);
167
168#endif
169