LXR qemu/target-unicore32/cpu-qom.h

   1/*
   2 * QEMU UniCore32 CPU
   3 *
   4 * Copyright (c) 2012 SUSE LINUX Products GmbH
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation, or (at your option) any
   9 * later version. See the COPYING file in the top-level directory.
  10 */
  11#ifndef QEMU_UC32_CPU_QOM_H
  12#define QEMU_UC32_CPU_QOM_H
  13
  14#include "qom/cpu.h"
  15#include "cpu.h"
  16
  17#define TYPE_UNICORE32_CPU "unicore32-cpu"
  18
  19#define UNICORE32_CPU_CLASS(klass) \
  20    OBJECT_CLASS_CHECK(UniCore32CPUClass, (klass), TYPE_UNICORE32_CPU)
  21#define UNICORE32_CPU(obj) \
  22    OBJECT_CHECK(UniCore32CPU, (obj), TYPE_UNICORE32_CPU)
  23#define UNICORE32_CPU_GET_CLASS(obj) \
  24    OBJECT_GET_CLASS(UniCore32CPUClass, (obj), TYPE_UNICORE32_CPU)
  25
  26/**
  27 * UniCore32CPUClass:
  28 * @parent_realize: The parent class' realize handler.
  29 *
  30 * A UniCore32 CPU model.
  31 */
  32typedef struct UniCore32CPUClass {
  33    /*< private >*/
  34    CPUClass parent_class;
  35    /*< public >*/
  36
  37    DeviceRealize parent_realize;
  38} UniCore32CPUClass;
  39
  40/**
  41 * UniCore32CPU:
  42 * @env: #CPUUniCore32State
  43 *
  44 * A UniCore32 CPU.
  45 */
  46typedef struct UniCore32CPU {
  47    /*< private >*/
  48    CPUState parent_obj;
  49    /*< public >*/
  50
  51    CPUUniCore32State env;
  52} UniCore32CPU;
  53
  54static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env)
  55{
  56    return container_of(env, UniCore32CPU, env);
  57}
  58
  59#define ENV_GET_CPU(e) CPU(uc32_env_get_cpu(e))
  60
  61#define ENV_OFFSET offsetof(UniCore32CPU, env)
  62
  63void uc32_cpu_do_interrupt(CPUState *cpu);
  64bool uc32_cpu_exec_interrupt(CPUState *cpu, int int_req);
  65void uc32_cpu_dump_state(CPUState *cpu, FILE *f,
  66                         fprintf_function cpu_fprintf, int flags);
  67hwaddr uc32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
  68
  69#endif
  70