qemu/target-xtensa/cpu.c
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   1/*
   2 * QEMU Xtensa CPU
   3 *
   4 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   5 * Copyright (c) 2012 SUSE LINUX Products GmbH
   6 * All rights reserved.
   7 *
   8 * Redistribution and use in source and binary forms, with or without
   9 * modification, are permitted provided that the following conditions are met:
  10 *     * Redistributions of source code must retain the above copyright
  11 *       notice, this list of conditions and the following disclaimer.
  12 *     * Redistributions in binary form must reproduce the above copyright
  13 *       notice, this list of conditions and the following disclaimer in the
  14 *       documentation and/or other materials provided with the distribution.
  15 *     * Neither the name of the Open Source and Linux Lab nor the
  16 *       names of its contributors may be used to endorse or promote products
  17 *       derived from this software without specific prior written permission.
  18 *
  19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29 */
  30
  31#include "qemu/osdep.h"
  32#include "qapi/error.h"
  33#include "cpu.h"
  34#include "qemu-common.h"
  35#include "migration/vmstate.h"
  36
  37
  38static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
  39{
  40    XtensaCPU *cpu = XTENSA_CPU(cs);
  41
  42    cpu->env.pc = value;
  43}
  44
  45static bool xtensa_cpu_has_work(CPUState *cs)
  46{
  47    XtensaCPU *cpu = XTENSA_CPU(cs);
  48
  49    return cpu->env.pending_irq_level;
  50}
  51
  52/* CPUClass::reset() */
  53static void xtensa_cpu_reset(CPUState *s)
  54{
  55    XtensaCPU *cpu = XTENSA_CPU(s);
  56    XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(cpu);
  57    CPUXtensaState *env = &cpu->env;
  58
  59    xcc->parent_reset(s);
  60
  61    env->exception_taken = 0;
  62    env->pc = env->config->exception_vector[EXC_RESET];
  63    env->sregs[LITBASE] &= ~1;
  64    env->sregs[PS] = xtensa_option_enabled(env->config,
  65            XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
  66    env->sregs[VECBASE] = env->config->vecbase;
  67    env->sregs[IBREAKENABLE] = 0;
  68    env->sregs[CACHEATTR] = 0x22222222;
  69    env->sregs[ATOMCTL] = xtensa_option_enabled(env->config,
  70            XTENSA_OPTION_ATOMCTL) ? 0x28 : 0x15;
  71    env->sregs[CONFIGID0] = env->config->configid[0];
  72    env->sregs[CONFIGID1] = env->config->configid[1];
  73
  74    env->pending_irq_level = 0;
  75    reset_mmu(env);
  76}
  77
  78static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
  79{
  80    ObjectClass *oc;
  81    char *typename;
  82
  83    if (cpu_model == NULL) {
  84        return NULL;
  85    }
  86
  87    typename = g_strdup_printf("%s-" TYPE_XTENSA_CPU, cpu_model);
  88    oc = object_class_by_name(typename);
  89    g_free(typename);
  90    if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
  91        object_class_is_abstract(oc)) {
  92        return NULL;
  93    }
  94    return oc;
  95}
  96
  97static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
  98{
  99    CPUState *cs = CPU(dev);
 100    XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
 101
 102    cs->gdb_num_regs = xcc->config->gdb_regmap.num_regs;
 103
 104    qemu_init_vcpu(cs);
 105
 106    xcc->parent_realize(dev, errp);
 107}
 108
 109static void xtensa_cpu_initfn(Object *obj)
 110{
 111    CPUState *cs = CPU(obj);
 112    XtensaCPU *cpu = XTENSA_CPU(obj);
 113    XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(obj);
 114    CPUXtensaState *env = &cpu->env;
 115    static bool tcg_inited;
 116
 117    cs->env_ptr = env;
 118    env->config = xcc->config;
 119    cpu_exec_init(cs, &error_abort);
 120
 121    if (tcg_enabled() && !tcg_inited) {
 122        tcg_inited = true;
 123        xtensa_translate_init();
 124    }
 125}
 126
 127static const VMStateDescription vmstate_xtensa_cpu = {
 128    .name = "cpu",
 129    .unmigratable = 1,
 130};
 131
 132static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
 133{
 134    DeviceClass *dc = DEVICE_CLASS(oc);
 135    CPUClass *cc = CPU_CLASS(oc);
 136    XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc);
 137
 138    xcc->parent_realize = dc->realize;
 139    dc->realize = xtensa_cpu_realizefn;
 140
 141    xcc->parent_reset = cc->reset;
 142    cc->reset = xtensa_cpu_reset;
 143
 144    cc->class_by_name = xtensa_cpu_class_by_name;
 145    cc->has_work = xtensa_cpu_has_work;
 146    cc->do_interrupt = xtensa_cpu_do_interrupt;
 147    cc->cpu_exec_interrupt = xtensa_cpu_exec_interrupt;
 148    cc->dump_state = xtensa_cpu_dump_state;
 149    cc->set_pc = xtensa_cpu_set_pc;
 150    cc->gdb_read_register = xtensa_cpu_gdb_read_register;
 151    cc->gdb_write_register = xtensa_cpu_gdb_write_register;
 152    cc->gdb_stop_before_watchpoint = true;
 153#ifndef CONFIG_USER_ONLY
 154    cc->do_unaligned_access = xtensa_cpu_do_unaligned_access;
 155    cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug;
 156    cc->do_unassigned_access = xtensa_cpu_do_unassigned_access;
 157#endif
 158    cc->debug_excp_handler = xtensa_breakpoint_handler;
 159    dc->vmsd = &vmstate_xtensa_cpu;
 160
 161    /*
 162     * Reason: xtensa_cpu_initfn() calls cpu_exec_init(), which saves
 163     * the object in cpus -> dangling pointer after final
 164     * object_unref().
 165     */
 166    dc->cannot_destroy_with_object_finalize_yet = true;
 167}
 168
 169static const TypeInfo xtensa_cpu_type_info = {
 170    .name = TYPE_XTENSA_CPU,
 171    .parent = TYPE_CPU,
 172    .instance_size = sizeof(XtensaCPU),
 173    .instance_init = xtensa_cpu_initfn,
 174    .abstract = true,
 175    .class_size = sizeof(XtensaCPUClass),
 176    .class_init = xtensa_cpu_class_init,
 177};
 178
 179static void xtensa_cpu_register_types(void)
 180{
 181    type_register_static(&xtensa_cpu_type_info);
 182}
 183
 184type_init(xtensa_cpu_register_types)
 185