qemu/tests/tcg/xtensa/test_loop.S
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   1#include "macros.inc"
   2
   3test_suite loop
   4
   5test loop
   6    movi    a2, 0
   7    movi    a3, 5
   8    loop    a3, 1f
   9    addi    a2, a2, 1
  101:
  11    assert  eqi, a2, 5
  12test_end
  13
  14test loop0
  15    movi    a2, 0
  16    loop    a2, 1f
  17    rsr     a2, lcount
  18    assert  eqi, a2, -1
  19    j       1f
  201:
  21test_end
  22
  23test loop_jump
  24    movi    a2, 0
  25    movi    a3, 5
  26    loop    a3, 1f
  27    addi    a2, a2, 1
  28    j       1f
  291:
  30    assert  eqi, a2, 1
  31test_end
  32
  33test loop_branch
  34    movi    a2, 0
  35    movi    a3, 5
  36    loop    a3, 1f
  37    addi    a2, a2, 1
  38    beqi    a2, 3, 1f
  391:
  40    assert  eqi, a2, 3
  41test_end
  42
  43test loop_manual
  44    movi    a2, 0
  45    movi    a3, 5
  46    movi    a4, 1f
  47    movi    a5, 2f
  48    wsr     a3, lcount
  49    wsr     a4, lbeg
  50    wsr     a5, lend
  51    isync
  52    j       1f
  53.align 4
  541:
  55    addi    a2, a2, 1
  562:
  57    assert  eqi, a2, 6
  58test_end
  59
  60test loop_excm
  61    movi    a2, 0
  62    movi    a3, 5
  63    rsr     a4, ps
  64    movi    a5, 0x10
  65    or      a4, a4, a5
  66    wsr     a4, ps
  67    isync
  68    loop    a3, 1f
  69    addi    a2, a2, 1
  701:
  71    xor     a4, a4, a5
  72    isync
  73    wsr     a4, ps
  74    assert  eqi, a2, 1
  75test_end
  76
  77test lbeg_invalidation
  78    movi    a2, 0
  79    movi    a3, 1
  80    movi    a4, 1f
  81    movi    a5, 3f
  82    wsr     a3, lcount
  83    wsr     a4, lbeg
  84    wsr     a5, lend
  85    isync
  86    j       1f
  87.align 4
  881:
  89    addi    a2, a2, 1
  90    j       2f
  91.align 4
  922:
  93    addi    a2, a2, 2
  94    movi    a3, 2b
  95    wsr     a3, lbeg
  96    isync
  97    nop
  983:
  99    assert  eqi, a2, 5
 100test_end
 101
 102test lend_invalidation
 103    movi    a2, 0
 104    movi    a3, 5
 105    movi    a4, 1f
 106    movi    a5, 2f
 107    wsr     a3, lcount
 108    wsr     a4, lbeg
 109    wsr     a5, lend
 110    isync
 111    j       1f
 112.align 4
 1131:
 114    addi    a2, a2, 1
 1152:
 116    beqi    a3, 3, 1f
 117    assert  eqi, a2, 6
 118    movi    a3, 3
 119    wsr     a3, lcount
 120    wsr     a4, lend
 121    isync
 122    j       1b
 1231:
 124    assert  eqi, a2, 7
 125test_end
 126
 127test loopnez
 128    movi    a2, 0
 129    movi    a3, 5
 130    loopnez a3, 1f
 131    addi    a2, a2, 1
 1321:
 133    assert  eqi, a2, 5
 134
 135    movi    a2, 0
 136    movi    a3, 0
 137    loopnez a3, 1f
 138    test_fail
 1391:
 140test_end
 141
 142test loopgtz
 143    movi    a2, 0
 144    movi    a3, 5
 145    loopgtz a3, 1f
 146    addi    a2, a2, 1
 1471:
 148    assert  eqi, a2, 5
 149
 150    movi    a2, 0
 151    movi    a3, 0
 152    loopgtz a3, 1f
 153    test_fail
 1541:
 155
 156    movi    a2, 0
 157    movi    a3, 0x80000000
 158    loopgtz a3, 1f
 159    test_fail
 1601:
 161test_end
 162
 163test_suite_end
 164