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13#include "qemu/osdep.h"
14#include "qapi/error.h"
15#include "hw/hw.h"
16#include "hw/arm/pxa.h"
17#include "hw/arm/arm.h"
18#include "sysemu/sysemu.h"
19#include "hw/pcmcia.h"
20#include "hw/i2c/i2c.h"
21#include "hw/ssi/ssi.h"
22#include "hw/block/flash.h"
23#include "qemu/timer.h"
24#include "hw/devices.h"
25#include "hw/arm/sharpsl.h"
26#include "ui/console.h"
27#include "audio/audio.h"
28#include "hw/boards.h"
29#include "sysemu/block-backend.h"
30#include "hw/sysbus.h"
31#include "exec/address-spaces.h"
32
33#undef REG_FMT
34#define REG_FMT "0x%02lx"
35
36
37#define FLASH_BASE 0x0c000000
38#define FLASH_ECCLPLB 0x00
39#define FLASH_ECCLPUB 0x04
40#define FLASH_ECCCP 0x08
41#define FLASH_ECCCNTR 0x0c
42#define FLASH_ECCCLRR 0x10
43#define FLASH_FLASHIO 0x14
44#define FLASH_FLASHCTL 0x18
45
46#define FLASHCTL_CE0 (1 << 0)
47#define FLASHCTL_CLE (1 << 1)
48#define FLASHCTL_ALE (1 << 2)
49#define FLASHCTL_WP (1 << 3)
50#define FLASHCTL_CE1 (1 << 4)
51#define FLASHCTL_RYBY (1 << 5)
52#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
53
54#define TYPE_SL_NAND "sl-nand"
55#define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
56
57typedef struct {
58 SysBusDevice parent_obj;
59
60 MemoryRegion iomem;
61 DeviceState *nand;
62 uint8_t ctl;
63 uint8_t manf_id;
64 uint8_t chip_id;
65 ECCState ecc;
66} SLNANDState;
67
68static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
69{
70 SLNANDState *s = (SLNANDState *) opaque;
71 int ryby;
72
73 switch (addr) {
74#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
75 case FLASH_ECCLPLB:
76 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
77 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
78
79#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
80 case FLASH_ECCLPUB:
81 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
82 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
83
84 case FLASH_ECCCP:
85 return s->ecc.cp;
86
87 case FLASH_ECCCNTR:
88 return s->ecc.count & 0xff;
89
90 case FLASH_FLASHCTL:
91 nand_getpins(s->nand, &ryby);
92 if (ryby)
93 return s->ctl | FLASHCTL_RYBY;
94 else
95 return s->ctl;
96
97 case FLASH_FLASHIO:
98 if (size == 4) {
99 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
100 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
101 }
102 return ecc_digest(&s->ecc, nand_getio(s->nand));
103
104 default:
105 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
106 }
107 return 0;
108}
109
110static void sl_write(void *opaque, hwaddr addr,
111 uint64_t value, unsigned size)
112{
113 SLNANDState *s = (SLNANDState *) opaque;
114
115 switch (addr) {
116 case FLASH_ECCCLRR:
117
118 ecc_reset(&s->ecc);
119 break;
120
121 case FLASH_FLASHCTL:
122 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
123 nand_setpins(s->nand,
124 s->ctl & FLASHCTL_CLE,
125 s->ctl & FLASHCTL_ALE,
126 s->ctl & FLASHCTL_NCE,
127 s->ctl & FLASHCTL_WP,
128 0);
129 break;
130
131 case FLASH_FLASHIO:
132 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
133 break;
134
135 default:
136 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
137 }
138}
139
140enum {
141 FLASH_128M,
142 FLASH_1024M,
143};
144
145static const MemoryRegionOps sl_ops = {
146 .read = sl_read,
147 .write = sl_write,
148 .endianness = DEVICE_NATIVE_ENDIAN,
149};
150
151static void sl_flash_register(PXA2xxState *cpu, int size)
152{
153 DeviceState *dev;
154
155 dev = qdev_create(NULL, TYPE_SL_NAND);
156
157 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
158 if (size == FLASH_128M)
159 qdev_prop_set_uint8(dev, "chip_id", 0x73);
160 else if (size == FLASH_1024M)
161 qdev_prop_set_uint8(dev, "chip_id", 0xf1);
162
163 qdev_init_nofail(dev);
164 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
165}
166
167static void sl_nand_init(Object *obj)
168{
169 SLNANDState *s = SL_NAND(obj);
170 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
171 DriveInfo *nand;
172
173 s->ctl = 0;
174
175 nand = drive_get(IF_MTD, 0, 0);
176 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
177 s->manf_id, s->chip_id);
178
179 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
180 sysbus_init_mmio(dev, &s->iomem);
181}
182
183
184
185#define SPITZ_KEY_STROBE_NUM 11
186#define SPITZ_KEY_SENSE_NUM 7
187
188static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
189 12, 17, 91, 34, 36, 38, 39
190};
191
192static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
193 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
194};
195
196
197static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
198 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
199 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
200 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
201 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
202 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
203 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
204 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
205 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
206};
207
208#define SPITZ_GPIO_AK_INT 13
209#define SPITZ_GPIO_SYNC 16
210#define SPITZ_GPIO_ON_KEY 95
211#define SPITZ_GPIO_SWA 97
212#define SPITZ_GPIO_SWB 96
213
214
215static const int spitz_gpiomap[5] = {
216 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
217 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
218};
219
220#define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
221#define SPITZ_KEYBOARD(obj) \
222 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
223
224typedef struct {
225 SysBusDevice parent_obj;
226
227 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
228 qemu_irq gpiomap[5];
229 int keymap[0x80];
230 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
231 uint16_t strobe_state;
232 uint16_t sense_state;
233
234 uint16_t pre_map[0x100];
235 uint16_t modifiers;
236 uint16_t imodifiers;
237 uint8_t fifo[16];
238 int fifopos, fifolen;
239 QEMUTimer *kbdtimer;
240} SpitzKeyboardState;
241
242static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
243{
244 int i;
245 uint16_t strobe, sense = 0;
246 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
247 strobe = s->keyrow[i] & s->strobe_state;
248 if (strobe) {
249 sense |= 1 << i;
250 if (!(s->sense_state & (1 << i)))
251 qemu_irq_raise(s->sense[i]);
252 } else if (s->sense_state & (1 << i))
253 qemu_irq_lower(s->sense[i]);
254 }
255
256 s->sense_state = sense;
257}
258
259static void spitz_keyboard_strobe(void *opaque, int line, int level)
260{
261 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
262
263 if (level)
264 s->strobe_state |= 1 << line;
265 else
266 s->strobe_state &= ~(1 << line);
267 spitz_keyboard_sense_update(s);
268}
269
270static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
271{
272 int spitz_keycode = s->keymap[keycode & 0x7f];
273 if (spitz_keycode == -1)
274 return;
275
276
277 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
278 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
279 return;
280 }
281
282 if (keycode & 0x80)
283 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
284 else
285 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
286
287 spitz_keyboard_sense_update(s);
288}
289
290#define SPITZ_MOD_SHIFT (1 << 7)
291#define SPITZ_MOD_CTRL (1 << 8)
292#define SPITZ_MOD_FN (1 << 9)
293
294#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
295
296static void spitz_keyboard_handler(void *opaque, int keycode)
297{
298 SpitzKeyboardState *s = opaque;
299 uint16_t code;
300 int mapcode;
301 switch (keycode) {
302 case 0x2a:
303 s->modifiers |= 1;
304 break;
305 case 0xaa:
306 s->modifiers &= ~1;
307 break;
308 case 0x36:
309 s->modifiers |= 2;
310 break;
311 case 0xb6:
312 s->modifiers &= ~2;
313 break;
314 case 0x1d:
315 s->modifiers |= 4;
316 break;
317 case 0x9d:
318 s->modifiers &= ~4;
319 break;
320 case 0x38:
321 s->modifiers |= 8;
322 break;
323 case 0xb8:
324 s->modifiers &= ~8;
325 break;
326 }
327
328 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
329 (keycode | SPITZ_MOD_SHIFT) :
330 (keycode & ~SPITZ_MOD_SHIFT))];
331
332 if (code != mapcode) {
333#if 0
334 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
335 QUEUE_KEY(0x2a | (keycode & 0x80));
336 }
337 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
338 QUEUE_KEY(0x1d | (keycode & 0x80));
339 }
340 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
341 QUEUE_KEY(0x38 | (keycode & 0x80));
342 }
343 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
344 QUEUE_KEY(0x2a | (~keycode & 0x80));
345 }
346 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
347 QUEUE_KEY(0x36 | (~keycode & 0x80));
348 }
349#else
350 if (keycode & 0x80) {
351 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
352 QUEUE_KEY(0x2a | 0x80);
353 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
354 QUEUE_KEY(0x1d | 0x80);
355 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
356 QUEUE_KEY(0x38 | 0x80);
357 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
358 QUEUE_KEY(0x2a);
359 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
360 QUEUE_KEY(0x36);
361 s->imodifiers = 0;
362 } else {
363 if ((code & SPITZ_MOD_SHIFT) &&
364 !((s->modifiers | s->imodifiers) & 1)) {
365 QUEUE_KEY(0x2a);
366 s->imodifiers |= 1;
367 }
368 if ((code & SPITZ_MOD_CTRL) &&
369 !((s->modifiers | s->imodifiers) & 4)) {
370 QUEUE_KEY(0x1d);
371 s->imodifiers |= 4;
372 }
373 if ((code & SPITZ_MOD_FN) &&
374 !((s->modifiers | s->imodifiers) & 8)) {
375 QUEUE_KEY(0x38);
376 s->imodifiers |= 8;
377 }
378 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
379 !(s->imodifiers & 0x10)) {
380 QUEUE_KEY(0x2a | 0x80);
381 s->imodifiers |= 0x10;
382 }
383 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
384 !(s->imodifiers & 0x20)) {
385 QUEUE_KEY(0x36 | 0x80);
386 s->imodifiers |= 0x20;
387 }
388 }
389#endif
390 }
391
392 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
393}
394
395static void spitz_keyboard_tick(void *opaque)
396{
397 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
398
399 if (s->fifolen) {
400 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
401 s->fifolen --;
402 if (s->fifopos >= 16)
403 s->fifopos = 0;
404 }
405
406 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
407 NANOSECONDS_PER_SECOND / 32);
408}
409
410static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
411{
412 int i;
413 for (i = 0; i < 0x100; i ++)
414 s->pre_map[i] = i;
415 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT;
416 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT;
417 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT;
418 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT;
419 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT;
420 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT;
421 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT;
422 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT;
423 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT;
424 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT;
425 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT;
426 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN;
427 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN;
428 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;
429 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN;
430 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;
431 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN;
432 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN;
433 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;
434 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;
435 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN;
436 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;
437 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;
438 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN;
439 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;
440 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;
441 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;
442 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT;
443 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;
444 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT;
445 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN;
446 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN;
447
448 s->modifiers = 0;
449 s->imodifiers = 0;
450 s->fifopos = 0;
451 s->fifolen = 0;
452}
453
454#undef SPITZ_MOD_SHIFT
455#undef SPITZ_MOD_CTRL
456#undef SPITZ_MOD_FN
457
458static int spitz_keyboard_post_load(void *opaque, int version_id)
459{
460 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
461
462
463 memset(s->keyrow, 0, sizeof(s->keyrow));
464 spitz_keyboard_sense_update(s);
465 s->modifiers = 0;
466 s->imodifiers = 0;
467 s->fifopos = 0;
468 s->fifolen = 0;
469
470 return 0;
471}
472
473static void spitz_keyboard_register(PXA2xxState *cpu)
474{
475 int i;
476 DeviceState *dev;
477 SpitzKeyboardState *s;
478
479 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
480 s = SPITZ_KEYBOARD(dev);
481
482 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
483 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
484
485 for (i = 0; i < 5; i ++)
486 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
487
488 if (!graphic_rotate)
489 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
490
491 for (i = 0; i < 5; i++)
492 qemu_set_irq(s->gpiomap[i], 0);
493
494 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
495 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
496 qdev_get_gpio_in(dev, i));
497
498 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
499
500 qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
501}
502
503static void spitz_keyboard_init(Object *obj)
504{
505 DeviceState *dev = DEVICE(obj);
506 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
507 int i, j;
508
509 for (i = 0; i < 0x80; i ++)
510 s->keymap[i] = -1;
511 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
512 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
513 if (spitz_keymap[i][j] != -1)
514 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
515
516 spitz_keyboard_pre_map(s);
517
518 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
519 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
520 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
521}
522
523
524
525#define LCDTG_RESCTL 0x00
526#define LCDTG_PHACTRL 0x01
527#define LCDTG_DUTYCTRL 0x02
528#define LCDTG_POWERREG0 0x03
529#define LCDTG_POWERREG1 0x04
530#define LCDTG_GPOR3 0x05
531#define LCDTG_PICTRL 0x06
532#define LCDTG_POLCTRL 0x07
533
534typedef struct {
535 SSISlave ssidev;
536 uint32_t bl_intensity;
537 uint32_t bl_power;
538} SpitzLCDTG;
539
540static void spitz_bl_update(SpitzLCDTG *s)
541{
542 if (s->bl_power && s->bl_intensity)
543 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
544 else
545 zaurus_printf("LCD Backlight now off\n");
546}
547
548
549static SpitzLCDTG *spitz_lcdtg;
550
551static inline void spitz_bl_bit5(void *opaque, int line, int level)
552{
553 SpitzLCDTG *s = spitz_lcdtg;
554 int prev = s->bl_intensity;
555
556 if (level)
557 s->bl_intensity &= ~0x20;
558 else
559 s->bl_intensity |= 0x20;
560
561 if (s->bl_power && prev != s->bl_intensity)
562 spitz_bl_update(s);
563}
564
565static inline void spitz_bl_power(void *opaque, int line, int level)
566{
567 SpitzLCDTG *s = spitz_lcdtg;
568 s->bl_power = !!level;
569 spitz_bl_update(s);
570}
571
572static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
573{
574 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
575 int addr;
576 addr = value >> 5;
577 value &= 0x1f;
578
579 switch (addr) {
580 case LCDTG_RESCTL:
581 if (value)
582 zaurus_printf("LCD in QVGA mode\n");
583 else
584 zaurus_printf("LCD in VGA mode\n");
585 break;
586
587 case LCDTG_DUTYCTRL:
588 s->bl_intensity &= ~0x1f;
589 s->bl_intensity |= value;
590 if (s->bl_power)
591 spitz_bl_update(s);
592 break;
593
594 case LCDTG_POWERREG0:
595
596 break;
597 }
598 return 0;
599}
600
601static int spitz_lcdtg_init(SSISlave *dev)
602{
603 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
604
605 spitz_lcdtg = s;
606 s->bl_power = 0;
607 s->bl_intensity = 0x20;
608
609 return 0;
610}
611
612
613
614#define CORGI_SSP_PORT 2
615
616#define SPITZ_GPIO_LCDCON_CS 53
617#define SPITZ_GPIO_ADS7846_CS 14
618#define SPITZ_GPIO_MAX1111_CS 20
619#define SPITZ_GPIO_TP_INT 11
620
621static DeviceState *max1111;
622
623
624typedef struct {
625 SSISlave ssidev;
626 SSIBus *bus[3];
627 uint32_t enable[3];
628} CorgiSSPState;
629
630static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
631{
632 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
633 int i;
634
635 for (i = 0; i < 3; i++) {
636 if (s->enable[i]) {
637 return ssi_transfer(s->bus[i], value);
638 }
639 }
640 return 0;
641}
642
643static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
644{
645 CorgiSSPState *s = (CorgiSSPState *)opaque;
646 assert(line >= 0 && line < 3);
647 s->enable[line] = !level;
648}
649
650#define MAX1111_BATT_VOLT 1
651#define MAX1111_BATT_TEMP 2
652#define MAX1111_ACIN_VOLT 3
653
654#define SPITZ_BATTERY_TEMP 0xe0
655#define SPITZ_BATTERY_VOLT 0xd0
656#define SPITZ_CHARGEON_ACIN 0x80
657
658static void spitz_adc_temp_on(void *opaque, int line, int level)
659{
660 if (!max1111)
661 return;
662
663 if (level)
664 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
665 else
666 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
667}
668
669static int corgi_ssp_init(SSISlave *d)
670{
671 DeviceState *dev = DEVICE(d);
672 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
673
674 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
675 s->bus[0] = ssi_create_bus(dev, "ssi0");
676 s->bus[1] = ssi_create_bus(dev, "ssi1");
677 s->bus[2] = ssi_create_bus(dev, "ssi2");
678
679 return 0;
680}
681
682static void spitz_ssp_attach(PXA2xxState *cpu)
683{
684 DeviceState *mux;
685 DeviceState *dev;
686 void *bus;
687
688 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
689
690 bus = qdev_get_child_bus(mux, "ssi0");
691 ssi_create_slave(bus, "spitz-lcdtg");
692
693 bus = qdev_get_child_bus(mux, "ssi1");
694 dev = ssi_create_slave(bus, "ads7846");
695 qdev_connect_gpio_out(dev, 0,
696 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
697
698 bus = qdev_get_child_bus(mux, "ssi2");
699 max1111 = ssi_create_slave(bus, "max1111");
700 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
701 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
702 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
703
704 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
705 qdev_get_gpio_in(mux, 0));
706 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
707 qdev_get_gpio_in(mux, 1));
708 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
709 qdev_get_gpio_in(mux, 2));
710}
711
712
713
714static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
715{
716 PCMCIACardState *md;
717 DriveInfo *dinfo;
718
719 dinfo = drive_get(IF_IDE, 0, 0);
720 if (!dinfo || dinfo->media_cd)
721 return;
722 md = dscm1xxxx_init(dinfo);
723 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
724}
725
726
727
728#define AKITA_MAX_ADDR 0x18
729#define SPITZ_WM_ADDRL 0x1b
730#define SPITZ_WM_ADDRH 0x1a
731
732#define SPITZ_GPIO_WM 5
733
734static void spitz_wm8750_addr(void *opaque, int line, int level)
735{
736 I2CSlave *wm = (I2CSlave *) opaque;
737 if (level)
738 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
739 else
740 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
741}
742
743static void spitz_i2c_setup(PXA2xxState *cpu)
744{
745
746 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
747
748 DeviceState *wm;
749
750
751 wm = i2c_create_slave(bus, "wm8750", 0);
752
753 spitz_wm8750_addr(wm, 0, 0);
754 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
755 qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
756
757 cpu->i2s->opaque = wm;
758 cpu->i2s->codec_out = wm8750_dac_dat;
759 cpu->i2s->codec_in = wm8750_adc_dat;
760 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
761}
762
763static void spitz_akita_i2c_setup(PXA2xxState *cpu)
764{
765
766 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
767 AKITA_MAX_ADDR);
768}
769
770
771
772static void spitz_out_switch(void *opaque, int line, int level)
773{
774 switch (line) {
775 case 0:
776 zaurus_printf("Charging %s.\n", level ? "off" : "on");
777 break;
778 case 1:
779 zaurus_printf("Discharging %s.\n", level ? "on" : "off");
780 break;
781 case 2:
782 zaurus_printf("Green LED %s.\n", level ? "on" : "off");
783 break;
784 case 3:
785 zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
786 break;
787 case 4:
788 spitz_bl_bit5(opaque, line, level);
789 break;
790 case 5:
791 spitz_bl_power(opaque, line, level);
792 break;
793 case 6:
794 spitz_adc_temp_on(opaque, line, level);
795 break;
796 }
797}
798
799#define SPITZ_SCP_LED_GREEN 1
800#define SPITZ_SCP_JK_B 2
801#define SPITZ_SCP_CHRG_ON 3
802#define SPITZ_SCP_MUTE_L 4
803#define SPITZ_SCP_MUTE_R 5
804#define SPITZ_SCP_CF_POWER 6
805#define SPITZ_SCP_LED_ORANGE 7
806#define SPITZ_SCP_JK_A 8
807#define SPITZ_SCP_ADC_TEMP_ON 9
808#define SPITZ_SCP2_IR_ON 1
809#define SPITZ_SCP2_AKIN_PULLUP 2
810#define SPITZ_SCP2_BACKLIGHT_CONT 7
811#define SPITZ_SCP2_BACKLIGHT_ON 8
812#define SPITZ_SCP2_MIC_BIAS 9
813
814static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
815 DeviceState *scp0, DeviceState *scp1)
816{
817 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
818
819 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
820 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
821 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
822 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
823
824 if (scp1) {
825 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
826 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
827 }
828
829 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
830}
831
832#define SPITZ_GPIO_HSYNC 22
833#define SPITZ_GPIO_SD_DETECT 9
834#define SPITZ_GPIO_SD_WP 81
835#define SPITZ_GPIO_ON_RESET 89
836#define SPITZ_GPIO_BAT_COVER 90
837#define SPITZ_GPIO_CF1_IRQ 105
838#define SPITZ_GPIO_CF1_CD 94
839#define SPITZ_GPIO_CF2_IRQ 106
840#define SPITZ_GPIO_CF2_CD 93
841
842static int spitz_hsync;
843
844static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
845{
846 PXA2xxState *cpu = (PXA2xxState *) opaque;
847 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
848 spitz_hsync ^= 1;
849}
850
851static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
852{
853 qemu_irq lcd_hsync;
854
855
856
857
858
859
860 spitz_hsync = 0;
861 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
862 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
863 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
864
865
866 pxa2xx_mmci_handlers(cpu->mmc,
867 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
868 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
869
870
871 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
872
873
874 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
875
876
877 if (slots >= 1)
878 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
879 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
880 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
881 if (slots >= 2)
882 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
883 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
884 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
885}
886
887
888enum spitz_model_e { spitz, akita, borzoi, terrier };
889
890#define SPITZ_RAM 0x04000000
891#define SPITZ_ROM 0x00800000
892
893static struct arm_boot_info spitz_binfo = {
894 .loader_start = PXA2XX_SDRAM_BASE,
895 .ram_size = 0x04000000,
896};
897
898static void spitz_common_init(MachineState *machine,
899 enum spitz_model_e model, int arm_id)
900{
901 PXA2xxState *mpu;
902 DeviceState *scp0, *scp1 = NULL;
903 MemoryRegion *address_space_mem = get_system_memory();
904 MemoryRegion *rom = g_new(MemoryRegion, 1);
905 const char *cpu_model = machine->cpu_model;
906
907 if (!cpu_model)
908 cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
909
910
911 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
912
913 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
914
915 memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
916 vmstate_register_ram_global(rom);
917 memory_region_set_readonly(rom, true);
918 memory_region_add_subregion(address_space_mem, 0, rom);
919
920
921 spitz_keyboard_register(mpu);
922
923 spitz_ssp_attach(mpu);
924
925 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
926 if (model != akita) {
927 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
928 }
929
930 spitz_scoop_gpio_setup(mpu, scp0, scp1);
931
932 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
933
934 spitz_i2c_setup(mpu);
935
936 if (model == akita)
937 spitz_akita_i2c_setup(mpu);
938
939 if (model == terrier)
940
941 spitz_microdrive_attach(mpu, 1);
942 else if (model != akita)
943
944 spitz_microdrive_attach(mpu, 0);
945
946 spitz_binfo.kernel_filename = machine->kernel_filename;
947 spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
948 spitz_binfo.initrd_filename = machine->initrd_filename;
949 spitz_binfo.board_id = arm_id;
950 arm_load_kernel(mpu->cpu, &spitz_binfo);
951 sl_bootparam_write(SL_PXA_PARAM_BASE);
952}
953
954static void spitz_init(MachineState *machine)
955{
956 spitz_common_init(machine, spitz, 0x2c9);
957}
958
959static void borzoi_init(MachineState *machine)
960{
961 spitz_common_init(machine, borzoi, 0x33f);
962}
963
964static void akita_init(MachineState *machine)
965{
966 spitz_common_init(machine, akita, 0x2e8);
967}
968
969static void terrier_init(MachineState *machine)
970{
971 spitz_common_init(machine, terrier, 0x33f);
972}
973
974static void akitapda_class_init(ObjectClass *oc, void *data)
975{
976 MachineClass *mc = MACHINE_CLASS(oc);
977
978 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
979 mc->init = akita_init;
980}
981
982static const TypeInfo akitapda_type = {
983 .name = MACHINE_TYPE_NAME("akita"),
984 .parent = TYPE_MACHINE,
985 .class_init = akitapda_class_init,
986};
987
988static void spitzpda_class_init(ObjectClass *oc, void *data)
989{
990 MachineClass *mc = MACHINE_CLASS(oc);
991
992 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
993 mc->init = spitz_init;
994}
995
996static const TypeInfo spitzpda_type = {
997 .name = MACHINE_TYPE_NAME("spitz"),
998 .parent = TYPE_MACHINE,
999 .class_init = spitzpda_class_init,
1000};
1001
1002static void borzoipda_class_init(ObjectClass *oc, void *data)
1003{
1004 MachineClass *mc = MACHINE_CLASS(oc);
1005
1006 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1007 mc->init = borzoi_init;
1008}
1009
1010static const TypeInfo borzoipda_type = {
1011 .name = MACHINE_TYPE_NAME("borzoi"),
1012 .parent = TYPE_MACHINE,
1013 .class_init = borzoipda_class_init,
1014};
1015
1016static void terrierpda_class_init(ObjectClass *oc, void *data)
1017{
1018 MachineClass *mc = MACHINE_CLASS(oc);
1019
1020 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1021 mc->init = terrier_init;
1022}
1023
1024static const TypeInfo terrierpda_type = {
1025 .name = MACHINE_TYPE_NAME("terrier"),
1026 .parent = TYPE_MACHINE,
1027 .class_init = terrierpda_class_init,
1028};
1029
1030static void spitz_machine_init(void)
1031{
1032 type_register_static(&akitapda_type);
1033 type_register_static(&spitzpda_type);
1034 type_register_static(&borzoipda_type);
1035 type_register_static(&terrierpda_type);
1036}
1037
1038type_init(spitz_machine_init)
1039
1040static bool is_version_0(void *opaque, int version_id)
1041{
1042 return version_id == 0;
1043}
1044
1045static VMStateDescription vmstate_sl_nand_info = {
1046 .name = "sl-nand",
1047 .version_id = 0,
1048 .minimum_version_id = 0,
1049 .fields = (VMStateField[]) {
1050 VMSTATE_UINT8(ctl, SLNANDState),
1051 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1052 VMSTATE_END_OF_LIST(),
1053 },
1054};
1055
1056static Property sl_nand_properties[] = {
1057 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1058 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1059 DEFINE_PROP_END_OF_LIST(),
1060};
1061
1062static void sl_nand_class_init(ObjectClass *klass, void *data)
1063{
1064 DeviceClass *dc = DEVICE_CLASS(klass);
1065
1066 dc->vmsd = &vmstate_sl_nand_info;
1067 dc->props = sl_nand_properties;
1068
1069 dc->cannot_instantiate_with_device_add_yet = true;
1070}
1071
1072static const TypeInfo sl_nand_info = {
1073 .name = TYPE_SL_NAND,
1074 .parent = TYPE_SYS_BUS_DEVICE,
1075 .instance_size = sizeof(SLNANDState),
1076 .instance_init = sl_nand_init,
1077 .class_init = sl_nand_class_init,
1078};
1079
1080static VMStateDescription vmstate_spitz_kbd = {
1081 .name = "spitz-keyboard",
1082 .version_id = 1,
1083 .minimum_version_id = 0,
1084 .post_load = spitz_keyboard_post_load,
1085 .fields = (VMStateField[]) {
1086 VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1087 VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1088 VMSTATE_UNUSED_TEST(is_version_0, 5),
1089 VMSTATE_END_OF_LIST(),
1090 },
1091};
1092
1093static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1094{
1095 DeviceClass *dc = DEVICE_CLASS(klass);
1096
1097 dc->vmsd = &vmstate_spitz_kbd;
1098}
1099
1100static const TypeInfo spitz_keyboard_info = {
1101 .name = TYPE_SPITZ_KEYBOARD,
1102 .parent = TYPE_SYS_BUS_DEVICE,
1103 .instance_size = sizeof(SpitzKeyboardState),
1104 .instance_init = spitz_keyboard_init,
1105 .class_init = spitz_keyboard_class_init,
1106};
1107
1108static const VMStateDescription vmstate_corgi_ssp_regs = {
1109 .name = "corgi-ssp",
1110 .version_id = 2,
1111 .minimum_version_id = 2,
1112 .fields = (VMStateField[]) {
1113 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1114 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1115 VMSTATE_END_OF_LIST(),
1116 }
1117};
1118
1119static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1120{
1121 DeviceClass *dc = DEVICE_CLASS(klass);
1122 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1123
1124 k->init = corgi_ssp_init;
1125 k->transfer = corgi_ssp_transfer;
1126 dc->vmsd = &vmstate_corgi_ssp_regs;
1127}
1128
1129static const TypeInfo corgi_ssp_info = {
1130 .name = "corgi-ssp",
1131 .parent = TYPE_SSI_SLAVE,
1132 .instance_size = sizeof(CorgiSSPState),
1133 .class_init = corgi_ssp_class_init,
1134};
1135
1136static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1137 .name = "spitz-lcdtg",
1138 .version_id = 1,
1139 .minimum_version_id = 1,
1140 .fields = (VMStateField[]) {
1141 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1142 VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1143 VMSTATE_UINT32(bl_power, SpitzLCDTG),
1144 VMSTATE_END_OF_LIST(),
1145 }
1146};
1147
1148static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1149{
1150 DeviceClass *dc = DEVICE_CLASS(klass);
1151 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1152
1153 k->init = spitz_lcdtg_init;
1154 k->transfer = spitz_lcdtg_transfer;
1155 dc->vmsd = &vmstate_spitz_lcdtg_regs;
1156}
1157
1158static const TypeInfo spitz_lcdtg_info = {
1159 .name = "spitz-lcdtg",
1160 .parent = TYPE_SSI_SLAVE,
1161 .instance_size = sizeof(SpitzLCDTG),
1162 .class_init = spitz_lcdtg_class_init,
1163};
1164
1165static void spitz_register_types(void)
1166{
1167 type_register_static(&corgi_ssp_info);
1168 type_register_static(&spitz_lcdtg_info);
1169 type_register_static(&spitz_keyboard_info);
1170 type_register_static(&sl_nand_info);
1171}
1172
1173type_init(spitz_register_types)
1174
