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21#include "qemu/osdep.h"
22#include "hw/hw.h"
23#include "hw/i2c/i2c.h"
24#include "qemu/timer.h"
25#include "ui/console.h"
26
27#define TYPE_LM8323 "lm8323"
28#define LM8323(obj) OBJECT_CHECK(LM823KbdState, (obj), TYPE_LM8323)
29
30typedef struct {
31 I2CSlave parent_obj;
32
33 uint8_t i2c_dir;
34 uint8_t i2c_cycle;
35 uint8_t reg;
36
37 qemu_irq nirq;
38 uint16_t model;
39
40 struct {
41 qemu_irq out[2];
42 int in[2][2];
43 } mux;
44
45 uint8_t config;
46 uint8_t status;
47 uint8_t acttime;
48 uint8_t error;
49 uint8_t clock;
50
51 struct {
52 uint16_t pull;
53 uint16_t mask;
54 uint16_t dir;
55 uint16_t level;
56 qemu_irq out[16];
57 } gpio;
58
59 struct {
60 uint8_t dbnctime;
61 uint8_t size;
62 uint8_t start;
63 uint8_t len;
64 uint8_t fifo[16];
65 } kbd;
66
67 struct {
68 uint16_t file[256];
69 uint8_t faddr;
70 uint8_t addr[3];
71 QEMUTimer *tm[3];
72 } pwm;
73} LM823KbdState;
74
75#define INT_KEYPAD (1 << 0)
76#define INT_ERROR (1 << 3)
77#define INT_NOINIT (1 << 4)
78#define INT_PWMEND(n) (1 << (5 + n))
79
80#define ERR_BADPAR (1 << 0)
81#define ERR_CMDUNK (1 << 1)
82#define ERR_KEYOVR (1 << 2)
83#define ERR_FIFOOVR (1 << 6)
84
85static void lm_kbd_irq_update(LM823KbdState *s)
86{
87 qemu_set_irq(s->nirq, !s->status);
88}
89
90static void lm_kbd_gpio_update(LM823KbdState *s)
91{
92}
93
94static void lm_kbd_reset(LM823KbdState *s)
95{
96 s->config = 0x80;
97 s->status = INT_NOINIT;
98 s->acttime = 125;
99 s->kbd.dbnctime = 3;
100 s->kbd.size = 0x33;
101 s->clock = 0x08;
102
103 lm_kbd_irq_update(s);
104 lm_kbd_gpio_update(s);
105}
106
107static void lm_kbd_error(LM823KbdState *s, int err)
108{
109 s->error |= err;
110 s->status |= INT_ERROR;
111 lm_kbd_irq_update(s);
112}
113
114static void lm_kbd_pwm_tick(LM823KbdState *s, int line)
115{
116}
117
118static void lm_kbd_pwm_start(LM823KbdState *s, int line)
119{
120 lm_kbd_pwm_tick(s, line);
121}
122
123static void lm_kbd_pwm0_tick(void *opaque)
124{
125 lm_kbd_pwm_tick(opaque, 0);
126}
127static void lm_kbd_pwm1_tick(void *opaque)
128{
129 lm_kbd_pwm_tick(opaque, 1);
130}
131static void lm_kbd_pwm2_tick(void *opaque)
132{
133 lm_kbd_pwm_tick(opaque, 2);
134}
135
136enum {
137 LM832x_CMD_READ_ID = 0x80,
138 LM832x_CMD_WRITE_CFG = 0x81,
139 LM832x_CMD_READ_INT = 0x82,
140 LM832x_CMD_RESET = 0x83,
141 LM823x_CMD_WRITE_PULL_DOWN = 0x84,
142 LM832x_CMD_WRITE_PORT_SEL = 0x85,
143 LM832x_CMD_WRITE_PORT_STATE = 0x86,
144 LM832x_CMD_READ_PORT_SEL = 0x87,
145 LM832x_CMD_READ_PORT_STATE = 0x88,
146 LM832x_CMD_READ_FIFO = 0x89,
147 LM832x_CMD_RPT_READ_FIFO = 0x8a,
148 LM832x_CMD_SET_ACTIVE = 0x8b,
149 LM832x_CMD_READ_ERROR = 0x8c,
150 LM832x_CMD_READ_ROTATOR = 0x8e,
151 LM832x_CMD_SET_DEBOUNCE = 0x8f,
152 LM832x_CMD_SET_KEY_SIZE = 0x90,
153 LM832x_CMD_READ_KEY_SIZE = 0x91,
154 LM832x_CMD_READ_CFG = 0x92,
155 LM832x_CMD_WRITE_CLOCK = 0x93,
156 LM832x_CMD_READ_CLOCK = 0x94,
157 LM832x_CMD_PWM_WRITE = 0x95,
158 LM832x_CMD_PWM_START = 0x96,
159 LM832x_CMD_PWM_STOP = 0x97,
160 LM832x_GENERAL_ERROR = 0xff,
161
162
163};
164
165#define LM832x_MAX_KPX 8
166#define LM832x_MAX_KPY 12
167
168static uint8_t lm_kbd_read(LM823KbdState *s, int reg, int byte)
169{
170 int ret;
171
172 switch (reg) {
173 case LM832x_CMD_READ_ID:
174 ret = 0x0400;
175 break;
176
177 case LM832x_CMD_READ_INT:
178 ret = s->status;
179 if (!(s->status & INT_NOINIT)) {
180 s->status = 0;
181 lm_kbd_irq_update(s);
182 }
183 break;
184
185 case LM832x_CMD_READ_PORT_SEL:
186 ret = s->gpio.dir;
187 break;
188 case LM832x_CMD_READ_PORT_STATE:
189 ret = s->gpio.mask;
190 break;
191
192 case LM832x_CMD_READ_FIFO:
193 if (s->kbd.len <= 1)
194 return 0x00;
195
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210
211
212
213
214 s->kbd.start ++;
215 s->kbd.start &= sizeof(s->kbd.fifo) - 1;
216 s->kbd.len --;
217
218 return s->kbd.fifo[s->kbd.start];
219 case LM832x_CMD_RPT_READ_FIFO:
220 if (byte >= s->kbd.len)
221 return 0x00;
222
223 return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)];
224
225 case LM832x_CMD_READ_ERROR:
226 return s->error;
227
228 case LM832x_CMD_READ_ROTATOR:
229 return 0;
230
231 case LM832x_CMD_READ_KEY_SIZE:
232 return s->kbd.size;
233
234 case LM832x_CMD_READ_CFG:
235 return s->config & 0xf;
236
237 case LM832x_CMD_READ_CLOCK:
238 return (s->clock & 0xfc) | 2;
239
240 default:
241 lm_kbd_error(s, ERR_CMDUNK);
242 fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
243 return 0x00;
244 }
245
246 return ret >> (byte << 3);
247}
248
249static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value)
250{
251 switch (reg) {
252 case LM832x_CMD_WRITE_CFG:
253 s->config = value;
254
255 if ((s->config >> 1) & 1)
256 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]);
257 if ((s->config >> 3) & 1)
258 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]);
259
260
261
262
263
264 s->status = 0;
265 lm_kbd_irq_update(s);
266 s->kbd.len = 0;
267 s->kbd.start = 0;
268 s->reg = LM832x_GENERAL_ERROR;
269 break;
270
271 case LM832x_CMD_RESET:
272 if (value == 0xaa)
273 lm_kbd_reset(s);
274 else
275 lm_kbd_error(s, ERR_BADPAR);
276 s->reg = LM832x_GENERAL_ERROR;
277 break;
278
279 case LM823x_CMD_WRITE_PULL_DOWN:
280 if (!byte)
281 s->gpio.pull = value;
282 else {
283 s->gpio.pull |= value << 8;
284 lm_kbd_gpio_update(s);
285 s->reg = LM832x_GENERAL_ERROR;
286 }
287 break;
288 case LM832x_CMD_WRITE_PORT_SEL:
289 if (!byte)
290 s->gpio.dir = value;
291 else {
292 s->gpio.dir |= value << 8;
293 lm_kbd_gpio_update(s);
294 s->reg = LM832x_GENERAL_ERROR;
295 }
296 break;
297 case LM832x_CMD_WRITE_PORT_STATE:
298 if (!byte)
299 s->gpio.mask = value;
300 else {
301 s->gpio.mask |= value << 8;
302 lm_kbd_gpio_update(s);
303 s->reg = LM832x_GENERAL_ERROR;
304 }
305 break;
306
307 case LM832x_CMD_SET_ACTIVE:
308 s->acttime = value;
309 s->reg = LM832x_GENERAL_ERROR;
310 break;
311
312 case LM832x_CMD_SET_DEBOUNCE:
313 s->kbd.dbnctime = value;
314 s->reg = LM832x_GENERAL_ERROR;
315 if (!value)
316 lm_kbd_error(s, ERR_BADPAR);
317 break;
318
319 case LM832x_CMD_SET_KEY_SIZE:
320 s->kbd.size = value;
321 s->reg = LM832x_GENERAL_ERROR;
322 if (
323 (value & 0xf) < 3 || (value & 0xf) > LM832x_MAX_KPY ||
324 (value >> 4) < 3 || (value >> 4) > LM832x_MAX_KPX)
325 lm_kbd_error(s, ERR_BADPAR);
326 break;
327
328 case LM832x_CMD_WRITE_CLOCK:
329 s->clock = value;
330 s->reg = LM832x_GENERAL_ERROR;
331 if ((value & 3) && (value & 3) != 3) {
332 lm_kbd_error(s, ERR_BADPAR);
333 fprintf(stderr, "%s: invalid clock setting in RCPWM\n",
334 __FUNCTION__);
335 }
336
337 break;
338
339 case LM832x_CMD_PWM_WRITE:
340 if (byte == 0) {
341 if (!(value & 3) || (value >> 2) > 59) {
342 lm_kbd_error(s, ERR_BADPAR);
343 s->reg = LM832x_GENERAL_ERROR;
344 break;
345 }
346
347 s->pwm.faddr = value;
348 s->pwm.file[s->pwm.faddr] = 0;
349 } else if (byte == 1) {
350 s->pwm.file[s->pwm.faddr] |= value << 8;
351 } else if (byte == 2) {
352 s->pwm.file[s->pwm.faddr] |= value << 0;
353 s->reg = LM832x_GENERAL_ERROR;
354 }
355 break;
356 case LM832x_CMD_PWM_START:
357 s->reg = LM832x_GENERAL_ERROR;
358 if (!(value & 3) || (value >> 2) > 59) {
359 lm_kbd_error(s, ERR_BADPAR);
360 break;
361 }
362
363 s->pwm.addr[(value & 3) - 1] = value >> 2;
364 lm_kbd_pwm_start(s, (value & 3) - 1);
365 break;
366 case LM832x_CMD_PWM_STOP:
367 s->reg = LM832x_GENERAL_ERROR;
368 if (!(value & 3)) {
369 lm_kbd_error(s, ERR_BADPAR);
370 break;
371 }
372
373 timer_del(s->pwm.tm[(value & 3) - 1]);
374 break;
375
376 case LM832x_GENERAL_ERROR:
377 lm_kbd_error(s, ERR_BADPAR);
378 break;
379 default:
380 lm_kbd_error(s, ERR_CMDUNK);
381 fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
382 break;
383 }
384}
385
386static void lm_i2c_event(I2CSlave *i2c, enum i2c_event event)
387{
388 LM823KbdState *s = LM8323(i2c);
389
390 switch (event) {
391 case I2C_START_RECV:
392 case I2C_START_SEND:
393 s->i2c_cycle = 0;
394 s->i2c_dir = (event == I2C_START_SEND);
395 break;
396
397 default:
398 break;
399 }
400}
401
402static int lm_i2c_rx(I2CSlave *i2c)
403{
404 LM823KbdState *s = LM8323(i2c);
405
406 return lm_kbd_read(s, s->reg, s->i2c_cycle ++);
407}
408
409static int lm_i2c_tx(I2CSlave *i2c, uint8_t data)
410{
411 LM823KbdState *s = LM8323(i2c);
412
413 if (!s->i2c_cycle)
414 s->reg = data;
415 else
416 lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data);
417 s->i2c_cycle ++;
418
419 return 0;
420}
421
422static int lm_kbd_post_load(void *opaque, int version_id)
423{
424 LM823KbdState *s = opaque;
425
426 lm_kbd_irq_update(s);
427 lm_kbd_gpio_update(s);
428
429 return 0;
430}
431
432static const VMStateDescription vmstate_lm_kbd = {
433 .name = "LM8323",
434 .version_id = 0,
435 .minimum_version_id = 0,
436 .post_load = lm_kbd_post_load,
437 .fields = (VMStateField[]) {
438 VMSTATE_I2C_SLAVE(parent_obj, LM823KbdState),
439 VMSTATE_UINT8(i2c_dir, LM823KbdState),
440 VMSTATE_UINT8(i2c_cycle, LM823KbdState),
441 VMSTATE_UINT8(reg, LM823KbdState),
442 VMSTATE_UINT8(config, LM823KbdState),
443 VMSTATE_UINT8(status, LM823KbdState),
444 VMSTATE_UINT8(acttime, LM823KbdState),
445 VMSTATE_UINT8(error, LM823KbdState),
446 VMSTATE_UINT8(clock, LM823KbdState),
447 VMSTATE_UINT16(gpio.pull, LM823KbdState),
448 VMSTATE_UINT16(gpio.mask, LM823KbdState),
449 VMSTATE_UINT16(gpio.dir, LM823KbdState),
450 VMSTATE_UINT16(gpio.level, LM823KbdState),
451 VMSTATE_UINT8(kbd.dbnctime, LM823KbdState),
452 VMSTATE_UINT8(kbd.size, LM823KbdState),
453 VMSTATE_UINT8(kbd.start, LM823KbdState),
454 VMSTATE_UINT8(kbd.len, LM823KbdState),
455 VMSTATE_BUFFER(kbd.fifo, LM823KbdState),
456 VMSTATE_UINT16_ARRAY(pwm.file, LM823KbdState, 256),
457 VMSTATE_UINT8(pwm.faddr, LM823KbdState),
458 VMSTATE_BUFFER(pwm.addr, LM823KbdState),
459 VMSTATE_TIMER_PTR_ARRAY(pwm.tm, LM823KbdState, 3),
460 VMSTATE_END_OF_LIST()
461 }
462};
463
464
465static int lm8323_init(I2CSlave *i2c)
466{
467 LM823KbdState *s = LM8323(i2c);
468
469 s->model = 0x8323;
470 s->pwm.tm[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm0_tick, s);
471 s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s);
472 s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s);
473 qdev_init_gpio_out(DEVICE(i2c), &s->nirq, 1);
474
475 lm_kbd_reset(s);
476
477 qemu_register_reset((void *) lm_kbd_reset, s);
478 return 0;
479}
480
481void lm832x_key_event(DeviceState *dev, int key, int state)
482{
483 LM823KbdState *s = LM8323(dev);
484
485 if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR))
486 return;
487
488 if (s->kbd.len >= sizeof(s->kbd.fifo)) {
489 lm_kbd_error(s, ERR_FIFOOVR);
490 return;
491 }
492
493 s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] =
494 key | (state << 7);
495
496
497 s->status |= INT_KEYPAD;
498 lm_kbd_irq_update(s);
499}
500
501static void lm8323_class_init(ObjectClass *klass, void *data)
502{
503 DeviceClass *dc = DEVICE_CLASS(klass);
504 I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
505
506 k->init = lm8323_init;
507 k->event = lm_i2c_event;
508 k->recv = lm_i2c_rx;
509 k->send = lm_i2c_tx;
510 dc->vmsd = &vmstate_lm_kbd;
511}
512
513static const TypeInfo lm8323_info = {
514 .name = TYPE_LM8323,
515 .parent = TYPE_I2C_SLAVE,
516 .instance_size = sizeof(LM823KbdState),
517 .class_init = lm8323_class_init,
518};
519
520static void lm832x_register_types(void)
521{
522 type_register_static(&lm8323_info);
523}
524
525type_init(lm832x_register_types)
526