LXR qemu/hw/misc/arm-smmu.c

   1/*
   2 * QEMU model of the ARM SMMU-500
   3 *
   4 * Copyright (c) 2014 Xilinx Inc.
   5 *
   6 * Partially autogenerated by xregqemu.py 2014-08-25.
   7 * Written by Edgar E. Iglesias.
   8 *
   9 * Permission is hereby granted, free of charge, to any person obtaining a copy
  10 * of this software and associated documentation files (the "Software"), to deal
  11 * in the Software without restriction, including without limitation the rights
  12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13 * copies of the Software, and to permit persons to whom the Software is
  14 * furnished to do so, subject to the following conditions:
  15 *
  16 * The above copyright notice and this permission notice shall be included in
  17 * all copies or substantial portions of the Software.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  25 * THE SOFTWARE.
  26 */
  27
  28#include "qemu/osdep.h"
  29#include "hw/sysbus.h"
  30#include "hw/register-dep.h"
  31#include "qemu/bitops.h"
  32#include "qemu/log.h"
  33#include "qapi/error.h"
  34#include "sysemu/dma.h"
  35
  36#include "hw/fdt_generic_util.h"
  37
  38#ifndef XILINX_SMMU500_ERR_DEBUG
  39#define XILINX_SMMU500_ERR_DEBUG 0
  40#endif
  41
  42#define TYPE_XILINX_SMMU500 "arm.mmu-500"
  43
  44#define XILINX_SMMU500(obj) \
  45     OBJECT_CHECK(SMMU, (obj), TYPE_XILINX_SMMU500)
  46
  47#define DEBUG_DEV_SMMU 0
  48#define DEBUG_DEV_SMMU_PTW 0
  49
  50#define D(...) do {             \
  51    if (DEBUG_DEV_SMMU) {       \
  52        qemu_log(__VA_ARGS__);  \
  53    }                           \
  54} while (0);
  55
  56#define D_PTW(...) do {         \
  57    if (DEBUG_DEV_SMMU_PTW) {   \
  58        qemu_log(__VA_ARGS__);  \
  59    }                           \
  60} while (0);
  61
  62DEP_REG32(SMMU_SCR0, 0x0)
  63    DEP_FIELD(SMMU_SCR0, NSCFG, 2, 28)
  64    DEP_FIELD(SMMU_SCR0, WACFG, 2, 26)
  65    DEP_FIELD(SMMU_SCR0, RACFG, 2, 24)
  66    DEP_FIELD(SMMU_SCR0, SHCFG, 2, 22)
  67    DEP_FIELD(SMMU_SCR0, SMCFCFG, 1, 21)
  68    DEP_FIELD(SMMU_SCR0, MTCFG, 1, 20)
  69    DEP_FIELD(SMMU_SCR0, MEMATTR, 4, 16)
  70    DEP_FIELD(SMMU_SCR0, BSU, 2, 14)
  71    DEP_FIELD(SMMU_SCR0, FB, 1, 13)
  72    DEP_FIELD(SMMU_SCR0, PTM, 1, 12)
  73    DEP_FIELD(SMMU_SCR0, USFCFG, 1, 10)
  74    DEP_FIELD(SMMU_SCR0, GSE, 1, 9)
  75    DEP_FIELD(SMMU_SCR0, STALLD, 1, 8)
  76    DEP_FIELD(SMMU_SCR0, TRANSIENTCFG, 2, 6)
  77    DEP_FIELD(SMMU_SCR0, GCFGFIE, 1, 5)
  78    DEP_FIELD(SMMU_SCR0, GCFGFRE, 1, 4)
  79    DEP_FIELD(SMMU_SCR0, GFIE, 1, 2)
  80    DEP_FIELD(SMMU_SCR0, GFRE, 1, 1)
  81    DEP_FIELD(SMMU_SCR0, CLIENTPD, 1, 0)
  82DEP_REG32(SMMU_SCR1, 0x4)
  83    DEP_FIELD(SMMU_SCR1, NSCAFRO, 1, 28)
  84    DEP_FIELD(SMMU_SCR1, SPMEN, 1, 27)
  85    DEP_FIELD(SMMU_SCR1, SIF, 1, 26)
  86    DEP_FIELD(SMMU_SCR1, GEFRO, 1, 25)
  87    DEP_FIELD(SMMU_SCR1, GASRAE, 1, 24)
  88    DEP_FIELD(SMMU_SCR1, NSNUMIRPTO, 8, 16)
  89    DEP_FIELD(SMMU_SCR1, NSNUMSMRGO, 6, 8)
  90    DEP_FIELD(SMMU_SCR1, NSNUMCBO, 5, 0)
  91DEP_REG32(SMMU_SACR, 0x10)
  92    DEP_FIELD(SMMU_SACR, NORMALIZE, 1, 27)
  93    DEP_FIELD(SMMU_SACR, CACHE_LOCK, 1, 26)
  94    DEP_FIELD(SMMU_SACR, PAGESIZE, 1, 16)
  95    DEP_FIELD(SMMU_SACR, S2CRB_TLBEN, 1, 10)
  96    DEP_FIELD(SMMU_SACR, MMUDISB_TLBEN, 1, 9)
  97    DEP_FIELD(SMMU_SACR, SMTNMB_TLBEN, 1, 8)
  98    DEP_FIELD(SMMU_SACR, S1WC2EN, 1, 2)
  99DEP_REG32(SMMU_SIDR0, 0x20)
 100    DEP_FIELD(SMMU_SIDR0, SES, 1, 31)
 101    DEP_FIELD(SMMU_SIDR0, S1TS, 1, 30)
 102    DEP_FIELD(SMMU_SIDR0, S2TS, 1, 29)
 103    DEP_FIELD(SMMU_SIDR0, NTS, 1, 28)
 104    DEP_FIELD(SMMU_SIDR0, SMS, 1, 27)
 105    DEP_FIELD(SMMU_SIDR0, ATOSNS, 1, 26)
 106    DEP_FIELD(SMMU_SIDR0, PTFS, 2, 24)
 107    DEP_FIELD(SMMU_SIDR0, NUMIRPT, 8, 16)
 108    DEP_FIELD(SMMU_SIDR0, CTTW, 1, 14)
 109    DEP_FIELD(SMMU_SIDR0, BTM, 1, 13)
 110    DEP_FIELD(SMMU_SIDR0, NUMSIDB, 4, 9)
 111    DEP_FIELD(SMMU_SIDR0, NUMSMRG, 8, 0)
 112DEP_REG32(SMMU_SIDR1, 0x24)
 113    DEP_FIELD(SMMU_SIDR1, PAGESIZE, 1, 31)
 114    DEP_FIELD(SMMU_SIDR1, NUMPAGENDXB, 3, 28)
 115    DEP_FIELD(SMMU_SIDR1, NUMS2CB, 8, 16)
 116    DEP_FIELD(SMMU_SIDR1, SMCD, 1, 15)
 117    DEP_FIELD(SMMU_SIDR1, SSDTP, 1, 12)
 118    DEP_FIELD(SMMU_SIDR1, NUMSSDNDXB, 4, 8)
 119    DEP_FIELD(SMMU_SIDR1, NUMCB, 8, 0)
 120DEP_REG32(SMMU_SIDR2, 0x28)
 121    DEP_FIELD(SMMU_SIDR2, PTFSV8_64KB, 1, 14)
 122    DEP_FIELD(SMMU_SIDR2, PTFSV8_16KB, 1, 13)
 123    DEP_FIELD(SMMU_SIDR2, TFSV8_4KB, 1, 12)
 124    DEP_FIELD(SMMU_SIDR2, UBS, 4, 8)
 125    DEP_FIELD(SMMU_SIDR2, OAS, 4, 4)
 126    DEP_FIELD(SMMU_SIDR2, IAS, 4, 0)
 127DEP_REG32(SMMU_SIDR7, 0x3c)
 128    DEP_FIELD(SMMU_SIDR7, MAJOR, 4, 4)
 129    DEP_FIELD(SMMU_SIDR7, MINOR, 4, 0)
 130DEP_REG32(SMMU_SGFAR_LOW, 0x40)
 131DEP_REG32(SMMU_SGFAR_HIGH, 0x44)
 132    DEP_FIELD(SMMU_SGFAR_HIGH, FADDR, 17, 0)
 133DEP_REG32(SMMU_SGFSR, 0x48)
 134    DEP_FIELD(SMMU_SGFSR, MULTI, 1, 31)
 135    DEP_FIELD(SMMU_SGFSR, UUT, 1, 8)
 136    DEP_FIELD(SMMU_SGFSR, PF, 1, 7)
 137    DEP_FIELD(SMMU_SGFSR, EF, 1, 6)
 138    DEP_FIELD(SMMU_SGFSR, CAF, 1, 5)
 139    DEP_FIELD(SMMU_SGFSR, UCIF, 1, 4)
 140    DEP_FIELD(SMMU_SGFSR, UCBF, 1, 3)
 141    DEP_FIELD(SMMU_SGFSR, SMCF, 1, 2)
 142    DEP_FIELD(SMMU_SGFSR, USF, 1, 1)
 143    DEP_FIELD(SMMU_SGFSR, ICF, 1, 0)
 144DEP_REG32(SMMU_SGFSRRESTORE, 0x4c)
 145    DEP_FIELD(SMMU_SGFSRRESTORE, MULTI, 1, 31)
 146    DEP_FIELD(SMMU_SGFSRRESTORE, UUT, 1, 8)
 147    DEP_FIELD(SMMU_SGFSRRESTORE, PF, 1, 7)
 148    DEP_FIELD(SMMU_SGFSRRESTORE, EF, 1, 6)
 149    DEP_FIELD(SMMU_SGFSRRESTORE, CAF, 1, 5)
 150    DEP_FIELD(SMMU_SGFSRRESTORE, UCIF, 1, 4)
 151    DEP_FIELD(SMMU_SGFSRRESTORE, UCBF, 1, 3)
 152    DEP_FIELD(SMMU_SGFSRRESTORE, SMCF, 1, 2)
 153    DEP_FIELD(SMMU_SGFSRRESTORE, USF, 1, 1)
 154    DEP_FIELD(SMMU_SGFSRRESTORE, ICF, 1, 0)
 155DEP_REG32(SMMU_SGFSYNR0, 0x50)
 156    DEP_FIELD(SMMU_SGFSYNR0, ATS, 1, 6)
 157    DEP_FIELD(SMMU_SGFSYNR0, NSATTR, 1, 5)
 158    DEP_FIELD(SMMU_SGFSYNR0, NSSTATE, 1, 4)
 159    DEP_FIELD(SMMU_SGFSYNR0, IND, 1, 3)
 160    DEP_FIELD(SMMU_SGFSYNR0, PNU, 1, 2)
 161    DEP_FIELD(SMMU_SGFSYNR0, WNR, 1, 1)
 162DEP_REG32(SMMU_SGFSYNR1, 0x54)
 163    DEP_FIELD(SMMU_SGFSYNR1, SSD_INDEX, 15, 16)
 164    DEP_FIELD(SMMU_SGFSYNR1, STREAMID, 15, 0)
 165DEP_REG32(SMMU_STLBIALL, 0x60)
 166DEP_REG32(SMMU_TLBIVMID, 0x64)
 167    DEP_FIELD(SMMU_TLBIVMID, VMID, 8, 0)
 168DEP_REG32(SMMU_TLBIALLNSNH, 0x68)
 169DEP_REG32(SMMU_STLBGSYNC, 0x70)
 170DEP_REG32(SMMU_STLBGSTATUS, 0x74)
 171    DEP_FIELD(SMMU_STLBGSTATUS, GSACTIVE, 1, 0)
 172DEP_REG32(SMMU_DBGRPTRTBU, 0x80)
 173    DEP_FIELD(SMMU_DBGRPTRTBU, TBU_ID, 3, 24)
 174    DEP_FIELD(SMMU_DBGRPTRTBU, TLB_POINTER, 12, 4)
 175    DEP_FIELD(SMMU_DBGRPTRTBU, TLB_ENTRY_POINTER, 4, 0)
 176DEP_REG32(SMMU_DBGRDATATBU, 0x84)
 177DEP_REG32(SMMU_DBGRPTRTCU, 0x88)
 178    DEP_FIELD(SMMU_DBGRPTRTCU, DATASRC, 2, 26)
 179    DEP_FIELD(SMMU_DBGRPTRTCU, WAY_RAM, 2, 24)
 180    DEP_FIELD(SMMU_DBGRPTRTCU, TLB_POINTER, 9, 4)
 181    DEP_FIELD(SMMU_DBGRPTRTCU, TLB_ENTRY_POINTER, 4, 0)
 182DEP_REG32(SMMU_DBGRDATATCU, 0x8c)
 183DEP_REG32(SMMU_STLBIVALM_LOW, 0xa0)
 184DEP_REG32(SMMU_STLBIVALM_HIGH, 0xa4)
 185    DEP_FIELD(SMMU_STLBIVALM_HIGH, ADDRESS, 5, 0)
 186DEP_REG32(SMMU_STLBIVAM_LOW, 0xa8)
 187DEP_REG32(SMMU_STLBIVAM_HIGH, 0xac)
 188    DEP_FIELD(SMMU_STLBIVAM_HIGH, ADDRESS, 5, 0)
 189DEP_REG32(SMMU_STLBIALLM, 0xbc)
 190DEP_REG32(SMMU_NSCR0, 0x400)
 191    DEP_FIELD(SMMU_NSCR0, WACFG, 2, 26)
 192    DEP_FIELD(SMMU_NSCR0, RACFG, 2, 24)
 193    DEP_FIELD(SMMU_NSCR0, SHCFG, 2, 22)
 194    DEP_FIELD(SMMU_NSCR0, SMCFCFG, 1, 21)
 195    DEP_FIELD(SMMU_NSCR0, MTCFG, 1, 20)
 196    DEP_FIELD(SMMU_NSCR0, MEMATTR, 4, 16)
 197    DEP_FIELD(SMMU_NSCR0, BSU, 2, 14)
 198    DEP_FIELD(SMMU_NSCR0, FB, 1, 13)
 199    DEP_FIELD(SMMU_NSCR0, PTM, 1, 12)
 200    DEP_FIELD(SMMU_NSCR0, VMIDPNE, 1, 11)
 201    DEP_FIELD(SMMU_NSCR0, USFCFG, 1, 10)
 202    DEP_FIELD(SMMU_NSCR0, GSE, 1, 9)
 203    DEP_FIELD(SMMU_NSCR0, STALLD, 1, 8)
 204    DEP_FIELD(SMMU_NSCR0, TRANSIENTCFG, 2, 6)
 205    DEP_FIELD(SMMU_NSCR0, GCFGFIE, 1, 5)
 206    DEP_FIELD(SMMU_NSCR0, GCFGFRE, 1, 4)
 207    DEP_FIELD(SMMU_NSCR0, GFIE, 1, 2)
 208    DEP_FIELD(SMMU_NSCR0, GFRE, 1, 1)
 209    DEP_FIELD(SMMU_NSCR0, CLIENTPD, 1, 0)
 210DEP_REG32(SMMU_NSACR, 0x410)
 211    DEP_FIELD(SMMU_NSACR, CACHE_LOCK, 1, 26)
 212    DEP_FIELD(SMMU_NSACR, DP4K_TBUDISB, 1, 25)
 213    DEP_FIELD(SMMU_NSACR, DP4K_TCUDISB, 1, 24)
 214    DEP_FIELD(SMMU_NSACR, S2CRB_TLBEN, 1, 10)
 215    DEP_FIELD(SMMU_NSACR, MMUDISB_TLBEN, 1, 9)
 216    DEP_FIELD(SMMU_NSACR, SMTNMB_TLBEN, 1, 8)
 217    DEP_FIELD(SMMU_NSACR, IPA2PA_CEN, 1, 4)
 218    DEP_FIELD(SMMU_NSACR, S2WC2EN, 1, 3)
 219    DEP_FIELD(SMMU_NSACR, S1WC2EN, 1, 2)
 220DEP_REG32(SMMU_NSGFAR_LOW, 0x440)
 221DEP_REG32(SMMU_NSGFAR_HIGH, 0x444)
 222    DEP_FIELD(SMMU_NSGFAR_HIGH, FADDR, 17, 0)
 223DEP_REG32(SMMU_NSGFSR, 0x448)
 224    DEP_FIELD(SMMU_NSGFSR, MULTI, 1, 31)
 225    DEP_FIELD(SMMU_NSGFSR, UUT, 1, 8)
 226    DEP_FIELD(SMMU_NSGFSR, EF, 1, 6)
 227    DEP_FIELD(SMMU_NSGFSR, CAF, 1, 5)
 228    DEP_FIELD(SMMU_NSGFSR, UCIF, 1, 4)
 229    DEP_FIELD(SMMU_NSGFSR, UCBF, 1, 3)
 230    DEP_FIELD(SMMU_NSGFSR, SMCF, 1, 2)
 231    DEP_FIELD(SMMU_NSGFSR, USF, 1, 1)
 232    DEP_FIELD(SMMU_NSGFSR, ICF, 1, 0)
 233DEP_REG32(SMMU_NSGFSRRESTORE, 0x44c)
 234    DEP_FIELD(SMMU_NSGFSRRESTORE, MULTI, 1, 31)
 235    DEP_FIELD(SMMU_NSGFSRRESTORE, UUT, 1, 8)
 236    DEP_FIELD(SMMU_NSGFSRRESTORE, EF, 1, 6)
 237    DEP_FIELD(SMMU_NSGFSRRESTORE, CAF, 1, 5)
 238    DEP_FIELD(SMMU_NSGFSRRESTORE, UCIF, 1, 4)
 239    DEP_FIELD(SMMU_NSGFSRRESTORE, UCBF, 1, 3)
 240    DEP_FIELD(SMMU_NSGFSRRESTORE, SMCF, 1, 2)
 241    DEP_FIELD(SMMU_NSGFSRRESTORE, USF, 1, 1)
 242    DEP_FIELD(SMMU_NSGFSRRESTORE, ICF, 1, 0)
 243DEP_REG32(SMMU_NSGFSYNR0, 0x450)
 244    DEP_FIELD(SMMU_NSGFSYNR0, ATS, 1, 6)
 245    DEP_FIELD(SMMU_NSGFSYNR0, IND, 1, 3)
 246    DEP_FIELD(SMMU_NSGFSYNR0, PNU, 1, 2)
 247    DEP_FIELD(SMMU_NSGFSYNR0, WNR, 1, 1)
 248    DEP_FIELD(SMMU_NSGFSYNR0, NESTED, 1, 0)
 249DEP_REG32(SMMU_NSGFSYNDR1, 0x454)
 250    DEP_FIELD(SMMU_NSGFSYNDR1, SSD_INDEX, 15, 16)
 251    DEP_FIELD(SMMU_NSGFSYNDR1, STREAMID, 15, 0)
 252DEP_REG32(SMMU_NSTLBGSYNC, 0x470)
 253DEP_REG32(SMMU_NSTLBGSTATUS, 0x474)
 254    DEP_FIELD(SMMU_NSTLBGSTATUS, GSACTIVE, 1, 0)
 255DEP_REG32(SMMU_SMR0, 0x800)
 256    DEP_FIELD(SMMU_SMR0, VALID, 1, 31)
 257    DEP_FIELD(SMMU_SMR0, MASK, 15, 16)
 258    DEP_FIELD(SMMU_SMR0, ID, 15, 0)
 259DEP_REG32(SMMU_SMR1, 0x804)
 260    DEP_FIELD(SMMU_SMR1, VALID, 1, 31)
 261    DEP_FIELD(SMMU_SMR1, MASK, 15, 16)
 262    DEP_FIELD(SMMU_SMR1, ID, 15, 0)
 263DEP_REG32(SMMU_SMR2, 0x808)
 264    DEP_FIELD(SMMU_SMR2, VALID, 1, 31)
 265    DEP_FIELD(SMMU_SMR2, MASK, 15, 16)
 266    DEP_FIELD(SMMU_SMR2, ID, 15, 0)
 267DEP_REG32(SMMU_SMR3, 0x80c)
 268    DEP_FIELD(SMMU_SMR3, VALID, 1, 31)
 269    DEP_FIELD(SMMU_SMR3, MASK, 15, 16)
 270    DEP_FIELD(SMMU_SMR3, ID, 15, 0)
 271DEP_REG32(SMMU_SMR4, 0x810)
 272    DEP_FIELD(SMMU_SMR4, VALID, 1, 31)
 273    DEP_FIELD(SMMU_SMR4, MASK, 15, 16)
 274    DEP_FIELD(SMMU_SMR4, ID, 15, 0)
 275DEP_REG32(SMMU_SMR5, 0x814)
 276    DEP_FIELD(SMMU_SMR5, VALID, 1, 31)
 277    DEP_FIELD(SMMU_SMR5, MASK, 15, 16)
 278    DEP_FIELD(SMMU_SMR5, ID, 15, 0)
 279DEP_REG32(SMMU_SMR6, 0x818)
 280    DEP_FIELD(SMMU_SMR6, VALID, 1, 31)
 281    DEP_FIELD(SMMU_SMR6, MASK, 15, 16)
 282    DEP_FIELD(SMMU_SMR6, ID, 15, 0)
 283DEP_REG32(SMMU_SMR7, 0x81c)
 284    DEP_FIELD(SMMU_SMR7, VALID, 1, 31)
 285    DEP_FIELD(SMMU_SMR7, MASK, 15, 16)
 286    DEP_FIELD(SMMU_SMR7, ID, 15, 0)
 287DEP_REG32(SMMU_SMR8, 0x820)
 288    DEP_FIELD(SMMU_SMR8, VALID, 1, 31)
 289    DEP_FIELD(SMMU_SMR8, MASK, 15, 16)
 290    DEP_FIELD(SMMU_SMR8, ID, 15, 0)
 291DEP_REG32(SMMU_SMR9, 0x824)
 292    DEP_FIELD(SMMU_SMR9, VALID, 1, 31)
 293    DEP_FIELD(SMMU_SMR9, MASK, 15, 16)
 294    DEP_FIELD(SMMU_SMR9, ID, 15, 0)
 295DEP_REG32(SMMU_SMR10, 0x828)
 296    DEP_FIELD(SMMU_SMR10, VALID, 1, 31)
 297    DEP_FIELD(SMMU_SMR10, MASK, 15, 16)
 298    DEP_FIELD(SMMU_SMR10, ID, 15, 0)
 299DEP_REG32(SMMU_SMR11, 0x82c)
 300    DEP_FIELD(SMMU_SMR11, VALID, 1, 31)
 301    DEP_FIELD(SMMU_SMR11, MASK, 15, 16)
 302    DEP_FIELD(SMMU_SMR11, ID, 15, 0)
 303DEP_REG32(SMMU_SMR12, 0x830)
 304    DEP_FIELD(SMMU_SMR12, VALID, 1, 31)
 305    DEP_FIELD(SMMU_SMR12, MASK, 15, 16)
 306    DEP_FIELD(SMMU_SMR12, ID, 15, 0)
 307DEP_REG32(SMMU_SMR13, 0x834)
 308    DEP_FIELD(SMMU_SMR13, VALID, 1, 31)
 309    DEP_FIELD(SMMU_SMR13, MASK, 15, 16)
 310    DEP_FIELD(SMMU_SMR13, ID, 15, 0)
 311DEP_REG32(SMMU_SMR14, 0x838)
 312    DEP_FIELD(SMMU_SMR14, VALID, 1, 31)
 313    DEP_FIELD(SMMU_SMR14, MASK, 15, 16)
 314    DEP_FIELD(SMMU_SMR14, ID, 15, 0)
 315DEP_REG32(SMMU_SMR15, 0x83c)
 316    DEP_FIELD(SMMU_SMR15, VALID, 1, 31)
 317    DEP_FIELD(SMMU_SMR15, MASK, 15, 16)
 318    DEP_FIELD(SMMU_SMR15, ID, 15, 0)
 319DEP_REG32(SMMU_SMR16, 0x840)
 320    DEP_FIELD(SMMU_SMR16, VALID, 1, 31)
 321    DEP_FIELD(SMMU_SMR16, MASK, 15, 16)
 322    DEP_FIELD(SMMU_SMR16, ID, 15, 0)
 323DEP_REG32(SMMU_SMR17, 0x844)
 324    DEP_FIELD(SMMU_SMR17, VALID, 1, 31)
 325    DEP_FIELD(SMMU_SMR17, MASK, 15, 16)
 326    DEP_FIELD(SMMU_SMR17, ID, 15, 0)
 327DEP_REG32(SMMU_SMR18, 0x848)
 328    DEP_FIELD(SMMU_SMR18, VALID, 1, 31)
 329    DEP_FIELD(SMMU_SMR18, MASK, 15, 16)
 330    DEP_FIELD(SMMU_SMR18, ID, 15, 0)
 331DEP_REG32(SMMU_SMR19, 0x84c)
 332    DEP_FIELD(SMMU_SMR19, VALID, 1, 31)
 333    DEP_FIELD(SMMU_SMR19, MASK, 15, 16)
 334    DEP_FIELD(SMMU_SMR19, ID, 15, 0)
 335DEP_REG32(SMMU_SMR20, 0x850)
 336    DEP_FIELD(SMMU_SMR20, VALID, 1, 31)
 337    DEP_FIELD(SMMU_SMR20, MASK, 15, 16)
 338    DEP_FIELD(SMMU_SMR20, ID, 15, 0)
 339DEP_REG32(SMMU_SMR21, 0x854)
 340    DEP_FIELD(SMMU_SMR21, VALID, 1, 31)
 341    DEP_FIELD(SMMU_SMR21, MASK, 15, 16)
 342    DEP_FIELD(SMMU_SMR21, ID, 15, 0)
 343DEP_REG32(SMMU_SMR22, 0x858)
 344    DEP_FIELD(SMMU_SMR22, VALID, 1, 31)
 345    DEP_FIELD(SMMU_SMR22, MASK, 15, 16)
 346    DEP_FIELD(SMMU_SMR22, ID, 15, 0)
 347DEP_REG32(SMMU_SMR23, 0x85c)
 348    DEP_FIELD(SMMU_SMR23, VALID, 1, 31)
 349    DEP_FIELD(SMMU_SMR23, MASK, 15, 16)
 350    DEP_FIELD(SMMU_SMR23, ID, 15, 0)
 351DEP_REG32(SMMU_SMR24, 0x860)
 352    DEP_FIELD(SMMU_SMR24, VALID, 1, 31)
 353    DEP_FIELD(SMMU_SMR24, MASK, 15, 16)
 354    DEP_FIELD(SMMU_SMR24, ID, 15, 0)
 355DEP_REG32(SMMU_SMR25, 0x864)
 356    DEP_FIELD(SMMU_SMR25, VALID, 1, 31)
 357    DEP_FIELD(SMMU_SMR25, MASK, 15, 16)
 358    DEP_FIELD(SMMU_SMR25, ID, 15, 0)
 359DEP_REG32(SMMU_SMR26, 0x868)
 360    DEP_FIELD(SMMU_SMR26, VALID, 1, 31)
 361    DEP_FIELD(SMMU_SMR26, MASK, 15, 16)
 362    DEP_FIELD(SMMU_SMR26, ID, 15, 0)
 363DEP_REG32(SMMU_SMR27, 0x86c)
 364    DEP_FIELD(SMMU_SMR27, VALID, 1, 31)
 365    DEP_FIELD(SMMU_SMR27, MASK, 15, 16)
 366    DEP_FIELD(SMMU_SMR27, ID, 15, 0)
 367DEP_REG32(SMMU_SMR28, 0x870)
 368    DEP_FIELD(SMMU_SMR28, VALID, 1, 31)
 369    DEP_FIELD(SMMU_SMR28, MASK, 15, 16)
 370    DEP_FIELD(SMMU_SMR28, ID, 15, 0)
 371DEP_REG32(SMMU_SMR29, 0x874)
 372    DEP_FIELD(SMMU_SMR29, VALID, 1, 31)
 373    DEP_FIELD(SMMU_SMR29, MASK, 15, 16)
 374    DEP_FIELD(SMMU_SMR29, ID, 15, 0)
 375DEP_REG32(SMMU_SMR30, 0x878)
 376    DEP_FIELD(SMMU_SMR30, VALID, 1, 31)
 377    DEP_FIELD(SMMU_SMR30, MASK, 15, 16)
 378    DEP_FIELD(SMMU_SMR30, ID, 15, 0)
 379DEP_REG32(SMMU_SMR31, 0x87c)
 380    DEP_FIELD(SMMU_SMR31, VALID, 1, 31)
 381    DEP_FIELD(SMMU_SMR31, MASK, 15, 16)
 382    DEP_FIELD(SMMU_SMR31, ID, 15, 0)
 383DEP_REG32(SMMU_SMR32, 0x880)
 384    DEP_FIELD(SMMU_SMR32, VALID, 1, 31)
 385    DEP_FIELD(SMMU_SMR32, MASK, 15, 16)
 386    DEP_FIELD(SMMU_SMR32, ID, 15, 0)
 387DEP_REG32(SMMU_SMR33, 0x884)
 388    DEP_FIELD(SMMU_SMR33, VALID, 1, 31)
 389    DEP_FIELD(SMMU_SMR33, MASK, 15, 16)
 390    DEP_FIELD(SMMU_SMR33, ID, 15, 0)
 391DEP_REG32(SMMU_SMR34, 0x888)
 392    DEP_FIELD(SMMU_SMR34, VALID, 1, 31)
 393    DEP_FIELD(SMMU_SMR34, MASK, 15, 16)
 394    DEP_FIELD(SMMU_SMR34, ID, 15, 0)
 395DEP_REG32(SMMU_SMR35, 0x88c)
 396    DEP_FIELD(SMMU_SMR35, VALID, 1, 31)
 397    DEP_FIELD(SMMU_SMR35, MASK, 15, 16)
 398    DEP_FIELD(SMMU_SMR35, ID, 15, 0)
 399DEP_REG32(SMMU_SMR36, 0x890)
 400    DEP_FIELD(SMMU_SMR36, VALID, 1, 31)
 401    DEP_FIELD(SMMU_SMR36, MASK, 15, 16)
 402    DEP_FIELD(SMMU_SMR36, ID, 15, 0)
 403DEP_REG32(SMMU_SMR37, 0x894)
 404    DEP_FIELD(SMMU_SMR37, VALID, 1, 31)
 405    DEP_FIELD(SMMU_SMR37, MASK, 15, 16)
 406    DEP_FIELD(SMMU_SMR37, ID, 15, 0)
 407DEP_REG32(SMMU_SMR38, 0x898)
 408    DEP_FIELD(SMMU_SMR38, VALID, 1, 31)
 409    DEP_FIELD(SMMU_SMR38, MASK, 15, 16)
 410    DEP_FIELD(SMMU_SMR38, ID, 15, 0)
 411DEP_REG32(SMMU_SMR39, 0x89c)
 412    DEP_FIELD(SMMU_SMR39, VALID, 1, 31)
 413    DEP_FIELD(SMMU_SMR39, MASK, 15, 16)
 414    DEP_FIELD(SMMU_SMR39, ID, 15, 0)
 415DEP_REG32(SMMU_SMR40, 0x8a0)
 416    DEP_FIELD(SMMU_SMR40, VALID, 1, 31)
 417    DEP_FIELD(SMMU_SMR40, MASK, 15, 16)
 418    DEP_FIELD(SMMU_SMR40, ID, 15, 0)
 419DEP_REG32(SMMU_SMR41, 0x8a4)
 420    DEP_FIELD(SMMU_SMR41, VALID, 1, 31)
 421    DEP_FIELD(SMMU_SMR41, MASK, 15, 16)
 422    DEP_FIELD(SMMU_SMR41, ID, 15, 0)
 423DEP_REG32(SMMU_SMR42, 0x8a8)
 424    DEP_FIELD(SMMU_SMR42, VALID, 1, 31)
 425    DEP_FIELD(SMMU_SMR42, MASK, 15, 16)
 426    DEP_FIELD(SMMU_SMR42, ID, 15, 0)
 427DEP_REG32(SMMU_SMR43, 0x8ac)
 428    DEP_FIELD(SMMU_SMR43, VALID, 1, 31)
 429    DEP_FIELD(SMMU_SMR43, MASK, 15, 16)
 430    DEP_FIELD(SMMU_SMR43, ID, 15, 0)
 431DEP_REG32(SMMU_SMR44, 0x8b0)
 432    DEP_FIELD(SMMU_SMR44, VALID, 1, 31)
 433    DEP_FIELD(SMMU_SMR44, MASK, 15, 16)
 434    DEP_FIELD(SMMU_SMR44, ID, 15, 0)
 435DEP_REG32(SMMU_SMR45, 0x8b4)
 436    DEP_FIELD(SMMU_SMR45, VALID, 1, 31)
 437    DEP_FIELD(SMMU_SMR45, MASK, 15, 16)
 438    DEP_FIELD(SMMU_SMR45, ID, 15, 0)
 439DEP_REG32(SMMU_SMR46, 0x8b8)
 440    DEP_FIELD(SMMU_SMR46, VALID, 1, 31)
 441    DEP_FIELD(SMMU_SMR46, MASK, 15, 16)
 442    DEP_FIELD(SMMU_SMR46, ID, 15, 0)
 443DEP_REG32(SMMU_SMR47, 0x8bc)
 444    DEP_FIELD(SMMU_SMR47, VALID, 1, 31)
 445    DEP_FIELD(SMMU_SMR47, MASK, 15, 16)
 446    DEP_FIELD(SMMU_SMR47, ID, 15, 0)
 447DEP_REG32(SMMU_S2CR0, 0xc00)
 448    DEP_FIELD(SMMU_S2CR0, TRANSIENTCFG, 2, 28)
 449    DEP_FIELD(SMMU_S2CR0, INSTCFG_1, 1, 27)
 450    DEP_FIELD(SMMU_S2CR0, INSTCFG_0_FB, 1, 26)
 451    DEP_FIELD(SMMU_S2CR0, PRIVCFG_BSU, 2, 24)
 452    DEP_FIELD(SMMU_S2CR0, WACFG, 2, 22)
 453    DEP_FIELD(SMMU_S2CR0, RACFG, 2, 20)
 454    DEP_FIELD(SMMU_S2CR0, NSCFG, 2, 18)
 455    DEP_FIELD(SMMU_S2CR0, TYPE, 2, 16)
 456    DEP_FIELD(SMMU_S2CR0, MEM_ATTR, 4, 12)
 457    DEP_FIELD(SMMU_S2CR0, MTCFG, 1, 11)
 458    DEP_FIELD(SMMU_S2CR0, SHCFG, 2, 8)
 459    DEP_FIELD(SMMU_S2CR0, CBNDX_VMID, 8, 0)
 460DEP_REG32(SMMU_S2CR1, 0xc04)
 461    DEP_FIELD(SMMU_S2CR1, TRANSIENTCFG, 2, 28)
 462    DEP_FIELD(SMMU_S2CR1, INSTCFG_1, 1, 27)
 463    DEP_FIELD(SMMU_S2CR1, INSTCFG_0_FB, 1, 26)
 464    DEP_FIELD(SMMU_S2CR1, PRIVCFG_BSU, 2, 24)
 465    DEP_FIELD(SMMU_S2CR1, WACFG, 2, 22)
 466    DEP_FIELD(SMMU_S2CR1, RACFG, 2, 20)
 467    DEP_FIELD(SMMU_S2CR1, NSCFG, 2, 18)
 468    DEP_FIELD(SMMU_S2CR1, TYPE, 2, 16)
 469    DEP_FIELD(SMMU_S2CR1, MEM_ATTR, 4, 12)
 470    DEP_FIELD(SMMU_S2CR1, MTCFG, 1, 11)
 471    DEP_FIELD(SMMU_S2CR1, SHCFG, 2, 8)
 472    DEP_FIELD(SMMU_S2CR1, CBNDX_VMID, 8, 0)
 473DEP_REG32(SMMU_S2CR2, 0xc08)
 474    DEP_FIELD(SMMU_S2CR2, TRANSIENTCFG, 2, 28)
 475    DEP_FIELD(SMMU_S2CR2, INSTCFG_1, 1, 27)
 476    DEP_FIELD(SMMU_S2CR2, INSTCFG_0_FB, 1, 26)
 477    DEP_FIELD(SMMU_S2CR2, PRIVCFG_BSU, 2, 24)
 478    DEP_FIELD(SMMU_S2CR2, WACFG, 2, 22)
 479    DEP_FIELD(SMMU_S2CR2, RACFG, 2, 20)
 480    DEP_FIELD(SMMU_S2CR2, NSCFG, 2, 18)
 481    DEP_FIELD(SMMU_S2CR2, TYPE, 2, 16)
 482    DEP_FIELD(SMMU_S2CR2, MEM_ATTR, 4, 12)
 483    DEP_FIELD(SMMU_S2CR2, MTCFG, 1, 11)
 484    DEP_FIELD(SMMU_S2CR2, SHCFG, 2, 8)
 485    DEP_FIELD(SMMU_S2CR2, CBNDX_VMID, 8, 0)
 486DEP_REG32(SMMU_S2CR3, 0xc0c)
 487    DEP_FIELD(SMMU_S2CR3, TRANSIENTCFG, 2, 28)
 488    DEP_FIELD(SMMU_S2CR3, INSTCFG_1, 1, 27)
 489    DEP_FIELD(SMMU_S2CR3, INSTCFG_0_FB, 1, 26)
 490    DEP_FIELD(SMMU_S2CR3, PRIVCFG_BSU, 2, 24)
 491    DEP_FIELD(SMMU_S2CR3, WACFG, 2, 22)
 492    DEP_FIELD(SMMU_S2CR3, RACFG, 2, 20)
 493    DEP_FIELD(SMMU_S2CR3, NSCFG, 2, 18)
 494    DEP_FIELD(SMMU_S2CR3, TYPE, 2, 16)
 495    DEP_FIELD(SMMU_S2CR3, MEM_ATTR, 4, 12)
 496    DEP_FIELD(SMMU_S2CR3, MTCFG, 1, 11)
 497    DEP_FIELD(SMMU_S2CR3, SHCFG, 2, 8)
 498    DEP_FIELD(SMMU_S2CR3, CBNDX_VMID, 8, 0)
 499DEP_REG32(SMMU_S2CR4, 0xc10)
 500    DEP_FIELD(SMMU_S2CR4, TRANSIENTCFG, 2, 28)
 501    DEP_FIELD(SMMU_S2CR4, INSTCFG_1, 1, 27)
 502    DEP_FIELD(SMMU_S2CR4, INSTCFG_0_FB, 1, 26)
 503    DEP_FIELD(SMMU_S2CR4, PRIVCFG_BSU, 2, 24)
 504    DEP_FIELD(SMMU_S2CR4, WACFG, 2, 22)
 505    DEP_FIELD(SMMU_S2CR4, RACFG, 2, 20)
 506    DEP_FIELD(SMMU_S2CR4, NSCFG, 2, 18)
 507    DEP_FIELD(SMMU_S2CR4, TYPE, 2, 16)
 508    DEP_FIELD(SMMU_S2CR4, MEM_ATTR, 4, 12)
 509    DEP_FIELD(SMMU_S2CR4, MTCFG, 1, 11)
 510    DEP_FIELD(SMMU_S2CR4, SHCFG, 2, 8)
 511    DEP_FIELD(SMMU_S2CR4, CBNDX_VMID, 8, 0)
 512DEP_REG32(SMMU_S2CR5, 0xc14)
 513    DEP_FIELD(SMMU_S2CR5, TRANSIENTCFG, 2, 28)
 514    DEP_FIELD(SMMU_S2CR5, INSTCFG_1, 1, 27)
 515    DEP_FIELD(SMMU_S2CR5, INSTCFG_0_FB, 1, 26)
 516    DEP_FIELD(SMMU_S2CR5, PRIVCFG_BSU, 2, 24)
 517    DEP_FIELD(SMMU_S2CR5, WACFG, 2, 22)
 518    DEP_FIELD(SMMU_S2CR5, RACFG, 2, 20)
 519    DEP_FIELD(SMMU_S2CR5, NSCFG, 2, 18)
 520    DEP_FIELD(SMMU_S2CR5, TYPE, 2, 16)
 521    DEP_FIELD(SMMU_S2CR5, MEM_ATTR, 4, 12)
 522    DEP_FIELD(SMMU_S2CR5, MTCFG, 1, 11)
 523    DEP_FIELD(SMMU_S2CR5, SHCFG, 2, 8)
 524    DEP_FIELD(SMMU_S2CR5, CBNDX_VMID, 8, 0)
 525DEP_REG32(SMMU_S2CR6, 0xc18)
 526    DEP_FIELD(SMMU_S2CR6, TRANSIENTCFG, 2, 28)
 527    DEP_FIELD(SMMU_S2CR6, INSTCFG_1, 1, 27)
 528    DEP_FIELD(SMMU_S2CR6, INSTCFG_0_FB, 1, 26)
 529    DEP_FIELD(SMMU_S2CR6, PRIVCFG_BSU, 2, 24)
 530    DEP_FIELD(SMMU_S2CR6, WACFG, 2, 22)
 531    DEP_FIELD(SMMU_S2CR6, RACFG, 2, 20)
 532    DEP_FIELD(SMMU_S2CR6, NSCFG, 2, 18)
 533    DEP_FIELD(SMMU_S2CR6, TYPE, 2, 16)
 534    DEP_FIELD(SMMU_S2CR6, MEM_ATTR, 4, 12)
 535    DEP_FIELD(SMMU_S2CR6, MTCFG, 1, 11)
 536    DEP_FIELD(SMMU_S2CR6, SHCFG, 2, 8)
 537    DEP_FIELD(SMMU_S2CR6, CBNDX_VMID, 8, 0)
 538DEP_REG32(SMMU_S2CR7, 0xc1c)
 539    DEP_FIELD(SMMU_S2CR7, TRANSIENTCFG, 2, 28)
 540    DEP_FIELD(SMMU_S2CR7, INSTCFG_1, 1, 27)
 541    DEP_FIELD(SMMU_S2CR7, INSTCFG_0_FB, 1, 26)
 542    DEP_FIELD(SMMU_S2CR7, PRIVCFG_BSU, 2, 24)
 543    DEP_FIELD(SMMU_S2CR7, WACFG, 2, 22)
 544    DEP_FIELD(SMMU_S2CR7, RACFG, 2, 20)
 545    DEP_FIELD(SMMU_S2CR7, NSCFG, 2, 18)
 546    DEP_FIELD(SMMU_S2CR7, TYPE, 2, 16)
 547    DEP_FIELD(SMMU_S2CR7, MEM_ATTR, 4, 12)
 548    DEP_FIELD(SMMU_S2CR7, MTCFG, 1, 11)
 549    DEP_FIELD(SMMU_S2CR7, SHCFG, 2, 8)
 550    DEP_FIELD(SMMU_S2CR7, CBNDX_VMID, 8, 0)
 551DEP_REG32(SMMU_S2CR8, 0xc20)
 552    DEP_FIELD(SMMU_S2CR8, TRANSIENTCFG, 2, 28)
 553    DEP_FIELD(SMMU_S2CR8, INSTCFG_1, 1, 27)
 554    DEP_FIELD(SMMU_S2CR8, INSTCFG_0_FB, 1, 26)
 555    DEP_FIELD(SMMU_S2CR8, PRIVCFG_BSU, 2, 24)
 556    DEP_FIELD(SMMU_S2CR8, WACFG, 2, 22)
 557    DEP_FIELD(SMMU_S2CR8, RACFG, 2, 20)
 558    DEP_FIELD(SMMU_S2CR8, NSCFG, 2, 18)
 559    DEP_FIELD(SMMU_S2CR8, TYPE, 2, 16)
 560    DEP_FIELD(SMMU_S2CR8, MEM_ATTR, 4, 12)
 561    DEP_FIELD(SMMU_S2CR8, MTCFG, 1, 11)
 562    DEP_FIELD(SMMU_S2CR8, SHCFG, 2, 8)
 563    DEP_FIELD(SMMU_S2CR8, CBNDX_VMID, 8, 0)
 564DEP_REG32(SMMU_S2CR9, 0xc24)
 565    DEP_FIELD(SMMU_S2CR9, TRANSIENTCFG, 2, 28)
 566    DEP_FIELD(SMMU_S2CR9, INSTCFG_1, 1, 27)
 567    DEP_FIELD(SMMU_S2CR9, INSTCFG_0_FB, 1, 26)
 568    DEP_FIELD(SMMU_S2CR9, PRIVCFG_BSU, 2, 24)
 569    DEP_FIELD(SMMU_S2CR9, WACFG, 2, 22)
 570    DEP_FIELD(SMMU_S2CR9, RACFG, 2, 20)
 571    DEP_FIELD(SMMU_S2CR9, NSCFG, 2, 18)
 572    DEP_FIELD(SMMU_S2CR9, TYPE, 2, 16)
 573    DEP_FIELD(SMMU_S2CR9, MEM_ATTR, 4, 12)
 574    DEP_FIELD(SMMU_S2CR9, MTCFG, 1, 11)
 575    DEP_FIELD(SMMU_S2CR9, SHCFG, 2, 8)
 576    DEP_FIELD(SMMU_S2CR9, CBNDX_VMID, 8, 0)
 577DEP_REG32(SMMU_S2CR10, 0xc28)
 578    DEP_FIELD(SMMU_S2CR10, TRANSIENTCFG, 2, 28)
 579    DEP_FIELD(SMMU_S2CR10, INSTCFG_1, 1, 27)
 580    DEP_FIELD(SMMU_S2CR10, INSTCFG_0_FB, 1, 26)
 581    DEP_FIELD(SMMU_S2CR10, PRIVCFG_BSU, 2, 24)
 582    DEP_FIELD(SMMU_S2CR10, WACFG, 2, 22)
 583    DEP_FIELD(SMMU_S2CR10, RACFG, 2, 20)
 584    DEP_FIELD(SMMU_S2CR10, NSCFG, 2, 18)
 585    DEP_FIELD(SMMU_S2CR10, TYPE, 2, 16)
 586    DEP_FIELD(SMMU_S2CR10, MEM_ATTR, 4, 12)
 587    DEP_FIELD(SMMU_S2CR10, MTCFG, 1, 11)
 588    DEP_FIELD(SMMU_S2CR10, SHCFG, 2, 8)
 589    DEP_FIELD(SMMU_S2CR10, CBNDX_VMID, 8, 0)
 590DEP_REG32(SMMU_S2CR11, 0xc2c)
 591    DEP_FIELD(SMMU_S2CR11, TRANSIENTCFG, 2, 28)
 592    DEP_FIELD(SMMU_S2CR11, INSTCFG_1, 1, 27)
 593    DEP_FIELD(SMMU_S2CR11, INSTCFG_0_FB, 1, 26)
 594    DEP_FIELD(SMMU_S2CR11, PRIVCFG_BSU, 2, 24)
 595    DEP_FIELD(SMMU_S2CR11, WACFG, 2, 22)
 596    DEP_FIELD(SMMU_S2CR11, RACFG, 2, 20)
 597    DEP_FIELD(SMMU_S2CR11, NSCFG, 2, 18)
 598    DEP_FIELD(SMMU_S2CR11, TYPE, 2, 16)
 599    DEP_FIELD(SMMU_S2CR11, MEM_ATTR, 4, 12)
 600    DEP_FIELD(SMMU_S2CR11, MTCFG, 1, 11)
 601    DEP_FIELD(SMMU_S2CR11, SHCFG, 2, 8)
 602    DEP_FIELD(SMMU_S2CR11, CBNDX_VMID, 8, 0)
 603DEP_REG32(SMMU_S2CR12, 0xc30)
 604    DEP_FIELD(SMMU_S2CR12, TRANSIENTCFG, 2, 28)
 605    DEP_FIELD(SMMU_S2CR12, INSTCFG_1, 1, 27)
 606    DEP_FIELD(SMMU_S2CR12, INSTCFG_0_FB, 1, 26)
 607    DEP_FIELD(SMMU_S2CR12, PRIVCFG_BSU, 2, 24)
 608    DEP_FIELD(SMMU_S2CR12, WACFG, 2, 22)
 609    DEP_FIELD(SMMU_S2CR12, RACFG, 2, 20)
 610    DEP_FIELD(SMMU_S2CR12, NSCFG, 2, 18)
 611    DEP_FIELD(SMMU_S2CR12, TYPE, 2, 16)
 612    DEP_FIELD(SMMU_S2CR12, MEM_ATTR, 4, 12)
 613    DEP_FIELD(SMMU_S2CR12, MTCFG, 1, 11)
 614    DEP_FIELD(SMMU_S2CR12, SHCFG, 2, 8)
 615    DEP_FIELD(SMMU_S2CR12, CBNDX_VMID, 8, 0)
 616DEP_REG32(SMMU_S2CR13, 0xc34)
 617    DEP_FIELD(SMMU_S2CR13, TRANSIENTCFG, 2, 28)
 618    DEP_FIELD(SMMU_S2CR13, INSTCFG_1, 1, 27)
 619    DEP_FIELD(SMMU_S2CR13, INSTCFG_0_FB, 1, 26)
 620    DEP_FIELD(SMMU_S2CR13, PRIVCFG_BSU, 2, 24)
 621    DEP_FIELD(SMMU_S2CR13, WACFG, 2, 22)
 622    DEP_FIELD(SMMU_S2CR13, RACFG, 2, 20)
 623    DEP_FIELD(SMMU_S2CR13, NSCFG, 2, 18)
 624    DEP_FIELD(SMMU_S2CR13, TYPE, 2, 16)
 625    DEP_FIELD(SMMU_S2CR13, MEM_ATTR, 4, 12)
 626    DEP_FIELD(SMMU_S2CR13, MTCFG, 1, 11)
 627    DEP_FIELD(SMMU_S2CR13, SHCFG, 2, 8)
 628    DEP_FIELD(SMMU_S2CR13, CBNDX_VMID, 8, 0)
 629DEP_REG32(SMMU_S2CR14, 0xc38)
 630    DEP_FIELD(SMMU_S2CR14, TRANSIENTCFG, 2, 28)
 631    DEP_FIELD(SMMU_S2CR14, INSTCFG_1, 1, 27)
 632    DEP_FIELD(SMMU_S2CR14, INSTCFG_0_FB, 1, 26)
 633    DEP_FIELD(SMMU_S2CR14, PRIVCFG_BSU, 2, 24)
 634    DEP_FIELD(SMMU_S2CR14, WACFG, 2, 22)
 635    DEP_FIELD(SMMU_S2CR14, RACFG, 2, 20)
 636    DEP_FIELD(SMMU_S2CR14, NSCFG, 2, 18)
 637    DEP_FIELD(SMMU_S2CR14, TYPE, 2, 16)
 638    DEP_FIELD(SMMU_S2CR14, MEM_ATTR, 4, 12)
 639    DEP_FIELD(SMMU_S2CR14, MTCFG, 1, 11)
 640    DEP_FIELD(SMMU_S2CR14, SHCFG, 2, 8)
 641    DEP_FIELD(SMMU_S2CR14, CBNDX_VMID, 8, 0)
 642DEP_REG32(SMMU_S2CR15, 0xc3c)
 643    DEP_FIELD(SMMU_S2CR15, TRANSIENTCFG, 2, 28)
 644    DEP_FIELD(SMMU_S2CR15, INSTCFG_1, 1, 27)
 645    DEP_FIELD(SMMU_S2CR15, INSTCFG_0_FB, 1, 26)
 646    DEP_FIELD(SMMU_S2CR15, PRIVCFG_BSU, 2, 24)
 647    DEP_FIELD(SMMU_S2CR15, WACFG, 2, 22)
 648    DEP_FIELD(SMMU_S2CR15, RACFG, 2, 20)
 649    DEP_FIELD(SMMU_S2CR15, NSCFG, 2, 18)
 650    DEP_FIELD(SMMU_S2CR15, TYPE, 2, 16)
 651    DEP_FIELD(SMMU_S2CR15, MEM_ATTR, 4, 12)
 652    DEP_FIELD(SMMU_S2CR15, MTCFG, 1, 11)
 653    DEP_FIELD(SMMU_S2CR15, SHCFG, 2, 8)
 654    DEP_FIELD(SMMU_S2CR15, CBNDX_VMID, 8, 0)
 655DEP_REG32(SMMU_S2CR16, 0xc40)
 656    DEP_FIELD(SMMU_S2CR16, TRANSIENTCFG, 2, 28)
 657    DEP_FIELD(SMMU_S2CR16, INSTCFG_1, 1, 27)
 658    DEP_FIELD(SMMU_S2CR16, INSTCFG_0_FB, 1, 26)
 659    DEP_FIELD(SMMU_S2CR16, PRIVCFG_BSU, 2, 24)
 660    DEP_FIELD(SMMU_S2CR16, WACFG, 2, 22)
 661    DEP_FIELD(SMMU_S2CR16, RACFG, 2, 20)
 662    DEP_FIELD(SMMU_S2CR16, NSCFG, 2, 18)
 663    DEP_FIELD(SMMU_S2CR16, TYPE, 2, 16)
 664    DEP_FIELD(SMMU_S2CR16, MEM_ATTR, 4, 12)
 665    DEP_FIELD(SMMU_S2CR16, MTCFG, 1, 11)
 666    DEP_FIELD(SMMU_S2CR16, SHCFG, 2, 8)
 667    DEP_FIELD(SMMU_S2CR16, CBNDX_VMID, 8, 0)
 668DEP_REG32(SMMU_S2CR17, 0xc44)
 669    DEP_FIELD(SMMU_S2CR17, TRANSIENTCFG, 2, 28)
 670    DEP_FIELD(SMMU_S2CR17, INSTCFG_1, 1, 27)
 671    DEP_FIELD(SMMU_S2CR17, INSTCFG_0_FB, 1, 26)
 672    DEP_FIELD(SMMU_S2CR17, PRIVCFG_BSU, 2, 24)
 673    DEP_FIELD(SMMU_S2CR17, WACFG, 2, 22)
 674    DEP_FIELD(SMMU_S2CR17, RACFG, 2, 20)
 675    DEP_FIELD(SMMU_S2CR17, NSCFG, 2, 18)
 676    DEP_FIELD(SMMU_S2CR17, TYPE, 2, 16)
 677    DEP_FIELD(SMMU_S2CR17, MEM_ATTR, 4, 12)
 678    DEP_FIELD(SMMU_S2CR17, MTCFG, 1, 11)
 679    DEP_FIELD(SMMU_S2CR17, SHCFG, 2, 8)
 680    DEP_FIELD(SMMU_S2CR17, CBNDX_VMID, 8, 0)
 681DEP_REG32(SMMU_S2CR18, 0xc48)
 682    DEP_FIELD(SMMU_S2CR18, TRANSIENTCFG, 2, 28)
 683    DEP_FIELD(SMMU_S2CR18, INSTCFG_1, 1, 27)
 684    DEP_FIELD(SMMU_S2CR18, INSTCFG_0_FB, 1, 26)
 685    DEP_FIELD(SMMU_S2CR18, PRIVCFG_BSU, 2, 24)
 686    DEP_FIELD(SMMU_S2CR18, WACFG, 2, 22)
 687    DEP_FIELD(SMMU_S2CR18, RACFG, 2, 20)
 688    DEP_FIELD(SMMU_S2CR18, NSCFG, 2, 18)
 689    DEP_FIELD(SMMU_S2CR18, TYPE, 2, 16)
 690    DEP_FIELD(SMMU_S2CR18, MEM_ATTR, 4, 12)
 691    DEP_FIELD(SMMU_S2CR18, MTCFG, 1, 11)
 692    DEP_FIELD(SMMU_S2CR18, SHCFG, 2, 8)
 693    DEP_FIELD(SMMU_S2CR18, CBNDX_VMID, 8, 0)
 694DEP_REG32(SMMU_S2CR19, 0xc4c)
 695    DEP_FIELD(SMMU_S2CR19, TRANSIENTCFG, 2, 28)
 696    DEP_FIELD(SMMU_S2CR19, INSTCFG_1, 1, 27)
 697    DEP_FIELD(SMMU_S2CR19, INSTCFG_0_FB, 1, 26)
 698    DEP_FIELD(SMMU_S2CR19, PRIVCFG_BSU, 2, 24)
 699    DEP_FIELD(SMMU_S2CR19, WACFG, 2, 22)
 700    DEP_FIELD(SMMU_S2CR19, RACFG, 2, 20)
 701    DEP_FIELD(SMMU_S2CR19, NSCFG, 2, 18)
 702    DEP_FIELD(SMMU_S2CR19, TYPE, 2, 16)
 703    DEP_FIELD(SMMU_S2CR19, MEM_ATTR, 4, 12)
 704    DEP_FIELD(SMMU_S2CR19, MTCFG, 1, 11)
 705    DEP_FIELD(SMMU_S2CR19, SHCFG, 2, 8)
 706    DEP_FIELD(SMMU_S2CR19, CBNDX_VMID, 8, 0)
 707DEP_REG32(SMMU_S2CR20, 0xc50)
 708    DEP_FIELD(SMMU_S2CR20, TRANSIENTCFG, 2, 28)
 709    DEP_FIELD(SMMU_S2CR20, INSTCFG_1, 1, 27)
 710    DEP_FIELD(SMMU_S2CR20, INSTCFG_0_FB, 1, 26)
 711    DEP_FIELD(SMMU_S2CR20, PRIVCFG_BSU, 2, 24)
 712    DEP_FIELD(SMMU_S2CR20, WACFG, 2, 22)
 713    DEP_FIELD(SMMU_S2CR20, RACFG, 2, 20)
 714    DEP_FIELD(SMMU_S2CR20, NSCFG, 2, 18)
 715    DEP_FIELD(SMMU_S2CR20, TYPE, 2, 16)
 716    DEP_FIELD(SMMU_S2CR20, MEM_ATTR, 4, 12)
 717    DEP_FIELD(SMMU_S2CR20, MTCFG, 1, 11)
 718    DEP_FIELD(SMMU_S2CR20, SHCFG, 2, 8)
 719    DEP_FIELD(SMMU_S2CR20, CBNDX_VMID, 8, 0)
 720DEP_REG32(SMMU_S2CR21, 0xc54)
 721    DEP_FIELD(SMMU_S2CR21, TRANSIENTCFG, 2, 28)
 722    DEP_FIELD(SMMU_S2CR21, INSTCFG_1, 1, 27)
 723    DEP_FIELD(SMMU_S2CR21, INSTCFG_0_FB, 1, 26)
 724    DEP_FIELD(SMMU_S2CR21, PRIVCFG_BSU, 2, 24)
 725    DEP_FIELD(SMMU_S2CR21, WACFG, 2, 22)
 726    DEP_FIELD(SMMU_S2CR21, RACFG, 2, 20)
 727    DEP_FIELD(SMMU_S2CR21, NSCFG, 2, 18)
 728    DEP_FIELD(SMMU_S2CR21, TYPE, 2, 16)
 729    DEP_FIELD(SMMU_S2CR21, MEM_ATTR, 4, 12)
 730    DEP_FIELD(SMMU_S2CR21, MTCFG, 1, 11)
 731    DEP_FIELD(SMMU_S2CR21, SHCFG, 2, 8)
 732    DEP_FIELD(SMMU_S2CR21, CBNDX_VMID, 8, 0)
 733DEP_REG32(SMMU_S2CR22, 0xc58)
 734    DEP_FIELD(SMMU_S2CR22, TRANSIENTCFG, 2, 28)
 735    DEP_FIELD(SMMU_S2CR22, INSTCFG_1, 1, 27)
 736    DEP_FIELD(SMMU_S2CR22, INSTCFG_0_FB, 1, 26)
 737    DEP_FIELD(SMMU_S2CR22, PRIVCFG_BSU, 2, 24)
 738    DEP_FIELD(SMMU_S2CR22, WACFG, 2, 22)
 739    DEP_FIELD(SMMU_S2CR22, RACFG, 2, 20)
 740    DEP_FIELD(SMMU_S2CR22, NSCFG, 2, 18)
 741    DEP_FIELD(SMMU_S2CR22, TYPE, 2, 16)
 742    DEP_FIELD(SMMU_S2CR22, MEM_ATTR, 4, 12)
 743    DEP_FIELD(SMMU_S2CR22, MTCFG, 1, 11)
 744    DEP_FIELD(SMMU_S2CR22, SHCFG, 2, 8)
 745    DEP_FIELD(SMMU_S2CR22, CBNDX_VMID, 8, 0)
 746DEP_REG32(SMMU_S2CR23, 0xc5c)
 747    DEP_FIELD(SMMU_S2CR23, TRANSIENTCFG, 2, 28)
 748    DEP_FIELD(SMMU_S2CR23, INSTCFG_1, 1, 27)
 749    DEP_FIELD(SMMU_S2CR23, INSTCFG_0_FB, 1, 26)
 750    DEP_FIELD(SMMU_S2CR23, PRIVCFG_BSU, 2, 24)
 751    DEP_FIELD(SMMU_S2CR23, WACFG, 2, 22)
 752    DEP_FIELD(SMMU_S2CR23, RACFG, 2, 20)
 753    DEP_FIELD(SMMU_S2CR23, NSCFG, 2, 18)
 754    DEP_FIELD(SMMU_S2CR23, TYPE, 2, 16)
 755    DEP_FIELD(SMMU_S2CR23, MEM_ATTR, 4, 12)
 756    DEP_FIELD(SMMU_S2CR23, MTCFG, 1, 11)
 757    DEP_FIELD(SMMU_S2CR23, SHCFG, 2, 8)
 758    DEP_FIELD(SMMU_S2CR23, CBNDX_VMID, 8, 0)
 759DEP_REG32(SMMU_S2CR24, 0xc60)
 760    DEP_FIELD(SMMU_S2CR24, TRANSIENTCFG, 2, 28)
 761    DEP_FIELD(SMMU_S2CR24, INSTCFG_1, 1, 27)
 762    DEP_FIELD(SMMU_S2CR24, INSTCFG_0_FB, 1, 26)
 763    DEP_FIELD(SMMU_S2CR24, PRIVCFG_BSU, 2, 24)
 764    DEP_FIELD(SMMU_S2CR24, WACFG, 2, 22)
 765    DEP_FIELD(SMMU_S2CR24, RACFG, 2, 20)
 766    DEP_FIELD(SMMU_S2CR24, NSCFG, 2, 18)
 767    DEP_FIELD(SMMU_S2CR24, TYPE, 2, 16)
 768    DEP_FIELD(SMMU_S2CR24, MEM_ATTR, 4, 12)
 769    DEP_FIELD(SMMU_S2CR24, MTCFG, 1, 11)
 770    DEP_FIELD(SMMU_S2CR24, SHCFG, 2, 8)
 771    DEP_FIELD(SMMU_S2CR24, CBNDX_VMID, 8, 0)
 772DEP_REG32(SMMU_S2CR25, 0xc64)
 773    DEP_FIELD(SMMU_S2CR25, TRANSIENTCFG, 2, 28)
 774    DEP_FIELD(SMMU_S2CR25, INSTCFG_1, 1, 27)
 775    DEP_FIELD(SMMU_S2CR25, INSTCFG_0_FB, 1, 26)
 776    DEP_FIELD(SMMU_S2CR25, PRIVCFG_BSU, 2, 24)
 777    DEP_FIELD(SMMU_S2CR25, WACFG, 2, 22)
 778    DEP_FIELD(SMMU_S2CR25, RACFG, 2, 20)
 779    DEP_FIELD(SMMU_S2CR25, NSCFG, 2, 18)
 780    DEP_FIELD(SMMU_S2CR25, TYPE, 2, 16)
 781    DEP_FIELD(SMMU_S2CR25, MEM_ATTR, 4, 12)
 782    DEP_FIELD(SMMU_S2CR25, MTCFG, 1, 11)
 783    DEP_FIELD(SMMU_S2CR25, SHCFG, 2, 8)
 784    DEP_FIELD(SMMU_S2CR25, CBNDX_VMID, 8, 0)
 785DEP_REG32(SMMU_S2CR26, 0xc68)
 786    DEP_FIELD(SMMU_S2CR26, TRANSIENTCFG, 2, 28)
 787    DEP_FIELD(SMMU_S2CR26, INSTCFG_1, 1, 27)
 788    DEP_FIELD(SMMU_S2CR26, INSTCFG_0_FB, 1, 26)
 789    DEP_FIELD(SMMU_S2CR26, PRIVCFG_BSU, 2, 24)
 790    DEP_FIELD(SMMU_S2CR26, WACFG, 2, 22)
 791    DEP_FIELD(SMMU_S2CR26, RACFG, 2, 20)
 792    DEP_FIELD(SMMU_S2CR26, NSCFG, 2, 18)
 793    DEP_FIELD(SMMU_S2CR26, TYPE, 2, 16)
 794    DEP_FIELD(SMMU_S2CR26, MEM_ATTR, 4, 12)
 795    DEP_FIELD(SMMU_S2CR26, MTCFG, 1, 11)
 796    DEP_FIELD(SMMU_S2CR26, SHCFG, 2, 8)
 797    DEP_FIELD(SMMU_S2CR26, CBNDX_VMID, 8, 0)
 798DEP_REG32(SMMU_S2CR27, 0xc6c)
 799    DEP_FIELD(SMMU_S2CR27, TRANSIENTCFG, 2, 28)
 800    DEP_FIELD(SMMU_S2CR27, INSTCFG_1, 1, 27)
 801    DEP_FIELD(SMMU_S2CR27, INSTCFG_0_FB, 1, 26)
 802    DEP_FIELD(SMMU_S2CR27, PRIVCFG_BSU, 2, 24)
 803    DEP_FIELD(SMMU_S2CR27, WACFG, 2, 22)
 804    DEP_FIELD(SMMU_S2CR27, RACFG, 2, 20)
 805    DEP_FIELD(SMMU_S2CR27, NSCFG, 2, 18)
 806    DEP_FIELD(SMMU_S2CR27, TYPE, 2, 16)
 807    DEP_FIELD(SMMU_S2CR27, MEM_ATTR, 4, 12)
 808    DEP_FIELD(SMMU_S2CR27, MTCFG, 1, 11)
 809    DEP_FIELD(SMMU_S2CR27, SHCFG, 2, 8)
 810    DEP_FIELD(SMMU_S2CR27, CBNDX_VMID, 8, 0)
 811DEP_REG32(SMMU_S2CR28, 0xc70)
 812    DEP_FIELD(SMMU_S2CR28, TRANSIENTCFG, 2, 28)
 813    DEP_FIELD(SMMU_S2CR28, INSTCFG_1, 1, 27)
 814    DEP_FIELD(SMMU_S2CR28, INSTCFG_0_FB, 1, 26)
 815    DEP_FIELD(SMMU_S2CR28, PRIVCFG_BSU, 2, 24)
 816    DEP_FIELD(SMMU_S2CR28, WACFG, 2, 22)
 817    DEP_FIELD(SMMU_S2CR28, RACFG, 2, 20)
 818    DEP_FIELD(SMMU_S2CR28, NSCFG, 2, 18)
 819    DEP_FIELD(SMMU_S2CR28, TYPE, 2, 16)
 820    DEP_FIELD(SMMU_S2CR28, MEM_ATTR, 4, 12)
 821    DEP_FIELD(SMMU_S2CR28, MTCFG, 1, 11)
 822    DEP_FIELD(SMMU_S2CR28, SHCFG, 2, 8)
 823    DEP_FIELD(SMMU_S2CR28, CBNDX_VMID, 8, 0)
 824DEP_REG32(SMMU_S2CR29, 0xc74)
 825    DEP_FIELD(SMMU_S2CR29, TRANSIENTCFG, 2, 28)
 826    DEP_FIELD(SMMU_S2CR29, INSTCFG_1, 1, 27)
 827    DEP_FIELD(SMMU_S2CR29, INSTCFG_0_FB, 1, 26)
 828    DEP_FIELD(SMMU_S2CR29, PRIVCFG_BSU, 2, 24)
 829    DEP_FIELD(SMMU_S2CR29, WACFG, 2, 22)
 830    DEP_FIELD(SMMU_S2CR29, RACFG, 2, 20)
 831    DEP_FIELD(SMMU_S2CR29, NSCFG, 2, 18)
 832    DEP_FIELD(SMMU_S2CR29, TYPE, 2, 16)
 833    DEP_FIELD(SMMU_S2CR29, MEM_ATTR, 4, 12)
 834    DEP_FIELD(SMMU_S2CR29, MTCFG, 1, 11)
 835    DEP_FIELD(SMMU_S2CR29, SHCFG, 2, 8)
 836    DEP_FIELD(SMMU_S2CR29, CBNDX_VMID, 8, 0)
 837DEP_REG32(SMMU_S2CR30, 0xc78)
 838    DEP_FIELD(SMMU_S2CR30, TRANSIENTCFG, 2, 28)
 839    DEP_FIELD(SMMU_S2CR30, INSTCFG_1, 1, 27)
 840    DEP_FIELD(SMMU_S2CR30, INSTCFG_0_FB, 1, 26)
 841    DEP_FIELD(SMMU_S2CR30, PRIVCFG_BSU, 2, 24)
 842    DEP_FIELD(SMMU_S2CR30, WACFG, 2, 22)
 843    DEP_FIELD(SMMU_S2CR30, RACFG, 2, 20)
 844    DEP_FIELD(SMMU_S2CR30, NSCFG, 2, 18)
 845    DEP_FIELD(SMMU_S2CR30, TYPE, 2, 16)
 846    DEP_FIELD(SMMU_S2CR30, MEM_ATTR, 4, 12)
 847    DEP_FIELD(SMMU_S2CR30, MTCFG, 1, 11)
 848    DEP_FIELD(SMMU_S2CR30, SHCFG, 2, 8)
 849    DEP_FIELD(SMMU_S2CR30, CBNDX_VMID, 8, 0)
 850DEP_REG32(SMMU_S2CR31, 0xc7c)
 851    DEP_FIELD(SMMU_S2CR31, TRANSIENTCFG, 2, 28)
 852    DEP_FIELD(SMMU_S2CR31, INSTCFG_1, 1, 27)
 853    DEP_FIELD(SMMU_S2CR31, INSTCFG_0_FB, 1, 26)
 854    DEP_FIELD(SMMU_S2CR31, PRIVCFG_BSU, 2, 24)
 855    DEP_FIELD(SMMU_S2CR31, WACFG, 2, 22)
 856    DEP_FIELD(SMMU_S2CR31, RACFG, 2, 20)
 857    DEP_FIELD(SMMU_S2CR31, NSCFG, 2, 18)
 858    DEP_FIELD(SMMU_S2CR31, TYPE, 2, 16)
 859    DEP_FIELD(SMMU_S2CR31, MEM_ATTR, 4, 12)
 860    DEP_FIELD(SMMU_S2CR31, MTCFG, 1, 11)
 861    DEP_FIELD(SMMU_S2CR31, SHCFG, 2, 8)
 862    DEP_FIELD(SMMU_S2CR31, CBNDX_VMID, 8, 0)
 863DEP_REG32(SMMU_S2CR32, 0xc80)
 864    DEP_FIELD(SMMU_S2CR32, TRANSIENTCFG, 2, 28)
 865    DEP_FIELD(SMMU_S2CR32, INSTCFG_1, 1, 27)
 866    DEP_FIELD(SMMU_S2CR32, INSTCFG_0_FB, 1, 26)
 867    DEP_FIELD(SMMU_S2CR32, PRIVCFG_BSU, 2, 24)
 868    DEP_FIELD(SMMU_S2CR32, WACFG, 2, 22)
 869    DEP_FIELD(SMMU_S2CR32, RACFG, 2, 20)
 870    DEP_FIELD(SMMU_S2CR32, NSCFG, 2, 18)
 871    DEP_FIELD(SMMU_S2CR32, TYPE, 2, 16)
 872    DEP_FIELD(SMMU_S2CR32, MEM_ATTR, 4, 12)
 873    DEP_FIELD(SMMU_S2CR32, MTCFG, 1, 11)
 874    DEP_FIELD(SMMU_S2CR32, SHCFG, 2, 8)
 875    DEP_FIELD(SMMU_S2CR32, CBNDX_VMID, 8, 0)
 876DEP_REG32(SMMU_S2CR33, 0xc84)
 877    DEP_FIELD(SMMU_S2CR33, TRANSIENTCFG, 2, 28)
 878    DEP_FIELD(SMMU_S2CR33, INSTCFG_1, 1, 27)
 879    DEP_FIELD(SMMU_S2CR33, INSTCFG_0_FB, 1, 26)
 880    DEP_FIELD(SMMU_S2CR33, PRIVCFG_BSU, 2, 24)
 881    DEP_FIELD(SMMU_S2CR33, WACFG, 2, 22)
 882    DEP_FIELD(SMMU_S2CR33, RACFG, 2, 20)
 883    DEP_FIELD(SMMU_S2CR33, NSCFG, 2, 18)
 884    DEP_FIELD(SMMU_S2CR33, TYPE, 2, 16)
 885    DEP_FIELD(SMMU_S2CR33, MEM_ATTR, 4, 12)
 886    DEP_FIELD(SMMU_S2CR33, MTCFG, 1, 11)
 887    DEP_FIELD(SMMU_S2CR33, SHCFG, 2, 8)
 888    DEP_FIELD(SMMU_S2CR33, CBNDX_VMID, 8, 0)
 889DEP_REG32(SMMU_S2CR34, 0xc88)
 890    DEP_FIELD(SMMU_S2CR34, TRANSIENTCFG, 2, 28)
 891    DEP_FIELD(SMMU_S2CR34, INSTCFG_1, 1, 27)
 892    DEP_FIELD(SMMU_S2CR34, INSTCFG_0_FB, 1, 26)
 893    DEP_FIELD(SMMU_S2CR34, PRIVCFG_BSU, 2, 24)
 894    DEP_FIELD(SMMU_S2CR34, WACFG, 2, 22)
 895    DEP_FIELD(SMMU_S2CR34, RACFG, 2, 20)
 896    DEP_FIELD(SMMU_S2CR34, NSCFG, 2, 18)
 897    DEP_FIELD(SMMU_S2CR34, TYPE, 2, 16)
 898    DEP_FIELD(SMMU_S2CR34, MEM_ATTR, 4, 12)
 899    DEP_FIELD(SMMU_S2CR34, MTCFG, 1, 11)
 900    DEP_FIELD(SMMU_S2CR34, SHCFG, 2, 8)
 901    DEP_FIELD(SMMU_S2CR34, CBNDX_VMID, 8, 0)
 902DEP_REG32(SMMU_S2CR35, 0xc8c)
 903    DEP_FIELD(SMMU_S2CR35, TRANSIENTCFG, 2, 28)
 904    DEP_FIELD(SMMU_S2CR35, INSTCFG_1, 1, 27)
 905    DEP_FIELD(SMMU_S2CR35, INSTCFG_0_FB, 1, 26)
 906    DEP_FIELD(SMMU_S2CR35, PRIVCFG_BSU, 2, 24)
 907    DEP_FIELD(SMMU_S2CR35, WACFG, 2, 22)
 908    DEP_FIELD(SMMU_S2CR35, RACFG, 2, 20)
 909    DEP_FIELD(SMMU_S2CR35, NSCFG, 2, 18)
 910    DEP_FIELD(SMMU_S2CR35, TYPE, 2, 16)
 911    DEP_FIELD(SMMU_S2CR35, MEM_ATTR, 4, 12)
 912    DEP_FIELD(SMMU_S2CR35, MTCFG, 1, 11)
 913    DEP_FIELD(SMMU_S2CR35, SHCFG, 2, 8)
 914    DEP_FIELD(SMMU_S2CR35, CBNDX_VMID, 8, 0)
 915DEP_REG32(SMMU_S2CR36, 0xc90)
 916    DEP_FIELD(SMMU_S2CR36, TRANSIENTCFG, 2, 28)
 917    DEP_FIELD(SMMU_S2CR36, INSTCFG_1, 1, 27)
 918    DEP_FIELD(SMMU_S2CR36, INSTCFG_0_FB, 1, 26)
 919    DEP_FIELD(SMMU_S2CR36, PRIVCFG_BSU, 2, 24)
 920    DEP_FIELD(SMMU_S2CR36, WACFG, 2, 22)
 921    DEP_FIELD(SMMU_S2CR36, RACFG, 2, 20)
 922    DEP_FIELD(SMMU_S2CR36, NSCFG, 2, 18)
 923    DEP_FIELD(SMMU_S2CR36, TYPE, 2, 16)
 924    DEP_FIELD(SMMU_S2CR36, MEM_ATTR, 4, 12)
 925    DEP_FIELD(SMMU_S2CR36, MTCFG, 1, 11)
 926    DEP_FIELD(SMMU_S2CR36, SHCFG, 2, 8)
 927    DEP_FIELD(SMMU_S2CR36, CBNDX_VMID, 8, 0)
 928DEP_REG32(SMMU_S2CR37, 0xc94)
 929    DEP_FIELD(SMMU_S2CR37, TRANSIENTCFG, 2, 28)
 930    DEP_FIELD(SMMU_S2CR37, INSTCFG_1, 1, 27)
 931    DEP_FIELD(SMMU_S2CR37, INSTCFG_0_FB, 1, 26)
 932    DEP_FIELD(SMMU_S2CR37, PRIVCFG_BSU, 2, 24)
 933    DEP_FIELD(SMMU_S2CR37, WACFG, 2, 22)
 934    DEP_FIELD(SMMU_S2CR37, RACFG, 2, 20)
 935    DEP_FIELD(SMMU_S2CR37, NSCFG, 2, 18)
 936    DEP_FIELD(SMMU_S2CR37, TYPE, 2, 16)
 937    DEP_FIELD(SMMU_S2CR37, MEM_ATTR, 4, 12)
 938    DEP_FIELD(SMMU_S2CR37, MTCFG, 1, 11)
 939    DEP_FIELD(SMMU_S2CR37, SHCFG, 2, 8)
 940    DEP_FIELD(SMMU_S2CR37, CBNDX_VMID, 8, 0)
 941DEP_REG32(SMMU_S2CR38, 0xc98)
 942    DEP_FIELD(SMMU_S2CR38, TRANSIENTCFG, 2, 28)
 943    DEP_FIELD(SMMU_S2CR38, INSTCFG_1, 1, 27)
 944    DEP_FIELD(SMMU_S2CR38, INSTCFG_0_FB, 1, 26)
 945    DEP_FIELD(SMMU_S2CR38, PRIVCFG_BSU, 2, 24)
 946    DEP_FIELD(SMMU_S2CR38, WACFG, 2, 22)
 947    DEP_FIELD(SMMU_S2CR38, RACFG, 2, 20)
 948    DEP_FIELD(SMMU_S2CR38, NSCFG, 2, 18)
 949    DEP_FIELD(SMMU_S2CR38, TYPE, 2, 16)
 950    DEP_FIELD(SMMU_S2CR38, MEM_ATTR, 4, 12)
 951    DEP_FIELD(SMMU_S2CR38, MTCFG, 1, 11)
 952    DEP_FIELD(SMMU_S2CR38, SHCFG, 2, 8)
 953    DEP_FIELD(SMMU_S2CR38, CBNDX_VMID, 8, 0)
 954DEP_REG32(SMMU_S2CR39, 0xc9c)
 955    DEP_FIELD(SMMU_S2CR39, TRANSIENTCFG, 2, 28)
 956    DEP_FIELD(SMMU_S2CR39, INSTCFG_1, 1, 27)
 957    DEP_FIELD(SMMU_S2CR39, INSTCFG_0_FB, 1, 26)
 958    DEP_FIELD(SMMU_S2CR39, PRIVCFG_BSU, 2, 24)
 959    DEP_FIELD(SMMU_S2CR39, WACFG, 2, 22)
 960    DEP_FIELD(SMMU_S2CR39, RACFG, 2, 20)
 961    DEP_FIELD(SMMU_S2CR39, NSCFG, 2, 18)
 962    DEP_FIELD(SMMU_S2CR39, TYPE, 2, 16)
 963    DEP_FIELD(SMMU_S2CR39, MEM_ATTR, 4, 12)
 964    DEP_FIELD(SMMU_S2CR39, MTCFG, 1, 11)
 965    DEP_FIELD(SMMU_S2CR39, SHCFG, 2, 8)
 966    DEP_FIELD(SMMU_S2CR39, CBNDX_VMID, 8, 0)
 967DEP_REG32(SMMU_S2CR40, 0xca0)
 968    DEP_FIELD(SMMU_S2CR40, TRANSIENTCFG, 2, 28)
 969    DEP_FIELD(SMMU_S2CR40, INSTCFG_1, 1, 27)
 970    DEP_FIELD(SMMU_S2CR40, INSTCFG_0_FB, 1, 26)
 971    DEP_FIELD(SMMU_S2CR40, PRIVCFG_BSU, 2, 24)
 972    DEP_FIELD(SMMU_S2CR40, WACFG, 2, 22)
 973    DEP_FIELD(SMMU_S2CR40, RACFG, 2, 20)
 974    DEP_FIELD(SMMU_S2CR40, NSCFG, 2, 18)
 975    DEP_FIELD(SMMU_S2CR40, TYPE, 2, 16)
 976    DEP_FIELD(SMMU_S2CR40, MEM_ATTR, 4, 12)
 977    DEP_FIELD(SMMU_S2CR40, MTCFG, 1, 11)
 978    DEP_FIELD(SMMU_S2CR40, SHCFG, 2, 8)
 979    DEP_FIELD(SMMU_S2CR40, CBNDX_VMID, 8, 0)
 980DEP_REG32(SMMU_S2CR41, 0xca4)
 981    DEP_FIELD(SMMU_S2CR41, TRANSIENTCFG, 2, 28)
 982    DEP_FIELD(SMMU_S2CR41, INSTCFG_1, 1, 27)
 983    DEP_FIELD(SMMU_S2CR41, INSTCFG_0_FB, 1, 26)
 984    DEP_FIELD(SMMU_S2CR41, PRIVCFG_BSU, 2, 24)
 985    DEP_FIELD(SMMU_S2CR41, WACFG, 2, 22)
 986    DEP_FIELD(SMMU_S2CR41, RACFG, 2, 20)
 987    DEP_FIELD(SMMU_S2CR41, NSCFG, 2, 18)
 988    DEP_FIELD(SMMU_S2CR41, TYPE, 2, 16)
 989    DEP_FIELD(SMMU_S2CR41, MEM_ATTR, 4, 12)
 990    DEP_FIELD(SMMU_S2CR41, MTCFG, 1, 11)
 991    DEP_FIELD(SMMU_S2CR41, SHCFG, 2, 8)
 992    DEP_FIELD(SMMU_S2CR41, CBNDX_VMID, 8, 0)
 993DEP_REG32(SMMU_S2CR42, 0xca8)
 994    DEP_FIELD(SMMU_S2CR42, TRANSIENTCFG, 2, 28)
 995    DEP_FIELD(SMMU_S2CR42, INSTCFG_1, 1, 27)
 996    DEP_FIELD(SMMU_S2CR42, INSTCFG_0_FB, 1, 26)
 997    DEP_FIELD(SMMU_S2CR42, PRIVCFG_BSU, 2, 24)
 998    DEP_FIELD(SMMU_S2CR42, WACFG, 2, 22)
 999    DEP_FIELD(SMMU_S2CR42, RACFG, 2, 20)
1000    DEP_FIELD(SMMU_S2CR42, NSCFG, 2, 18)

1001    DEP_FIELD(SMMU_S2CR42, TYPE, 2, 16)
1002    DEP_FIELD(SMMU_S2CR42, MEM_ATTR, 4, 12)
1003    DEP_FIELD(SMMU_S2CR42, MTCFG, 1, 11)
1004    DEP_FIELD(SMMU_S2CR42, SHCFG, 2, 8)
1005    DEP_FIELD(SMMU_S2CR42, CBNDX_VMID, 8, 0)
1006DEP_REG32(SMMU_S2CR43, 0xcac)
1007    DEP_FIELD(SMMU_S2CR43, TRANSIENTCFG, 2, 28)
1008    DEP_FIELD(SMMU_S2CR43, INSTCFG_1, 1, 27)
1009    DEP_FIELD(SMMU_S2CR43, INSTCFG_0_FB, 1, 26)
1010    DEP_FIELD(SMMU_S2CR43, PRIVCFG_BSU, 2, 24)
1011    DEP_FIELD(SMMU_S2CR43, WACFG, 2, 22)
1012    DEP_FIELD(SMMU_S2CR43, RACFG, 2, 20)
1013    DEP_FIELD(SMMU_S2CR43, NSCFG, 2, 18)
1014    DEP_FIELD(SMMU_S2CR43, TYPE, 2, 16)
1015    DEP_FIELD(SMMU_S2CR43, MEM_ATTR, 4, 12)
1016    DEP_FIELD(SMMU_S2CR43, MTCFG, 1, 11)
1017    DEP_FIELD(SMMU_S2CR43, SHCFG, 2, 8)
1018    DEP_FIELD(SMMU_S2CR43, CBNDX_VMID, 8, 0)
1019DEP_REG32(SMMU_S2CR44, 0xcb0)
1020    DEP_FIELD(SMMU_S2CR44, TRANSIENTCFG, 2, 28)
1021    DEP_FIELD(SMMU_S2CR44, INSTCFG_1, 1, 27)
1022    DEP_FIELD(SMMU_S2CR44, INSTCFG_0_FB, 1, 26)
1023    DEP_FIELD(SMMU_S2CR44, PRIVCFG_BSU, 2, 24)
1024    DEP_FIELD(SMMU_S2CR44, WACFG, 2, 22)
1025    DEP_FIELD(SMMU_S2CR44, RACFG, 2, 20)
1026    DEP_FIELD(SMMU_S2CR44, NSCFG, 2, 18)
1027    DEP_FIELD(SMMU_S2CR44, TYPE, 2, 16)
1028    DEP_FIELD(SMMU_S2CR44, MEM_ATTR, 4, 12)
1029    DEP_FIELD(SMMU_S2CR44, MTCFG, 1, 11)
1030    DEP_FIELD(SMMU_S2CR44, SHCFG, 2, 8)
1031    DEP_FIELD(SMMU_S2CR44, CBNDX_VMID, 8, 0)
1032DEP_REG32(SMMU_S2CR45, 0xcb4)
1033    DEP_FIELD(SMMU_S2CR45, TRANSIENTCFG, 2, 28)
1034    DEP_FIELD(SMMU_S2CR45, INSTCFG_1, 1, 27)
1035    DEP_FIELD(SMMU_S2CR45, INSTCFG_0_FB, 1, 26)
1036    DEP_FIELD(SMMU_S2CR45, PRIVCFG_BSU, 2, 24)
1037    DEP_FIELD(SMMU_S2CR45, WACFG, 2, 22)
1038    DEP_FIELD(SMMU_S2CR45, RACFG, 2, 20)
1039    DEP_FIELD(SMMU_S2CR45, NSCFG, 2, 18)
1040    DEP_FIELD(SMMU_S2CR45, TYPE, 2, 16)
1041    DEP_FIELD(SMMU_S2CR45, MEM_ATTR, 4, 12)
1042    DEP_FIELD(SMMU_S2CR45, MTCFG, 1, 11)
1043    DEP_FIELD(SMMU_S2CR45, SHCFG, 2, 8)
1044    DEP_FIELD(SMMU_S2CR45, CBNDX_VMID, 8, 0)
1045DEP_REG32(SMMU_S2CR46, 0xcb8)
1046    DEP_FIELD(SMMU_S2CR46, TRANSIENTCFG, 2, 28)
1047    DEP_FIELD(SMMU_S2CR46, INSTCFG_1, 1, 27)
1048    DEP_FIELD(SMMU_S2CR46, INSTCFG_0_FB, 1, 26)
1049    DEP_FIELD(SMMU_S2CR46, PRIVCFG_BSU, 2, 24)
1050    DEP_FIELD(SMMU_S2CR46, WACFG, 2, 22)
1051    DEP_FIELD(SMMU_S2CR46, RACFG, 2, 20)
1052    DEP_FIELD(SMMU_S2CR46, NSCFG, 2, 18)
1053    DEP_FIELD(SMMU_S2CR46, TYPE, 2, 16)
1054    DEP_FIELD(SMMU_S2CR46, MEM_ATTR, 4, 12)
1055    DEP_FIELD(SMMU_S2CR46, MTCFG, 1, 11)
1056    DEP_FIELD(SMMU_S2CR46, SHCFG, 2, 8)
1057    DEP_FIELD(SMMU_S2CR46, CBNDX_VMID, 8, 0)
1058DEP_REG32(SMMU_S2CR47, 0xcbc)
1059    DEP_FIELD(SMMU_S2CR47, TRANSIENTCFG, 2, 28)
1060    DEP_FIELD(SMMU_S2CR47, INSTCFG_1, 1, 27)
1061    DEP_FIELD(SMMU_S2CR47, INSTCFG_0_FB, 1, 26)
1062    DEP_FIELD(SMMU_S2CR47, PRIVCFG_BSU, 2, 24)
1063    DEP_FIELD(SMMU_S2CR47, WACFG, 2, 22)
1064    DEP_FIELD(SMMU_S2CR47, RACFG, 2, 20)
1065    DEP_FIELD(SMMU_S2CR47, NSCFG, 2, 18)
1066    DEP_FIELD(SMMU_S2CR47, TYPE, 2, 16)
1067    DEP_FIELD(SMMU_S2CR47, MEM_ATTR, 4, 12)
1068    DEP_FIELD(SMMU_S2CR47, MTCFG, 1, 11)
1069    DEP_FIELD(SMMU_S2CR47, SHCFG, 2, 8)
1070    DEP_FIELD(SMMU_S2CR47, CBNDX_VMID, 8, 0)
1071DEP_REG32(SMMU_PIDR4, 0xfd0)
1072    DEP_FIELD(SMMU_PIDR4, FOURKB_COUNT, 4, 4)
1073    DEP_FIELD(SMMU_PIDR4, JEP106_CONTINUATION_CODE, 4, 0)
1074DEP_REG32(SMMU_PIDR5, 0xfd4)
1075DEP_REG32(SMMU_PIDR6, 0xfd8)
1076DEP_REG32(SMMU_PIDR7, 0xfdc)
1077DEP_REG32(SMMU_PIDR0, 0xfe0)
1078    DEP_FIELD(SMMU_PIDR0, PARTNUMBER0, 8, 0)
1079DEP_REG32(SMMU_PIDR1, 0xfe4)
1080    DEP_FIELD(SMMU_PIDR1, JEP106_IDENTITY_CODE, 4, 4)
1081    DEP_FIELD(SMMU_PIDR1, PARTNUMBER1, 4, 0)
1082DEP_REG32(SMMU_PIDR2, 0xfe8)
1083    DEP_FIELD(SMMU_PIDR2, ARCHITECTURE_REVISION, 4, 4)
1084    DEP_FIELD(SMMU_PIDR2, JEDEC, 1, 3)
1085    DEP_FIELD(SMMU_PIDR2, JEP106_IDENTITY_CODE, 3, 0)
1086DEP_REG32(SMMU_PIDR3, 0xfec)
1087    DEP_FIELD(SMMU_PIDR3, REVAND, 4, 4)
1088    DEP_FIELD(SMMU_PIDR3, CUSTOMER_MODIFIED, 4, 0)
1089DEP_REG32(SMMU_CIDR0, 0xff0)
1090    DEP_FIELD(SMMU_CIDR0, PREAMBLE, 8, 0)
1091DEP_REG32(SMMU_CIDR1, 0xff4)
1092    DEP_FIELD(SMMU_CIDR1, PREAMBLE, 8, 0)
1093DEP_REG32(SMMU_CIDR2, 0xff8)
1094    DEP_FIELD(SMMU_CIDR2, PREAMBLE, 8, 0)
1095DEP_REG32(SMMU_CIDR3, 0xffc)
1096    DEP_FIELD(SMMU_CIDR3, PREAMBLE, 8, 0)
1097DEP_REG32(SMMU_CBAR0, 0x1000)
1098    DEP_FIELD(SMMU_CBAR0, IRPTNDX, 8, 24)
1099    DEP_FIELD(SMMU_CBAR0, WACFG, 2, 22)
1100    DEP_FIELD(SMMU_CBAR0, RACFG, 2, 20)
1101    DEP_FIELD(SMMU_CBAR0, BSU, 2, 18)
1102    DEP_FIELD(SMMU_CBAR0, TYPE, 2, 16)
1103    DEP_FIELD(SMMU_CBAR0, MEMATTR_CBNDX_7_4, 4, 12)
1104    DEP_FIELD(SMMU_CBAR0, FB_CBNDX_3, 1, 11)
1105    DEP_FIELD(SMMU_CBAR0, HYPC_CBNDX_2, 1, 10)
1106    DEP_FIELD(SMMU_CBAR0, BPSHCFG_CBNDX_1_0, 2, 8)
1107    DEP_FIELD(SMMU_CBAR0, VMID, 8, 0)
1108DEP_REG32(SMMU_CBAR1, 0x1004)
1109    DEP_FIELD(SMMU_CBAR1, IRPTNDX, 8, 24)
1110    DEP_FIELD(SMMU_CBAR1, WACFG, 2, 22)
1111    DEP_FIELD(SMMU_CBAR1, RACFG, 2, 20)
1112    DEP_FIELD(SMMU_CBAR1, BSU, 2, 18)
1113    DEP_FIELD(SMMU_CBAR1, TYPE, 2, 16)
1114    DEP_FIELD(SMMU_CBAR1, MEMATTR_CBNDX_7_4, 4, 12)
1115    DEP_FIELD(SMMU_CBAR1, FB_CBNDX_3, 1, 11)
1116    DEP_FIELD(SMMU_CBAR1, HYPC_CBNDX_2, 1, 10)
1117    DEP_FIELD(SMMU_CBAR1, BPSHCFG_CBNDX_1_0, 2, 8)
1118    DEP_FIELD(SMMU_CBAR1, VMID, 8, 0)
1119DEP_REG32(SMMU_CBAR2, 0x1008)
1120    DEP_FIELD(SMMU_CBAR2, IRPTNDX, 8, 24)
1121    DEP_FIELD(SMMU_CBAR2, WACFG, 2, 22)
1122    DEP_FIELD(SMMU_CBAR2, RACFG, 2, 20)
1123    DEP_FIELD(SMMU_CBAR2, BSU, 2, 18)
1124    DEP_FIELD(SMMU_CBAR2, TYPE, 2, 16)
1125    DEP_FIELD(SMMU_CBAR2, MEMATTR_CBNDX_7_4, 4, 12)
1126    DEP_FIELD(SMMU_CBAR2, FB_CBNDX_3, 1, 11)
1127    DEP_FIELD(SMMU_CBAR2, HYPC_CBNDX_2, 1, 10)
1128    DEP_FIELD(SMMU_CBAR2, BPSHCFG_CBNDX_1_0, 2, 8)
1129    DEP_FIELD(SMMU_CBAR2, VMID, 8, 0)
1130DEP_REG32(SMMU_CBAR3, 0x100c)
1131    DEP_FIELD(SMMU_CBAR3, IRPTNDX, 8, 24)
1132    DEP_FIELD(SMMU_CBAR3, WACFG, 2, 22)
1133    DEP_FIELD(SMMU_CBAR3, RACFG, 2, 20)
1134    DEP_FIELD(SMMU_CBAR3, BSU, 2, 18)
1135    DEP_FIELD(SMMU_CBAR3, TYPE, 2, 16)
1136    DEP_FIELD(SMMU_CBAR3, MEMATTR_CBNDX_7_4, 4, 12)
1137    DEP_FIELD(SMMU_CBAR3, FB_CBNDX_3, 1, 11)
1138    DEP_FIELD(SMMU_CBAR3, HYPC_CBNDX_2, 1, 10)
1139    DEP_FIELD(SMMU_CBAR3, BPSHCFG_CBNDX_1_0, 2, 8)
1140    DEP_FIELD(SMMU_CBAR3, VMID, 8, 0)
1141DEP_REG32(SMMU_CBAR4, 0x1010)
1142    DEP_FIELD(SMMU_CBAR4, IRPTNDX, 8, 24)
1143    DEP_FIELD(SMMU_CBAR4, WACFG, 2, 22)
1144    DEP_FIELD(SMMU_CBAR4, RACFG, 2, 20)
1145    DEP_FIELD(SMMU_CBAR4, BSU, 2, 18)
1146    DEP_FIELD(SMMU_CBAR4, TYPE, 2, 16)
1147    DEP_FIELD(SMMU_CBAR4, MEMATTR_CBNDX_7_4, 4, 12)
1148    DEP_FIELD(SMMU_CBAR4, FB_CBNDX_3, 1, 11)
1149    DEP_FIELD(SMMU_CBAR4, HYPC_CBNDX_2, 1, 10)
1150    DEP_FIELD(SMMU_CBAR4, BPSHCFG_CBNDX_1_0, 2, 8)
1151    DEP_FIELD(SMMU_CBAR4, VMID, 8, 0)
1152DEP_REG32(SMMU_CBAR5, 0x1014)
1153    DEP_FIELD(SMMU_CBAR5, IRPTNDX, 8, 24)
1154    DEP_FIELD(SMMU_CBAR5, WACFG, 2, 22)
1155    DEP_FIELD(SMMU_CBAR5, RACFG, 2, 20)
1156    DEP_FIELD(SMMU_CBAR5, BSU, 2, 18)
1157    DEP_FIELD(SMMU_CBAR5, TYPE, 2, 16)
1158    DEP_FIELD(SMMU_CBAR5, MEMATTR_CBNDX_7_4, 4, 12)
1159    DEP_FIELD(SMMU_CBAR5, FB_CBNDX_3, 1, 11)
1160    DEP_FIELD(SMMU_CBAR5, HYPC_CBNDX_2, 1, 10)
1161    DEP_FIELD(SMMU_CBAR5, BPSHCFG_CBNDX_1_0, 2, 8)
1162    DEP_FIELD(SMMU_CBAR5, VMID, 8, 0)
1163DEP_REG32(SMMU_CBAR6, 0x1018)
1164    DEP_FIELD(SMMU_CBAR6, IRPTNDX, 8, 24)
1165    DEP_FIELD(SMMU_CBAR6, WACFG, 2, 22)
1166    DEP_FIELD(SMMU_CBAR6, RACFG, 2, 20)
1167    DEP_FIELD(SMMU_CBAR6, BSU, 2, 18)
1168    DEP_FIELD(SMMU_CBAR6, TYPE, 2, 16)
1169    DEP_FIELD(SMMU_CBAR6, MEMATTR_CBNDX_7_4, 4, 12)
1170    DEP_FIELD(SMMU_CBAR6, FB_CBNDX_3, 1, 11)
1171    DEP_FIELD(SMMU_CBAR6, HYPC_CBNDX_2, 1, 10)
1172    DEP_FIELD(SMMU_CBAR6, BPSHCFG_CBNDX_1_0, 2, 8)
1173    DEP_FIELD(SMMU_CBAR6, VMID, 8, 0)
1174DEP_REG32(SMMU_CBAR7, 0x101c)
1175    DEP_FIELD(SMMU_CBAR7, IRPTNDX, 8, 24)
1176    DEP_FIELD(SMMU_CBAR7, WACFG, 2, 22)
1177    DEP_FIELD(SMMU_CBAR7, RACFG, 2, 20)
1178    DEP_FIELD(SMMU_CBAR7, BSU, 2, 18)
1179    DEP_FIELD(SMMU_CBAR7, TYPE, 2, 16)
1180    DEP_FIELD(SMMU_CBAR7, MEMATTR_CBNDX_7_4, 4, 12)
1181    DEP_FIELD(SMMU_CBAR7, FB_CBNDX_3, 1, 11)
1182    DEP_FIELD(SMMU_CBAR7, HYPC_CBNDX_2, 1, 10)
1183    DEP_FIELD(SMMU_CBAR7, BPSHCFG_CBNDX_1_0, 2, 8)
1184    DEP_FIELD(SMMU_CBAR7, VMID, 8, 0)
1185DEP_REG32(SMMU_CBAR8, 0x1020)
1186    DEP_FIELD(SMMU_CBAR8, IRPTNDX, 8, 24)
1187    DEP_FIELD(SMMU_CBAR8, WACFG, 2, 22)
1188    DEP_FIELD(SMMU_CBAR8, RACFG, 2, 20)
1189    DEP_FIELD(SMMU_CBAR8, BSU, 2, 18)
1190    DEP_FIELD(SMMU_CBAR8, TYPE, 2, 16)
1191    DEP_FIELD(SMMU_CBAR8, MEMATTR_CBNDX_7_4, 4, 12)
1192    DEP_FIELD(SMMU_CBAR8, FB_CBNDX_3, 1, 11)
1193    DEP_FIELD(SMMU_CBAR8, HYPC_CBNDX_2, 1, 10)
1194    DEP_FIELD(SMMU_CBAR8, BPSHCFG_CBNDX_1_0, 2, 8)
1195    DEP_FIELD(SMMU_CBAR8, VMID, 8, 0)
1196DEP_REG32(SMMU_CBAR9, 0x1024)
1197    DEP_FIELD(SMMU_CBAR9, IRPTNDX, 8, 24)
1198    DEP_FIELD(SMMU_CBAR9, WACFG, 2, 22)
1199    DEP_FIELD(SMMU_CBAR9, RACFG, 2, 20)
1200    DEP_FIELD(SMMU_CBAR9, BSU, 2, 18)
1201    DEP_FIELD(SMMU_CBAR9, TYPE, 2, 16)
1202    DEP_FIELD(SMMU_CBAR9, MEMATTR_CBNDX_7_4, 4, 12)
1203    DEP_FIELD(SMMU_CBAR9, FB_CBNDX_3, 1, 11)
1204    DEP_FIELD(SMMU_CBAR9, HYPC_CBNDX_2, 1, 10)
1205    DEP_FIELD(SMMU_CBAR9, BPSHCFG_CBNDX_1_0, 2, 8)
1206    DEP_FIELD(SMMU_CBAR9, VMID, 8, 0)
1207DEP_REG32(SMMU_CBAR10, 0x1028)
1208    DEP_FIELD(SMMU_CBAR10, IRPTNDX, 8, 24)
1209    DEP_FIELD(SMMU_CBAR10, WACFG, 2, 22)
1210    DEP_FIELD(SMMU_CBAR10, RACFG, 2, 20)
1211    DEP_FIELD(SMMU_CBAR10, BSU, 2, 18)
1212    DEP_FIELD(SMMU_CBAR10, TYPE, 2, 16)
1213    DEP_FIELD(SMMU_CBAR10, MEMATTR_CBNDX_7_4, 4, 12)
1214    DEP_FIELD(SMMU_CBAR10, FB_CBNDX_3, 1, 11)
1215    DEP_FIELD(SMMU_CBAR10, HYPC_CBNDX_2, 1, 10)
1216    DEP_FIELD(SMMU_CBAR10, BPSHCFG_CBNDX_1_0, 2, 8)
1217    DEP_FIELD(SMMU_CBAR10, VMID, 8, 0)
1218DEP_REG32(SMMU_CBAR11, 0x102c)
1219    DEP_FIELD(SMMU_CBAR11, IRPTNDX, 8, 24)
1220    DEP_FIELD(SMMU_CBAR11, WACFG, 2, 22)
1221    DEP_FIELD(SMMU_CBAR11, RACFG, 2, 20)
1222    DEP_FIELD(SMMU_CBAR11, BSU, 2, 18)
1223    DEP_FIELD(SMMU_CBAR11, TYPE, 2, 16)
1224    DEP_FIELD(SMMU_CBAR11, MEMATTR_CBNDX_7_4, 4, 12)
1225    DEP_FIELD(SMMU_CBAR11, FB_CBNDX_3, 1, 11)
1226    DEP_FIELD(SMMU_CBAR11, HYPC_CBNDX_2, 1, 10)
1227    DEP_FIELD(SMMU_CBAR11, BPSHCFG_CBNDX_1_0, 2, 8)
1228    DEP_FIELD(SMMU_CBAR11, VMID, 8, 0)
1229DEP_REG32(SMMU_CBAR12, 0x1030)
1230    DEP_FIELD(SMMU_CBAR12, IRPTNDX, 8, 24)
1231    DEP_FIELD(SMMU_CBAR12, WACFG, 2, 22)
1232    DEP_FIELD(SMMU_CBAR12, RACFG, 2, 20)
1233    DEP_FIELD(SMMU_CBAR12, BSU, 2, 18)
1234    DEP_FIELD(SMMU_CBAR12, TYPE, 2, 16)
1235    DEP_FIELD(SMMU_CBAR12, MEMATTR_CBNDX_7_4, 4, 12)
1236    DEP_FIELD(SMMU_CBAR12, FB_CBNDX_3, 1, 11)
1237    DEP_FIELD(SMMU_CBAR12, HYPC_CBNDX_2, 1, 10)
1238    DEP_FIELD(SMMU_CBAR12, BPSHCFG_CBNDX_1_0, 2, 8)
1239    DEP_FIELD(SMMU_CBAR12, VMID, 8, 0)
1240DEP_REG32(SMMU_CBAR13, 0x1034)
1241    DEP_FIELD(SMMU_CBAR13, IRPTNDX, 8, 24)
1242    DEP_FIELD(SMMU_CBAR13, WACFG, 2, 22)
1243    DEP_FIELD(SMMU_CBAR13, RACFG, 2, 20)
1244    DEP_FIELD(SMMU_CBAR13, BSU, 2, 18)
1245    DEP_FIELD(SMMU_CBAR13, TYPE, 2, 16)
1246    DEP_FIELD(SMMU_CBAR13, MEMATTR_CBNDX_7_4, 4, 12)
1247    DEP_FIELD(SMMU_CBAR13, FB_CBNDX_3, 1, 11)
1248    DEP_FIELD(SMMU_CBAR13, HYPC_CBNDX_2, 1, 10)
1249    DEP_FIELD(SMMU_CBAR13, BPSHCFG_CBNDX_1_0, 2, 8)
1250    DEP_FIELD(SMMU_CBAR13, VMID, 8, 0)
1251DEP_REG32(SMMU_CBAR14, 0x1038)
1252    DEP_FIELD(SMMU_CBAR14, IRPTNDX, 8, 24)
1253    DEP_FIELD(SMMU_CBAR14, WACFG, 2, 22)
1254    DEP_FIELD(SMMU_CBAR14, RACFG, 2, 20)
1255    DEP_FIELD(SMMU_CBAR14, BSU, 2, 18)
1256    DEP_FIELD(SMMU_CBAR14, TYPE, 2, 16)
1257    DEP_FIELD(SMMU_CBAR14, MEMATTR_CBNDX_7_4, 4, 12)
1258    DEP_FIELD(SMMU_CBAR14, FB_CBNDX_3, 1, 11)
1259    DEP_FIELD(SMMU_CBAR14, HYPC_CBNDX_2, 1, 10)
1260    DEP_FIELD(SMMU_CBAR14, BPSHCFG_CBNDX_1_0, 2, 8)
1261    DEP_FIELD(SMMU_CBAR14, VMID, 8, 0)
1262DEP_REG32(SMMU_CBAR15, 0x103c)
1263    DEP_FIELD(SMMU_CBAR15, IRPTNDX, 8, 24)
1264    DEP_FIELD(SMMU_CBAR15, WACFG, 2, 22)
1265    DEP_FIELD(SMMU_CBAR15, RACFG, 2, 20)
1266    DEP_FIELD(SMMU_CBAR15, BSU, 2, 18)
1267    DEP_FIELD(SMMU_CBAR15, TYPE, 2, 16)
1268    DEP_FIELD(SMMU_CBAR15, MEMATTR_CBNDX_7_4, 4, 12)
1269    DEP_FIELD(SMMU_CBAR15, FB_CBNDX_3, 1, 11)
1270    DEP_FIELD(SMMU_CBAR15, HYPC_CBNDX_2, 1, 10)
1271    DEP_FIELD(SMMU_CBAR15, BPSHCFG_CBNDX_1_0, 2, 8)
1272    DEP_FIELD(SMMU_CBAR15, VMID, 8, 0)
1273DEP_REG32(SMMU_CBFRSYNRA0, 0x1400)
1274    DEP_FIELD(SMMU_CBFRSYNRA0, SSD_INDEX, 15, 16)
1275    DEP_FIELD(SMMU_CBFRSYNRA0, STREAMID, 15, 0)
1276DEP_REG32(SMMU_CBFRSYNRA1, 0x1404)
1277    DEP_FIELD(SMMU_CBFRSYNRA1, SSD_INDEX, 15, 16)
1278    DEP_FIELD(SMMU_CBFRSYNRA1, STREAMID, 15, 0)
1279DEP_REG32(SMMU_CBFRSYNRA2, 0x1408)
1280    DEP_FIELD(SMMU_CBFRSYNRA2, SSD_INDEX, 15, 16)
1281    DEP_FIELD(SMMU_CBFRSYNRA2, STREAMID, 15, 0)
1282DEP_REG32(SMMU_CBFRSYNRA3, 0x140c)
1283    DEP_FIELD(SMMU_CBFRSYNRA3, SSD_INDEX, 15, 16)
1284    DEP_FIELD(SMMU_CBFRSYNRA3, STREAMID, 15, 0)
1285DEP_REG32(SMMU_CBFRSYNRA4, 0x1410)
1286    DEP_FIELD(SMMU_CBFRSYNRA4, SSD_INDEX, 15, 16)
1287    DEP_FIELD(SMMU_CBFRSYNRA4, STREAMID, 15, 0)
1288DEP_REG32(SMMU_CBFRSYNRA5, 0x1414)
1289    DEP_FIELD(SMMU_CBFRSYNRA5, SSD_INDEX, 15, 16)
1290    DEP_FIELD(SMMU_CBFRSYNRA5, STREAMID, 15, 0)
1291DEP_REG32(SMMU_CBFRSYNRA6, 0x1418)
1292    DEP_FIELD(SMMU_CBFRSYNRA6, SSD_INDEX, 15, 16)
1293    DEP_FIELD(SMMU_CBFRSYNRA6, STREAMID, 15, 0)
1294DEP_REG32(SMMU_CBFRSYNRA7, 0x141c)
1295    DEP_FIELD(SMMU_CBFRSYNRA7, SSD_INDEX, 15, 16)
1296    DEP_FIELD(SMMU_CBFRSYNRA7, STREAMID, 15, 0)
1297DEP_REG32(SMMU_CBFRSYNRA8, 0x1420)
1298    DEP_FIELD(SMMU_CBFRSYNRA8, SSD_INDEX, 15, 16)
1299    DEP_FIELD(SMMU_CBFRSYNRA8, STREAMID, 15, 0)
1300DEP_REG32(SMMU_CBFRSYNRA9, 0x1424)
1301    DEP_FIELD(SMMU_CBFRSYNRA9, SSD_INDEX, 15, 16)
1302    DEP_FIELD(SMMU_CBFRSYNRA9, STREAMID, 15, 0)
1303DEP_REG32(SMMU_CBFRSYNRA10, 0x1428)
1304    DEP_FIELD(SMMU_CBFRSYNRA10, SSD_INDEX, 15, 16)
1305    DEP_FIELD(SMMU_CBFRSYNRA10, STREAMID, 15, 0)
1306DEP_REG32(SMMU_CBFRSYNRA11, 0x142c)
1307    DEP_FIELD(SMMU_CBFRSYNRA11, SSD_INDEX, 15, 16)
1308    DEP_FIELD(SMMU_CBFRSYNRA11, STREAMID, 15, 0)
1309DEP_REG32(SMMU_CBFRSYNRA12, 0x1430)
1310    DEP_FIELD(SMMU_CBFRSYNRA12, SSD_INDEX, 15, 16)
1311    DEP_FIELD(SMMU_CBFRSYNRA12, STREAMID, 15, 0)
1312DEP_REG32(SMMU_CBFRSYNRA13, 0x1434)
1313    DEP_FIELD(SMMU_CBFRSYNRA13, SSD_INDEX, 15, 16)
1314    DEP_FIELD(SMMU_CBFRSYNRA13, STREAMID, 15, 0)
1315DEP_REG32(SMMU_CBFRSYNRA14, 0x1438)
1316    DEP_FIELD(SMMU_CBFRSYNRA14, SSD_INDEX, 15, 16)
1317    DEP_FIELD(SMMU_CBFRSYNRA14, STREAMID, 15, 0)
1318DEP_REG32(SMMU_CBFRSYNRA15, 0x143c)
1319    DEP_FIELD(SMMU_CBFRSYNRA15, SSD_INDEX, 15, 16)
1320    DEP_FIELD(SMMU_CBFRSYNRA15, STREAMID, 15, 0)
1321DEP_REG32(SMMU_CBA2R0, 0x1800)
1322    DEP_FIELD(SMMU_CBA2R0, MONC, 1, 1)
1323    DEP_FIELD(SMMU_CBA2R0, VA64, 1, 0)
1324DEP_REG32(SMMU_CBA2R1, 0x1804)
1325    DEP_FIELD(SMMU_CBA2R1, MONC, 1, 1)
1326    DEP_FIELD(SMMU_CBA2R1, VA64, 1, 0)
1327DEP_REG32(SMMU_CBA2R2, 0x1808)
1328    DEP_FIELD(SMMU_CBA2R2, MONC, 1, 1)
1329    DEP_FIELD(SMMU_CBA2R2, VA64, 1, 0)
1330DEP_REG32(SMMU_CBA2R3, 0x180c)
1331    DEP_FIELD(SMMU_CBA2R3, MONC, 1, 1)
1332    DEP_FIELD(SMMU_CBA2R3, VA64, 1, 0)
1333DEP_REG32(SMMU_CBA2R4, 0x1810)
1334    DEP_FIELD(SMMU_CBA2R4, MONC, 1, 1)
1335    DEP_FIELD(SMMU_CBA2R4, VA64, 1, 0)
1336DEP_REG32(SMMU_CBA2R5, 0x1814)
1337    DEP_FIELD(SMMU_CBA2R5, MONC, 1, 1)
1338    DEP_FIELD(SMMU_CBA2R5, VA64, 1, 0)
1339DEP_REG32(SMMU_CBA2R6, 0x1818)
1340    DEP_FIELD(SMMU_CBA2R6, MONC, 1, 1)
1341    DEP_FIELD(SMMU_CBA2R6, VA64, 1, 0)
1342DEP_REG32(SMMU_CBA2R7, 0x181c)
1343    DEP_FIELD(SMMU_CBA2R7, MONC, 1, 1)
1344    DEP_FIELD(SMMU_CBA2R7, VA64, 1, 0)
1345DEP_REG32(SMMU_CBA2R8, 0x1820)
1346    DEP_FIELD(SMMU_CBA2R8, MONC, 1, 1)
1347    DEP_FIELD(SMMU_CBA2R8, VA64, 1, 0)
1348DEP_REG32(SMMU_CBA2R9, 0x1824)
1349    DEP_FIELD(SMMU_CBA2R9, MONC, 1, 1)
1350    DEP_FIELD(SMMU_CBA2R9, VA64, 1, 0)
1351DEP_REG32(SMMU_CBA2R10, 0x1828)
1352    DEP_FIELD(SMMU_CBA2R10, MONC, 1, 1)
1353    DEP_FIELD(SMMU_CBA2R10, VA64, 1, 0)
1354DEP_REG32(SMMU_CBA2R11, 0x182c)
1355    DEP_FIELD(SMMU_CBA2R11, MONC, 1, 1)
1356    DEP_FIELD(SMMU_CBA2R11, VA64, 1, 0)
1357DEP_REG32(SMMU_CBA2R12, 0x1830)
1358    DEP_FIELD(SMMU_CBA2R12, MONC, 1, 1)
1359    DEP_FIELD(SMMU_CBA2R12, VA64, 1, 0)
1360DEP_REG32(SMMU_CBA2R13, 0x1834)
1361    DEP_FIELD(SMMU_CBA2R13, MONC, 1, 1)
1362    DEP_FIELD(SMMU_CBA2R13, VA64, 1, 0)
1363DEP_REG32(SMMU_CBA2R14, 0x1838)
1364    DEP_FIELD(SMMU_CBA2R14, MONC, 1, 1)
1365    DEP_FIELD(SMMU_CBA2R14, VA64, 1, 0)
1366DEP_REG32(SMMU_CBA2R15, 0x183c)
1367    DEP_FIELD(SMMU_CBA2R15, MONC, 1, 1)
1368    DEP_FIELD(SMMU_CBA2R15, VA64, 1, 0)
1369DEP_REG32(SMMU_ITCTRL, 0x2000)
1370    DEP_FIELD(SMMU_ITCTRL, TBU_INDEX, 3, 4)
1371    DEP_FIELD(SMMU_ITCTRL, MODULE, 1, 3)
1372    DEP_FIELD(SMMU_ITCTRL, RAM_DATA, 1, 2)
1373    DEP_FIELD(SMMU_ITCTRL, RAM_MODE, 1, 1)
1374    DEP_FIELD(SMMU_ITCTRL, INTGMODE, 1, 0)
1375DEP_REG32(SMMU_ITIP, 0x2004)
1376    DEP_FIELD(SMMU_ITIP, SPINDEN, 1, 0)
1377DEP_REG32(SMMU_ITOP_GLBL, 0x2008)
1378    DEP_FIELD(SMMU_ITOP_GLBL, TCU_RAM_DATA, 4, 16)
1379    DEP_FIELD(SMMU_ITOP_GLBL, GLBLSF1, 1, 9)
1380    DEP_FIELD(SMMU_ITOP_GLBL, GLBLNSF1, 1, 1)
1381DEP_REG32(SMMU_ITOP_PERF_INDEX, 0x200c)
1382    DEP_FIELD(SMMU_ITOP_PERF_INDEX, WAY_IPA2PA_PF, 2, 30)
1383    DEP_FIELD(SMMU_ITOP_PERF_INDEX, IPA2PA_PF_INDEX, 7, 16)
1384    DEP_FIELD(SMMU_ITOP_PERF_INDEX, WAY_MTLB_WC, 2, 14)
1385    DEP_FIELD(SMMU_ITOP_PERF_INDEX, MTLB_WC_INDEX, 12, 0)
1386DEP_REG32(SMMU_ITOP_CXT0TO31_RAM0, 0x2010)
1387DEP_REG32(SMMU_TBUQOS0, 0x2100)
1388    DEP_FIELD(SMMU_TBUQOS0, QOSTBU5, 4, 20)
1389    DEP_FIELD(SMMU_TBUQOS0, QOSTBU4, 4, 16)
1390    DEP_FIELD(SMMU_TBUQOS0, QOSTBU3, 4, 12)
1391    DEP_FIELD(SMMU_TBUQOS0, QOSTBU2, 4, 8)
1392    DEP_FIELD(SMMU_TBUQOS0, QOSTBU1, 4, 4)
1393    DEP_FIELD(SMMU_TBUQOS0, QOSTBU0, 4, 0)
1394DEP_REG32(SMMU_PER, 0x2200)
1395    DEP_FIELD(SMMU_PER, PER_TCU, 8, 8)
1396    DEP_FIELD(SMMU_PER, PER_TBU, 8, 0)
1397DEP_REG32(SMMU_TBU_PWR_STATUS, 0x2204)
1398DEP_REG32(PMEVCNTR0, 0x3000)
1399DEP_REG32(PMEVCNTR1, 0x3004)
1400DEP_REG32(PMEVCNTR2, 0x3008)
1401DEP_REG32(PMEVCNTR3, 0x300c)
1402DEP_REG32(PMEVCNTR4, 0x3010)
1403DEP_REG32(PMEVCNTR5, 0x3014)
1404DEP_REG32(PMEVCNTR6, 0x3018)
1405DEP_REG32(PMEVCNTR7, 0x301c)
1406DEP_REG32(PMEVCNTR8, 0x3020)
1407DEP_REG32(PMEVCNTR9, 0x3024)
1408DEP_REG32(PMEVCNTR10, 0x3028)
1409DEP_REG32(PMEVCNTR11, 0x302c)
1410DEP_REG32(PMEVCNTR12, 0x3030)
1411DEP_REG32(PMEVCNTR13, 0x3034)
1412DEP_REG32(PMEVCNTR14, 0x3038)
1413DEP_REG32(PMEVCNTR15, 0x303c)
1414DEP_REG32(PMEVCNTR16, 0x3040)
1415DEP_REG32(PMEVCNTR17, 0x3044)
1416DEP_REG32(PMEVCNTR18, 0x3048)
1417DEP_REG32(PMEVCNTR19, 0x304c)
1418DEP_REG32(PMEVCNTR20, 0x3050)
1419DEP_REG32(PMEVCNTR21, 0x3054)
1420DEP_REG32(PMEVCNTR22, 0x3058)
1421DEP_REG32(PMEVCNTR23, 0x305c)
1422DEP_REG32(PMEVTYPER0, 0x3400)
1423    DEP_FIELD(PMEVTYPER0, P, 1, 31)
1424    DEP_FIELD(PMEVTYPER0, U, 1, 30)
1425    DEP_FIELD(PMEVTYPER0, NSP, 1, 29)
1426    DEP_FIELD(PMEVTYPER0, NSU, 1, 28)
1427    DEP_FIELD(PMEVTYPER0, EVENT, 5, 0)
1428DEP_REG32(PMEVTYPER1, 0x3404)
1429    DEP_FIELD(PMEVTYPER1, P, 1, 31)
1430    DEP_FIELD(PMEVTYPER1, U, 1, 30)
1431    DEP_FIELD(PMEVTYPER1, NSP, 1, 29)
1432    DEP_FIELD(PMEVTYPER1, NSU, 1, 28)
1433    DEP_FIELD(PMEVTYPER1, EVENT, 5, 0)
1434DEP_REG32(PMEVTYPER2, 0x3408)
1435    DEP_FIELD(PMEVTYPER2, P, 1, 31)
1436    DEP_FIELD(PMEVTYPER2, U, 1, 30)
1437    DEP_FIELD(PMEVTYPER2, NSP, 1, 29)
1438    DEP_FIELD(PMEVTYPER2, NSU, 1, 28)
1439    DEP_FIELD(PMEVTYPER2, EVENT, 5, 0)
1440DEP_REG32(PMEVTYPER3, 0x340c)
1441    DEP_FIELD(PMEVTYPER3, P, 1, 31)
1442    DEP_FIELD(PMEVTYPER3, U, 1, 30)
1443    DEP_FIELD(PMEVTYPER3, NSP, 1, 29)
1444    DEP_FIELD(PMEVTYPER3, NSU, 1, 28)
1445    DEP_FIELD(PMEVTYPER3, EVENT, 5, 0)
1446DEP_REG32(PMEVTYPER4, 0x3410)
1447    DEP_FIELD(PMEVTYPER4, P, 1, 31)
1448    DEP_FIELD(PMEVTYPER4, U, 1, 30)
1449    DEP_FIELD(PMEVTYPER4, NSP, 1, 29)
1450    DEP_FIELD(PMEVTYPER4, NSU, 1, 28)
1451    DEP_FIELD(PMEVTYPER4, EVENT, 5, 0)
1452DEP_REG32(PMEVTYPER5, 0x3414)
1453    DEP_FIELD(PMEVTYPER5, P, 1, 31)
1454    DEP_FIELD(PMEVTYPER5, U, 1, 30)
1455    DEP_FIELD(PMEVTYPER5, NSP, 1, 29)
1456    DEP_FIELD(PMEVTYPER5, NSU, 1, 28)
1457    DEP_FIELD(PMEVTYPER5, EVENT, 5, 0)
1458DEP_REG32(PMEVTYPER6, 0x3418)
1459    DEP_FIELD(PMEVTYPER6, P, 1, 31)
1460    DEP_FIELD(PMEVTYPER6, U, 1, 30)
1461    DEP_FIELD(PMEVTYPER6, NSP, 1, 29)
1462    DEP_FIELD(PMEVTYPER6, NSU, 1, 28)
1463    DEP_FIELD(PMEVTYPER6, EVENT, 5, 0)
1464DEP_REG32(PMEVTYPER7, 0x341c)
1465    DEP_FIELD(PMEVTYPER7, P, 1, 31)
1466    DEP_FIELD(PMEVTYPER7, U, 1, 30)
1467    DEP_FIELD(PMEVTYPER7, NSP, 1, 29)
1468    DEP_FIELD(PMEVTYPER7, NSU, 1, 28)
1469    DEP_FIELD(PMEVTYPER7, EVENT, 5, 0)
1470DEP_REG32(PMEVTYPER8, 0x3420)
1471    DEP_FIELD(PMEVTYPER8, P, 1, 31)
1472    DEP_FIELD(PMEVTYPER8, U, 1, 30)
1473    DEP_FIELD(PMEVTYPER8, NSP, 1, 29)
1474    DEP_FIELD(PMEVTYPER8, NSU, 1, 28)
1475    DEP_FIELD(PMEVTYPER8, EVENT, 5, 0)
1476DEP_REG32(PMEVTYPER9, 0x3424)
1477    DEP_FIELD(PMEVTYPER9, P, 1, 31)
1478    DEP_FIELD(PMEVTYPER9, U, 1, 30)
1479    DEP_FIELD(PMEVTYPER9, NSP, 1, 29)
1480    DEP_FIELD(PMEVTYPER9, NSU, 1, 28)
1481    DEP_FIELD(PMEVTYPER9, EVENT, 5, 0)
1482DEP_REG32(PMEVTYPER10, 0x3428)
1483    DEP_FIELD(PMEVTYPER10, P, 1, 31)
1484    DEP_FIELD(PMEVTYPER10, U, 1, 30)
1485    DEP_FIELD(PMEVTYPER10, NSP, 1, 29)
1486    DEP_FIELD(PMEVTYPER10, NSU, 1, 28)
1487    DEP_FIELD(PMEVTYPER10, EVENT, 5, 0)
1488DEP_REG32(PMEVTYPER11, 0x342c)
1489    DEP_FIELD(PMEVTYPER11, P, 1, 31)
1490    DEP_FIELD(PMEVTYPER11, U, 1, 30)
1491    DEP_FIELD(PMEVTYPER11, NSP, 1, 29)
1492    DEP_FIELD(PMEVTYPER11, NSU, 1, 28)
1493    DEP_FIELD(PMEVTYPER11, EVENT, 5, 0)
1494DEP_REG32(PMEVTYPER12, 0x3430)
1495    DEP_FIELD(PMEVTYPER12, P, 1, 31)
1496    DEP_FIELD(PMEVTYPER12, U, 1, 30)
1497    DEP_FIELD(PMEVTYPER12, NSP, 1, 29)
1498    DEP_FIELD(PMEVTYPER12, NSU, 1, 28)
1499    DEP_FIELD(PMEVTYPER12, EVENT, 5, 0)
1500DEP_REG32(PMEVTYPER13, 0x3434)
1501    DEP_FIELD(PMEVTYPER13, P, 1, 31)
1502    DEP_FIELD(PMEVTYPER13, U, 1, 30)
1503    DEP_FIELD(PMEVTYPER13, NSP, 1, 29)
1504    DEP_FIELD(PMEVTYPER13, NSU, 1, 28)
1505    DEP_FIELD(PMEVTYPER13, EVENT, 5, 0)
1506DEP_REG32(PMEVTYPER14, 0x3438)
1507    DEP_FIELD(PMEVTYPER14, P, 1, 31)
1508    DEP_FIELD(PMEVTYPER14, U, 1, 30)
1509    DEP_FIELD(PMEVTYPER14, NSP, 1, 29)
1510    DEP_FIELD(PMEVTYPER14, NSU, 1, 28)
1511    DEP_FIELD(PMEVTYPER14, EVENT, 5, 0)
1512DEP_REG32(PMEVTYPER15, 0x343c)
1513    DEP_FIELD(PMEVTYPER15, P, 1, 31)
1514    DEP_FIELD(PMEVTYPER15, U, 1, 30)
1515    DEP_FIELD(PMEVTYPER15, NSP, 1, 29)
1516    DEP_FIELD(PMEVTYPER15, NSU, 1, 28)
1517    DEP_FIELD(PMEVTYPER15, EVENT, 5, 0)
1518DEP_REG32(PMEVTYPER16, 0x3440)
1519    DEP_FIELD(PMEVTYPER16, P, 1, 31)
1520    DEP_FIELD(PMEVTYPER16, U, 1, 30)
1521    DEP_FIELD(PMEVTYPER16, NSP, 1, 29)
1522    DEP_FIELD(PMEVTYPER16, NSU, 1, 28)
1523    DEP_FIELD(PMEVTYPER16, EVENT, 5, 0)
1524DEP_REG32(PMEVTYPER17, 0x3444)
1525    DEP_FIELD(PMEVTYPER17, P, 1, 31)
1526    DEP_FIELD(PMEVTYPER17, U, 1, 30)
1527    DEP_FIELD(PMEVTYPER17, NSP, 1, 29)
1528    DEP_FIELD(PMEVTYPER17, NSU, 1, 28)
1529    DEP_FIELD(PMEVTYPER17, EVENT, 5, 0)
1530DEP_REG32(PMEVTYPER18, 0x3448)
1531    DEP_FIELD(PMEVTYPER18, P, 1, 31)
1532    DEP_FIELD(PMEVTYPER18, U, 1, 30)
1533    DEP_FIELD(PMEVTYPER18, NSP, 1, 29)
1534    DEP_FIELD(PMEVTYPER18, NSU, 1, 28)
1535    DEP_FIELD(PMEVTYPER18, EVENT, 5, 0)
1536DEP_REG32(PMEVTYPER19, 0x344c)
1537    DEP_FIELD(PMEVTYPER19, P, 1, 31)
1538    DEP_FIELD(PMEVTYPER19, U, 1, 30)
1539    DEP_FIELD(PMEVTYPER19, NSP, 1, 29)
1540    DEP_FIELD(PMEVTYPER19, NSU, 1, 28)
1541    DEP_FIELD(PMEVTYPER19, EVENT, 5, 0)
1542DEP_REG32(PMEVTYPER20, 0x3450)
1543    DEP_FIELD(PMEVTYPER20, P, 1, 31)
1544    DEP_FIELD(PMEVTYPER20, U, 1, 30)
1545    DEP_FIELD(PMEVTYPER20, NSP, 1, 29)
1546    DEP_FIELD(PMEVTYPER20, NSU, 1, 28)
1547    DEP_FIELD(PMEVTYPER20, EVENT, 5, 0)
1548DEP_REG32(PMEVTYPER21, 0x3454)
1549    DEP_FIELD(PMEVTYPER21, P, 1, 31)
1550    DEP_FIELD(PMEVTYPER21, U, 1, 30)
1551    DEP_FIELD(PMEVTYPER21, NSP, 1, 29)
1552    DEP_FIELD(PMEVTYPER21, NSU, 1, 28)
1553    DEP_FIELD(PMEVTYPER21, EVENT, 5, 0)
1554DEP_REG32(PMEVTYPER22, 0x3458)
1555    DEP_FIELD(PMEVTYPER22, P, 1, 31)
1556    DEP_FIELD(PMEVTYPER22, U, 1, 30)
1557    DEP_FIELD(PMEVTYPER22, NSP, 1, 29)
1558    DEP_FIELD(PMEVTYPER22, NSU, 1, 28)
1559    DEP_FIELD(PMEVTYPER22, EVENT, 5, 0)
1560DEP_REG32(PMEVTYPER23, 0x345c)
1561    DEP_FIELD(PMEVTYPER23, P, 1, 31)
1562    DEP_FIELD(PMEVTYPER23, U, 1, 30)
1563    DEP_FIELD(PMEVTYPER23, NSP, 1, 29)
1564    DEP_FIELD(PMEVTYPER23, NSU, 1, 28)
1565    DEP_FIELD(PMEVTYPER23, EVENT, 5, 0)
1566DEP_REG32(PMCGCR0, 0x3800)
1567    DEP_FIELD(PMCGCR0, CGNC, 4, 24)
1568    DEP_FIELD(PMCGCR0, SIDG, 7, 16)
1569    DEP_FIELD(PMCGCR0, X, 1, 12)
1570    DEP_FIELD(PMCGCR0, E, 1, 11)
1571    DEP_FIELD(PMCGCR0, CBAEN, 1, 10)
1572    DEP_FIELD(PMCGCR0, TCEFCFG, 2, 8)
1573    DEP_FIELD(PMCGCR0, NDX, 4, 0)
1574DEP_REG32(PMCGCR1, 0x3804)
1575    DEP_FIELD(PMCGCR1, CGNC, 4, 24)
1576    DEP_FIELD(PMCGCR1, SIDG, 7, 16)
1577    DEP_FIELD(PMCGCR1, X, 1, 12)
1578    DEP_FIELD(PMCGCR1, E, 1, 11)
1579    DEP_FIELD(PMCGCR1, CBAEN, 1, 10)
1580    DEP_FIELD(PMCGCR1, TCEFCFG, 2, 8)
1581    DEP_FIELD(PMCGCR1, NDX, 4, 0)
1582DEP_REG32(PMCGCR2, 0x3808)
1583    DEP_FIELD(PMCGCR2, CGNC, 4, 24)
1584    DEP_FIELD(PMCGCR2, SIDG, 7, 16)
1585    DEP_FIELD(PMCGCR2, X, 1, 12)
1586    DEP_FIELD(PMCGCR2, E, 1, 11)
1587    DEP_FIELD(PMCGCR2, CBAEN, 1, 10)
1588    DEP_FIELD(PMCGCR2, TCEFCFG, 2, 8)
1589    DEP_FIELD(PMCGCR2, NDX, 4, 0)
1590DEP_REG32(PMCGCR3, 0x380c)
1591    DEP_FIELD(PMCGCR3, CGNC, 4, 24)
1592    DEP_FIELD(PMCGCR3, SIDG, 7, 16)
1593    DEP_FIELD(PMCGCR3, X, 1, 12)
1594    DEP_FIELD(PMCGCR3, E, 1, 11)
1595    DEP_FIELD(PMCGCR3, CBAEN, 1, 10)
1596    DEP_FIELD(PMCGCR3, TCEFCFG, 2, 8)
1597    DEP_FIELD(PMCGCR3, NDX, 4, 0)
1598DEP_REG32(PMCGCR4, 0x3810)
1599    DEP_FIELD(PMCGCR4, CGNC, 4, 24)
1600    DEP_FIELD(PMCGCR4, SIDG, 7, 16)
1601    DEP_FIELD(PMCGCR4, X, 1, 12)
1602    DEP_FIELD(PMCGCR4, E, 1, 11)
1603    DEP_FIELD(PMCGCR4, CBAEN, 1, 10)
1604    DEP_FIELD(PMCGCR4, TCEFCFG, 2, 8)
1605    DEP_FIELD(PMCGCR4, NDX, 4, 0)
1606DEP_REG32(PMCGCR5, 0x3814)
1607    DEP_FIELD(PMCGCR5, CGNC, 4, 24)
1608    DEP_FIELD(PMCGCR5, SIDG, 7, 16)
1609    DEP_FIELD(PMCGCR5, X, 1, 12)
1610    DEP_FIELD(PMCGCR5, E, 1, 11)
1611    DEP_FIELD(PMCGCR5, CBAEN, 1, 10)
1612    DEP_FIELD(PMCGCR5, TCEFCFG, 2, 8)
1613    DEP_FIELD(PMCGCR5, NDX, 4, 0)
1614DEP_REG32(PMCGSMR0, 0x3a00)
1615    DEP_FIELD(PMCGSMR0, MASK, 10, 16)
1616    DEP_FIELD(PMCGSMR0, ID, 10, 0)
1617DEP_REG32(PMCGSMR1, 0x3a04)
1618    DEP_FIELD(PMCGSMR1, MASK, 10, 16)
1619    DEP_FIELD(PMCGSMR1, ID, 10, 0)
1620DEP_REG32(PMCGSMR2, 0x3a08)
1621    DEP_FIELD(PMCGSMR2, MASK, 10, 16)
1622    DEP_FIELD(PMCGSMR2, ID, 10, 0)
1623DEP_REG32(PMCGSMR3, 0x3a0c)
1624    DEP_FIELD(PMCGSMR3, MASK, 10, 16)
1625    DEP_FIELD(PMCGSMR3, ID, 10, 0)
1626DEP_REG32(PMCGSMR4, 0x3a10)
1627    DEP_FIELD(PMCGSMR4, MASK, 10, 16)
1628    DEP_FIELD(PMCGSMR4, ID, 10, 0)
1629DEP_REG32(PMCGSMR5, 0x3a14)
1630    DEP_FIELD(PMCGSMR5, MASK, 10, 16)
1631    DEP_FIELD(PMCGSMR5, ID, 10, 0)
1632DEP_REG32(PMCNTENSET, 0x3c00)
1633    DEP_FIELD(PMCNTENSET, P23, 1, 23)
1634    DEP_FIELD(PMCNTENSET, P22, 1, 22)
1635    DEP_FIELD(PMCNTENSET, P21, 1, 21)
1636    DEP_FIELD(PMCNTENSET, P20, 1, 20)
1637    DEP_FIELD(PMCNTENSET, P19, 1, 19)
1638    DEP_FIELD(PMCNTENSET, P18, 1, 18)
1639    DEP_FIELD(PMCNTENSET, P17, 1, 17)
1640    DEP_FIELD(PMCNTENSET, P16, 1, 16)
1641    DEP_FIELD(PMCNTENSET, P15, 1, 15)
1642    DEP_FIELD(PMCNTENSET, P14, 1, 14)
1643    DEP_FIELD(PMCNTENSET, P13, 1, 13)
1644    DEP_FIELD(PMCNTENSET, P12, 1, 12)
1645    DEP_FIELD(PMCNTENSET, P11, 1, 11)
1646    DEP_FIELD(PMCNTENSET, P10, 1, 10)
1647    DEP_FIELD(PMCNTENSET, P9, 1, 9)
1648    DEP_FIELD(PMCNTENSET, P8, 1, 8)
1649    DEP_FIELD(PMCNTENSET, P7, 1, 7)
1650    DEP_FIELD(PMCNTENSET, P6, 1, 6)
1651    DEP_FIELD(PMCNTENSET, P5, 1, 5)
1652    DEP_FIELD(PMCNTENSET, P4, 1, 4)
1653    DEP_FIELD(PMCNTENSET, P3, 1, 3)
1654    DEP_FIELD(PMCNTENSET, P2, 1, 2)
1655    DEP_FIELD(PMCNTENSET, P1, 1, 1)
1656    DEP_FIELD(PMCNTENSET, P0, 1, 0)
1657DEP_REG32(PMCNTENCLR, 0x3c20)
1658    DEP_FIELD(PMCNTENCLR, P23, 1, 23)
1659    DEP_FIELD(PMCNTENCLR, P22, 1, 22)
1660    DEP_FIELD(PMCNTENCLR, P21, 1, 21)
1661    DEP_FIELD(PMCNTENCLR, P20, 1, 20)
1662    DEP_FIELD(PMCNTENCLR, P19, 1, 19)
1663    DEP_FIELD(PMCNTENCLR, P18, 1, 18)
1664    DEP_FIELD(PMCNTENCLR, P17, 1, 17)
1665    DEP_FIELD(PMCNTENCLR, P16, 1, 16)
1666    DEP_FIELD(PMCNTENCLR, P15, 1, 15)
1667    DEP_FIELD(PMCNTENCLR, P14, 1, 14)
1668    DEP_FIELD(PMCNTENCLR, P13, 1, 13)
1669    DEP_FIELD(PMCNTENCLR, P12, 1, 12)
1670    DEP_FIELD(PMCNTENCLR, P11, 1, 11)
1671    DEP_FIELD(PMCNTENCLR, P10, 1, 10)
1672    DEP_FIELD(PMCNTENCLR, P9, 1, 9)
1673    DEP_FIELD(PMCNTENCLR, P8, 1, 8)
1674    DEP_FIELD(PMCNTENCLR, P7, 1, 7)
1675    DEP_FIELD(PMCNTENCLR, P6, 1, 6)
1676    DEP_FIELD(PMCNTENCLR, P5, 1, 5)
1677    DEP_FIELD(PMCNTENCLR, P4, 1, 4)
1678    DEP_FIELD(PMCNTENCLR, P3, 1, 3)
1679    DEP_FIELD(PMCNTENCLR, P2, 1, 2)
1680    DEP_FIELD(PMCNTENCLR, P1, 1, 1)
1681    DEP_FIELD(PMCNTENCLR, P0, 1, 0)
1682DEP_REG32(PMINTENSET, 0x3c40)
1683    DEP_FIELD(PMINTENSET, P23, 1, 23)
1684    DEP_FIELD(PMINTENSET, P22, 1, 22)
1685    DEP_FIELD(PMINTENSET, P21, 1, 21)
1686    DEP_FIELD(PMINTENSET, P20, 1, 20)
1687    DEP_FIELD(PMINTENSET, P19, 1, 19)
1688    DEP_FIELD(PMINTENSET, P18, 1, 18)
1689    DEP_FIELD(PMINTENSET, P17, 1, 17)
1690    DEP_FIELD(PMINTENSET, P16, 1, 16)
1691    DEP_FIELD(PMINTENSET, P15, 1, 15)
1692    DEP_FIELD(PMINTENSET, P14, 1, 14)
1693    DEP_FIELD(PMINTENSET, P13, 1, 13)
1694    DEP_FIELD(PMINTENSET, P12, 1, 12)
1695    DEP_FIELD(PMINTENSET, P11, 1, 11)
1696    DEP_FIELD(PMINTENSET, P10, 1, 10)
1697    DEP_FIELD(PMINTENSET, P9, 1, 9)
1698    DEP_FIELD(PMINTENSET, P8, 1, 8)
1699    DEP_FIELD(PMINTENSET, P7, 1, 7)
1700    DEP_FIELD(PMINTENSET, P6, 1, 6)
1701    DEP_FIELD(PMINTENSET, P5, 1, 5)
1702    DEP_FIELD(PMINTENSET, P4, 1, 4)
1703    DEP_FIELD(PMINTENSET, P3, 1, 3)
1704    DEP_FIELD(PMINTENSET, P2, 1, 2)
1705    DEP_FIELD(PMINTENSET, P1, 1, 1)
1706    DEP_FIELD(PMINTENSET, P0, 1, 0)
1707DEP_REG32(PMINTENCLR, 0x3c60)
1708    DEP_FIELD(PMINTENCLR, P23, 1, 23)
1709    DEP_FIELD(PMINTENCLR, P22, 1, 22)
1710    DEP_FIELD(PMINTENCLR, P21, 1, 21)
1711    DEP_FIELD(PMINTENCLR, P20, 1, 20)
1712    DEP_FIELD(PMINTENCLR, P19, 1, 19)
1713    DEP_FIELD(PMINTENCLR, P18, 1, 18)
1714    DEP_FIELD(PMINTENCLR, P17, 1, 17)
1715    DEP_FIELD(PMINTENCLR, P16, 1, 16)
1716    DEP_FIELD(PMINTENCLR, P15, 1, 15)
1717    DEP_FIELD(PMINTENCLR, P14, 1, 14)
1718    DEP_FIELD(PMINTENCLR, P13, 1, 13)
1719    DEP_FIELD(PMINTENCLR, P12, 1, 12)
1720    DEP_FIELD(PMINTENCLR, P11, 1, 11)
1721    DEP_FIELD(PMINTENCLR, P10, 1, 10)
1722    DEP_FIELD(PMINTENCLR, P9, 1, 9)
1723    DEP_FIELD(PMINTENCLR, P8, 1, 8)
1724    DEP_FIELD(PMINTENCLR, P7, 1, 7)
1725    DEP_FIELD(PMINTENCLR, P6, 1, 6)
1726    DEP_FIELD(PMINTENCLR, P5, 1, 5)
1727    DEP_FIELD(PMINTENCLR, P4, 1, 4)
1728    DEP_FIELD(PMINTENCLR, P3, 1, 3)
1729    DEP_FIELD(PMINTENCLR, P2, 1, 2)
1730    DEP_FIELD(PMINTENCLR, P1, 1, 1)
1731    DEP_FIELD(PMINTENCLR, P0, 1, 0)
1732DEP_REG32(PMOVSCLR, 0x3c80)
1733    DEP_FIELD(PMOVSCLR, P23, 1, 23)
1734    DEP_FIELD(PMOVSCLR, P22, 1, 22)
1735    DEP_FIELD(PMOVSCLR, P21, 1, 21)
1736    DEP_FIELD(PMOVSCLR, P20, 1, 20)
1737    DEP_FIELD(PMOVSCLR, P19, 1, 19)
1738    DEP_FIELD(PMOVSCLR, P18, 1, 18)
1739    DEP_FIELD(PMOVSCLR, P17, 1, 17)
1740    DEP_FIELD(PMOVSCLR, P16, 1, 16)
1741    DEP_FIELD(PMOVSCLR, P15, 1, 15)
1742    DEP_FIELD(PMOVSCLR, P14, 1, 14)
1743    DEP_FIELD(PMOVSCLR, P13, 1, 13)
1744    DEP_FIELD(PMOVSCLR, P12, 1, 12)
1745    DEP_FIELD(PMOVSCLR, P11, 1, 11)
1746    DEP_FIELD(PMOVSCLR, P10, 1, 10)
1747    DEP_FIELD(PMOVSCLR, P9, 1, 9)
1748    DEP_FIELD(PMOVSCLR, P8, 1, 8)
1749    DEP_FIELD(PMOVSCLR, P7, 1, 7)
1750    DEP_FIELD(PMOVSCLR, P6, 1, 6)
1751    DEP_FIELD(PMOVSCLR, P5, 1, 5)
1752    DEP_FIELD(PMOVSCLR, P4, 1, 4)
1753    DEP_FIELD(PMOVSCLR, P3, 1, 3)
1754    DEP_FIELD(PMOVSCLR, P2, 1, 2)
1755    DEP_FIELD(PMOVSCLR, P1, 1, 1)
1756    DEP_FIELD(PMOVSCLR, P0, 1, 0)
1757DEP_REG32(PMOVSSET, 0x3cc0)
1758    DEP_FIELD(PMOVSSET, P23, 1, 23)
1759    DEP_FIELD(PMOVSSET, P22, 1, 22)
1760    DEP_FIELD(PMOVSSET, P21, 1, 21)
1761    DEP_FIELD(PMOVSSET, P20, 1, 20)
1762    DEP_FIELD(PMOVSSET, P19, 1, 19)
1763    DEP_FIELD(PMOVSSET, P18, 1, 18)
1764    DEP_FIELD(PMOVSSET, P17, 1, 17)
1765    DEP_FIELD(PMOVSSET, P16, 1, 16)
1766    DEP_FIELD(PMOVSSET, P15, 1, 15)
1767    DEP_FIELD(PMOVSSET, P14, 1, 14)
1768    DEP_FIELD(PMOVSSET, P13, 1, 13)
1769    DEP_FIELD(PMOVSSET, P12, 1, 12)
1770    DEP_FIELD(PMOVSSET, P11, 1, 11)
1771    DEP_FIELD(PMOVSSET, P10, 1, 10)
1772    DEP_FIELD(PMOVSSET, P9, 1, 9)
1773    DEP_FIELD(PMOVSSET, P8, 1, 8)
1774    DEP_FIELD(PMOVSSET, P7, 1, 7)
1775    DEP_FIELD(PMOVSSET, P6, 1, 6)
1776    DEP_FIELD(PMOVSSET, P5, 1, 5)
1777    DEP_FIELD(PMOVSSET, P4, 1, 4)
1778    DEP_FIELD(PMOVSSET, P3, 1, 3)
1779    DEP_FIELD(PMOVSSET, P2, 1, 2)
1780    DEP_FIELD(PMOVSSET, P1, 1, 1)
1781    DEP_FIELD(PMOVSSET, P0, 1, 0)
1782DEP_REG32(PMCFGR, 0x3e00)
1783    DEP_FIELD(PMCFGR, NCG, 8, 24)
1784    DEP_FIELD(PMCFGR, UEN, 1, 19)
1785    DEP_FIELD(PMCFGR, EX, 1, 16)
1786    DEP_FIELD(PMCFGR, CCD, 1, 15)
1787    DEP_FIELD(PMCFGR, CC, 1, 14)
1788    DEP_FIELD(PMCFGR, SIZE, 6, 8)
1789    DEP_FIELD(PMCFGR, N, 8, 0)
1790DEP_REG32(PMCR, 0x3e04)
1791    DEP_FIELD(PMCR, IMP, 8, 24)
1792    DEP_FIELD(PMCR, X, 1, 4)
1793    DEP_FIELD(PMCR, P, 1, 1)
1794    DEP_FIELD(PMCR, E, 1, 0)
1795DEP_REG32(PMCEID0, 0x3e20)
1796    DEP_FIELD(PMCEID0, EVENT0X12, 1, 17)
1797    DEP_FIELD(PMCEID0, EVENT0X11, 1, 16)
1798    DEP_FIELD(PMCEID0, EVENT0X10, 1, 15)
1799    DEP_FIELD(PMCEID0, EVENT0X0A, 1, 9)
1800    DEP_FIELD(PMCEID0, EVENT0X09, 1, 8)
1801    DEP_FIELD(PMCEID0, EVENT0X08, 1, 7)
1802    DEP_FIELD(PMCEID0, EVENT0X01, 1, 1)
1803    DEP_FIELD(PMCEID0, EVENT0X00, 1, 0)
1804DEP_REG32(PMAUTHSTATUS, 0x3fb8)
1805    DEP_FIELD(PMAUTHSTATUS, SNI, 1, 7)
1806    DEP_FIELD(PMAUTHSTATUS, SNE, 1, 6)
1807    DEP_FIELD(PMAUTHSTATUS, SI, 1, 5)
1808    DEP_FIELD(PMAUTHSTATUS, SE, 1, 4)
1809    DEP_FIELD(PMAUTHSTATUS, NSNI, 1, 3)
1810    DEP_FIELD(PMAUTHSTATUS, NSNE, 1, 2)
1811    DEP_FIELD(PMAUTHSTATUS, NSI, 1, 1)
1812    DEP_FIELD(PMAUTHSTATUS, NSE, 1, 0)
1813DEP_REG32(PMDEVTYPE, 0x3fcc)
1814    DEP_FIELD(PMDEVTYPE, T, 4, 4)
1815    DEP_FIELD(PMDEVTYPE, C, 4, 0)
1816DEP_REG32(SMMU_CB0_SCTLR, 0x10000)
1817    DEP_FIELD(SMMU_CB0_SCTLR, NSCFG, 2, 28)
1818    DEP_FIELD(SMMU_CB0_SCTLR, WACFG, 2, 26)
1819    DEP_FIELD(SMMU_CB0_SCTLR, RACFG, 2, 24)
1820    DEP_FIELD(SMMU_CB0_SCTLR, SHCFG, 2, 22)
1821    DEP_FIELD(SMMU_CB0_SCTLR, FB, 1, 21)
1822    DEP_FIELD(SMMU_CB0_SCTLR, MTCFG, 1, 20)
1823    DEP_FIELD(SMMU_CB0_SCTLR, MEMATTR, 4, 16)
1824    DEP_FIELD(SMMU_CB0_SCTLR, TRANSIENTCFG, 2, 14)
1825    DEP_FIELD(SMMU_CB0_SCTLR, PTW, 1, 13)
1826    DEP_FIELD(SMMU_CB0_SCTLR, ASIDPNE, 1, 12)
1827    DEP_FIELD(SMMU_CB0_SCTLR, UWXN, 1, 10)
1828    DEP_FIELD(SMMU_CB0_SCTLR, WXN, 1, 9)
1829    DEP_FIELD(SMMU_CB0_SCTLR, HUPCF, 1, 8)
1830    DEP_FIELD(SMMU_CB0_SCTLR, CFCFG, 1, 7)
1831    DEP_FIELD(SMMU_CB0_SCTLR, CFIE, 1, 6)
1832    DEP_FIELD(SMMU_CB0_SCTLR, CFRE, 1, 5)
1833    DEP_FIELD(SMMU_CB0_SCTLR, E, 1, 4)
1834    DEP_FIELD(SMMU_CB0_SCTLR, AFFD, 1, 3)
1835    DEP_FIELD(SMMU_CB0_SCTLR, AFE, 1, 2)
1836    DEP_FIELD(SMMU_CB0_SCTLR, TRE, 1, 1)
1837    DEP_FIELD(SMMU_CB0_SCTLR, M, 1, 0)
1838DEP_REG32(SMMU_CB0_ACTLR, 0x10004)
1839    DEP_FIELD(SMMU_CB0_ACTLR, CPRE, 1, 1)
1840    DEP_FIELD(SMMU_CB0_ACTLR, CMTLB, 1, 0)
1841DEP_REG32(SMMU_CB0_RESUME, 0x10008)
1842    DEP_FIELD(SMMU_CB0_RESUME, TNR, 1, 0)
1843DEP_REG32(SMMU_CB0_TCR2, 0x10010)
1844    DEP_FIELD(SMMU_CB0_TCR2, NSCFG1, 1, 30)
1845    DEP_FIELD(SMMU_CB0_TCR2, SEP, 3, 15)
1846    DEP_FIELD(SMMU_CB0_TCR2, NSCFG0, 1, 14)
1847    DEP_FIELD(SMMU_CB0_TCR2, TBI1, 1, 6)
1848    DEP_FIELD(SMMU_CB0_TCR2, TBI0, 1, 5)
1849    DEP_FIELD(SMMU_CB0_TCR2, AS, 1, 4)
1850    DEP_FIELD(SMMU_CB0_TCR2, PASIZE, 3, 0)
1851DEP_REG32(SMMU_CB0_TTBR0_LOW, 0x10020)
1852    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_31_7, 25, 7)
1853    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
1854    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
1855    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
1856    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_2, 1, 2)
1857    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_1_S, 1, 1)
1858    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
1859DEP_REG32(SMMU_CB0_TTBR0_HIGH, 0x10024)
1860    DEP_FIELD(SMMU_CB0_TTBR0_HIGH, ASID, 16, 16)
1861    DEP_FIELD(SMMU_CB0_TTBR0_HIGH, ADDRESS, 16, 0)
1862DEP_REG32(SMMU_CB0_TTBR1_LOW, 0x10028)
1863    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_31_7, 25, 7)
1864    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
1865    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
1866    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
1867    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_2, 1, 2)
1868    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_1_S, 1, 1)
1869    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
1870DEP_REG32(SMMU_CB0_TTBR1_HIGH, 0x1002c)
1871    DEP_FIELD(SMMU_CB0_TTBR1_HIGH, ASID, 16, 16)
1872    DEP_FIELD(SMMU_CB0_TTBR1_HIGH, ADDRESS, 16, 0)
1873DEP_REG32(SMMU_CB0_TCR_LPAE, 0x10030)
1874    DEP_FIELD(SMMU_CB0_TCR_LPAE, EAE, 1, 31)
1875    DEP_FIELD(SMMU_CB0_TCR_LPAE, NSCFG1_TG1, 1, 30)
1876    DEP_FIELD(SMMU_CB0_TCR_LPAE, SH1, 2, 28)
1877    DEP_FIELD(SMMU_CB0_TCR_LPAE, ORGN1, 2, 26)
1878    DEP_FIELD(SMMU_CB0_TCR_LPAE, IRGN1, 2, 24)
1879    DEP_FIELD(SMMU_CB0_TCR_LPAE, EPD1, 1, 23)
1880    DEP_FIELD(SMMU_CB0_TCR_LPAE, A1, 1, 22)
1881    DEP_FIELD(SMMU_CB0_TCR_LPAE, T1SZ_5_3, 3, 19)
1882    DEP_FIELD(SMMU_CB0_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
1883    DEP_FIELD(SMMU_CB0_TCR_LPAE, NSCFG0_TG0, 1, 14)
1884    DEP_FIELD(SMMU_CB0_TCR_LPAE, SH0, 2, 12)
1885    DEP_FIELD(SMMU_CB0_TCR_LPAE, ORGN0, 2, 10)
1886    DEP_FIELD(SMMU_CB0_TCR_LPAE, IRGN0, 2, 8)
1887    DEP_FIELD(SMMU_CB0_TCR_LPAE, SL0_1_EPD0, 1, 7)
1888    DEP_FIELD(SMMU_CB0_TCR_LPAE, SL0_0, 1, 6)
1889    DEP_FIELD(SMMU_CB0_TCR_LPAE, PD1_T0SZ_5, 1, 5)
1890    DEP_FIELD(SMMU_CB0_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
1891    DEP_FIELD(SMMU_CB0_TCR_LPAE, T0SZ_3_0, 4, 0)
1892DEP_REG32(SMMU_CB0_CONTEXTIDR, 0x10034)
1893    DEP_FIELD(SMMU_CB0_CONTEXTIDR, PROCID, 24, 8)
1894    DEP_FIELD(SMMU_CB0_CONTEXTIDR, ASID, 8, 0)
1895DEP_REG32(SMMU_CB0_PRRR_MAIR0, 0x10038)
1896    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS7, 1, 31)
1897    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS6, 1, 30)
1898    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS5, 1, 29)
1899    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS4, 1, 28)
1900    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS3, 1, 27)
1901    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS2, 1, 26)
1902    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS1, 1, 25)
1903    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS0, 1, 24)
1904    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NS1, 1, 19)
1905    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NS0, 1, 18)
1906    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, DS1, 1, 17)
1907    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, DS0, 1, 16)
1908    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR7, 2, 14)
1909    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR6, 2, 12)
1910    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR5, 2, 10)
1911    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR4, 2, 8)
1912    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR3, 2, 6)
1913    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR2, 2, 4)
1914    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR1, 2, 2)
1915    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR0, 2, 0)
1916DEP_REG32(SMMU_CB0_NMRR_MAIR1, 0x1003c)
1917    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR7, 2, 30)
1918    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR6, 2, 28)
1919    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR5, 2, 26)
1920    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR4, 2, 24)
1921    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR3, 2, 22)
1922    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR2, 2, 20)
1923    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR1, 2, 18)
1924    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR0, 2, 16)
1925    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR7, 2, 14)
1926    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR6, 2, 12)
1927    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR5, 2, 10)
1928    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR4, 2, 8)
1929    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR3, 2, 6)
1930    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR2, 2, 4)
1931    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR1, 2, 2)
1932    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR0, 2, 0)
1933DEP_REG32(SMMU_CB0_FSR, 0x10058)
1934    DEP_FIELD(SMMU_CB0_FSR, MULTI, 1, 31)
1935    DEP_FIELD(SMMU_CB0_FSR, SS, 1, 30)
1936    DEP_FIELD(SMMU_CB0_FSR, FORMAT, 2, 9)
1937    DEP_FIELD(SMMU_CB0_FSR, UUT, 1, 8)
1938    DEP_FIELD(SMMU_CB0_FSR, ASF, 1, 7)
1939    DEP_FIELD(SMMU_CB0_FSR, TLBLKF, 1, 6)
1940    DEP_FIELD(SMMU_CB0_FSR, TLBMCF, 1, 5)
1941    DEP_FIELD(SMMU_CB0_FSR, EF, 1, 4)
1942    DEP_FIELD(SMMU_CB0_FSR, PF, 1, 3)
1943    DEP_FIELD(SMMU_CB0_FSR, AFF, 1, 2)
1944    DEP_FIELD(SMMU_CB0_FSR, TF, 1, 1)
1945DEP_REG32(SMMU_CB0_FSRRESTORE, 0x1005c)
1946DEP_REG32(SMMU_CB0_FAR_LOW, 0x10060)
1947DEP_REG32(SMMU_CB0_FAR_HIGH, 0x10064)
1948    DEP_FIELD(SMMU_CB0_FAR_HIGH, BITS, 17, 0)
1949DEP_REG32(SMMU_CB0_FSYNR0, 0x10068)
1950    DEP_FIELD(SMMU_CB0_FSYNR0, S1CBNDX, 4, 16)
1951    DEP_FIELD(SMMU_CB0_FSYNR0, AFR, 1, 11)
1952    DEP_FIELD(SMMU_CB0_FSYNR0, PTWF, 1, 10)
1953    DEP_FIELD(SMMU_CB0_FSYNR0, ATOF, 1, 9)
1954    DEP_FIELD(SMMU_CB0_FSYNR0, NSATTR, 1, 8)
1955    DEP_FIELD(SMMU_CB0_FSYNR0, IND, 1, 6)
1956    DEP_FIELD(SMMU_CB0_FSYNR0, PNU, 1, 5)
1957    DEP_FIELD(SMMU_CB0_FSYNR0, WNR, 1, 4)
1958    DEP_FIELD(SMMU_CB0_FSYNR0, PLVL, 2, 0)
1959DEP_REG32(SMMU_CB0_IPAFAR_LOW, 0x10070)
1960    DEP_FIELD(SMMU_CB0_IPAFAR_LOW, IPAFAR_L, 20, 12)
1961    DEP_FIELD(SMMU_CB0_IPAFAR_LOW, FAR_RO, 12, 0)
1962DEP_REG32(SMMU_CB0_IPAFAR_HIGH, 0x10074)
1963    DEP_FIELD(SMMU_CB0_IPAFAR_HIGH, BITS, 16, 0)
1964DEP_REG32(SMMU_CB0_TLBIVA_LOW, 0x10600)
1965DEP_REG32(SMMU_CB0_TLBIVA_HIGH, 0x10604)
1966    DEP_FIELD(SMMU_CB0_TLBIVA_HIGH, ASID, 16, 16)
1967    DEP_FIELD(SMMU_CB0_TLBIVA_HIGH, ADDRESS, 5, 0)
1968DEP_REG32(SMMU_CB0_TLBIVAA_LOW, 0x10608)
1969DEP_REG32(SMMU_CB0_TLBIVAA_HIGH, 0x1060c)
1970    DEP_FIELD(SMMU_CB0_TLBIVAA_HIGH, ASID, 16, 16)
1971    DEP_FIELD(SMMU_CB0_TLBIVAA_HIGH, ADDRESS, 5, 0)
1972DEP_REG32(SMMU_CB0_TLBIASID, 0x10610)
1973    DEP_FIELD(SMMU_CB0_TLBIASID, ASID, 16, 0)
1974DEP_REG32(SMMU_CB0_TLBIALL, 0x10618)
1975DEP_REG32(SMMU_CB0_TLBIVAL_LOW, 0x10620)
1976DEP_REG32(SMMU_CB0_TLBIVAL_HIGH, 0x10624)
1977    DEP_FIELD(SMMU_CB0_TLBIVAL_HIGH, ASID, 16, 16)
1978    DEP_FIELD(SMMU_CB0_TLBIVAL_HIGH, ADDRESS, 5, 0)
1979DEP_REG32(SMMU_CB0_TLBIVAAL_LOW, 0x10628)
1980DEP_REG32(SMMU_CB0_TLBIVAAL_HIGH, 0x1062c)
1981    DEP_FIELD(SMMU_CB0_TLBIVAAL_HIGH, ASID, 16, 16)
1982    DEP_FIELD(SMMU_CB0_TLBIVAAL_HIGH, ADDRESS, 5, 0)
1983DEP_REG32(SMMU_CB0_TLBIIPAS2_LOW, 0x10630)
1984DEP_REG32(SMMU_CB0_TLBIIPAS2_HIGH, 0x10634)
1985    DEP_FIELD(SMMU_CB0_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
1986DEP_REG32(SMMU_CB0_TLBIIPAS2L_LOW, 0x10638)
1987DEP_REG32(SMMU_CB0_TLBIIPAS2L_HIGH, 0x1063c)
1988    DEP_FIELD(SMMU_CB0_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
1989DEP_REG32(SMMU_CB0_TLBSYNC, 0x107f0)
1990DEP_REG32(SMMU_CB0_TLBSTATUS, 0x107f4)
1991    DEP_FIELD(SMMU_CB0_TLBSTATUS, SACTIVE, 1, 0)
1992DEP_REG32(SMMU_CB0_PMEVCNTR0, 0x10e00)
1993DEP_REG32(SMMU_CB0_PMEVCNTR1, 0x10e04)
1994DEP_REG32(SMMU_CB0_PMEVCNTR2, 0x10e08)
1995DEP_REG32(SMMU_CB0_PMEVCNTR3, 0x10e0c)
1996DEP_REG32(SMMU_CB0_PMEVTYPER0, 0x10e80)
1997    DEP_FIELD(SMMU_CB0_PMEVTYPER0, P, 1, 31)
1998    DEP_FIELD(SMMU_CB0_PMEVTYPER0, U, 1, 30)
1999    DEP_FIELD(SMMU_CB0_PMEVTYPER0, NSP, 1, 29)
2000    DEP_FIELD(SMMU_CB0_PMEVTYPER0, NSU, 1, 28)

2001    DEP_FIELD(SMMU_CB0_PMEVTYPER0, EVENT, 5, 0)
2002DEP_REG32(SMMU_CB0_PMEVTYPER1, 0x10e84)
2003    DEP_FIELD(SMMU_CB0_PMEVTYPER1, P, 1, 31)
2004    DEP_FIELD(SMMU_CB0_PMEVTYPER1, U, 1, 30)
2005    DEP_FIELD(SMMU_CB0_PMEVTYPER1, NSP, 1, 29)
2006    DEP_FIELD(SMMU_CB0_PMEVTYPER1, NSU, 1, 28)
2007    DEP_FIELD(SMMU_CB0_PMEVTYPER1, EVENT, 5, 0)
2008DEP_REG32(SMMU_CB0_PMEVTYPER2, 0x10e88)
2009    DEP_FIELD(SMMU_CB0_PMEVTYPER2, P, 1, 31)
2010    DEP_FIELD(SMMU_CB0_PMEVTYPER2, U, 1, 30)
2011    DEP_FIELD(SMMU_CB0_PMEVTYPER2, NSP, 1, 29)
2012    DEP_FIELD(SMMU_CB0_PMEVTYPER2, NSU, 1, 28)
2013    DEP_FIELD(SMMU_CB0_PMEVTYPER2, EVENT, 5, 0)
2014DEP_REG32(SMMU_CB0_PMEVTYPER3, 0x10e8c)
2015    DEP_FIELD(SMMU_CB0_PMEVTYPER3, P, 1, 31)
2016    DEP_FIELD(SMMU_CB0_PMEVTYPER3, U, 1, 30)
2017    DEP_FIELD(SMMU_CB0_PMEVTYPER3, NSP, 1, 29)
2018    DEP_FIELD(SMMU_CB0_PMEVTYPER3, NSU, 1, 28)
2019    DEP_FIELD(SMMU_CB0_PMEVTYPER3, EVENT, 5, 0)
2020DEP_REG32(SMMU_CB0_PMCFGR, 0x10f00)
2021    DEP_FIELD(SMMU_CB0_PMCFGR, NCG, 8, 24)
2022    DEP_FIELD(SMMU_CB0_PMCFGR, UEN, 1, 19)
2023    DEP_FIELD(SMMU_CB0_PMCFGR, EX, 1, 16)
2024    DEP_FIELD(SMMU_CB0_PMCFGR, CCD, 1, 15)
2025    DEP_FIELD(SMMU_CB0_PMCFGR, CC, 1, 14)
2026    DEP_FIELD(SMMU_CB0_PMCFGR, SIZE, 6, 8)
2027    DEP_FIELD(SMMU_CB0_PMCFGR, N, 8, 0)
2028DEP_REG32(SMMU_CB0_PMCR, 0x10f04)
2029    DEP_FIELD(SMMU_CB0_PMCR, IMP, 8, 24)
2030    DEP_FIELD(SMMU_CB0_PMCR, X, 1, 4)
2031    DEP_FIELD(SMMU_CB0_PMCR, P, 1, 1)
2032    DEP_FIELD(SMMU_CB0_PMCR, E, 1, 0)
2033DEP_REG32(SMMU_CB0_PMCEID, 0x10f20)
2034    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X12, 1, 17)
2035    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X11, 1, 16)
2036    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X10, 1, 15)
2037    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X0A, 1, 9)
2038    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X09, 1, 8)
2039    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X08, 1, 7)
2040    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X01, 1, 1)
2041    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X00, 1, 0)
2042DEP_REG32(SMMU_CB0_PMCNTENSE, 0x10f40)
2043    DEP_FIELD(SMMU_CB0_PMCNTENSE, P3, 1, 3)
2044    DEP_FIELD(SMMU_CB0_PMCNTENSE, P2, 1, 2)
2045    DEP_FIELD(SMMU_CB0_PMCNTENSE, P1, 1, 1)
2046    DEP_FIELD(SMMU_CB0_PMCNTENSE, P0, 1, 0)
2047DEP_REG32(SMMU_CB0_PMCNTENCLR, 0x10f44)
2048    DEP_FIELD(SMMU_CB0_PMCNTENCLR, P3, 1, 3)
2049    DEP_FIELD(SMMU_CB0_PMCNTENCLR, P2, 1, 2)
2050    DEP_FIELD(SMMU_CB0_PMCNTENCLR, P1, 1, 1)
2051    DEP_FIELD(SMMU_CB0_PMCNTENCLR, P0, 1, 0)
2052DEP_REG32(SMMU_CB0_PMCNTENSET, 0x10f48)
2053    DEP_FIELD(SMMU_CB0_PMCNTENSET, P3, 1, 3)
2054    DEP_FIELD(SMMU_CB0_PMCNTENSET, P2, 1, 2)
2055    DEP_FIELD(SMMU_CB0_PMCNTENSET, P1, 1, 1)
2056    DEP_FIELD(SMMU_CB0_PMCNTENSET, P0, 1, 0)
2057DEP_REG32(SMMU_CB0_PMINTENCLR, 0x10f4c)
2058    DEP_FIELD(SMMU_CB0_PMINTENCLR, P3, 1, 3)
2059    DEP_FIELD(SMMU_CB0_PMINTENCLR, P2, 1, 2)
2060    DEP_FIELD(SMMU_CB0_PMINTENCLR, P1, 1, 1)
2061    DEP_FIELD(SMMU_CB0_PMINTENCLR, P0, 1, 0)
2062DEP_REG32(SMMU_CB0_PMOVSCLR, 0x10f50)
2063    DEP_FIELD(SMMU_CB0_PMOVSCLR, P3, 1, 3)
2064    DEP_FIELD(SMMU_CB0_PMOVSCLR, P2, 1, 2)
2065    DEP_FIELD(SMMU_CB0_PMOVSCLR, P1, 1, 1)
2066    DEP_FIELD(SMMU_CB0_PMOVSCLR, P0, 1, 0)
2067DEP_REG32(SMMU_CB0_PMOVSSET, 0x10f58)
2068    DEP_FIELD(SMMU_CB0_PMOVSSET, P3, 1, 3)
2069    DEP_FIELD(SMMU_CB0_PMOVSSET, P2, 1, 2)
2070    DEP_FIELD(SMMU_CB0_PMOVSSET, P1, 1, 1)
2071    DEP_FIELD(SMMU_CB0_PMOVSSET, P0, 1, 0)
2072DEP_REG32(SMMU_CB0_PMAUTHSTATUS, 0x10fb8)
2073    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, SNI, 1, 7)
2074    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, SNE, 1, 6)
2075    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, SI, 1, 5)
2076    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, SE, 1, 4)
2077    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, NSNI, 1, 3)
2078    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, NSNE, 1, 2)
2079    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, NSI, 1, 1)
2080    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, NSE, 1, 0)
2081DEP_REG32(SMMU_CB1_SCTLR, 0x11000)
2082    DEP_FIELD(SMMU_CB1_SCTLR, NSCFG, 2, 28)
2083    DEP_FIELD(SMMU_CB1_SCTLR, WACFG, 2, 26)
2084    DEP_FIELD(SMMU_CB1_SCTLR, RACFG, 2, 24)
2085    DEP_FIELD(SMMU_CB1_SCTLR, SHCFG, 2, 22)
2086    DEP_FIELD(SMMU_CB1_SCTLR, FB, 1, 21)
2087    DEP_FIELD(SMMU_CB1_SCTLR, MTCFG, 1, 20)
2088    DEP_FIELD(SMMU_CB1_SCTLR, MEMATTR, 4, 16)
2089    DEP_FIELD(SMMU_CB1_SCTLR, TRANSIENTCFG, 2, 14)
2090    DEP_FIELD(SMMU_CB1_SCTLR, PTW, 1, 13)
2091    DEP_FIELD(SMMU_CB1_SCTLR, ASIDPNE, 1, 12)
2092    DEP_FIELD(SMMU_CB1_SCTLR, UWXN, 1, 10)
2093    DEP_FIELD(SMMU_CB1_SCTLR, WXN, 1, 9)
2094    DEP_FIELD(SMMU_CB1_SCTLR, HUPCF, 1, 8)
2095    DEP_FIELD(SMMU_CB1_SCTLR, CFCFG, 1, 7)
2096    DEP_FIELD(SMMU_CB1_SCTLR, CFIE, 1, 6)
2097    DEP_FIELD(SMMU_CB1_SCTLR, CFRE, 1, 5)
2098    DEP_FIELD(SMMU_CB1_SCTLR, E, 1, 4)
2099    DEP_FIELD(SMMU_CB1_SCTLR, AFFD, 1, 3)
2100    DEP_FIELD(SMMU_CB1_SCTLR, AFE, 1, 2)
2101    DEP_FIELD(SMMU_CB1_SCTLR, TRE, 1, 1)
2102    DEP_FIELD(SMMU_CB1_SCTLR, M, 1, 0)
2103DEP_REG32(SMMU_CB1_ACTLR, 0x11004)
2104    DEP_FIELD(SMMU_CB1_ACTLR, CPRE, 1, 1)
2105    DEP_FIELD(SMMU_CB1_ACTLR, CMTLB, 1, 0)
2106DEP_REG32(SMMU_CB1_RESUME, 0x11008)
2107    DEP_FIELD(SMMU_CB1_RESUME, TNR, 1, 0)
2108DEP_REG32(SMMU_CB1_TCR2, 0x11010)
2109    DEP_FIELD(SMMU_CB1_TCR2, NSCFG1, 1, 30)
2110    DEP_FIELD(SMMU_CB1_TCR2, SEP, 3, 15)
2111    DEP_FIELD(SMMU_CB1_TCR2, NSCFG0, 1, 14)
2112    DEP_FIELD(SMMU_CB1_TCR2, TBI1, 1, 6)
2113    DEP_FIELD(SMMU_CB1_TCR2, TBI0, 1, 5)
2114    DEP_FIELD(SMMU_CB1_TCR2, AS, 1, 4)
2115    DEP_FIELD(SMMU_CB1_TCR2, PASIZE, 3, 0)
2116DEP_REG32(SMMU_CB1_TTBR0_LOW, 0x11020)
2117    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_31_7, 25, 7)
2118    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
2119    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
2120    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
2121    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_2, 1, 2)
2122    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_1_S, 1, 1)
2123    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
2124DEP_REG32(SMMU_CB1_TTBR0_HIGH, 0x11024)
2125    DEP_FIELD(SMMU_CB1_TTBR0_HIGH, ASID, 16, 16)
2126    DEP_FIELD(SMMU_CB1_TTBR0_HIGH, ADDRESS, 16, 0)
2127DEP_REG32(SMMU_CB1_TTBR1_LOW, 0x11028)
2128    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_31_7, 25, 7)
2129    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
2130    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
2131    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
2132    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_2, 1, 2)
2133    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_1_S, 1, 1)
2134    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
2135DEP_REG32(SMMU_CB1_TTBR1_HIGH, 0x1102c)
2136    DEP_FIELD(SMMU_CB1_TTBR1_HIGH, ASID, 16, 16)
2137    DEP_FIELD(SMMU_CB1_TTBR1_HIGH, ADDRESS, 16, 0)
2138DEP_REG32(SMMU_CB1_TCR_LPAE, 0x11030)
2139    DEP_FIELD(SMMU_CB1_TCR_LPAE, EAE, 1, 31)
2140    DEP_FIELD(SMMU_CB1_TCR_LPAE, NSCFG1_TG1, 1, 30)
2141    DEP_FIELD(SMMU_CB1_TCR_LPAE, SH1, 2, 28)
2142    DEP_FIELD(SMMU_CB1_TCR_LPAE, ORGN1, 2, 26)
2143    DEP_FIELD(SMMU_CB1_TCR_LPAE, IRGN1, 2, 24)
2144    DEP_FIELD(SMMU_CB1_TCR_LPAE, EPD1, 1, 23)
2145    DEP_FIELD(SMMU_CB1_TCR_LPAE, A1, 1, 22)
2146    DEP_FIELD(SMMU_CB1_TCR_LPAE, T1SZ_5_3, 3, 19)
2147    DEP_FIELD(SMMU_CB1_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
2148    DEP_FIELD(SMMU_CB1_TCR_LPAE, NSCFG0_TG0, 1, 14)
2149    DEP_FIELD(SMMU_CB1_TCR_LPAE, SH0, 2, 12)
2150    DEP_FIELD(SMMU_CB1_TCR_LPAE, ORGN0, 2, 10)
2151    DEP_FIELD(SMMU_CB1_TCR_LPAE, IRGN0, 2, 8)
2152    DEP_FIELD(SMMU_CB1_TCR_LPAE, SL0_1_EPD0, 1, 7)
2153    DEP_FIELD(SMMU_CB1_TCR_LPAE, SL0_0, 1, 6)
2154    DEP_FIELD(SMMU_CB1_TCR_LPAE, PD1_T0SZ_5, 1, 5)
2155    DEP_FIELD(SMMU_CB1_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
2156    DEP_FIELD(SMMU_CB1_TCR_LPAE, T0SZ_3_0, 4, 0)
2157DEP_REG32(SMMU_CB1_CONTEXTIDR, 0x11034)
2158    DEP_FIELD(SMMU_CB1_CONTEXTIDR, PROCID, 24, 8)
2159    DEP_FIELD(SMMU_CB1_CONTEXTIDR, ASID, 8, 0)
2160DEP_REG32(SMMU_CB1_PRRR_MAIR0, 0x11038)
2161    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS7, 1, 31)
2162    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS6, 1, 30)
2163    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS5, 1, 29)
2164    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS4, 1, 28)
2165    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS3, 1, 27)
2166    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS2, 1, 26)
2167    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS1, 1, 25)
2168    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS0, 1, 24)
2169    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NS1, 1, 19)
2170    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NS0, 1, 18)
2171    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, DS1, 1, 17)
2172    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, DS0, 1, 16)
2173    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR7, 2, 14)
2174    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR6, 2, 12)
2175    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR5, 2, 10)
2176    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR4, 2, 8)
2177    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR3, 2, 6)
2178    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR2, 2, 4)
2179    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR1, 2, 2)
2180    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR0, 2, 0)
2181DEP_REG32(SMMU_CB1_NMRR_MAIR1, 0x1103c)
2182    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR7, 2, 30)
2183    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR6, 2, 28)
2184    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR5, 2, 26)
2185    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR4, 2, 24)
2186    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR3, 2, 22)
2187    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR2, 2, 20)
2188    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR1, 2, 18)
2189    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR0, 2, 16)
2190    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR7, 2, 14)
2191    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR6, 2, 12)
2192    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR5, 2, 10)
2193    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR4, 2, 8)
2194    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR3, 2, 6)
2195    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR2, 2, 4)
2196    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR1, 2, 2)
2197    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR0, 2, 0)
2198DEP_REG32(SMMU_CB1_FSR, 0x11058)
2199    DEP_FIELD(SMMU_CB1_FSR, MULTI, 1, 31)
2200    DEP_FIELD(SMMU_CB1_FSR, SS, 1, 30)
2201    DEP_FIELD(SMMU_CB1_FSR, FORMAT, 2, 9)
2202    DEP_FIELD(SMMU_CB1_FSR, UUT, 1, 8)
2203    DEP_FIELD(SMMU_CB1_FSR, ASF, 1, 7)
2204    DEP_FIELD(SMMU_CB1_FSR, TLBLKF, 1, 6)
2205    DEP_FIELD(SMMU_CB1_FSR, TLBMCF, 1, 5)
2206    DEP_FIELD(SMMU_CB1_FSR, EF, 1, 4)
2207    DEP_FIELD(SMMU_CB1_FSR, PF, 1, 3)
2208    DEP_FIELD(SMMU_CB1_FSR, AFF, 1, 2)
2209    DEP_FIELD(SMMU_CB1_FSR, TF, 1, 1)
2210DEP_REG32(SMMU_CB1_FSRRESTORE, 0x1105c)
2211DEP_REG32(SMMU_CB1_FAR_LOW, 0x11060)
2212DEP_REG32(SMMU_CB1_FAR_HIGH, 0x11064)
2213    DEP_FIELD(SMMU_CB1_FAR_HIGH, BITS, 17, 0)
2214DEP_REG32(SMMU_CB1_FSYNR0, 0x11068)
2215    DEP_FIELD(SMMU_CB1_FSYNR0, S1CBNDX, 4, 16)
2216    DEP_FIELD(SMMU_CB1_FSYNR0, AFR, 1, 11)
2217    DEP_FIELD(SMMU_CB1_FSYNR0, PTWF, 1, 10)
2218    DEP_FIELD(SMMU_CB1_FSYNR0, ATOF, 1, 9)
2219    DEP_FIELD(SMMU_CB1_FSYNR0, NSATTR, 1, 8)
2220    DEP_FIELD(SMMU_CB1_FSYNR0, IND, 1, 6)
2221    DEP_FIELD(SMMU_CB1_FSYNR0, PNU, 1, 5)
2222    DEP_FIELD(SMMU_CB1_FSYNR0, WNR, 1, 4)
2223    DEP_FIELD(SMMU_CB1_FSYNR0, PLVL, 2, 0)
2224DEP_REG32(SMMU_CB1_IPAFAR_LOW, 0x11070)
2225    DEP_FIELD(SMMU_CB1_IPAFAR_LOW, IPAFAR_L, 20, 12)
2226    DEP_FIELD(SMMU_CB1_IPAFAR_LOW, FAR_RO, 12, 0)
2227DEP_REG32(SMMU_CB1_IPAFAR_HIGH, 0x11074)
2228    DEP_FIELD(SMMU_CB1_IPAFAR_HIGH, BITS, 16, 0)
2229DEP_REG32(SMMU_CB1_TLBIVA_LOW, 0x11600)
2230DEP_REG32(SMMU_CB1_TLBIVA_HIGH, 0x11604)
2231    DEP_FIELD(SMMU_CB1_TLBIVA_HIGH, ASID, 16, 16)
2232    DEP_FIELD(SMMU_CB1_TLBIVA_HIGH, ADDRESS, 5, 0)
2233DEP_REG32(SMMU_CB1_TLBIVAA_LOW, 0x11608)
2234DEP_REG32(SMMU_CB1_TLBIVAA_HIGH, 0x1160c)
2235    DEP_FIELD(SMMU_CB1_TLBIVAA_HIGH, ASID, 16, 16)
2236    DEP_FIELD(SMMU_CB1_TLBIVAA_HIGH, ADDRESS, 5, 0)
2237DEP_REG32(SMMU_CB1_TLBIASID, 0x11610)
2238    DEP_FIELD(SMMU_CB1_TLBIASID, ASID, 16, 0)
2239DEP_REG32(SMMU_CB1_TLBIALL, 0x11618)
2240DEP_REG32(SMMU_CB1_TLBIVAL_LOW, 0x11620)
2241DEP_REG32(SMMU_CB1_TLBIVAL_HIGH, 0x11624)
2242    DEP_FIELD(SMMU_CB1_TLBIVAL_HIGH, ASID, 16, 16)
2243    DEP_FIELD(SMMU_CB1_TLBIVAL_HIGH, ADDRESS, 5, 0)
2244DEP_REG32(SMMU_CB1_TLBIVAAL_LOW, 0x11628)
2245DEP_REG32(SMMU_CB1_TLBIVAAL_HIGH, 0x1162c)
2246    DEP_FIELD(SMMU_CB1_TLBIVAAL_HIGH, ASID, 16, 16)
2247    DEP_FIELD(SMMU_CB1_TLBIVAAL_HIGH, ADDRESS, 5, 0)
2248DEP_REG32(SMMU_CB1_TLBIIPAS2_LOW, 0x11630)
2249DEP_REG32(SMMU_CB1_TLBIIPAS2_HIGH, 0x11634)
2250    DEP_FIELD(SMMU_CB1_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
2251DEP_REG32(SMMU_CB1_TLBIIPAS2L_LOW, 0x11638)
2252DEP_REG32(SMMU_CB1_TLBIIPAS2L_HIGH, 0x1163c)
2253    DEP_FIELD(SMMU_CB1_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
2254DEP_REG32(SMMU_CB1_TLBSYNC, 0x117f0)
2255DEP_REG32(SMMU_CB1_TLBSTATUS, 0x117f4)
2256    DEP_FIELD(SMMU_CB1_TLBSTATUS, SACTIVE, 1, 0)
2257DEP_REG32(SMMU_CB1_PMEVCNTR0, 0x11e00)
2258DEP_REG32(SMMU_CB1_PMEVCNTR1, 0x11e04)
2259DEP_REG32(SMMU_CB1_PMEVCNTR2, 0x11e08)
2260DEP_REG32(SMMU_CB1_PMEVCNTR3, 0x11e0c)
2261DEP_REG32(SMMU_CB1_PMEVTYPER0, 0x11e80)
2262    DEP_FIELD(SMMU_CB1_PMEVTYPER0, P, 1, 31)
2263    DEP_FIELD(SMMU_CB1_PMEVTYPER0, U, 1, 30)
2264    DEP_FIELD(SMMU_CB1_PMEVTYPER0, NSP, 1, 29)
2265    DEP_FIELD(SMMU_CB1_PMEVTYPER0, NSU, 1, 28)
2266    DEP_FIELD(SMMU_CB1_PMEVTYPER0, EVENT, 5, 0)
2267DEP_REG32(SMMU_CB1_PMEVTYPER1, 0x11e84)
2268    DEP_FIELD(SMMU_CB1_PMEVTYPER1, P, 1, 31)
2269    DEP_FIELD(SMMU_CB1_PMEVTYPER1, U, 1, 30)
2270    DEP_FIELD(SMMU_CB1_PMEVTYPER1, NSP, 1, 29)
2271    DEP_FIELD(SMMU_CB1_PMEVTYPER1, NSU, 1, 28)
2272    DEP_FIELD(SMMU_CB1_PMEVTYPER1, EVENT, 5, 0)
2273DEP_REG32(SMMU_CB1_PMEVTYPER2, 0x11e88)
2274    DEP_FIELD(SMMU_CB1_PMEVTYPER2, P, 1, 31)
2275    DEP_FIELD(SMMU_CB1_PMEVTYPER2, U, 1, 30)
2276    DEP_FIELD(SMMU_CB1_PMEVTYPER2, NSP, 1, 29)
2277    DEP_FIELD(SMMU_CB1_PMEVTYPER2, NSU, 1, 28)
2278    DEP_FIELD(SMMU_CB1_PMEVTYPER2, EVENT, 5, 0)
2279DEP_REG32(SMMU_CB1_PMEVTYPER3, 0x11e8c)
2280    DEP_FIELD(SMMU_CB1_PMEVTYPER3, P, 1, 31)
2281    DEP_FIELD(SMMU_CB1_PMEVTYPER3, U, 1, 30)
2282    DEP_FIELD(SMMU_CB1_PMEVTYPER3, NSP, 1, 29)
2283    DEP_FIELD(SMMU_CB1_PMEVTYPER3, NSU, 1, 28)
2284    DEP_FIELD(SMMU_CB1_PMEVTYPER3, EVENT, 5, 0)
2285DEP_REG32(SMMU_CB1_PMCFGR, 0x11f00)
2286    DEP_FIELD(SMMU_CB1_PMCFGR, NCG, 8, 24)
2287    DEP_FIELD(SMMU_CB1_PMCFGR, UEN, 1, 19)
2288    DEP_FIELD(SMMU_CB1_PMCFGR, EX, 1, 16)
2289    DEP_FIELD(SMMU_CB1_PMCFGR, CCD, 1, 15)
2290    DEP_FIELD(SMMU_CB1_PMCFGR, CC, 1, 14)
2291    DEP_FIELD(SMMU_CB1_PMCFGR, SIZE, 6, 8)
2292    DEP_FIELD(SMMU_CB1_PMCFGR, N, 8, 0)
2293DEP_REG32(SMMU_CB1_PMCR, 0x11f04)
2294    DEP_FIELD(SMMU_CB1_PMCR, IMP, 8, 24)
2295    DEP_FIELD(SMMU_CB1_PMCR, X, 1, 4)
2296    DEP_FIELD(SMMU_CB1_PMCR, P, 1, 1)
2297    DEP_FIELD(SMMU_CB1_PMCR, E, 1, 0)
2298DEP_REG32(SMMU_CB1_PMCEID, 0x11f20)
2299    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X12, 1, 17)
2300    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X11, 1, 16)
2301    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X10, 1, 15)
2302    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X0A, 1, 9)
2303    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X09, 1, 8)
2304    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X08, 1, 7)
2305    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X01, 1, 1)
2306    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X00, 1, 0)
2307DEP_REG32(SMMU_CB1_PMCNTENSE, 0x11f40)
2308    DEP_FIELD(SMMU_CB1_PMCNTENSE, P3, 1, 3)
2309    DEP_FIELD(SMMU_CB1_PMCNTENSE, P2, 1, 2)
2310    DEP_FIELD(SMMU_CB1_PMCNTENSE, P1, 1, 1)
2311    DEP_FIELD(SMMU_CB1_PMCNTENSE, P0, 1, 0)
2312DEP_REG32(SMMU_CB1_PMCNTENCLR, 0x11f44)
2313    DEP_FIELD(SMMU_CB1_PMCNTENCLR, P3, 1, 3)
2314    DEP_FIELD(SMMU_CB1_PMCNTENCLR, P2, 1, 2)
2315    DEP_FIELD(SMMU_CB1_PMCNTENCLR, P1, 1, 1)
2316    DEP_FIELD(SMMU_CB1_PMCNTENCLR, P0, 1, 0)
2317DEP_REG32(SMMU_CB1_PMCNTENSET, 0x11f48)
2318    DEP_FIELD(SMMU_CB1_PMCNTENSET, P3, 1, 3)
2319    DEP_FIELD(SMMU_CB1_PMCNTENSET, P2, 1, 2)
2320    DEP_FIELD(SMMU_CB1_PMCNTENSET, P1, 1, 1)
2321    DEP_FIELD(SMMU_CB1_PMCNTENSET, P0, 1, 0)
2322DEP_REG32(SMMU_CB1_PMINTENCLR, 0x11f4c)
2323    DEP_FIELD(SMMU_CB1_PMINTENCLR, P3, 1, 3)
2324    DEP_FIELD(SMMU_CB1_PMINTENCLR, P2, 1, 2)
2325    DEP_FIELD(SMMU_CB1_PMINTENCLR, P1, 1, 1)
2326    DEP_FIELD(SMMU_CB1_PMINTENCLR, P0, 1, 0)
2327DEP_REG32(SMMU_CB1_PMOVSCLR, 0x11f50)
2328    DEP_FIELD(SMMU_CB1_PMOVSCLR, P3, 1, 3)
2329    DEP_FIELD(SMMU_CB1_PMOVSCLR, P2, 1, 2)
2330    DEP_FIELD(SMMU_CB1_PMOVSCLR, P1, 1, 1)
2331    DEP_FIELD(SMMU_CB1_PMOVSCLR, P0, 1, 0)
2332DEP_REG32(SMMU_CB1_PMOVSSET, 0x11f58)
2333    DEP_FIELD(SMMU_CB1_PMOVSSET, P3, 1, 3)
2334    DEP_FIELD(SMMU_CB1_PMOVSSET, P2, 1, 2)
2335    DEP_FIELD(SMMU_CB1_PMOVSSET, P1, 1, 1)
2336    DEP_FIELD(SMMU_CB1_PMOVSSET, P0, 1, 0)
2337DEP_REG32(SMMU_CB1_PMAUTHSTATUS, 0x11fb8)
2338    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, SNI, 1, 7)
2339    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, SNE, 1, 6)
2340    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, SI, 1, 5)
2341    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, SE, 1, 4)
2342    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, NSNI, 1, 3)
2343    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, NSNE, 1, 2)
2344    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, NSI, 1, 1)
2345    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, NSE, 1, 0)
2346DEP_REG32(SMMU_CB2_SCTLR, 0x12000)
2347    DEP_FIELD(SMMU_CB2_SCTLR, NSCFG, 2, 28)
2348    DEP_FIELD(SMMU_CB2_SCTLR, WACFG, 2, 26)
2349    DEP_FIELD(SMMU_CB2_SCTLR, RACFG, 2, 24)
2350    DEP_FIELD(SMMU_CB2_SCTLR, SHCFG, 2, 22)
2351    DEP_FIELD(SMMU_CB2_SCTLR, FB, 1, 21)
2352    DEP_FIELD(SMMU_CB2_SCTLR, MTCFG, 1, 20)
2353    DEP_FIELD(SMMU_CB2_SCTLR, MEMATTR, 4, 16)
2354    DEP_FIELD(SMMU_CB2_SCTLR, TRANSIENTCFG, 2, 14)
2355    DEP_FIELD(SMMU_CB2_SCTLR, PTW, 1, 13)
2356    DEP_FIELD(SMMU_CB2_SCTLR, ASIDPNE, 1, 12)
2357    DEP_FIELD(SMMU_CB2_SCTLR, UWXN, 1, 10)
2358    DEP_FIELD(SMMU_CB2_SCTLR, WXN, 1, 9)
2359    DEP_FIELD(SMMU_CB2_SCTLR, HUPCF, 1, 8)
2360    DEP_FIELD(SMMU_CB2_SCTLR, CFCFG, 1, 7)
2361    DEP_FIELD(SMMU_CB2_SCTLR, CFIE, 1, 6)
2362    DEP_FIELD(SMMU_CB2_SCTLR, CFRE, 1, 5)
2363    DEP_FIELD(SMMU_CB2_SCTLR, E, 1, 4)
2364    DEP_FIELD(SMMU_CB2_SCTLR, AFFD, 1, 3)
2365    DEP_FIELD(SMMU_CB2_SCTLR, AFE, 1, 2)
2366    DEP_FIELD(SMMU_CB2_SCTLR, TRE, 1, 1)
2367    DEP_FIELD(SMMU_CB2_SCTLR, M, 1, 0)
2368DEP_REG32(SMMU_CB2_ACTLR, 0x12004)
2369    DEP_FIELD(SMMU_CB2_ACTLR, CPRE, 1, 1)
2370    DEP_FIELD(SMMU_CB2_ACTLR, CMTLB, 1, 0)
2371DEP_REG32(SMMU_CB2_RESUME, 0x12008)
2372    DEP_FIELD(SMMU_CB2_RESUME, TNR, 1, 0)
2373DEP_REG32(SMMU_CB2_TCR2, 0x12010)
2374    DEP_FIELD(SMMU_CB2_TCR2, NSCFG1, 1, 30)
2375    DEP_FIELD(SMMU_CB2_TCR2, SEP, 3, 15)
2376    DEP_FIELD(SMMU_CB2_TCR2, NSCFG0, 1, 14)
2377    DEP_FIELD(SMMU_CB2_TCR2, TBI1, 1, 6)
2378    DEP_FIELD(SMMU_CB2_TCR2, TBI0, 1, 5)
2379    DEP_FIELD(SMMU_CB2_TCR2, AS, 1, 4)
2380    DEP_FIELD(SMMU_CB2_TCR2, PASIZE, 3, 0)
2381DEP_REG32(SMMU_CB2_TTBR0_LOW, 0x12020)
2382    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_31_7, 25, 7)
2383    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
2384    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
2385    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
2386    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_2, 1, 2)
2387    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_1_S, 1, 1)
2388    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
2389DEP_REG32(SMMU_CB2_TTBR0_HIGH, 0x12024)
2390    DEP_FIELD(SMMU_CB2_TTBR0_HIGH, ASID, 16, 16)
2391    DEP_FIELD(SMMU_CB2_TTBR0_HIGH, ADDRESS, 16, 0)
2392DEP_REG32(SMMU_CB2_TTBR1_LOW, 0x12028)
2393    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_31_7, 25, 7)
2394    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
2395    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
2396    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
2397    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_2, 1, 2)
2398    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_1_S, 1, 1)
2399    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
2400DEP_REG32(SMMU_CB2_TTBR1_HIGH, 0x1202c)
2401    DEP_FIELD(SMMU_CB2_TTBR1_HIGH, ASID, 16, 16)
2402    DEP_FIELD(SMMU_CB2_TTBR1_HIGH, ADDRESS, 16, 0)
2403DEP_REG32(SMMU_CB2_TCR_LPAE, 0x12030)
2404    DEP_FIELD(SMMU_CB2_TCR_LPAE, EAE, 1, 31)
2405    DEP_FIELD(SMMU_CB2_TCR_LPAE, NSCFG1_TG1, 1, 30)
2406    DEP_FIELD(SMMU_CB2_TCR_LPAE, SH1, 2, 28)
2407    DEP_FIELD(SMMU_CB2_TCR_LPAE, ORGN1, 2, 26)
2408    DEP_FIELD(SMMU_CB2_TCR_LPAE, IRGN1, 2, 24)
2409    DEP_FIELD(SMMU_CB2_TCR_LPAE, EPD1, 1, 23)
2410    DEP_FIELD(SMMU_CB2_TCR_LPAE, A1, 1, 22)
2411    DEP_FIELD(SMMU_CB2_TCR_LPAE, T1SZ_5_3, 3, 19)
2412    DEP_FIELD(SMMU_CB2_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
2413    DEP_FIELD(SMMU_CB2_TCR_LPAE, NSCFG0_TG0, 1, 14)
2414    DEP_FIELD(SMMU_CB2_TCR_LPAE, SH0, 2, 12)
2415    DEP_FIELD(SMMU_CB2_TCR_LPAE, ORGN0, 2, 10)
2416    DEP_FIELD(SMMU_CB2_TCR_LPAE, IRGN0, 2, 8)
2417    DEP_FIELD(SMMU_CB2_TCR_LPAE, SL0_1_EPD0, 1, 7)
2418    DEP_FIELD(SMMU_CB2_TCR_LPAE, SL0_0, 1, 6)
2419    DEP_FIELD(SMMU_CB2_TCR_LPAE, PD1_T0SZ_5, 1, 5)
2420    DEP_FIELD(SMMU_CB2_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
2421    DEP_FIELD(SMMU_CB2_TCR_LPAE, T0SZ_3_0, 4, 0)
2422DEP_REG32(SMMU_CB2_CONTEXTIDR, 0x12034)
2423    DEP_FIELD(SMMU_CB2_CONTEXTIDR, PROCID, 24, 8)
2424    DEP_FIELD(SMMU_CB2_CONTEXTIDR, ASID, 8, 0)
2425DEP_REG32(SMMU_CB2_PRRR_MAIR0, 0x12038)
2426    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS7, 1, 31)
2427    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS6, 1, 30)
2428    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS5, 1, 29)
2429    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS4, 1, 28)
2430    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS3, 1, 27)
2431    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS2, 1, 26)
2432    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS1, 1, 25)
2433    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS0, 1, 24)
2434    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NS1, 1, 19)
2435    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NS0, 1, 18)
2436    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, DS1, 1, 17)
2437    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, DS0, 1, 16)
2438    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR7, 2, 14)
2439    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR6, 2, 12)
2440    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR5, 2, 10)
2441    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR4, 2, 8)
2442    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR3, 2, 6)
2443    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR2, 2, 4)
2444    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR1, 2, 2)
2445    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR0, 2, 0)
2446DEP_REG32(SMMU_CB2_NMRR_MAIR1, 0x1203c)
2447    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR7, 2, 30)
2448    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR6, 2, 28)
2449    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR5, 2, 26)
2450    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR4, 2, 24)
2451    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR3, 2, 22)
2452    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR2, 2, 20)
2453    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR1, 2, 18)
2454    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR0, 2, 16)
2455    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR7, 2, 14)
2456    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR6, 2, 12)
2457    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR5, 2, 10)
2458    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR4, 2, 8)
2459    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR3, 2, 6)
2460    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR2, 2, 4)
2461    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR1, 2, 2)
2462    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR0, 2, 0)
2463DEP_REG32(SMMU_CB2_FSR, 0x12058)
2464    DEP_FIELD(SMMU_CB2_FSR, MULTI, 1, 31)
2465    DEP_FIELD(SMMU_CB2_FSR, SS, 1, 30)
2466    DEP_FIELD(SMMU_CB2_FSR, FORMAT, 2, 9)
2467    DEP_FIELD(SMMU_CB2_FSR, UUT, 1, 8)
2468    DEP_FIELD(SMMU_CB2_FSR, ASF, 1, 7)
2469    DEP_FIELD(SMMU_CB2_FSR, TLBLKF, 1, 6)
2470    DEP_FIELD(SMMU_CB2_FSR, TLBMCF, 1, 5)
2471    DEP_FIELD(SMMU_CB2_FSR, EF, 1, 4)
2472    DEP_FIELD(SMMU_CB2_FSR, PF, 1, 3)
2473    DEP_FIELD(SMMU_CB2_FSR, AFF, 1, 2)
2474    DEP_FIELD(SMMU_CB2_FSR, TF, 1, 1)
2475DEP_REG32(SMMU_CB2_FSRRESTORE, 0x1205c)
2476DEP_REG32(SMMU_CB2_FAR_LOW, 0x12060)
2477DEP_REG32(SMMU_CB2_FAR_HIGH, 0x12064)
2478    DEP_FIELD(SMMU_CB2_FAR_HIGH, BITS, 17, 0)
2479DEP_REG32(SMMU_CB2_FSYNR0, 0x12068)
2480    DEP_FIELD(SMMU_CB2_FSYNR0, S1CBNDX, 4, 16)
2481    DEP_FIELD(SMMU_CB2_FSYNR0, AFR, 1, 11)
2482    DEP_FIELD(SMMU_CB2_FSYNR0, PTWF, 1, 10)
2483    DEP_FIELD(SMMU_CB2_FSYNR0, ATOF, 1, 9)
2484    DEP_FIELD(SMMU_CB2_FSYNR0, NSATTR, 1, 8)
2485    DEP_FIELD(SMMU_CB2_FSYNR0, IND, 1, 6)
2486    DEP_FIELD(SMMU_CB2_FSYNR0, PNU, 1, 5)
2487    DEP_FIELD(SMMU_CB2_FSYNR0, WNR, 1, 4)
2488    DEP_FIELD(SMMU_CB2_FSYNR0, PLVL, 2, 0)
2489DEP_REG32(SMMU_CB2_IPAFAR_LOW, 0x12070)
2490    DEP_FIELD(SMMU_CB2_IPAFAR_LOW, IPAFAR_L, 20, 12)
2491    DEP_FIELD(SMMU_CB2_IPAFAR_LOW, FAR_RO, 12, 0)
2492DEP_REG32(SMMU_CB2_IPAFAR_HIGH, 0x12074)
2493    DEP_FIELD(SMMU_CB2_IPAFAR_HIGH, BITS, 16, 0)
2494DEP_REG32(SMMU_CB2_TLBIVA_LOW, 0x12600)
2495DEP_REG32(SMMU_CB2_TLBIVA_HIGH, 0x12604)
2496    DEP_FIELD(SMMU_CB2_TLBIVA_HIGH, ASID, 16, 16)
2497    DEP_FIELD(SMMU_CB2_TLBIVA_HIGH, ADDRESS, 5, 0)
2498DEP_REG32(SMMU_CB2_TLBIVAA_LOW, 0x12608)
2499DEP_REG32(SMMU_CB2_TLBIVAA_HIGH, 0x1260c)
2500    DEP_FIELD(SMMU_CB2_TLBIVAA_HIGH, ASID, 16, 16)
2501    DEP_FIELD(SMMU_CB2_TLBIVAA_HIGH, ADDRESS, 5, 0)
2502DEP_REG32(SMMU_CB2_TLBIASID, 0x12610)
2503    DEP_FIELD(SMMU_CB2_TLBIASID, ASID, 16, 0)
2504DEP_REG32(SMMU_CB2_TLBIALL, 0x12618)
2505DEP_REG32(SMMU_CB2_TLBIVAL_LOW, 0x12620)
2506DEP_REG32(SMMU_CB2_TLBIVAL_HIGH, 0x12624)
2507    DEP_FIELD(SMMU_CB2_TLBIVAL_HIGH, ASID, 16, 16)
2508    DEP_FIELD(SMMU_CB2_TLBIVAL_HIGH, ADDRESS, 5, 0)
2509DEP_REG32(SMMU_CB2_TLBIVAAL_LOW, 0x12628)
2510DEP_REG32(SMMU_CB2_TLBIVAAL_HIGH, 0x1262c)
2511    DEP_FIELD(SMMU_CB2_TLBIVAAL_HIGH, ASID, 16, 16)
2512    DEP_FIELD(SMMU_CB2_TLBIVAAL_HIGH, ADDRESS, 5, 0)
2513DEP_REG32(SMMU_CB2_TLBIIPAS2_LOW, 0x12630)
2514DEP_REG32(SMMU_CB2_TLBIIPAS2_HIGH, 0x12634)
2515    DEP_FIELD(SMMU_CB2_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
2516DEP_REG32(SMMU_CB2_TLBIIPAS2L_LOW, 0x12638)
2517DEP_REG32(SMMU_CB2_TLBIIPAS2L_HIGH, 0x1263c)
2518    DEP_FIELD(SMMU_CB2_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
2519DEP_REG32(SMMU_CB2_TLBSYNC, 0x127f0)
2520DEP_REG32(SMMU_CB2_TLBSTATUS, 0x127f4)
2521    DEP_FIELD(SMMU_CB2_TLBSTATUS, SACTIVE, 1, 0)
2522DEP_REG32(SMMU_CB2_PMEVCNTR0, 0x12e00)
2523DEP_REG32(SMMU_CB2_PMEVCNTR1, 0x12e04)
2524DEP_REG32(SMMU_CB2_PMEVCNTR2, 0x12e08)
2525DEP_REG32(SMMU_CB2_PMEVCNTR3, 0x12e0c)
2526DEP_REG32(SMMU_CB2_PMEVTYPER0, 0x12e80)
2527    DEP_FIELD(SMMU_CB2_PMEVTYPER0, P, 1, 31)
2528    DEP_FIELD(SMMU_CB2_PMEVTYPER0, U, 1, 30)
2529    DEP_FIELD(SMMU_CB2_PMEVTYPER0, NSP, 1, 29)
2530    DEP_FIELD(SMMU_CB2_PMEVTYPER0, NSU, 1, 28)
2531    DEP_FIELD(SMMU_CB2_PMEVTYPER0, EVENT, 5, 0)
2532DEP_REG32(SMMU_CB2_PMEVTYPER1, 0x12e84)
2533    DEP_FIELD(SMMU_CB2_PMEVTYPER1, P, 1, 31)
2534    DEP_FIELD(SMMU_CB2_PMEVTYPER1, U, 1, 30)
2535    DEP_FIELD(SMMU_CB2_PMEVTYPER1, NSP, 1, 29)
2536    DEP_FIELD(SMMU_CB2_PMEVTYPER1, NSU, 1, 28)
2537    DEP_FIELD(SMMU_CB2_PMEVTYPER1, EVENT, 5, 0)
2538DEP_REG32(SMMU_CB2_PMEVTYPER2, 0x12e88)
2539    DEP_FIELD(SMMU_CB2_PMEVTYPER2, P, 1, 31)
2540    DEP_FIELD(SMMU_CB2_PMEVTYPER2, U, 1, 30)
2541    DEP_FIELD(SMMU_CB2_PMEVTYPER2, NSP, 1, 29)
2542    DEP_FIELD(SMMU_CB2_PMEVTYPER2, NSU, 1, 28)
2543    DEP_FIELD(SMMU_CB2_PMEVTYPER2, EVENT, 5, 0)
2544DEP_REG32(SMMU_CB2_PMEVTYPER3, 0x12e8c)
2545    DEP_FIELD(SMMU_CB2_PMEVTYPER3, P, 1, 31)
2546    DEP_FIELD(SMMU_CB2_PMEVTYPER3, U, 1, 30)
2547    DEP_FIELD(SMMU_CB2_PMEVTYPER3, NSP, 1, 29)
2548    DEP_FIELD(SMMU_CB2_PMEVTYPER3, NSU, 1, 28)
2549    DEP_FIELD(SMMU_CB2_PMEVTYPER3, EVENT, 5, 0)
2550DEP_REG32(SMMU_CB2_PMCFGR, 0x12f00)
2551    DEP_FIELD(SMMU_CB2_PMCFGR, NCG, 8, 24)
2552    DEP_FIELD(SMMU_CB2_PMCFGR, UEN, 1, 19)
2553    DEP_FIELD(SMMU_CB2_PMCFGR, EX, 1, 16)
2554    DEP_FIELD(SMMU_CB2_PMCFGR, CCD, 1, 15)
2555    DEP_FIELD(SMMU_CB2_PMCFGR, CC, 1, 14)
2556    DEP_FIELD(SMMU_CB2_PMCFGR, SIZE, 6, 8)
2557    DEP_FIELD(SMMU_CB2_PMCFGR, N, 8, 0)
2558DEP_REG32(SMMU_CB2_PMCR, 0x12f04)
2559    DEP_FIELD(SMMU_CB2_PMCR, IMP, 8, 24)
2560    DEP_FIELD(SMMU_CB2_PMCR, X, 1, 4)
2561    DEP_FIELD(SMMU_CB2_PMCR, P, 1, 1)
2562    DEP_FIELD(SMMU_CB2_PMCR, E, 1, 0)
2563DEP_REG32(SMMU_CB2_PMCEID, 0x12f20)
2564    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X12, 1, 17)
2565    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X11, 1, 16)
2566    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X10, 1, 15)
2567    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X0A, 1, 9)
2568    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X09, 1, 8)
2569    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X08, 1, 7)
2570    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X01, 1, 1)
2571    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X00, 1, 0)
2572DEP_REG32(SMMU_CB2_PMCNTENSE, 0x12f40)
2573    DEP_FIELD(SMMU_CB2_PMCNTENSE, P3, 1, 3)
2574    DEP_FIELD(SMMU_CB2_PMCNTENSE, P2, 1, 2)
2575    DEP_FIELD(SMMU_CB2_PMCNTENSE, P1, 1, 1)
2576    DEP_FIELD(SMMU_CB2_PMCNTENSE, P0, 1, 0)
2577DEP_REG32(SMMU_CB2_PMCNTENCLR, 0x12f44)
2578    DEP_FIELD(SMMU_CB2_PMCNTENCLR, P3, 1, 3)
2579    DEP_FIELD(SMMU_CB2_PMCNTENCLR, P2, 1, 2)
2580    DEP_FIELD(SMMU_CB2_PMCNTENCLR, P1, 1, 1)
2581    DEP_FIELD(SMMU_CB2_PMCNTENCLR, P0, 1, 0)
2582DEP_REG32(SMMU_CB2_PMCNTENSET, 0x12f48)
2583    DEP_FIELD(SMMU_CB2_PMCNTENSET, P3, 1, 3)
2584    DEP_FIELD(SMMU_CB2_PMCNTENSET, P2, 1, 2)
2585    DEP_FIELD(SMMU_CB2_PMCNTENSET, P1, 1, 1)
2586    DEP_FIELD(SMMU_CB2_PMCNTENSET, P0, 1, 0)
2587DEP_REG32(SMMU_CB2_PMINTENCLR, 0x12f4c)
2588    DEP_FIELD(SMMU_CB2_PMINTENCLR, P3, 1, 3)
2589    DEP_FIELD(SMMU_CB2_PMINTENCLR, P2, 1, 2)
2590    DEP_FIELD(SMMU_CB2_PMINTENCLR, P1, 1, 1)
2591    DEP_FIELD(SMMU_CB2_PMINTENCLR, P0, 1, 0)
2592DEP_REG32(SMMU_CB2_PMOVSCLR, 0x12f50)
2593    DEP_FIELD(SMMU_CB2_PMOVSCLR, P3, 1, 3)
2594    DEP_FIELD(SMMU_CB2_PMOVSCLR, P2, 1, 2)
2595    DEP_FIELD(SMMU_CB2_PMOVSCLR, P1, 1, 1)
2596    DEP_FIELD(SMMU_CB2_PMOVSCLR, P0, 1, 0)
2597DEP_REG32(SMMU_CB2_PMOVSSET, 0x12f58)
2598    DEP_FIELD(SMMU_CB2_PMOVSSET, P3, 1, 3)
2599    DEP_FIELD(SMMU_CB2_PMOVSSET, P2, 1, 2)
2600    DEP_FIELD(SMMU_CB2_PMOVSSET, P1, 1, 1)
2601    DEP_FIELD(SMMU_CB2_PMOVSSET, P0, 1, 0)
2602DEP_REG32(SMMU_CB2_PMAUTHSTATUS, 0x12fb8)
2603    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, SNI, 1, 7)
2604    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, SNE, 1, 6)
2605    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, SI, 1, 5)
2606    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, SE, 1, 4)
2607    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, NSNI, 1, 3)
2608    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, NSNE, 1, 2)
2609    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, NSI, 1, 1)
2610    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, NSE, 1, 0)
2611DEP_REG32(SMMU_CB3_SCTLR, 0x13000)
2612    DEP_FIELD(SMMU_CB3_SCTLR, NSCFG, 2, 28)
2613    DEP_FIELD(SMMU_CB3_SCTLR, WACFG, 2, 26)
2614    DEP_FIELD(SMMU_CB3_SCTLR, RACFG, 2, 24)
2615    DEP_FIELD(SMMU_CB3_SCTLR, SHCFG, 2, 22)
2616    DEP_FIELD(SMMU_CB3_SCTLR, FB, 1, 21)
2617    DEP_FIELD(SMMU_CB3_SCTLR, MTCFG, 1, 20)
2618    DEP_FIELD(SMMU_CB3_SCTLR, MEMATTR, 4, 16)
2619    DEP_FIELD(SMMU_CB3_SCTLR, TRANSIENTCFG, 2, 14)
2620    DEP_FIELD(SMMU_CB3_SCTLR, PTW, 1, 13)
2621    DEP_FIELD(SMMU_CB3_SCTLR, ASIDPNE, 1, 12)
2622    DEP_FIELD(SMMU_CB3_SCTLR, UWXN, 1, 10)
2623    DEP_FIELD(SMMU_CB3_SCTLR, WXN, 1, 9)
2624    DEP_FIELD(SMMU_CB3_SCTLR, HUPCF, 1, 8)
2625    DEP_FIELD(SMMU_CB3_SCTLR, CFCFG, 1, 7)
2626    DEP_FIELD(SMMU_CB3_SCTLR, CFIE, 1, 6)
2627    DEP_FIELD(SMMU_CB3_SCTLR, CFRE, 1, 5)
2628    DEP_FIELD(SMMU_CB3_SCTLR, E, 1, 4)
2629    DEP_FIELD(SMMU_CB3_SCTLR, AFFD, 1, 3)
2630    DEP_FIELD(SMMU_CB3_SCTLR, AFE, 1, 2)
2631    DEP_FIELD(SMMU_CB3_SCTLR, TRE, 1, 1)
2632    DEP_FIELD(SMMU_CB3_SCTLR, M, 1, 0)
2633DEP_REG32(SMMU_CB3_ACTLR, 0x13004)
2634    DEP_FIELD(SMMU_CB3_ACTLR, CPRE, 1, 1)
2635    DEP_FIELD(SMMU_CB3_ACTLR, CMTLB, 1, 0)
2636DEP_REG32(SMMU_CB3_RESUME, 0x13008)
2637    DEP_FIELD(SMMU_CB3_RESUME, TNR, 1, 0)
2638DEP_REG32(SMMU_CB3_TCR2, 0x13010)
2639    DEP_FIELD(SMMU_CB3_TCR2, NSCFG1, 1, 30)
2640    DEP_FIELD(SMMU_CB3_TCR2, SEP, 3, 15)
2641    DEP_FIELD(SMMU_CB3_TCR2, NSCFG0, 1, 14)
2642    DEP_FIELD(SMMU_CB3_TCR2, TBI1, 1, 6)
2643    DEP_FIELD(SMMU_CB3_TCR2, TBI0, 1, 5)
2644    DEP_FIELD(SMMU_CB3_TCR2, AS, 1, 4)
2645    DEP_FIELD(SMMU_CB3_TCR2, PASIZE, 3, 0)
2646DEP_REG32(SMMU_CB3_TTBR0_LOW, 0x13020)
2647    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_31_7, 25, 7)
2648    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
2649    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
2650    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
2651    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_2, 1, 2)
2652    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_1_S, 1, 1)
2653    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
2654DEP_REG32(SMMU_CB3_TTBR0_HIGH, 0x13024)
2655    DEP_FIELD(SMMU_CB3_TTBR0_HIGH, ASID, 16, 16)
2656    DEP_FIELD(SMMU_CB3_TTBR0_HIGH, ADDRESS, 16, 0)
2657DEP_REG32(SMMU_CB3_TTBR1_LOW, 0x13028)
2658    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_31_7, 25, 7)
2659    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
2660    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
2661    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
2662    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_2, 1, 2)
2663    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_1_S, 1, 1)
2664    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
2665DEP_REG32(SMMU_CB3_TTBR1_HIGH, 0x1302c)
2666    DEP_FIELD(SMMU_CB3_TTBR1_HIGH, ASID, 16, 16)
2667    DEP_FIELD(SMMU_CB3_TTBR1_HIGH, ADDRESS, 16, 0)
2668DEP_REG32(SMMU_CB3_TCR_LPAE, 0x13030)
2669    DEP_FIELD(SMMU_CB3_TCR_LPAE, EAE, 1, 31)
2670    DEP_FIELD(SMMU_CB3_TCR_LPAE, NSCFG1_TG1, 1, 30)
2671    DEP_FIELD(SMMU_CB3_TCR_LPAE, SH1, 2, 28)
2672    DEP_FIELD(SMMU_CB3_TCR_LPAE, ORGN1, 2, 26)
2673    DEP_FIELD(SMMU_CB3_TCR_LPAE, IRGN1, 2, 24)
2674    DEP_FIELD(SMMU_CB3_TCR_LPAE, EPD1, 1, 23)
2675    DEP_FIELD(SMMU_CB3_TCR_LPAE, A1, 1, 22)
2676    DEP_FIELD(SMMU_CB3_TCR_LPAE, T1SZ_5_3, 3, 19)
2677    DEP_FIELD(SMMU_CB3_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
2678    DEP_FIELD(SMMU_CB3_TCR_LPAE, NSCFG0_TG0, 1, 14)
2679    DEP_FIELD(SMMU_CB3_TCR_LPAE, SH0, 2, 12)
2680    DEP_FIELD(SMMU_CB3_TCR_LPAE, ORGN0, 2, 10)
2681    DEP_FIELD(SMMU_CB3_TCR_LPAE, IRGN0, 2, 8)
2682    DEP_FIELD(SMMU_CB3_TCR_LPAE, SL0_1_EPD0, 1, 7)
2683    DEP_FIELD(SMMU_CB3_TCR_LPAE, SL0_0, 1, 6)
2684    DEP_FIELD(SMMU_CB3_TCR_LPAE, PD1_T0SZ_5, 1, 5)
2685    DEP_FIELD(SMMU_CB3_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
2686    DEP_FIELD(SMMU_CB3_TCR_LPAE, T0SZ_3_0, 4, 0)
2687DEP_REG32(SMMU_CB3_CONTEXTIDR, 0x13034)
2688    DEP_FIELD(SMMU_CB3_CONTEXTIDR, PROCID, 24, 8)
2689    DEP_FIELD(SMMU_CB3_CONTEXTIDR, ASID, 8, 0)
2690DEP_REG32(SMMU_CB3_PRRR_MAIR0, 0x13038)
2691    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS7, 1, 31)
2692    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS6, 1, 30)
2693    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS5, 1, 29)
2694    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS4, 1, 28)
2695    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS3, 1, 27)
2696    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS2, 1, 26)
2697    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS1, 1, 25)
2698    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS0, 1, 24)
2699    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NS1, 1, 19)
2700    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NS0, 1, 18)
2701    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, DS1, 1, 17)
2702    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, DS0, 1, 16)
2703    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR7, 2, 14)
2704    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR6, 2, 12)
2705    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR5, 2, 10)
2706    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR4, 2, 8)
2707    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR3, 2, 6)
2708    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR2, 2, 4)
2709    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR1, 2, 2)
2710    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR0, 2, 0)
2711DEP_REG32(SMMU_CB3_NMRR_MAIR1, 0x1303c)
2712    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR7, 2, 30)
2713    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR6, 2, 28)
2714    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR5, 2, 26)
2715    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR4, 2, 24)
2716    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR3, 2, 22)
2717    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR2, 2, 20)
2718    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR1, 2, 18)
2719    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR0, 2, 16)
2720    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR7, 2, 14)
2721    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR6, 2, 12)
2722    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR5, 2, 10)
2723    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR4, 2, 8)
2724    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR3, 2, 6)
2725    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR2, 2, 4)
2726    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR1, 2, 2)
2727    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR0, 2, 0)
2728DEP_REG32(SMMU_CB3_FSR, 0x13058)
2729    DEP_FIELD(SMMU_CB3_FSR, MULTI, 1, 31)
2730    DEP_FIELD(SMMU_CB3_FSR, SS, 1, 30)
2731    DEP_FIELD(SMMU_CB3_FSR, FORMAT, 2, 9)
2732    DEP_FIELD(SMMU_CB3_FSR, UUT, 1, 8)
2733    DEP_FIELD(SMMU_CB3_FSR, ASF, 1, 7)
2734    DEP_FIELD(SMMU_CB3_FSR, TLBLKF, 1, 6)
2735    DEP_FIELD(SMMU_CB3_FSR, TLBMCF, 1, 5)
2736    DEP_FIELD(SMMU_CB3_FSR, EF, 1, 4)
2737    DEP_FIELD(SMMU_CB3_FSR, PF, 1, 3)
2738    DEP_FIELD(SMMU_CB3_FSR, AFF, 1, 2)
2739    DEP_FIELD(SMMU_CB3_FSR, TF, 1, 1)
2740DEP_REG32(SMMU_CB3_FSRRESTORE, 0x1305c)
2741DEP_REG32(SMMU_CB3_FAR_LOW, 0x13060)
2742DEP_REG32(SMMU_CB3_FAR_HIGH, 0x13064)
2743    DEP_FIELD(SMMU_CB3_FAR_HIGH, BITS, 17, 0)
2744DEP_REG32(SMMU_CB3_FSYNR0, 0x13068)
2745    DEP_FIELD(SMMU_CB3_FSYNR0, S1CBNDX, 4, 16)
2746    DEP_FIELD(SMMU_CB3_FSYNR0, AFR, 1, 11)
2747    DEP_FIELD(SMMU_CB3_FSYNR0, PTWF, 1, 10)
2748    DEP_FIELD(SMMU_CB3_FSYNR0, ATOF, 1, 9)
2749    DEP_FIELD(SMMU_CB3_FSYNR0, NSATTR, 1, 8)
2750    DEP_FIELD(SMMU_CB3_FSYNR0, IND, 1, 6)
2751    DEP_FIELD(SMMU_CB3_FSYNR0, PNU, 1, 5)
2752    DEP_FIELD(SMMU_CB3_FSYNR0, WNR, 1, 4)
2753    DEP_FIELD(SMMU_CB3_FSYNR0, PLVL, 2, 0)
2754DEP_REG32(SMMU_CB3_IPAFAR_LOW, 0x13070)
2755    DEP_FIELD(SMMU_CB3_IPAFAR_LOW, IPAFAR_L, 20, 12)
2756    DEP_FIELD(SMMU_CB3_IPAFAR_LOW, FAR_RO, 12, 0)
2757DEP_REG32(SMMU_CB3_IPAFAR_HIGH, 0x13074)
2758    DEP_FIELD(SMMU_CB3_IPAFAR_HIGH, BITS, 16, 0)
2759DEP_REG32(SMMU_CB3_TLBIVA_LOW, 0x13600)
2760DEP_REG32(SMMU_CB3_TLBIVA_HIGH, 0x13604)
2761    DEP_FIELD(SMMU_CB3_TLBIVA_HIGH, ASID, 16, 16)
2762    DEP_FIELD(SMMU_CB3_TLBIVA_HIGH, ADDRESS, 5, 0)
2763DEP_REG32(SMMU_CB3_TLBIVAA_LOW, 0x13608)
2764DEP_REG32(SMMU_CB3_TLBIVAA_HIGH, 0x1360c)
2765    DEP_FIELD(SMMU_CB3_TLBIVAA_HIGH, ASID, 16, 16)
2766    DEP_FIELD(SMMU_CB3_TLBIVAA_HIGH, ADDRESS, 5, 0)
2767DEP_REG32(SMMU_CB3_TLBIASID, 0x13610)
2768    DEP_FIELD(SMMU_CB3_TLBIASID, ASID, 16, 0)
2769DEP_REG32(SMMU_CB3_TLBIALL, 0x13618)
2770DEP_REG32(SMMU_CB3_TLBIVAL_LOW, 0x13620)
2771DEP_REG32(SMMU_CB3_TLBIVAL_HIGH, 0x13624)
2772    DEP_FIELD(SMMU_CB3_TLBIVAL_HIGH, ASID, 16, 16)
2773    DEP_FIELD(SMMU_CB3_TLBIVAL_HIGH, ADDRESS, 5, 0)
2774DEP_REG32(SMMU_CB3_TLBIVAAL_LOW, 0x13628)
2775DEP_REG32(SMMU_CB3_TLBIVAAL_HIGH, 0x1362c)
2776    DEP_FIELD(SMMU_CB3_TLBIVAAL_HIGH, ASID, 16, 16)
2777    DEP_FIELD(SMMU_CB3_TLBIVAAL_HIGH, ADDRESS, 5, 0)
2778DEP_REG32(SMMU_CB3_TLBIIPAS2_LOW, 0x13630)
2779DEP_REG32(SMMU_CB3_TLBIIPAS2_HIGH, 0x13634)
2780    DEP_FIELD(SMMU_CB3_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
2781DEP_REG32(SMMU_CB3_TLBIIPAS2L_LOW, 0x13638)
2782DEP_REG32(SMMU_CB3_TLBIIPAS2L_HIGH, 0x1363c)
2783    DEP_FIELD(SMMU_CB3_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
2784DEP_REG32(SMMU_CB3_TLBSYNC, 0x137f0)
2785DEP_REG32(SMMU_CB3_TLBSTATUS, 0x137f4)
2786    DEP_FIELD(SMMU_CB3_TLBSTATUS, SACTIVE, 1, 0)
2787DEP_REG32(SMMU_CB3_PMEVCNTR0, 0x13e00)
2788DEP_REG32(SMMU_CB3_PMEVCNTR1, 0x13e04)
2789DEP_REG32(SMMU_CB3_PMEVCNTR2, 0x13e08)
2790DEP_REG32(SMMU_CB3_PMEVCNTR3, 0x13e0c)
2791DEP_REG32(SMMU_CB3_PMEVTYPER0, 0x13e80)
2792    DEP_FIELD(SMMU_CB3_PMEVTYPER0, P, 1, 31)
2793    DEP_FIELD(SMMU_CB3_PMEVTYPER0, U, 1, 30)
2794    DEP_FIELD(SMMU_CB3_PMEVTYPER0, NSP, 1, 29)
2795    DEP_FIELD(SMMU_CB3_PMEVTYPER0, NSU, 1, 28)
2796    DEP_FIELD(SMMU_CB3_PMEVTYPER0, EVENT, 5, 0)
2797DEP_REG32(SMMU_CB3_PMEVTYPER1, 0x13e84)
2798    DEP_FIELD(SMMU_CB3_PMEVTYPER1, P, 1, 31)
2799    DEP_FIELD(SMMU_CB3_PMEVTYPER1, U, 1, 30)
2800    DEP_FIELD(SMMU_CB3_PMEVTYPER1, NSP, 1, 29)
2801    DEP_FIELD(SMMU_CB3_PMEVTYPER1, NSU, 1, 28)
2802    DEP_FIELD(SMMU_CB3_PMEVTYPER1, EVENT, 5, 0)
2803DEP_REG32(SMMU_CB3_PMEVTYPER2, 0x13e88)
2804    DEP_FIELD(SMMU_CB3_PMEVTYPER2, P, 1, 31)
2805    DEP_FIELD(SMMU_CB3_PMEVTYPER2, U, 1, 30)
2806    DEP_FIELD(SMMU_CB3_PMEVTYPER2, NSP, 1, 29)
2807    DEP_FIELD(SMMU_CB3_PMEVTYPER2, NSU, 1, 28)
2808    DEP_FIELD(SMMU_CB3_PMEVTYPER2, EVENT, 5, 0)
2809DEP_REG32(SMMU_CB3_PMEVTYPER3, 0x13e8c)
2810    DEP_FIELD(SMMU_CB3_PMEVTYPER3, P, 1, 31)
2811    DEP_FIELD(SMMU_CB3_PMEVTYPER3, U, 1, 30)
2812    DEP_FIELD(SMMU_CB3_PMEVTYPER3, NSP, 1, 29)
2813    DEP_FIELD(SMMU_CB3_PMEVTYPER3, NSU, 1, 28)
2814    DEP_FIELD(SMMU_CB3_PMEVTYPER3, EVENT, 5, 0)
2815DEP_REG32(SMMU_CB3_PMCFGR, 0x13f00)
2816    DEP_FIELD(SMMU_CB3_PMCFGR, NCG, 8, 24)
2817    DEP_FIELD(SMMU_CB3_PMCFGR, UEN, 1, 19)
2818    DEP_FIELD(SMMU_CB3_PMCFGR, EX, 1, 16)
2819    DEP_FIELD(SMMU_CB3_PMCFGR, CCD, 1, 15)
2820    DEP_FIELD(SMMU_CB3_PMCFGR, CC, 1, 14)
2821    DEP_FIELD(SMMU_CB3_PMCFGR, SIZE, 6, 8)
2822    DEP_FIELD(SMMU_CB3_PMCFGR, N, 8, 0)
2823DEP_REG32(SMMU_CB3_PMCR, 0x13f04)
2824    DEP_FIELD(SMMU_CB3_PMCR, IMP, 8, 24)
2825    DEP_FIELD(SMMU_CB3_PMCR, X, 1, 4)
2826    DEP_FIELD(SMMU_CB3_PMCR, P, 1, 1)
2827    DEP_FIELD(SMMU_CB3_PMCR, E, 1, 0)
2828DEP_REG32(SMMU_CB3_PMCEID, 0x13f20)
2829    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X12, 1, 17)
2830    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X11, 1, 16)
2831    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X10, 1, 15)
2832    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X0A, 1, 9)
2833    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X09, 1, 8)
2834    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X08, 1, 7)
2835    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X01, 1, 1)
2836    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X00, 1, 0)
2837DEP_REG32(SMMU_CB3_PMCNTENSE, 0x13f40)
2838    DEP_FIELD(SMMU_CB3_PMCNTENSE, P3, 1, 3)
2839    DEP_FIELD(SMMU_CB3_PMCNTENSE, P2, 1, 2)
2840    DEP_FIELD(SMMU_CB3_PMCNTENSE, P1, 1, 1)
2841    DEP_FIELD(SMMU_CB3_PMCNTENSE, P0, 1, 0)
2842DEP_REG32(SMMU_CB3_PMCNTENCLR, 0x13f44)
2843    DEP_FIELD(SMMU_CB3_PMCNTENCLR, P3, 1, 3)
2844    DEP_FIELD(SMMU_CB3_PMCNTENCLR, P2, 1, 2)
2845    DEP_FIELD(SMMU_CB3_PMCNTENCLR, P1, 1, 1)
2846    DEP_FIELD(SMMU_CB3_PMCNTENCLR, P0, 1, 0)
2847DEP_REG32(SMMU_CB3_PMCNTENSET, 0x13f48)
2848    DEP_FIELD(SMMU_CB3_PMCNTENSET, P3, 1, 3)
2849    DEP_FIELD(SMMU_CB3_PMCNTENSET, P2, 1, 2)
2850    DEP_FIELD(SMMU_CB3_PMCNTENSET, P1, 1, 1)
2851    DEP_FIELD(SMMU_CB3_PMCNTENSET, P0, 1, 0)
2852DEP_REG32(SMMU_CB3_PMINTENCLR, 0x13f4c)
2853    DEP_FIELD(SMMU_CB3_PMINTENCLR, P3, 1, 3)
2854    DEP_FIELD(SMMU_CB3_PMINTENCLR, P2, 1, 2)
2855    DEP_FIELD(SMMU_CB3_PMINTENCLR, P1, 1, 1)
2856    DEP_FIELD(SMMU_CB3_PMINTENCLR, P0, 1, 0)
2857DEP_REG32(SMMU_CB3_PMOVSCLR, 0x13f50)
2858    DEP_FIELD(SMMU_CB3_PMOVSCLR, P3, 1, 3)
2859    DEP_FIELD(SMMU_CB3_PMOVSCLR, P2, 1, 2)
2860    DEP_FIELD(SMMU_CB3_PMOVSCLR, P1, 1, 1)
2861    DEP_FIELD(SMMU_CB3_PMOVSCLR, P0, 1, 0)
2862DEP_REG32(SMMU_CB3_PMOVSSET, 0x13f58)
2863    DEP_FIELD(SMMU_CB3_PMOVSSET, P3, 1, 3)
2864    DEP_FIELD(SMMU_CB3_PMOVSSET, P2, 1, 2)
2865    DEP_FIELD(SMMU_CB3_PMOVSSET, P1, 1, 1)
2866    DEP_FIELD(SMMU_CB3_PMOVSSET, P0, 1, 0)
2867DEP_REG32(SMMU_CB3_PMAUTHSTATUS, 0x13fb8)
2868    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, SNI, 1, 7)
2869    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, SNE, 1, 6)
2870    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, SI, 1, 5)
2871    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, SE, 1, 4)
2872    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, NSNI, 1, 3)
2873    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, NSNE, 1, 2)
2874    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, NSI, 1, 1)
2875    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, NSE, 1, 0)
2876DEP_REG32(SMMU_CB4_SCTLR, 0x14000)
2877    DEP_FIELD(SMMU_CB4_SCTLR, NSCFG, 2, 28)
2878    DEP_FIELD(SMMU_CB4_SCTLR, WACFG, 2, 26)
2879    DEP_FIELD(SMMU_CB4_SCTLR, RACFG, 2, 24)
2880    DEP_FIELD(SMMU_CB4_SCTLR, SHCFG, 2, 22)
2881    DEP_FIELD(SMMU_CB4_SCTLR, FB, 1, 21)
2882    DEP_FIELD(SMMU_CB4_SCTLR, MTCFG, 1, 20)
2883    DEP_FIELD(SMMU_CB4_SCTLR, MEMATTR, 4, 16)
2884    DEP_FIELD(SMMU_CB4_SCTLR, TRANSIENTCFG, 2, 14)
2885    DEP_FIELD(SMMU_CB4_SCTLR, PTW, 1, 13)
2886    DEP_FIELD(SMMU_CB4_SCTLR, ASIDPNE, 1, 12)
2887    DEP_FIELD(SMMU_CB4_SCTLR, UWXN, 1, 10)
2888    DEP_FIELD(SMMU_CB4_SCTLR, WXN, 1, 9)
2889    DEP_FIELD(SMMU_CB4_SCTLR, HUPCF, 1, 8)
2890    DEP_FIELD(SMMU_CB4_SCTLR, CFCFG, 1, 7)
2891    DEP_FIELD(SMMU_CB4_SCTLR, CFIE, 1, 6)
2892    DEP_FIELD(SMMU_CB4_SCTLR, CFRE, 1, 5)
2893    DEP_FIELD(SMMU_CB4_SCTLR, E, 1, 4)
2894    DEP_FIELD(SMMU_CB4_SCTLR, AFFD, 1, 3)
2895    DEP_FIELD(SMMU_CB4_SCTLR, AFE, 1, 2)
2896    DEP_FIELD(SMMU_CB4_SCTLR, TRE, 1, 1)
2897    DEP_FIELD(SMMU_CB4_SCTLR, M, 1, 0)
2898DEP_REG32(SMMU_CB4_ACTLR, 0x14004)
2899    DEP_FIELD(SMMU_CB4_ACTLR, CPRE, 1, 1)
2900    DEP_FIELD(SMMU_CB4_ACTLR, CMTLB, 1, 0)
2901DEP_REG32(SMMU_CB4_RESUME, 0x14008)
2902    DEP_FIELD(SMMU_CB4_RESUME, TNR, 1, 0)
2903DEP_REG32(SMMU_CB4_TCR2, 0x14010)
2904    DEP_FIELD(SMMU_CB4_TCR2, NSCFG1, 1, 30)
2905    DEP_FIELD(SMMU_CB4_TCR2, SEP, 3, 15)
2906    DEP_FIELD(SMMU_CB4_TCR2, NSCFG0, 1, 14)
2907    DEP_FIELD(SMMU_CB4_TCR2, TBI1, 1, 6)
2908    DEP_FIELD(SMMU_CB4_TCR2, TBI0, 1, 5)
2909    DEP_FIELD(SMMU_CB4_TCR2, AS, 1, 4)
2910    DEP_FIELD(SMMU_CB4_TCR2, PASIZE, 3, 0)
2911DEP_REG32(SMMU_CB4_TTBR0_LOW, 0x14020)
2912    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_31_7, 25, 7)
2913    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
2914    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
2915    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
2916    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_2, 1, 2)
2917    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_1_S, 1, 1)
2918    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
2919DEP_REG32(SMMU_CB4_TTBR0_HIGH, 0x14024)
2920    DEP_FIELD(SMMU_CB4_TTBR0_HIGH, ASID, 16, 16)
2921    DEP_FIELD(SMMU_CB4_TTBR0_HIGH, ADDRESS, 16, 0)
2922DEP_REG32(SMMU_CB4_TTBR1_LOW, 0x14028)
2923    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_31_7, 25, 7)
2924    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
2925    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
2926    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
2927    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_2, 1, 2)
2928    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_1_S, 1, 1)
2929    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
2930DEP_REG32(SMMU_CB4_TTBR1_HIGH, 0x1402c)
2931    DEP_FIELD(SMMU_CB4_TTBR1_HIGH, ASID, 16, 16)
2932    DEP_FIELD(SMMU_CB4_TTBR1_HIGH, ADDRESS, 16, 0)
2933DEP_REG32(SMMU_CB4_TCR_LPAE, 0x14030)
2934    DEP_FIELD(SMMU_CB4_TCR_LPAE, EAE, 1, 31)
2935    DEP_FIELD(SMMU_CB4_TCR_LPAE, NSCFG1_TG1, 1, 30)
2936    DEP_FIELD(SMMU_CB4_TCR_LPAE, SH1, 2, 28)
2937    DEP_FIELD(SMMU_CB4_TCR_LPAE, ORGN1, 2, 26)
2938    DEP_FIELD(SMMU_CB4_TCR_LPAE, IRGN1, 2, 24)
2939    DEP_FIELD(SMMU_CB4_TCR_LPAE, EPD1, 1, 23)
2940    DEP_FIELD(SMMU_CB4_TCR_LPAE, A1, 1, 22)
2941    DEP_FIELD(SMMU_CB4_TCR_LPAE, T1SZ_5_3, 3, 19)
2942    DEP_FIELD(SMMU_CB4_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
2943    DEP_FIELD(SMMU_CB4_TCR_LPAE, NSCFG0_TG0, 1, 14)
2944    DEP_FIELD(SMMU_CB4_TCR_LPAE, SH0, 2, 12)
2945    DEP_FIELD(SMMU_CB4_TCR_LPAE, ORGN0, 2, 10)
2946    DEP_FIELD(SMMU_CB4_TCR_LPAE, IRGN0, 2, 8)
2947    DEP_FIELD(SMMU_CB4_TCR_LPAE, SL0_1_EPD0, 1, 7)
2948    DEP_FIELD(SMMU_CB4_TCR_LPAE, SL0_0, 1, 6)
2949    DEP_FIELD(SMMU_CB4_TCR_LPAE, PD1_T0SZ_5, 1, 5)
2950    DEP_FIELD(SMMU_CB4_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
2951    DEP_FIELD(SMMU_CB4_TCR_LPAE, T0SZ_3_0, 4, 0)
2952DEP_REG32(SMMU_CB4_CONTEXTIDR, 0x14034)
2953    DEP_FIELD(SMMU_CB4_CONTEXTIDR, PROCID, 24, 8)
2954    DEP_FIELD(SMMU_CB4_CONTEXTIDR, ASID, 8, 0)
2955DEP_REG32(SMMU_CB4_PRRR_MAIR0, 0x14038)
2956    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS7, 1, 31)
2957    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS6, 1, 30)
2958    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS5, 1, 29)
2959    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS4, 1, 28)
2960    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS3, 1, 27)
2961    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS2, 1, 26)
2962    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS1, 1, 25)
2963    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS0, 1, 24)
2964    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NS1, 1, 19)
2965    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NS0, 1, 18)
2966    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, DS1, 1, 17)
2967    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, DS0, 1, 16)
2968    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR7, 2, 14)
2969    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR6, 2, 12)
2970    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR5, 2, 10)
2971    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR4, 2, 8)
2972    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR3, 2, 6)
2973    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR2, 2, 4)
2974    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR1, 2, 2)
2975    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR0, 2, 0)
2976DEP_REG32(SMMU_CB4_NMRR_MAIR1, 0x1403c)
2977    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR7, 2, 30)
2978    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR6, 2, 28)
2979    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR5, 2, 26)
2980    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR4, 2, 24)
2981    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR3, 2, 22)
2982    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR2, 2, 20)
2983    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR1, 2, 18)
2984    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR0, 2, 16)
2985    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR7, 2, 14)
2986    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR6, 2, 12)
2987    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR5, 2, 10)
2988    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR4, 2, 8)
2989    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR3, 2, 6)
2990    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR2, 2, 4)
2991    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR1, 2, 2)
2992    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR0, 2, 0)
2993DEP_REG32(SMMU_CB4_FSR, 0x14058)
2994    DEP_FIELD(SMMU_CB4_FSR, MULTI, 1, 31)
2995    DEP_FIELD(SMMU_CB4_FSR, SS, 1, 30)
2996    DEP_FIELD(SMMU_CB4_FSR, FORMAT, 2, 9)
2997    DEP_FIELD(SMMU_CB4_FSR, UUT, 1, 8)
2998    DEP_FIELD(SMMU_CB4_FSR, ASF, 1, 7)
2999    DEP_FIELD(SMMU_CB4_FSR, TLBLKF, 1, 6)
3000    DEP_FIELD(SMMU_CB4_FSR, TLBMCF, 1, 5)

3001    DEP_FIELD(SMMU_CB4_FSR, EF, 1, 4)
3002    DEP_FIELD(SMMU_CB4_FSR, PF, 1, 3)
3003    DEP_FIELD(SMMU_CB4_FSR, AFF, 1, 2)
3004    DEP_FIELD(SMMU_CB4_FSR, TF, 1, 1)
3005DEP_REG32(SMMU_CB4_FSRRESTORE, 0x1405c)
3006DEP_REG32(SMMU_CB4_FAR_LOW, 0x14060)
3007DEP_REG32(SMMU_CB4_FAR_HIGH, 0x14064)
3008    DEP_FIELD(SMMU_CB4_FAR_HIGH, BITS, 17, 0)
3009DEP_REG32(SMMU_CB4_FSYNR0, 0x14068)
3010    DEP_FIELD(SMMU_CB4_FSYNR0, S1CBNDX, 4, 16)
3011    DEP_FIELD(SMMU_CB4_FSYNR0, AFR, 1, 11)
3012    DEP_FIELD(SMMU_CB4_FSYNR0, PTWF, 1, 10)
3013    DEP_FIELD(SMMU_CB4_FSYNR0, ATOF, 1, 9)
3014    DEP_FIELD(SMMU_CB4_FSYNR0, NSATTR, 1, 8)
3015    DEP_FIELD(SMMU_CB4_FSYNR0, IND, 1, 6)
3016    DEP_FIELD(SMMU_CB4_FSYNR0, PNU, 1, 5)
3017    DEP_FIELD(SMMU_CB4_FSYNR0, WNR, 1, 4)
3018    DEP_FIELD(SMMU_CB4_FSYNR0, PLVL, 2, 0)
3019DEP_REG32(SMMU_CB4_IPAFAR_LOW, 0x14070)
3020    DEP_FIELD(SMMU_CB4_IPAFAR_LOW, IPAFAR_L, 20, 12)
3021    DEP_FIELD(SMMU_CB4_IPAFAR_LOW, FAR_RO, 12, 0)
3022DEP_REG32(SMMU_CB4_IPAFAR_HIGH, 0x14074)
3023    DEP_FIELD(SMMU_CB4_IPAFAR_HIGH, BITS, 16, 0)
3024DEP_REG32(SMMU_CB4_TLBIVA_LOW, 0x14600)
3025DEP_REG32(SMMU_CB4_TLBIVA_HIGH, 0x14604)
3026    DEP_FIELD(SMMU_CB4_TLBIVA_HIGH, ASID, 16, 16)
3027    DEP_FIELD(SMMU_CB4_TLBIVA_HIGH, ADDRESS, 5, 0)
3028DEP_REG32(SMMU_CB4_TLBIVAA_LOW, 0x14608)
3029DEP_REG32(SMMU_CB4_TLBIVAA_HIGH, 0x1460c)
3030    DEP_FIELD(SMMU_CB4_TLBIVAA_HIGH, ASID, 16, 16)
3031    DEP_FIELD(SMMU_CB4_TLBIVAA_HIGH, ADDRESS, 5, 0)
3032DEP_REG32(SMMU_CB4_TLBIASID, 0x14610)
3033    DEP_FIELD(SMMU_CB4_TLBIASID, ASID, 16, 0)
3034DEP_REG32(SMMU_CB4_TLBIALL, 0x14618)
3035DEP_REG32(SMMU_CB4_TLBIVAL_LOW, 0x14620)
3036DEP_REG32(SMMU_CB4_TLBIVAL_HIGH, 0x14624)
3037    DEP_FIELD(SMMU_CB4_TLBIVAL_HIGH, ASID, 16, 16)
3038    DEP_FIELD(SMMU_CB4_TLBIVAL_HIGH, ADDRESS, 5, 0)
3039DEP_REG32(SMMU_CB4_TLBIVAAL_LOW, 0x14628)
3040DEP_REG32(SMMU_CB4_TLBIVAAL_HIGH, 0x1462c)
3041    DEP_FIELD(SMMU_CB4_TLBIVAAL_HIGH, ASID, 16, 16)
3042    DEP_FIELD(SMMU_CB4_TLBIVAAL_HIGH, ADDRESS, 5, 0)
3043DEP_REG32(SMMU_CB4_TLBIIPAS2_LOW, 0x14630)
3044DEP_REG32(SMMU_CB4_TLBIIPAS2_HIGH, 0x14634)
3045    DEP_FIELD(SMMU_CB4_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
3046DEP_REG32(SMMU_CB4_TLBIIPAS2L_LOW, 0x14638)
3047DEP_REG32(SMMU_CB4_TLBIIPAS2L_HIGH, 0x1463c)
3048    DEP_FIELD(SMMU_CB4_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
3049DEP_REG32(SMMU_CB4_TLBSYNC, 0x147f0)
3050DEP_REG32(SMMU_CB4_TLBSTATUS, 0x147f4)
3051    DEP_FIELD(SMMU_CB4_TLBSTATUS, SACTIVE, 1, 0)
3052DEP_REG32(SMMU_CB4_PMEVCNTR0, 0x14e00)
3053DEP_REG32(SMMU_CB4_PMEVCNTR1, 0x14e04)
3054DEP_REG32(SMMU_CB4_PMEVCNTR2, 0x14e08)
3055DEP_REG32(SMMU_CB4_PMEVCNTR3, 0x14e0c)
3056DEP_REG32(SMMU_CB4_PMEVTYPER0, 0x14e80)
3057    DEP_FIELD(SMMU_CB4_PMEVTYPER0, P, 1, 31)
3058    DEP_FIELD(SMMU_CB4_PMEVTYPER0, U, 1, 30)
3059    DEP_FIELD(SMMU_CB4_PMEVTYPER0, NSP, 1, 29)
3060    DEP_FIELD(SMMU_CB4_PMEVTYPER0, NSU, 1, 28)
3061    DEP_FIELD(SMMU_CB4_PMEVTYPER0, EVENT, 5, 0)
3062DEP_REG32(SMMU_CB4_PMEVTYPER1, 0x14e84)
3063    DEP_FIELD(SMMU_CB4_PMEVTYPER1, P, 1, 31)
3064    DEP_FIELD(SMMU_CB4_PMEVTYPER1, U, 1, 30)
3065    DEP_FIELD(SMMU_CB4_PMEVTYPER1, NSP, 1, 29)
3066    DEP_FIELD(SMMU_CB4_PMEVTYPER1, NSU, 1, 28)
3067    DEP_FIELD(SMMU_CB4_PMEVTYPER1, EVENT, 5, 0)
3068DEP_REG32(SMMU_CB4_PMEVTYPER2, 0x14e88)
3069    DEP_FIELD(SMMU_CB4_PMEVTYPER2, P, 1, 31)
3070    DEP_FIELD(SMMU_CB4_PMEVTYPER2, U, 1, 30)
3071    DEP_FIELD(SMMU_CB4_PMEVTYPER2, NSP, 1, 29)
3072    DEP_FIELD(SMMU_CB4_PMEVTYPER2, NSU, 1, 28)
3073    DEP_FIELD(SMMU_CB4_PMEVTYPER2, EVENT, 5, 0)
3074DEP_REG32(SMMU_CB4_PMEVTYPER3, 0x14e8c)
3075    DEP_FIELD(SMMU_CB4_PMEVTYPER3, P, 1, 31)
3076    DEP_FIELD(SMMU_CB4_PMEVTYPER3, U, 1, 30)
3077    DEP_FIELD(SMMU_CB4_PMEVTYPER3, NSP, 1, 29)
3078    DEP_FIELD(SMMU_CB4_PMEVTYPER3, NSU, 1, 28)
3079    DEP_FIELD(SMMU_CB4_PMEVTYPER3, EVENT, 5, 0)
3080DEP_REG32(SMMU_CB4_PMCFGR, 0x14f00)
3081    DEP_FIELD(SMMU_CB4_PMCFGR, NCG, 8, 24)
3082    DEP_FIELD(SMMU_CB4_PMCFGR, UEN, 1, 19)
3083    DEP_FIELD(SMMU_CB4_PMCFGR, EX, 1, 16)
3084    DEP_FIELD(SMMU_CB4_PMCFGR, CCD, 1, 15)
3085    DEP_FIELD(SMMU_CB4_PMCFGR, CC, 1, 14)
3086    DEP_FIELD(SMMU_CB4_PMCFGR, SIZE, 6, 8)
3087    DEP_FIELD(SMMU_CB4_PMCFGR, N, 8, 0)
3088DEP_REG32(SMMU_CB4_PMCR, 0x14f04)
3089    DEP_FIELD(SMMU_CB4_PMCR, IMP, 8, 24)
3090    DEP_FIELD(SMMU_CB4_PMCR, X, 1, 4)
3091    DEP_FIELD(SMMU_CB4_PMCR, P, 1, 1)
3092    DEP_FIELD(SMMU_CB4_PMCR, E, 1, 0)
3093DEP_REG32(SMMU_CB4_PMCEID, 0x14f20)
3094    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X12, 1, 17)
3095    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X11, 1, 16)
3096    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X10, 1, 15)
3097    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X0A, 1, 9)
3098    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X09, 1, 8)
3099    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X08, 1, 7)
3100    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X01, 1, 1)
3101    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X00, 1, 0)
3102DEP_REG32(SMMU_CB4_PMCNTENSE, 0x14f40)
3103    DEP_FIELD(SMMU_CB4_PMCNTENSE, P3, 1, 3)
3104    DEP_FIELD(SMMU_CB4_PMCNTENSE, P2, 1, 2)
3105    DEP_FIELD(SMMU_CB4_PMCNTENSE, P1, 1, 1)
3106    DEP_FIELD(SMMU_CB4_PMCNTENSE, P0, 1, 0)
3107DEP_REG32(SMMU_CB4_PMCNTENCLR, 0x14f44)
3108    DEP_FIELD(SMMU_CB4_PMCNTENCLR, P3, 1, 3)
3109    DEP_FIELD(SMMU_CB4_PMCNTENCLR, P2, 1, 2)
3110    DEP_FIELD(SMMU_CB4_PMCNTENCLR, P1, 1, 1)
3111    DEP_FIELD(SMMU_CB4_PMCNTENCLR, P0, 1, 0)
3112DEP_REG32(SMMU_CB4_PMCNTENSET, 0x14f48)
3113    DEP_FIELD(SMMU_CB4_PMCNTENSET, P3, 1, 3)
3114    DEP_FIELD(SMMU_CB4_PMCNTENSET, P2, 1, 2)
3115    DEP_FIELD(SMMU_CB4_PMCNTENSET, P1, 1, 1)
3116    DEP_FIELD(SMMU_CB4_PMCNTENSET, P0, 1, 0)
3117DEP_REG32(SMMU_CB4_PMINTENCLR, 0x14f4c)
3118    DEP_FIELD(SMMU_CB4_PMINTENCLR, P3, 1, 3)
3119    DEP_FIELD(SMMU_CB4_PMINTENCLR, P2, 1, 2)
3120    DEP_FIELD(SMMU_CB4_PMINTENCLR, P1, 1, 1)
3121    DEP_FIELD(SMMU_CB4_PMINTENCLR, P0, 1, 0)
3122DEP_REG32(SMMU_CB4_PMOVSCLR, 0x14f50)
3123    DEP_FIELD(SMMU_CB4_PMOVSCLR, P3, 1, 3)
3124    DEP_FIELD(SMMU_CB4_PMOVSCLR, P2, 1, 2)
3125    DEP_FIELD(SMMU_CB4_PMOVSCLR, P1, 1, 1)
3126    DEP_FIELD(SMMU_CB4_PMOVSCLR, P0, 1, 0)
3127DEP_REG32(SMMU_CB4_PMOVSSET, 0x14f58)
3128    DEP_FIELD(SMMU_CB4_PMOVSSET, P3, 1, 3)
3129    DEP_FIELD(SMMU_CB4_PMOVSSET, P2, 1, 2)
3130    DEP_FIELD(SMMU_CB4_PMOVSSET, P1, 1, 1)
3131    DEP_FIELD(SMMU_CB4_PMOVSSET, P0, 1, 0)
3132DEP_REG32(SMMU_CB4_PMAUTHSTATUS, 0x14fb8)
3133    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, SNI, 1, 7)
3134    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, SNE, 1, 6)
3135    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, SI, 1, 5)
3136    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, SE, 1, 4)
3137    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, NSNI, 1, 3)
3138    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, NSNE, 1, 2)
3139    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, NSI, 1, 1)
3140    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, NSE, 1, 0)
3141DEP_REG32(SMMU_CB5_SCTLR, 0x15000)
3142    DEP_FIELD(SMMU_CB5_SCTLR, NSCFG, 2, 28)
3143    DEP_FIELD(SMMU_CB5_SCTLR, WACFG, 2, 26)
3144    DEP_FIELD(SMMU_CB5_SCTLR, RACFG, 2, 24)
3145    DEP_FIELD(SMMU_CB5_SCTLR, SHCFG, 2, 22)
3146    DEP_FIELD(SMMU_CB5_SCTLR, FB, 1, 21)
3147    DEP_FIELD(SMMU_CB5_SCTLR, MTCFG, 1, 20)
3148    DEP_FIELD(SMMU_CB5_SCTLR, MEMATTR, 4, 16)
3149    DEP_FIELD(SMMU_CB5_SCTLR, TRANSIENTCFG, 2, 14)
3150    DEP_FIELD(SMMU_CB5_SCTLR, PTW, 1, 13)
3151    DEP_FIELD(SMMU_CB5_SCTLR, ASIDPNE, 1, 12)
3152    DEP_FIELD(SMMU_CB5_SCTLR, UWXN, 1, 10)
3153    DEP_FIELD(SMMU_CB5_SCTLR, WXN, 1, 9)
3154    DEP_FIELD(SMMU_CB5_SCTLR, HUPCF, 1, 8)
3155    DEP_FIELD(SMMU_CB5_SCTLR, CFCFG, 1, 7)
3156    DEP_FIELD(SMMU_CB5_SCTLR, CFIE, 1, 6)
3157    DEP_FIELD(SMMU_CB5_SCTLR, CFRE, 1, 5)
3158    DEP_FIELD(SMMU_CB5_SCTLR, E, 1, 4)
3159    DEP_FIELD(SMMU_CB5_SCTLR, AFFD, 1, 3)
3160    DEP_FIELD(SMMU_CB5_SCTLR, AFE, 1, 2)
3161    DEP_FIELD(SMMU_CB5_SCTLR, TRE, 1, 1)
3162    DEP_FIELD(SMMU_CB5_SCTLR, M, 1, 0)
3163DEP_REG32(SMMU_CB5_ACTLR, 0x15004)
3164    DEP_FIELD(SMMU_CB5_ACTLR, CPRE, 1, 1)
3165    DEP_FIELD(SMMU_CB5_ACTLR, CMTLB, 1, 0)
3166DEP_REG32(SMMU_CB5_RESUME, 0x15008)
3167    DEP_FIELD(SMMU_CB5_RESUME, TNR, 1, 0)
3168DEP_REG32(SMMU_CB5_TCR2, 0x15010)
3169    DEP_FIELD(SMMU_CB5_TCR2, NSCFG1, 1, 30)
3170    DEP_FIELD(SMMU_CB5_TCR2, SEP, 3, 15)
3171    DEP_FIELD(SMMU_CB5_TCR2, NSCFG0, 1, 14)
3172    DEP_FIELD(SMMU_CB5_TCR2, TBI1, 1, 6)
3173    DEP_FIELD(SMMU_CB5_TCR2, TBI0, 1, 5)
3174    DEP_FIELD(SMMU_CB5_TCR2, AS, 1, 4)
3175    DEP_FIELD(SMMU_CB5_TCR2, PASIZE, 3, 0)
3176DEP_REG32(SMMU_CB5_TTBR0_LOW, 0x15020)
3177    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_31_7, 25, 7)
3178    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
3179    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
3180    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
3181    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_2, 1, 2)
3182    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_1_S, 1, 1)
3183    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
3184DEP_REG32(SMMU_CB5_TTBR0_HIGH, 0x15024)
3185    DEP_FIELD(SMMU_CB5_TTBR0_HIGH, ASID, 16, 16)
3186    DEP_FIELD(SMMU_CB5_TTBR0_HIGH, ADDRESS, 16, 0)
3187DEP_REG32(SMMU_CB5_TTBR1_LOW, 0x15028)
3188    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_31_7, 25, 7)
3189    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
3190    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
3191    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
3192    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_2, 1, 2)
3193    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_1_S, 1, 1)
3194    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
3195DEP_REG32(SMMU_CB5_TTBR1_HIGH, 0x1502c)
3196    DEP_FIELD(SMMU_CB5_TTBR1_HIGH, ASID, 16, 16)
3197    DEP_FIELD(SMMU_CB5_TTBR1_HIGH, ADDRESS, 16, 0)
3198DEP_REG32(SMMU_CB5_TCR_LPAE, 0x15030)
3199    DEP_FIELD(SMMU_CB5_TCR_LPAE, EAE, 1, 31)
3200    DEP_FIELD(SMMU_CB5_TCR_LPAE, NSCFG1_TG1, 1, 30)
3201    DEP_FIELD(SMMU_CB5_TCR_LPAE, SH1, 2, 28)
3202    DEP_FIELD(SMMU_CB5_TCR_LPAE, ORGN1, 2, 26)
3203    DEP_FIELD(SMMU_CB5_TCR_LPAE, IRGN1, 2, 24)
3204    DEP_FIELD(SMMU_CB5_TCR_LPAE, EPD1, 1, 23)
3205    DEP_FIELD(SMMU_CB5_TCR_LPAE, A1, 1, 22)
3206    DEP_FIELD(SMMU_CB5_TCR_LPAE, T1SZ_5_3, 3, 19)
3207    DEP_FIELD(SMMU_CB5_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
3208    DEP_FIELD(SMMU_CB5_TCR_LPAE, NSCFG0_TG0, 1, 14)
3209    DEP_FIELD(SMMU_CB5_TCR_LPAE, SH0, 2, 12)
3210    DEP_FIELD(SMMU_CB5_TCR_LPAE, ORGN0, 2, 10)
3211    DEP_FIELD(SMMU_CB5_TCR_LPAE, IRGN0, 2, 8)
3212    DEP_FIELD(SMMU_CB5_TCR_LPAE, SL0_1_EPD0, 1, 7)
3213    DEP_FIELD(SMMU_CB5_TCR_LPAE, SL0_0, 1, 6)
3214    DEP_FIELD(SMMU_CB5_TCR_LPAE, PD1_T0SZ_5, 1, 5)
3215    DEP_FIELD(SMMU_CB5_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
3216    DEP_FIELD(SMMU_CB5_TCR_LPAE, T0SZ_3_0, 4, 0)
3217DEP_REG32(SMMU_CB5_CONTEXTIDR, 0x15034)
3218    DEP_FIELD(SMMU_CB5_CONTEXTIDR, PROCID, 24, 8)
3219    DEP_FIELD(SMMU_CB5_CONTEXTIDR, ASID, 8, 0)
3220DEP_REG32(SMMU_CB5_PRRR_MAIR0, 0x15038)
3221    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS7, 1, 31)
3222    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS6, 1, 30)
3223    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS5, 1, 29)
3224    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS4, 1, 28)
3225    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS3, 1, 27)
3226    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS2, 1, 26)
3227    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS1, 1, 25)
3228    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS0, 1, 24)
3229    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NS1, 1, 19)
3230    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NS0, 1, 18)
3231    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, DS1, 1, 17)
3232    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, DS0, 1, 16)
3233    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR7, 2, 14)
3234    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR6, 2, 12)
3235    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR5, 2, 10)
3236    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR4, 2, 8)
3237    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR3, 2, 6)
3238    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR2, 2, 4)
3239    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR1, 2, 2)
3240    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR0, 2, 0)
3241DEP_REG32(SMMU_CB5_NMRR_MAIR1, 0x1503c)
3242    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR7, 2, 30)
3243    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR6, 2, 28)
3244    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR5, 2, 26)
3245    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR4, 2, 24)
3246    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR3, 2, 22)
3247    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR2, 2, 20)
3248    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR1, 2, 18)
3249    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR0, 2, 16)
3250    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR7, 2, 14)
3251    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR6, 2, 12)
3252    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR5, 2, 10)
3253    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR4, 2, 8)
3254    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR3, 2, 6)
3255    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR2, 2, 4)
3256    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR1, 2, 2)
3257    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR0, 2, 0)
3258DEP_REG32(SMMU_CB5_FSR, 0x15058)
3259    DEP_FIELD(SMMU_CB5_FSR, MULTI, 1, 31)
3260    DEP_FIELD(SMMU_CB5_FSR, SS, 1, 30)
3261    DEP_FIELD(SMMU_CB5_FSR, FORMAT, 2, 9)
3262    DEP_FIELD(SMMU_CB5_FSR, UUT, 1, 8)
3263    DEP_FIELD(SMMU_CB5_FSR, ASF, 1, 7)
3264    DEP_FIELD(SMMU_CB5_FSR, TLBLKF, 1, 6)
3265    DEP_FIELD(SMMU_CB5_FSR, TLBMCF, 1, 5)
3266    DEP_FIELD(SMMU_CB5_FSR, EF, 1, 4)
3267    DEP_FIELD(SMMU_CB5_FSR, PF, 1, 3)
3268    DEP_FIELD(SMMU_CB5_FSR, AFF, 1, 2)
3269    DEP_FIELD(SMMU_CB5_FSR, TF, 1, 1)
3270DEP_REG32(SMMU_CB5_FSRRESTORE, 0x1505c)
3271DEP_REG32(SMMU_CB5_FAR_LOW, 0x15060)
3272DEP_REG32(SMMU_CB5_FAR_HIGH, 0x15064)
3273    DEP_FIELD(SMMU_CB5_FAR_HIGH, BITS, 17, 0)
3274DEP_REG32(SMMU_CB5_FSYNR0, 0x15068)
3275    DEP_FIELD(SMMU_CB5_FSYNR0, S1CBNDX, 4, 16)
3276    DEP_FIELD(SMMU_CB5_FSYNR0, AFR, 1, 11)
3277    DEP_FIELD(SMMU_CB5_FSYNR0, PTWF, 1, 10)
3278    DEP_FIELD(SMMU_CB5_FSYNR0, ATOF, 1, 9)
3279    DEP_FIELD(SMMU_CB5_FSYNR0, NSATTR, 1, 8)
3280    DEP_FIELD(SMMU_CB5_FSYNR0, IND, 1, 6)
3281    DEP_FIELD(SMMU_CB5_FSYNR0, PNU, 1, 5)
3282    DEP_FIELD(SMMU_CB5_FSYNR0, WNR, 1, 4)
3283    DEP_FIELD(SMMU_CB5_FSYNR0, PLVL, 2, 0)
3284DEP_REG32(SMMU_CB5_IPAFAR_LOW, 0x15070)
3285    DEP_FIELD(SMMU_CB5_IPAFAR_LOW, IPAFAR_L, 20, 12)
3286    DEP_FIELD(SMMU_CB5_IPAFAR_LOW, FAR_RO, 12, 0)
3287DEP_REG32(SMMU_CB5_IPAFAR_HIGH, 0x15074)
3288    DEP_FIELD(SMMU_CB5_IPAFAR_HIGH, BITS, 16, 0)
3289DEP_REG32(SMMU_CB5_TLBIVA_LOW, 0x15600)
3290DEP_REG32(SMMU_CB5_TLBIVA_HIGH, 0x15604)
3291    DEP_FIELD(SMMU_CB5_TLBIVA_HIGH, ASID, 16, 16)
3292    DEP_FIELD(SMMU_CB5_TLBIVA_HIGH, ADDRESS, 5, 0)
3293DEP_REG32(SMMU_CB5_TLBIVAA_LOW, 0x15608)
3294DEP_REG32(SMMU_CB5_TLBIVAA_HIGH, 0x1560c)
3295    DEP_FIELD(SMMU_CB5_TLBIVAA_HIGH, ASID, 16, 16)
3296    DEP_FIELD(SMMU_CB5_TLBIVAA_HIGH, ADDRESS, 5, 0)
3297DEP_REG32(SMMU_CB5_TLBIASID, 0x15610)
3298    DEP_FIELD(SMMU_CB5_TLBIASID, ASID, 16, 0)
3299DEP_REG32(SMMU_CB5_TLBIALL, 0x15618)
3300DEP_REG32(SMMU_CB5_TLBIVAL_LOW, 0x15620)
3301DEP_REG32(SMMU_CB5_TLBIVAL_HIGH, 0x15624)
3302    DEP_FIELD(SMMU_CB5_TLBIVAL_HIGH, ASID, 16, 16)
3303    DEP_FIELD(SMMU_CB5_TLBIVAL_HIGH, ADDRESS, 5, 0)
3304DEP_REG32(SMMU_CB5_TLBIVAAL_LOW, 0x15628)
3305DEP_REG32(SMMU_CB5_TLBIVAAL_HIGH, 0x1562c)
3306    DEP_FIELD(SMMU_CB5_TLBIVAAL_HIGH, ASID, 16, 16)
3307    DEP_FIELD(SMMU_CB5_TLBIVAAL_HIGH, ADDRESS, 5, 0)
3308DEP_REG32(SMMU_CB5_TLBIIPAS2_LOW, 0x15630)
3309DEP_REG32(SMMU_CB5_TLBIIPAS2_HIGH, 0x15634)
3310    DEP_FIELD(SMMU_CB5_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
3311DEP_REG32(SMMU_CB5_TLBIIPAS2L_LOW, 0x15638)
3312DEP_REG32(SMMU_CB5_TLBIIPAS2L_HIGH, 0x1563c)
3313    DEP_FIELD(SMMU_CB5_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
3314DEP_REG32(SMMU_CB5_TLBSYNC, 0x157f0)
3315DEP_REG32(SMMU_CB5_TLBSTATUS, 0x157f4)
3316    DEP_FIELD(SMMU_CB5_TLBSTATUS, SACTIVE, 1, 0)
3317DEP_REG32(SMMU_CB5_PMEVCNTR0, 0x15e00)
3318DEP_REG32(SMMU_CB5_PMEVCNTR1, 0x15e04)
3319DEP_REG32(SMMU_CB5_PMEVCNTR2, 0x15e08)
3320DEP_REG32(SMMU_CB5_PMEVCNTR3, 0x15e0c)
3321DEP_REG32(SMMU_CB5_PMEVTYPER0, 0x15e80)
3322    DEP_FIELD(SMMU_CB5_PMEVTYPER0, P, 1, 31)
3323    DEP_FIELD(SMMU_CB5_PMEVTYPER0, U, 1, 30)
3324    DEP_FIELD(SMMU_CB5_PMEVTYPER0, NSP, 1, 29)
3325    DEP_FIELD(SMMU_CB5_PMEVTYPER0, NSU, 1, 28)
3326    DEP_FIELD(SMMU_CB5_PMEVTYPER0, EVENT, 5, 0)
3327DEP_REG32(SMMU_CB5_PMEVTYPER1, 0x15e84)
3328    DEP_FIELD(SMMU_CB5_PMEVTYPER1, P, 1, 31)
3329    DEP_FIELD(SMMU_CB5_PMEVTYPER1, U, 1, 30)
3330    DEP_FIELD(SMMU_CB5_PMEVTYPER1, NSP, 1, 29)
3331    DEP_FIELD(SMMU_CB5_PMEVTYPER1, NSU, 1, 28)
3332    DEP_FIELD(SMMU_CB5_PMEVTYPER1, EVENT, 5, 0)
3333DEP_REG32(SMMU_CB5_PMEVTYPER2, 0x15e88)
3334    DEP_FIELD(SMMU_CB5_PMEVTYPER2, P, 1, 31)
3335    DEP_FIELD(SMMU_CB5_PMEVTYPER2, U, 1, 30)
3336    DEP_FIELD(SMMU_CB5_PMEVTYPER2, NSP, 1, 29)
3337    DEP_FIELD(SMMU_CB5_PMEVTYPER2, NSU, 1, 28)
3338    DEP_FIELD(SMMU_CB5_PMEVTYPER2, EVENT, 5, 0)
3339DEP_REG32(SMMU_CB5_PMEVTYPER3, 0x15e8c)
3340    DEP_FIELD(SMMU_CB5_PMEVTYPER3, P, 1, 31)
3341    DEP_FIELD(SMMU_CB5_PMEVTYPER3, U, 1, 30)
3342    DEP_FIELD(SMMU_CB5_PMEVTYPER3, NSP, 1, 29)
3343    DEP_FIELD(SMMU_CB5_PMEVTYPER3, NSU, 1, 28)
3344    DEP_FIELD(SMMU_CB5_PMEVTYPER3, EVENT, 5, 0)
3345DEP_REG32(SMMU_CB5_PMCFGR, 0x15f00)
3346    DEP_FIELD(SMMU_CB5_PMCFGR, NCG, 8, 24)
3347    DEP_FIELD(SMMU_CB5_PMCFGR, UEN, 1, 19)
3348    DEP_FIELD(SMMU_CB5_PMCFGR, EX, 1, 16)
3349    DEP_FIELD(SMMU_CB5_PMCFGR, CCD, 1, 15)
3350    DEP_FIELD(SMMU_CB5_PMCFGR, CC, 1, 14)
3351    DEP_FIELD(SMMU_CB5_PMCFGR, SIZE, 6, 8)
3352    DEP_FIELD(SMMU_CB5_PMCFGR, N, 8, 0)
3353DEP_REG32(SMMU_CB5_PMCR, 0x15f04)
3354    DEP_FIELD(SMMU_CB5_PMCR, IMP, 8, 24)
3355    DEP_FIELD(SMMU_CB5_PMCR, X, 1, 4)
3356    DEP_FIELD(SMMU_CB5_PMCR, P, 1, 1)
3357    DEP_FIELD(SMMU_CB5_PMCR, E, 1, 0)
3358DEP_REG32(SMMU_CB5_PMCEID, 0x15f20)
3359    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X12, 1, 17)
3360    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X11, 1, 16)
3361    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X10, 1, 15)
3362    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X0A, 1, 9)
3363    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X09, 1, 8)
3364    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X08, 1, 7)
3365    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X01, 1, 1)
3366    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X00, 1, 0)
3367DEP_REG32(SMMU_CB5_PMCNTENSE, 0x15f40)
3368    DEP_FIELD(SMMU_CB5_PMCNTENSE, P3, 1, 3)
3369    DEP_FIELD(SMMU_CB5_PMCNTENSE, P2, 1, 2)
3370    DEP_FIELD(SMMU_CB5_PMCNTENSE, P1, 1, 1)
3371    DEP_FIELD(SMMU_CB5_PMCNTENSE, P0, 1, 0)
3372DEP_REG32(SMMU_CB5_PMCNTENCLR, 0x15f44)
3373    DEP_FIELD(SMMU_CB5_PMCNTENCLR, P3, 1, 3)
3374    DEP_FIELD(SMMU_CB5_PMCNTENCLR, P2, 1, 2)
3375    DEP_FIELD(SMMU_CB5_PMCNTENCLR, P1, 1, 1)
3376    DEP_FIELD(SMMU_CB5_PMCNTENCLR, P0, 1, 0)
3377DEP_REG32(SMMU_CB5_PMCNTENSET, 0x15f48)
3378    DEP_FIELD(SMMU_CB5_PMCNTENSET, P3, 1, 3)
3379    DEP_FIELD(SMMU_CB5_PMCNTENSET, P2, 1, 2)
3380    DEP_FIELD(SMMU_CB5_PMCNTENSET, P1, 1, 1)
3381    DEP_FIELD(SMMU_CB5_PMCNTENSET, P0, 1, 0)
3382DEP_REG32(SMMU_CB5_PMINTENCLR, 0x15f4c)
3383    DEP_FIELD(SMMU_CB5_PMINTENCLR, P3, 1, 3)
3384    DEP_FIELD(SMMU_CB5_PMINTENCLR, P2, 1, 2)
3385    DEP_FIELD(SMMU_CB5_PMINTENCLR, P1, 1, 1)
3386    DEP_FIELD(SMMU_CB5_PMINTENCLR, P0, 1, 0)
3387DEP_REG32(SMMU_CB5_PMOVSCLR, 0x15f50)
3388    DEP_FIELD(SMMU_CB5_PMOVSCLR, P3, 1, 3)
3389    DEP_FIELD(SMMU_CB5_PMOVSCLR, P2, 1, 2)
3390    DEP_FIELD(SMMU_CB5_PMOVSCLR, P1, 1, 1)
3391    DEP_FIELD(SMMU_CB5_PMOVSCLR, P0, 1, 0)
3392DEP_REG32(SMMU_CB5_PMOVSSET, 0x15f58)
3393    DEP_FIELD(SMMU_CB5_PMOVSSET, P3, 1, 3)
3394    DEP_FIELD(SMMU_CB5_PMOVSSET, P2, 1, 2)
3395    DEP_FIELD(SMMU_CB5_PMOVSSET, P1, 1, 1)
3396    DEP_FIELD(SMMU_CB5_PMOVSSET, P0, 1, 0)
3397DEP_REG32(SMMU_CB5_PMAUTHSTATUS, 0x15fb8)
3398    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, SNI, 1, 7)
3399    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, SNE, 1, 6)
3400    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, SI, 1, 5)
3401    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, SE, 1, 4)
3402    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, NSNI, 1, 3)
3403    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, NSNE, 1, 2)
3404    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, NSI, 1, 1)
3405    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, NSE, 1, 0)
3406DEP_REG32(SMMU_CB6_SCTLR, 0x16000)
3407    DEP_FIELD(SMMU_CB6_SCTLR, NSCFG, 2, 28)
3408    DEP_FIELD(SMMU_CB6_SCTLR, WACFG, 2, 26)
3409    DEP_FIELD(SMMU_CB6_SCTLR, RACFG, 2, 24)
3410    DEP_FIELD(SMMU_CB6_SCTLR, SHCFG, 2, 22)
3411    DEP_FIELD(SMMU_CB6_SCTLR, FB, 1, 21)
3412    DEP_FIELD(SMMU_CB6_SCTLR, MTCFG, 1, 20)
3413    DEP_FIELD(SMMU_CB6_SCTLR, MEMATTR, 4, 16)
3414    DEP_FIELD(SMMU_CB6_SCTLR, TRANSIENTCFG, 2, 14)
3415    DEP_FIELD(SMMU_CB6_SCTLR, PTW, 1, 13)
3416    DEP_FIELD(SMMU_CB6_SCTLR, ASIDPNE, 1, 12)
3417    DEP_FIELD(SMMU_CB6_SCTLR, UWXN, 1, 10)
3418    DEP_FIELD(SMMU_CB6_SCTLR, WXN, 1, 9)
3419    DEP_FIELD(SMMU_CB6_SCTLR, HUPCF, 1, 8)
3420    DEP_FIELD(SMMU_CB6_SCTLR, CFCFG, 1, 7)
3421    DEP_FIELD(SMMU_CB6_SCTLR, CFIE, 1, 6)
3422    DEP_FIELD(SMMU_CB6_SCTLR, CFRE, 1, 5)
3423    DEP_FIELD(SMMU_CB6_SCTLR, E, 1, 4)
3424    DEP_FIELD(SMMU_CB6_SCTLR, AFFD, 1, 3)
3425    DEP_FIELD(SMMU_CB6_SCTLR, AFE, 1, 2)
3426    DEP_FIELD(SMMU_CB6_SCTLR, TRE, 1, 1)
3427    DEP_FIELD(SMMU_CB6_SCTLR, M, 1, 0)
3428DEP_REG32(SMMU_CB6_ACTLR, 0x16004)
3429    DEP_FIELD(SMMU_CB6_ACTLR, CPRE, 1, 1)
3430    DEP_FIELD(SMMU_CB6_ACTLR, CMTLB, 1, 0)
3431DEP_REG32(SMMU_CB6_RESUME, 0x16008)
3432    DEP_FIELD(SMMU_CB6_RESUME, TNR, 1, 0)
3433DEP_REG32(SMMU_CB6_TCR2, 0x16010)
3434    DEP_FIELD(SMMU_CB6_TCR2, NSCFG1, 1, 30)
3435    DEP_FIELD(SMMU_CB6_TCR2, SEP, 3, 15)
3436    DEP_FIELD(SMMU_CB6_TCR2, NSCFG0, 1, 14)
3437    DEP_FIELD(SMMU_CB6_TCR2, TBI1, 1, 6)
3438    DEP_FIELD(SMMU_CB6_TCR2, TBI0, 1, 5)
3439    DEP_FIELD(SMMU_CB6_TCR2, AS, 1, 4)
3440    DEP_FIELD(SMMU_CB6_TCR2, PASIZE, 3, 0)
3441DEP_REG32(SMMU_CB6_TTBR0_LOW, 0x16020)
3442    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_31_7, 25, 7)
3443    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
3444    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
3445    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
3446    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_2, 1, 2)
3447    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_1_S, 1, 1)
3448    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
3449DEP_REG32(SMMU_CB6_TTBR0_HIGH, 0x16024)
3450    DEP_FIELD(SMMU_CB6_TTBR0_HIGH, ASID, 16, 16)
3451    DEP_FIELD(SMMU_CB6_TTBR0_HIGH, ADDRESS, 16, 0)
3452DEP_REG32(SMMU_CB6_TTBR1_LOW, 0x16028)
3453    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_31_7, 25, 7)
3454    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
3455    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
3456    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
3457    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_2, 1, 2)
3458    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_1_S, 1, 1)
3459    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
3460DEP_REG32(SMMU_CB6_TTBR1_HIGH, 0x1602c)
3461    DEP_FIELD(SMMU_CB6_TTBR1_HIGH, ASID, 16, 16)
3462    DEP_FIELD(SMMU_CB6_TTBR1_HIGH, ADDRESS, 16, 0)
3463DEP_REG32(SMMU_CB6_TCR_LPAE, 0x16030)
3464    DEP_FIELD(SMMU_CB6_TCR_LPAE, EAE, 1, 31)
3465    DEP_FIELD(SMMU_CB6_TCR_LPAE, NSCFG1_TG1, 1, 30)
3466    DEP_FIELD(SMMU_CB6_TCR_LPAE, SH1, 2, 28)
3467    DEP_FIELD(SMMU_CB6_TCR_LPAE, ORGN1, 2, 26)
3468    DEP_FIELD(SMMU_CB6_TCR_LPAE, IRGN1, 2, 24)
3469    DEP_FIELD(SMMU_CB6_TCR_LPAE, EPD1, 1, 23)
3470    DEP_FIELD(SMMU_CB6_TCR_LPAE, A1, 1, 22)
3471    DEP_FIELD(SMMU_CB6_TCR_LPAE, T1SZ_5_3, 3, 19)
3472    DEP_FIELD(SMMU_CB6_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
3473    DEP_FIELD(SMMU_CB6_TCR_LPAE, NSCFG0_TG0, 1, 14)
3474    DEP_FIELD(SMMU_CB6_TCR_LPAE, SH0, 2, 12)
3475    DEP_FIELD(SMMU_CB6_TCR_LPAE, ORGN0, 2, 10)
3476    DEP_FIELD(SMMU_CB6_TCR_LPAE, IRGN0, 2, 8)
3477    DEP_FIELD(SMMU_CB6_TCR_LPAE, SL0_1_EPD0, 1, 7)
3478    DEP_FIELD(SMMU_CB6_TCR_LPAE, SL0_0, 1, 6)
3479    DEP_FIELD(SMMU_CB6_TCR_LPAE, PD1_T0SZ_5, 1, 5)
3480    DEP_FIELD(SMMU_CB6_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
3481    DEP_FIELD(SMMU_CB6_TCR_LPAE, T0SZ_3_0, 4, 0)
3482DEP_REG32(SMMU_CB6_CONTEXTIDR, 0x16034)
3483    DEP_FIELD(SMMU_CB6_CONTEXTIDR, PROCID, 24, 8)
3484    DEP_FIELD(SMMU_CB6_CONTEXTIDR, ASID, 8, 0)
3485DEP_REG32(SMMU_CB6_PRRR_MAIR0, 0x16038)
3486    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS7, 1, 31)
3487    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS6, 1, 30)
3488    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS5, 1, 29)
3489    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS4, 1, 28)
3490    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS3, 1, 27)
3491    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS2, 1, 26)
3492    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS1, 1, 25)
3493    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS0, 1, 24)
3494    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NS1, 1, 19)
3495    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NS0, 1, 18)
3496    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, DS1, 1, 17)
3497    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, DS0, 1, 16)
3498    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR7, 2, 14)
3499    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR6, 2, 12)
3500    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR5, 2, 10)
3501    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR4, 2, 8)
3502    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR3, 2, 6)
3503    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR2, 2, 4)
3504    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR1, 2, 2)
3505    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR0, 2, 0)
3506DEP_REG32(SMMU_CB6_NMRR_MAIR1, 0x1603c)
3507    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR7, 2, 30)
3508    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR6, 2, 28)
3509    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR5, 2, 26)
3510    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR4, 2, 24)
3511    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR3, 2, 22)
3512    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR2, 2, 20)
3513    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR1, 2, 18)
3514    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR0, 2, 16)
3515    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR7, 2, 14)
3516    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR6, 2, 12)
3517    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR5, 2, 10)
3518    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR4, 2, 8)
3519    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR3, 2, 6)
3520    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR2, 2, 4)
3521    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR1, 2, 2)
3522    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR0, 2, 0)
3523DEP_REG32(SMMU_CB6_FSR, 0x16058)
3524    DEP_FIELD(SMMU_CB6_FSR, MULTI, 1, 31)
3525    DEP_FIELD(SMMU_CB6_FSR, SS, 1, 30)
3526    DEP_FIELD(SMMU_CB6_FSR, FORMAT, 2, 9)
3527    DEP_FIELD(SMMU_CB6_FSR, UUT, 1, 8)
3528    DEP_FIELD(SMMU_CB6_FSR, ASF, 1, 7)
3529    DEP_FIELD(SMMU_CB6_FSR, TLBLKF, 1, 6)
3530    DEP_FIELD(SMMU_CB6_FSR, TLBMCF, 1, 5)
3531    DEP_FIELD(SMMU_CB6_FSR, EF, 1, 4)
3532    DEP_FIELD(SMMU_CB6_FSR, PF, 1, 3)
3533    DEP_FIELD(SMMU_CB6_FSR, AFF, 1, 2)
3534    DEP_FIELD(SMMU_CB6_FSR, TF, 1, 1)
3535DEP_REG32(SMMU_CB6_FSRRESTORE, 0x1605c)
3536DEP_REG32(SMMU_CB6_FAR_LOW, 0x16060)
3537DEP_REG32(SMMU_CB6_FAR_HIGH, 0x16064)
3538    DEP_FIELD(SMMU_CB6_FAR_HIGH, BITS, 17, 0)
3539DEP_REG32(SMMU_CB6_FSYNR0, 0x16068)
3540    DEP_FIELD(SMMU_CB6_FSYNR0, S1CBNDX, 4, 16)
3541    DEP_FIELD(SMMU_CB6_FSYNR0, AFR, 1, 11)
3542    DEP_FIELD(SMMU_CB6_FSYNR0, PTWF, 1, 10)
3543    DEP_FIELD(SMMU_CB6_FSYNR0, ATOF, 1, 9)
3544    DEP_FIELD(SMMU_CB6_FSYNR0, NSATTR, 1, 8)
3545    DEP_FIELD(SMMU_CB6_FSYNR0, IND, 1, 6)
3546    DEP_FIELD(SMMU_CB6_FSYNR0, PNU, 1, 5)
3547    DEP_FIELD(SMMU_CB6_FSYNR0, WNR, 1, 4)
3548    DEP_FIELD(SMMU_CB6_FSYNR0, PLVL, 2, 0)
3549DEP_REG32(SMMU_CB6_IPAFAR_LOW, 0x16070)
3550    DEP_FIELD(SMMU_CB6_IPAFAR_LOW, IPAFAR_L, 20, 12)
3551    DEP_FIELD(SMMU_CB6_IPAFAR_LOW, FAR_RO, 12, 0)
3552DEP_REG32(SMMU_CB6_IPAFAR_HIGH, 0x16074)
3553    DEP_FIELD(SMMU_CB6_IPAFAR_HIGH, BITS, 16, 0)
3554DEP_REG32(SMMU_CB6_TLBIVA_LOW, 0x16600)
3555DEP_REG32(SMMU_CB6_TLBIVA_HIGH, 0x16604)
3556    DEP_FIELD(SMMU_CB6_TLBIVA_HIGH, ASID, 16, 16)
3557    DEP_FIELD(SMMU_CB6_TLBIVA_HIGH, ADDRESS, 5, 0)
3558DEP_REG32(SMMU_CB6_TLBIVAA_LOW, 0x16608)
3559DEP_REG32(SMMU_CB6_TLBIVAA_HIGH, 0x1660c)
3560    DEP_FIELD(SMMU_CB6_TLBIVAA_HIGH, ASID, 16, 16)
3561    DEP_FIELD(SMMU_CB6_TLBIVAA_HIGH, ADDRESS, 5, 0)
3562DEP_REG32(SMMU_CB6_TLBIASID, 0x16610)
3563    DEP_FIELD(SMMU_CB6_TLBIASID, ASID, 16, 0)
3564DEP_REG32(SMMU_CB6_TLBIALL, 0x16618)
3565DEP_REG32(SMMU_CB6_TLBIVAL_LOW, 0x16620)
3566DEP_REG32(SMMU_CB6_TLBIVAL_HIGH, 0x16624)
3567    DEP_FIELD(SMMU_CB6_TLBIVAL_HIGH, ASID, 16, 16)
3568    DEP_FIELD(SMMU_CB6_TLBIVAL_HIGH, ADDRESS, 5, 0)
3569DEP_REG32(SMMU_CB6_TLBIVAAL_LOW, 0x16628)
3570DEP_REG32(SMMU_CB6_TLBIVAAL_HIGH, 0x1662c)
3571    DEP_FIELD(SMMU_CB6_TLBIVAAL_HIGH, ASID, 16, 16)
3572    DEP_FIELD(SMMU_CB6_TLBIVAAL_HIGH, ADDRESS, 5, 0)
3573DEP_REG32(SMMU_CB6_TLBIIPAS2_LOW, 0x16630)
3574DEP_REG32(SMMU_CB6_TLBIIPAS2_HIGH, 0x16634)
3575    DEP_FIELD(SMMU_CB6_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
3576DEP_REG32(SMMU_CB6_TLBIIPAS2L_LOW, 0x16638)
3577DEP_REG32(SMMU_CB6_TLBIIPAS2L_HIGH, 0x1663c)
3578    DEP_FIELD(SMMU_CB6_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
3579DEP_REG32(SMMU_CB6_TLBSYNC, 0x167f0)
3580DEP_REG32(SMMU_CB6_TLBSTATUS, 0x167f4)
3581    DEP_FIELD(SMMU_CB6_TLBSTATUS, SACTIVE, 1, 0)
3582DEP_REG32(SMMU_CB6_PMEVCNTR0, 0x16e00)
3583DEP_REG32(SMMU_CB6_PMEVCNTR1, 0x16e04)
3584DEP_REG32(SMMU_CB6_PMEVCNTR2, 0x16e08)
3585DEP_REG32(SMMU_CB6_PMEVCNTR3, 0x16e0c)
3586DEP_REG32(SMMU_CB6_PMEVTYPER0, 0x16e80)
3587    DEP_FIELD(SMMU_CB6_PMEVTYPER0, P, 1, 31)
3588    DEP_FIELD(SMMU_CB6_PMEVTYPER0, U, 1, 30)
3589    DEP_FIELD(SMMU_CB6_PMEVTYPER0, NSP, 1, 29)
3590    DEP_FIELD(SMMU_CB6_PMEVTYPER0, NSU, 1, 28)
3591    DEP_FIELD(SMMU_CB6_PMEVTYPER0, EVENT, 5, 0)
3592DEP_REG32(SMMU_CB6_PMEVTYPER1, 0x16e84)
3593    DEP_FIELD(SMMU_CB6_PMEVTYPER1, P, 1, 31)
3594    DEP_FIELD(SMMU_CB6_PMEVTYPER1, U, 1, 30)
3595    DEP_FIELD(SMMU_CB6_PMEVTYPER1, NSP, 1, 29)
3596    DEP_FIELD(SMMU_CB6_PMEVTYPER1, NSU, 1, 28)
3597    DEP_FIELD(SMMU_CB6_PMEVTYPER1, EVENT, 5, 0)
3598DEP_REG32(SMMU_CB6_PMEVTYPER2, 0x16e88)
3599    DEP_FIELD(SMMU_CB6_PMEVTYPER2, P, 1, 31)
3600    DEP_FIELD(SMMU_CB6_PMEVTYPER2, U, 1, 30)
3601    DEP_FIELD(SMMU_CB6_PMEVTYPER2, NSP, 1, 29)
3602    DEP_FIELD(SMMU_CB6_PMEVTYPER2, NSU, 1, 28)
3603    DEP_FIELD(SMMU_CB6_PMEVTYPER2, EVENT, 5, 0)
3604DEP_REG32(SMMU_CB6_PMEVTYPER3, 0x16e8c)
3605    DEP_FIELD(SMMU_CB6_PMEVTYPER3, P, 1, 31)
3606    DEP_FIELD(SMMU_CB6_PMEVTYPER3, U, 1, 30)
3607    DEP_FIELD(SMMU_CB6_PMEVTYPER3, NSP, 1, 29)
3608    DEP_FIELD(SMMU_CB6_PMEVTYPER3, NSU, 1, 28)
3609    DEP_FIELD(SMMU_CB6_PMEVTYPER3, EVENT, 5, 0)
3610DEP_REG32(SMMU_CB6_PMCFGR, 0x16f00)
3611    DEP_FIELD(SMMU_CB6_PMCFGR, NCG, 8, 24)
3612    DEP_FIELD(SMMU_CB6_PMCFGR, UEN, 1, 19)
3613    DEP_FIELD(SMMU_CB6_PMCFGR, EX, 1, 16)
3614    DEP_FIELD(SMMU_CB6_PMCFGR, CCD, 1, 15)
3615    DEP_FIELD(SMMU_CB6_PMCFGR, CC, 1, 14)
3616    DEP_FIELD(SMMU_CB6_PMCFGR, SIZE, 6, 8)
3617    DEP_FIELD(SMMU_CB6_PMCFGR, N, 8, 0)
3618DEP_REG32(SMMU_CB6_PMCR, 0x16f04)
3619    DEP_FIELD(SMMU_CB6_PMCR, IMP, 8, 24)
3620    DEP_FIELD(SMMU_CB6_PMCR, X, 1, 4)
3621    DEP_FIELD(SMMU_CB6_PMCR, P, 1, 1)
3622    DEP_FIELD(SMMU_CB6_PMCR, E, 1, 0)
3623DEP_REG32(SMMU_CB6_PMCEID, 0x16f20)
3624    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X12, 1, 17)
3625    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X11, 1, 16)
3626    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X10, 1, 15)
3627    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X0A, 1, 9)
3628    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X09, 1, 8)
3629    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X08, 1, 7)
3630    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X01, 1, 1)
3631    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X00, 1, 0)
3632DEP_REG32(SMMU_CB6_PMCNTENSE, 0x16f40)
3633    DEP_FIELD(SMMU_CB6_PMCNTENSE, P3, 1, 3)
3634    DEP_FIELD(SMMU_CB6_PMCNTENSE, P2, 1, 2)
3635    DEP_FIELD(SMMU_CB6_PMCNTENSE, P1, 1, 1)
3636    DEP_FIELD(SMMU_CB6_PMCNTENSE, P0, 1, 0)
3637DEP_REG32(SMMU_CB6_PMCNTENCLR, 0x16f44)
3638    DEP_FIELD(SMMU_CB6_PMCNTENCLR, P3, 1, 3)
3639    DEP_FIELD(SMMU_CB6_PMCNTENCLR, P2, 1, 2)
3640    DEP_FIELD(SMMU_CB6_PMCNTENCLR, P1, 1, 1)
3641    DEP_FIELD(SMMU_CB6_PMCNTENCLR, P0, 1, 0)
3642DEP_REG32(SMMU_CB6_PMCNTENSET, 0x16f48)
3643    DEP_FIELD(SMMU_CB6_PMCNTENSET, P3, 1, 3)
3644    DEP_FIELD(SMMU_CB6_PMCNTENSET, P2, 1, 2)
3645    DEP_FIELD(SMMU_CB6_PMCNTENSET, P1, 1, 1)
3646    DEP_FIELD(SMMU_CB6_PMCNTENSET, P0, 1, 0)
3647DEP_REG32(SMMU_CB6_PMINTENCLR, 0x16f4c)
3648    DEP_FIELD(SMMU_CB6_PMINTENCLR, P3, 1, 3)
3649    DEP_FIELD(SMMU_CB6_PMINTENCLR, P2, 1, 2)
3650    DEP_FIELD(SMMU_CB6_PMINTENCLR, P1, 1, 1)
3651    DEP_FIELD(SMMU_CB6_PMINTENCLR, P0, 1, 0)
3652DEP_REG32(SMMU_CB6_PMOVSCLR, 0x16f50)
3653    DEP_FIELD(SMMU_CB6_PMOVSCLR, P3, 1, 3)
3654    DEP_FIELD(SMMU_CB6_PMOVSCLR, P2, 1, 2)
3655    DEP_FIELD(SMMU_CB6_PMOVSCLR, P1, 1, 1)
3656    DEP_FIELD(SMMU_CB6_PMOVSCLR, P0, 1, 0)
3657DEP_REG32(SMMU_CB6_PMOVSSET, 0x16f58)
3658    DEP_FIELD(SMMU_CB6_PMOVSSET, P3, 1, 3)
3659    DEP_FIELD(SMMU_CB6_PMOVSSET, P2, 1, 2)
3660    DEP_FIELD(SMMU_CB6_PMOVSSET, P1, 1, 1)
3661    DEP_FIELD(SMMU_CB6_PMOVSSET, P0, 1, 0)
3662DEP_REG32(SMMU_CB6_PMAUTHSTATUS, 0x16fb8)
3663    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, SNI, 1, 7)
3664    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, SNE, 1, 6)
3665    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, SI, 1, 5)
3666    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, SE, 1, 4)
3667    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, NSNI, 1, 3)
3668    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, NSNE, 1, 2)
3669    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, NSI, 1, 1)
3670    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, NSE, 1, 0)
3671DEP_REG32(SMMU_CB7_SCTLR, 0x17000)
3672    DEP_FIELD(SMMU_CB7_SCTLR, NSCFG, 2, 28)
3673    DEP_FIELD(SMMU_CB7_SCTLR, WACFG, 2, 26)
3674    DEP_FIELD(SMMU_CB7_SCTLR, RACFG, 2, 24)
3675    DEP_FIELD(SMMU_CB7_SCTLR, SHCFG, 2, 22)
3676    DEP_FIELD(SMMU_CB7_SCTLR, FB, 1, 21)
3677    DEP_FIELD(SMMU_CB7_SCTLR, MTCFG, 1, 20)
3678    DEP_FIELD(SMMU_CB7_SCTLR, MEMATTR, 4, 16)
3679    DEP_FIELD(SMMU_CB7_SCTLR, TRANSIENTCFG, 2, 14)
3680    DEP_FIELD(SMMU_CB7_SCTLR, PTW, 1, 13)
3681    DEP_FIELD(SMMU_CB7_SCTLR, ASIDPNE, 1, 12)
3682    DEP_FIELD(SMMU_CB7_SCTLR, UWXN, 1, 10)
3683    DEP_FIELD(SMMU_CB7_SCTLR, WXN, 1, 9)
3684    DEP_FIELD(SMMU_CB7_SCTLR, HUPCF, 1, 8)
3685    DEP_FIELD(SMMU_CB7_SCTLR, CFCFG, 1, 7)
3686    DEP_FIELD(SMMU_CB7_SCTLR, CFIE, 1, 6)
3687    DEP_FIELD(SMMU_CB7_SCTLR, CFRE, 1, 5)
3688    DEP_FIELD(SMMU_CB7_SCTLR, E, 1, 4)
3689    DEP_FIELD(SMMU_CB7_SCTLR, AFFD, 1, 3)
3690    DEP_FIELD(SMMU_CB7_SCTLR, AFE, 1, 2)
3691    DEP_FIELD(SMMU_CB7_SCTLR, TRE, 1, 1)
3692    DEP_FIELD(SMMU_CB7_SCTLR, M, 1, 0)
3693DEP_REG32(SMMU_CB7_ACTLR, 0x17004)
3694    DEP_FIELD(SMMU_CB7_ACTLR, CPRE, 1, 1)
3695    DEP_FIELD(SMMU_CB7_ACTLR, CMTLB, 1, 0)
3696DEP_REG32(SMMU_CB7_RESUME, 0x17008)
3697    DEP_FIELD(SMMU_CB7_RESUME, TNR, 1, 0)
3698DEP_REG32(SMMU_CB7_TCR2, 0x17010)
3699    DEP_FIELD(SMMU_CB7_TCR2, NSCFG1, 1, 30)
3700    DEP_FIELD(SMMU_CB7_TCR2, SEP, 3, 15)
3701    DEP_FIELD(SMMU_CB7_TCR2, NSCFG0, 1, 14)
3702    DEP_FIELD(SMMU_CB7_TCR2, TBI1, 1, 6)
3703    DEP_FIELD(SMMU_CB7_TCR2, TBI0, 1, 5)
3704    DEP_FIELD(SMMU_CB7_TCR2, AS, 1, 4)
3705    DEP_FIELD(SMMU_CB7_TCR2, PASIZE, 3, 0)
3706DEP_REG32(SMMU_CB7_TTBR0_LOW, 0x17020)
3707    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_31_7, 25, 7)
3708    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
3709    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
3710    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
3711    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_2, 1, 2)
3712    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_1_S, 1, 1)
3713    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
3714DEP_REG32(SMMU_CB7_TTBR0_HIGH, 0x17024)
3715    DEP_FIELD(SMMU_CB7_TTBR0_HIGH, ASID, 16, 16)
3716    DEP_FIELD(SMMU_CB7_TTBR0_HIGH, ADDRESS, 16, 0)
3717DEP_REG32(SMMU_CB7_TTBR1_LOW, 0x17028)
3718    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_31_7, 25, 7)
3719    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
3720    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
3721    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
3722    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_2, 1, 2)
3723    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_1_S, 1, 1)
3724    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
3725DEP_REG32(SMMU_CB7_TTBR1_HIGH, 0x1702c)
3726    DEP_FIELD(SMMU_CB7_TTBR1_HIGH, ASID, 16, 16)
3727    DEP_FIELD(SMMU_CB7_TTBR1_HIGH, ADDRESS, 16, 0)
3728DEP_REG32(SMMU_CB7_TCR_LPAE, 0x17030)
3729    DEP_FIELD(SMMU_CB7_TCR_LPAE, EAE, 1, 31)
3730    DEP_FIELD(SMMU_CB7_TCR_LPAE, NSCFG1_TG1, 1, 30)
3731    DEP_FIELD(SMMU_CB7_TCR_LPAE, SH1, 2, 28)
3732    DEP_FIELD(SMMU_CB7_TCR_LPAE, ORGN1, 2, 26)
3733    DEP_FIELD(SMMU_CB7_TCR_LPAE, IRGN1, 2, 24)
3734    DEP_FIELD(SMMU_CB7_TCR_LPAE, EPD1, 1, 23)
3735    DEP_FIELD(SMMU_CB7_TCR_LPAE, A1, 1, 22)
3736    DEP_FIELD(SMMU_CB7_TCR_LPAE, T1SZ_5_3, 3, 19)
3737    DEP_FIELD(SMMU_CB7_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
3738    DEP_FIELD(SMMU_CB7_TCR_LPAE, NSCFG0_TG0, 1, 14)
3739    DEP_FIELD(SMMU_CB7_TCR_LPAE, SH0, 2, 12)
3740    DEP_FIELD(SMMU_CB7_TCR_LPAE, ORGN0, 2, 10)
3741    DEP_FIELD(SMMU_CB7_TCR_LPAE, IRGN0, 2, 8)
3742    DEP_FIELD(SMMU_CB7_TCR_LPAE, SL0_1_EPD0, 1, 7)
3743    DEP_FIELD(SMMU_CB7_TCR_LPAE, SL0_0, 1, 6)
3744    DEP_FIELD(SMMU_CB7_TCR_LPAE, PD1_T0SZ_5, 1, 5)
3745    DEP_FIELD(SMMU_CB7_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
3746    DEP_FIELD(SMMU_CB7_TCR_LPAE, T0SZ_3_0, 4, 0)
3747DEP_REG32(SMMU_CB7_CONTEXTIDR, 0x17034)
3748    DEP_FIELD(SMMU_CB7_CONTEXTIDR, PROCID, 24, 8)
3749    DEP_FIELD(SMMU_CB7_CONTEXTIDR, ASID, 8, 0)
3750DEP_REG32(SMMU_CB7_PRRR_MAIR0, 0x17038)
3751    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS7, 1, 31)
3752    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS6, 1, 30)
3753    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS5, 1, 29)
3754    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS4, 1, 28)
3755    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS3, 1, 27)
3756    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS2, 1, 26)
3757    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS1, 1, 25)
3758    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS0, 1, 24)
3759    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NS1, 1, 19)
3760    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NS0, 1, 18)
3761    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, DS1, 1, 17)
3762    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, DS0, 1, 16)
3763    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR7, 2, 14)
3764    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR6, 2, 12)
3765    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR5, 2, 10)
3766    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR4, 2, 8)
3767    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR3, 2, 6)
3768    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR2, 2, 4)
3769    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR1, 2, 2)
3770    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR0, 2, 0)
3771DEP_REG32(SMMU_CB7_NMRR_MAIR1, 0x1703c)
3772    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR7, 2, 30)
3773    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR6, 2, 28)
3774    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR5, 2, 26)
3775    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR4, 2, 24)
3776    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR3, 2, 22)
3777    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR2, 2, 20)
3778    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR1, 2, 18)
3779    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR0, 2, 16)
3780    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR7, 2, 14)
3781    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR6, 2, 12)
3782    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR5, 2, 10)
3783    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR4, 2, 8)
3784    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR3, 2, 6)
3785    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR2, 2, 4)
3786    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR1, 2, 2)
3787    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR0, 2, 0)
3788DEP_REG32(SMMU_CB7_FSR, 0x17058)
3789    DEP_FIELD(SMMU_CB7_FSR, MULTI, 1, 31)
3790    DEP_FIELD(SMMU_CB7_FSR, SS, 1, 30)
3791    DEP_FIELD(SMMU_CB7_FSR, FORMAT, 2, 9)
3792    DEP_FIELD(SMMU_CB7_FSR, UUT, 1, 8)
3793    DEP_FIELD(SMMU_CB7_FSR, ASF, 1, 7)
3794    DEP_FIELD(SMMU_CB7_FSR, TLBLKF, 1, 6)
3795    DEP_FIELD(SMMU_CB7_FSR, TLBMCF, 1, 5)
3796    DEP_FIELD(SMMU_CB7_FSR, EF, 1, 4)
3797    DEP_FIELD(SMMU_CB7_FSR, PF, 1, 3)
3798    DEP_FIELD(SMMU_CB7_FSR, AFF, 1, 2)
3799    DEP_FIELD(SMMU_CB7_FSR, TF, 1, 1)
3800DEP_REG32(SMMU_CB7_FSRRESTORE, 0x1705c)
3801DEP_REG32(SMMU_CB7_FAR_LOW, 0x17060)
3802DEP_REG32(SMMU_CB7_FAR_HIGH, 0x17064)
3803    DEP_FIELD(SMMU_CB7_FAR_HIGH, BITS, 17, 0)
3804DEP_REG32(SMMU_CB7_FSYNR0, 0x17068)
3805    DEP_FIELD(SMMU_CB7_FSYNR0, S1CBNDX, 4, 16)
3806    DEP_FIELD(SMMU_CB7_FSYNR0, AFR, 1, 11)
3807    DEP_FIELD(SMMU_CB7_FSYNR0, PTWF, 1, 10)
3808    DEP_FIELD(SMMU_CB7_FSYNR0, ATOF, 1, 9)
3809    DEP_FIELD(SMMU_CB7_FSYNR0, NSATTR, 1, 8)
3810    DEP_FIELD(SMMU_CB7_FSYNR0, IND, 1, 6)
3811    DEP_FIELD(SMMU_CB7_FSYNR0, PNU, 1, 5)
3812    DEP_FIELD(SMMU_CB7_FSYNR0, WNR, 1, 4)
3813    DEP_FIELD(SMMU_CB7_FSYNR0, PLVL, 2, 0)
3814DEP_REG32(SMMU_CB7_IPAFAR_LOW, 0x17070)
3815    DEP_FIELD(SMMU_CB7_IPAFAR_LOW, IPAFAR_L, 20, 12)
3816    DEP_FIELD(SMMU_CB7_IPAFAR_LOW, FAR_RO, 12, 0)
3817DEP_REG32(SMMU_CB7_IPAFAR_HIGH, 0x17074)
3818    DEP_FIELD(SMMU_CB7_IPAFAR_HIGH, BITS, 16, 0)
3819DEP_REG32(SMMU_CB7_TLBIVA_LOW, 0x17600)
3820DEP_REG32(SMMU_CB7_TLBIVA_HIGH, 0x17604)
3821    DEP_FIELD(SMMU_CB7_TLBIVA_HIGH, ASID, 16, 16)
3822    DEP_FIELD(SMMU_CB7_TLBIVA_HIGH, ADDRESS, 5, 0)
3823DEP_REG32(SMMU_CB7_TLBIVAA_LOW, 0x17608)
3824DEP_REG32(SMMU_CB7_TLBIVAA_HIGH, 0x1760c)
3825    DEP_FIELD(SMMU_CB7_TLBIVAA_HIGH, ASID, 16, 16)
3826    DEP_FIELD(SMMU_CB7_TLBIVAA_HIGH, ADDRESS, 5, 0)
3827DEP_REG32(SMMU_CB7_TLBIASID, 0x17610)
3828    DEP_FIELD(SMMU_CB7_TLBIASID, ASID, 16, 0)
3829DEP_REG32(SMMU_CB7_TLBIALL, 0x17618)
3830DEP_REG32(SMMU_CB7_TLBIVAL_LOW, 0x17620)
3831DEP_REG32(SMMU_CB7_TLBIVAL_HIGH, 0x17624)
3832    DEP_FIELD(SMMU_CB7_TLBIVAL_HIGH, ASID, 16, 16)
3833    DEP_FIELD(SMMU_CB7_TLBIVAL_HIGH, ADDRESS, 5, 0)
3834DEP_REG32(SMMU_CB7_TLBIVAAL_LOW, 0x17628)
3835DEP_REG32(SMMU_CB7_TLBIVAAL_HIGH, 0x1762c)
3836    DEP_FIELD(SMMU_CB7_TLBIVAAL_HIGH, ASID, 16, 16)
3837    DEP_FIELD(SMMU_CB7_TLBIVAAL_HIGH, ADDRESS, 5, 0)
3838DEP_REG32(SMMU_CB7_TLBIIPAS2_LOW, 0x17630)
3839DEP_REG32(SMMU_CB7_TLBIIPAS2_HIGH, 0x17634)
3840    DEP_FIELD(SMMU_CB7_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
3841DEP_REG32(SMMU_CB7_TLBIIPAS2L_LOW, 0x17638)
3842DEP_REG32(SMMU_CB7_TLBIIPAS2L_HIGH, 0x1763c)
3843    DEP_FIELD(SMMU_CB7_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
3844DEP_REG32(SMMU_CB7_TLBSYNC, 0x177f0)
3845DEP_REG32(SMMU_CB7_TLBSTATUS, 0x177f4)
3846    DEP_FIELD(SMMU_CB7_TLBSTATUS, SACTIVE, 1, 0)
3847DEP_REG32(SMMU_CB7_PMEVCNTR0, 0x17e00)
3848DEP_REG32(SMMU_CB7_PMEVCNTR1, 0x17e04)
3849DEP_REG32(SMMU_CB7_PMEVCNTR2, 0x17e08)
3850DEP_REG32(SMMU_CB7_PMEVCNTR3, 0x17e0c)
3851DEP_REG32(SMMU_CB7_PMEVTYPER0, 0x17e80)
3852    DEP_FIELD(SMMU_CB7_PMEVTYPER0, P, 1, 31)
3853    DEP_FIELD(SMMU_CB7_PMEVTYPER0, U, 1, 30)
3854    DEP_FIELD(SMMU_CB7_PMEVTYPER0, NSP, 1, 29)
3855    DEP_FIELD(SMMU_CB7_PMEVTYPER0, NSU, 1, 28)
3856    DEP_FIELD(SMMU_CB7_PMEVTYPER0, EVENT, 5, 0)
3857DEP_REG32(SMMU_CB7_PMEVTYPER1, 0x17e84)
3858    DEP_FIELD(SMMU_CB7_PMEVTYPER1, P, 1, 31)
3859    DEP_FIELD(SMMU_CB7_PMEVTYPER1, U, 1, 30)
3860    DEP_FIELD(SMMU_CB7_PMEVTYPER1, NSP, 1, 29)
3861    DEP_FIELD(SMMU_CB7_PMEVTYPER1, NSU, 1, 28)
3862    DEP_FIELD(SMMU_CB7_PMEVTYPER1, EVENT, 5, 0)
3863DEP_REG32(SMMU_CB7_PMEVTYPER2, 0x17e88)
3864    DEP_FIELD(SMMU_CB7_PMEVTYPER2, P, 1, 31)
3865    DEP_FIELD(SMMU_CB7_PMEVTYPER2, U, 1, 30)
3866    DEP_FIELD(SMMU_CB7_PMEVTYPER2, NSP, 1, 29)
3867    DEP_FIELD(SMMU_CB7_PMEVTYPER2, NSU, 1, 28)
3868    DEP_FIELD(SMMU_CB7_PMEVTYPER2, EVENT, 5, 0)
3869DEP_REG32(SMMU_CB7_PMEVTYPER3, 0x17e8c)
3870    DEP_FIELD(SMMU_CB7_PMEVTYPER3, P, 1, 31)
3871    DEP_FIELD(SMMU_CB7_PMEVTYPER3, U, 1, 30)
3872    DEP_FIELD(SMMU_CB7_PMEVTYPER3, NSP, 1, 29)
3873    DEP_FIELD(SMMU_CB7_PMEVTYPER3, NSU, 1, 28)
3874    DEP_FIELD(SMMU_CB7_PMEVTYPER3, EVENT, 5, 0)
3875DEP_REG32(SMMU_CB7_PMCFGR, 0x17f00)
3876    DEP_FIELD(SMMU_CB7_PMCFGR, NCG, 8, 24)
3877    DEP_FIELD(SMMU_CB7_PMCFGR, UEN, 1, 19)
3878    DEP_FIELD(SMMU_CB7_PMCFGR, EX, 1, 16)
3879    DEP_FIELD(SMMU_CB7_PMCFGR, CCD, 1, 15)
3880    DEP_FIELD(SMMU_CB7_PMCFGR, CC, 1, 14)
3881    DEP_FIELD(SMMU_CB7_PMCFGR, SIZE, 6, 8)
3882    DEP_FIELD(SMMU_CB7_PMCFGR, N, 8, 0)
3883DEP_REG32(SMMU_CB7_PMCR, 0x17f04)
3884    DEP_FIELD(SMMU_CB7_PMCR, IMP, 8, 24)
3885    DEP_FIELD(SMMU_CB7_PMCR, X, 1, 4)
3886    DEP_FIELD(SMMU_CB7_PMCR, P, 1, 1)
3887    DEP_FIELD(SMMU_CB7_PMCR, E, 1, 0)
3888DEP_REG32(SMMU_CB7_PMCEID, 0x17f20)
3889    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X12, 1, 17)
3890    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X11, 1, 16)
3891    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X10, 1, 15)
3892    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X0A, 1, 9)
3893    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X09, 1, 8)
3894    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X08, 1, 7)
3895    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X01, 1, 1)
3896    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X00, 1, 0)
3897DEP_REG32(SMMU_CB7_PMCNTENSE, 0x17f40)
3898    DEP_FIELD(SMMU_CB7_PMCNTENSE, P3, 1, 3)
3899    DEP_FIELD(SMMU_CB7_PMCNTENSE, P2, 1, 2)
3900    DEP_FIELD(SMMU_CB7_PMCNTENSE, P1, 1, 1)
3901    DEP_FIELD(SMMU_CB7_PMCNTENSE, P0, 1, 0)
3902DEP_REG32(SMMU_CB7_PMCNTENCLR, 0x17f44)
3903    DEP_FIELD(SMMU_CB7_PMCNTENCLR, P3, 1, 3)
3904    DEP_FIELD(SMMU_CB7_PMCNTENCLR, P2, 1, 2)
3905    DEP_FIELD(SMMU_CB7_PMCNTENCLR, P1, 1, 1)
3906    DEP_FIELD(SMMU_CB7_PMCNTENCLR, P0, 1, 0)
3907DEP_REG32(SMMU_CB7_PMCNTENSET, 0x17f48)
3908    DEP_FIELD(SMMU_CB7_PMCNTENSET, P3, 1, 3)
3909    DEP_FIELD(SMMU_CB7_PMCNTENSET, P2, 1, 2)
3910    DEP_FIELD(SMMU_CB7_PMCNTENSET, P1, 1, 1)
3911    DEP_FIELD(SMMU_CB7_PMCNTENSET, P0, 1, 0)
3912DEP_REG32(SMMU_CB7_PMINTENCLR, 0x17f4c)
3913    DEP_FIELD(SMMU_CB7_PMINTENCLR, P3, 1, 3)
3914    DEP_FIELD(SMMU_CB7_PMINTENCLR, P2, 1, 2)
3915    DEP_FIELD(SMMU_CB7_PMINTENCLR, P1, 1, 1)
3916    DEP_FIELD(SMMU_CB7_PMINTENCLR, P0, 1, 0)
3917DEP_REG32(SMMU_CB7_PMOVSCLR, 0x17f50)
3918    DEP_FIELD(SMMU_CB7_PMOVSCLR, P3, 1, 3)
3919    DEP_FIELD(SMMU_CB7_PMOVSCLR, P2, 1, 2)
3920    DEP_FIELD(SMMU_CB7_PMOVSCLR, P1, 1, 1)
3921    DEP_FIELD(SMMU_CB7_PMOVSCLR, P0, 1, 0)
3922DEP_REG32(SMMU_CB7_PMOVSSET, 0x17f58)
3923    DEP_FIELD(SMMU_CB7_PMOVSSET, P3, 1, 3)
3924    DEP_FIELD(SMMU_CB7_PMOVSSET, P2, 1, 2)
3925    DEP_FIELD(SMMU_CB7_PMOVSSET, P1, 1, 1)
3926    DEP_FIELD(SMMU_CB7_PMOVSSET, P0, 1, 0)
3927DEP_REG32(SMMU_CB7_PMAUTHSTATUS, 0x17fb8)
3928    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, SNI, 1, 7)
3929    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, SNE, 1, 6)
3930    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, SI, 1, 5)
3931    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, SE, 1, 4)
3932    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, NSNI, 1, 3)
3933    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, NSNE, 1, 2)
3934    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, NSI, 1, 1)
3935    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, NSE, 1, 0)
3936DEP_REG32(SMMU_CB8_SCTLR, 0x18000)
3937    DEP_FIELD(SMMU_CB8_SCTLR, NSCFG, 2, 28)
3938    DEP_FIELD(SMMU_CB8_SCTLR, WACFG, 2, 26)
3939    DEP_FIELD(SMMU_CB8_SCTLR, RACFG, 2, 24)
3940    DEP_FIELD(SMMU_CB8_SCTLR, SHCFG, 2, 22)
3941    DEP_FIELD(SMMU_CB8_SCTLR, FB, 1, 21)
3942    DEP_FIELD(SMMU_CB8_SCTLR, MTCFG, 1, 20)
3943    DEP_FIELD(SMMU_CB8_SCTLR, MEMATTR, 4, 16)
3944    DEP_FIELD(SMMU_CB8_SCTLR, TRANSIENTCFG, 2, 14)
3945    DEP_FIELD(SMMU_CB8_SCTLR, PTW, 1, 13)
3946    DEP_FIELD(SMMU_CB8_SCTLR, ASIDPNE, 1, 12)
3947    DEP_FIELD(SMMU_CB8_SCTLR, UWXN, 1, 10)
3948    DEP_FIELD(SMMU_CB8_SCTLR, WXN, 1, 9)
3949    DEP_FIELD(SMMU_CB8_SCTLR, HUPCF, 1, 8)
3950    DEP_FIELD(SMMU_CB8_SCTLR, CFCFG, 1, 7)
3951    DEP_FIELD(SMMU_CB8_SCTLR, CFIE, 1, 6)
3952    DEP_FIELD(SMMU_CB8_SCTLR, CFRE, 1, 5)
3953    DEP_FIELD(SMMU_CB8_SCTLR, E, 1, 4)
3954    DEP_FIELD(SMMU_CB8_SCTLR, AFFD, 1, 3)
3955    DEP_FIELD(SMMU_CB8_SCTLR, AFE, 1, 2)
3956    DEP_FIELD(SMMU_CB8_SCTLR, TRE, 1, 1)
3957    DEP_FIELD(SMMU_CB8_SCTLR, M, 1, 0)
3958DEP_REG32(SMMU_CB8_ACTLR, 0x18004)
3959    DEP_FIELD(SMMU_CB8_ACTLR, CPRE, 1, 1)
3960    DEP_FIELD(SMMU_CB8_ACTLR, CMTLB, 1, 0)
3961DEP_REG32(SMMU_CB8_RESUME, 0x18008)
3962    DEP_FIELD(SMMU_CB8_RESUME, TNR, 1, 0)
3963DEP_REG32(SMMU_CB8_TCR2, 0x18010)
3964    DEP_FIELD(SMMU_CB8_TCR2, NSCFG1, 1, 30)
3965    DEP_FIELD(SMMU_CB8_TCR2, SEP, 3, 15)
3966    DEP_FIELD(SMMU_CB8_TCR2, NSCFG0, 1, 14)
3967    DEP_FIELD(SMMU_CB8_TCR2, TBI1, 1, 6)
3968    DEP_FIELD(SMMU_CB8_TCR2, TBI0, 1, 5)
3969    DEP_FIELD(SMMU_CB8_TCR2, AS, 1, 4)
3970    DEP_FIELD(SMMU_CB8_TCR2, PASIZE, 3, 0)
3971DEP_REG32(SMMU_CB8_TTBR0_LOW, 0x18020)
3972    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_31_7, 25, 7)
3973    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
3974    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
3975    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
3976    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_2, 1, 2)
3977    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_1_S, 1, 1)
3978    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
3979DEP_REG32(SMMU_CB8_TTBR0_HIGH, 0x18024)
3980    DEP_FIELD(SMMU_CB8_TTBR0_HIGH, ASID, 16, 16)
3981    DEP_FIELD(SMMU_CB8_TTBR0_HIGH, ADDRESS, 16, 0)
3982DEP_REG32(SMMU_CB8_TTBR1_LOW, 0x18028)
3983    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_31_7, 25, 7)
3984    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
3985    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
3986    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
3987    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_2, 1, 2)
3988    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_1_S, 1, 1)
3989    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
3990DEP_REG32(SMMU_CB8_TTBR1_HIGH, 0x1802c)
3991    DEP_FIELD(SMMU_CB8_TTBR1_HIGH, ASID, 16, 16)
3992    DEP_FIELD(SMMU_CB8_TTBR1_HIGH, ADDRESS, 16, 0)
3993DEP_REG32(SMMU_CB8_TCR_LPAE, 0x18030)
3994    DEP_FIELD(SMMU_CB8_TCR_LPAE, EAE, 1, 31)
3995    DEP_FIELD(SMMU_CB8_TCR_LPAE, NSCFG1_TG1, 1, 30)
3996    DEP_FIELD(SMMU_CB8_TCR_LPAE, SH1, 2, 28)
3997    DEP_FIELD(SMMU_CB8_TCR_LPAE, ORGN1, 2, 26)
3998    DEP_FIELD(SMMU_CB8_TCR_LPAE, IRGN1, 2, 24)
3999    DEP_FIELD(SMMU_CB8_TCR_LPAE, EPD1, 1, 23)
4000    DEP_FIELD(SMMU_CB8_TCR_LPAE, A1, 1, 22)

4001    DEP_FIELD(SMMU_CB8_TCR_LPAE, T1SZ_5_3, 3, 19)
4002    DEP_FIELD(SMMU_CB8_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
4003    DEP_FIELD(SMMU_CB8_TCR_LPAE, NSCFG0_TG0, 1, 14)
4004    DEP_FIELD(SMMU_CB8_TCR_LPAE, SH0, 2, 12)
4005    DEP_FIELD(SMMU_CB8_TCR_LPAE, ORGN0, 2, 10)
4006    DEP_FIELD(SMMU_CB8_TCR_LPAE, IRGN0, 2, 8)
4007    DEP_FIELD(SMMU_CB8_TCR_LPAE, SL0_1_EPD0, 1, 7)
4008    DEP_FIELD(SMMU_CB8_TCR_LPAE, SL0_0, 1, 6)
4009    DEP_FIELD(SMMU_CB8_TCR_LPAE, PD1_T0SZ_5, 1, 5)
4010    DEP_FIELD(SMMU_CB8_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
4011    DEP_FIELD(SMMU_CB8_TCR_LPAE, T0SZ_3_0, 4, 0)
4012DEP_REG32(SMMU_CB8_CONTEXTIDR, 0x18034)
4013    DEP_FIELD(SMMU_CB8_CONTEXTIDR, PROCID, 24, 8)
4014    DEP_FIELD(SMMU_CB8_CONTEXTIDR, ASID, 8, 0)
4015DEP_REG32(SMMU_CB8_PRRR_MAIR0, 0x18038)
4016    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS7, 1, 31)
4017    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS6, 1, 30)
4018    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS5, 1, 29)
4019    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS4, 1, 28)
4020    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS3, 1, 27)
4021    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS2, 1, 26)
4022    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS1, 1, 25)
4023    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS0, 1, 24)
4024    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NS1, 1, 19)
4025    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NS0, 1, 18)
4026    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, DS1, 1, 17)
4027    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, DS0, 1, 16)
4028    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR7, 2, 14)
4029    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR6, 2, 12)
4030    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR5, 2, 10)
4031    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR4, 2, 8)
4032    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR3, 2, 6)
4033    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR2, 2, 4)
4034    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR1, 2, 2)
4035    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR0, 2, 0)
4036DEP_REG32(SMMU_CB8_NMRR_MAIR1, 0x1803c)
4037    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR7, 2, 30)
4038    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR6, 2, 28)
4039    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR5, 2, 26)
4040    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR4, 2, 24)
4041    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR3, 2, 22)
4042    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR2, 2, 20)
4043    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR1, 2, 18)
4044    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR0, 2, 16)
4045    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR7, 2, 14)
4046    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR6, 2, 12)
4047    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR5, 2, 10)
4048    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR4, 2, 8)
4049    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR3, 2, 6)
4050    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR2, 2, 4)
4051    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR1, 2, 2)
4052    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR0, 2, 0)
4053DEP_REG32(SMMU_CB8_FSR, 0x18058)
4054    DEP_FIELD(SMMU_CB8_FSR, MULTI, 1, 31)
4055    DEP_FIELD(SMMU_CB8_FSR, SS, 1, 30)
4056    DEP_FIELD(SMMU_CB8_FSR, FORMAT, 2, 9)
4057    DEP_FIELD(SMMU_CB8_FSR, UUT, 1, 8)
4058    DEP_FIELD(SMMU_CB8_FSR, ASF, 1, 7)
4059    DEP_FIELD(SMMU_CB8_FSR, TLBLKF, 1, 6)
4060    DEP_FIELD(SMMU_CB8_FSR, TLBMCF, 1, 5)
4061    DEP_FIELD(SMMU_CB8_FSR, EF, 1, 4)
4062    DEP_FIELD(SMMU_CB8_FSR, PF, 1, 3)
4063    DEP_FIELD(SMMU_CB8_FSR, AFF, 1, 2)
4064    DEP_FIELD(SMMU_CB8_FSR, TF, 1, 1)
4065DEP_REG32(SMMU_CB8_FSRRESTORE, 0x1805c)
4066DEP_REG32(SMMU_CB8_FAR_LOW, 0x18060)
4067DEP_REG32(SMMU_CB8_FAR_HIGH, 0x18064)
4068    DEP_FIELD(SMMU_CB8_FAR_HIGH, BITS, 17, 0)
4069DEP_REG32(SMMU_CB8_FSYNR0, 0x18068)
4070    DEP_FIELD(SMMU_CB8_FSYNR0, S1CBNDX, 4, 16)
4071    DEP_FIELD(SMMU_CB8_FSYNR0, AFR, 1, 11)
4072    DEP_FIELD(SMMU_CB8_FSYNR0, PTWF, 1, 10)
4073    DEP_FIELD(SMMU_CB8_FSYNR0, ATOF, 1, 9)
4074    DEP_FIELD(SMMU_CB8_FSYNR0, NSATTR, 1, 8)
4075    DEP_FIELD(SMMU_CB8_FSYNR0, IND, 1, 6)
4076    DEP_FIELD(SMMU_CB8_FSYNR0, PNU, 1, 5)
4077    DEP_FIELD(SMMU_CB8_FSYNR0, WNR, 1, 4)
4078    DEP_FIELD(SMMU_CB8_FSYNR0, PLVL, 2, 0)
4079DEP_REG32(SMMU_CB8_IPAFAR_LOW, 0x18070)
4080    DEP_FIELD(SMMU_CB8_IPAFAR_LOW, IPAFAR_L, 20, 12)
4081    DEP_FIELD(SMMU_CB8_IPAFAR_LOW, FAR_RO, 12, 0)
4082DEP_REG32(SMMU_CB8_IPAFAR_HIGH, 0x18074)
4083    DEP_FIELD(SMMU_CB8_IPAFAR_HIGH, BITS, 16, 0)
4084DEP_REG32(SMMU_CB8_TLBIVA_LOW, 0x18600)
4085DEP_REG32(SMMU_CB8_TLBIVA_HIGH, 0x18604)
4086    DEP_FIELD(SMMU_CB8_TLBIVA_HIGH, ASID, 16, 16)
4087    DEP_FIELD(SMMU_CB8_TLBIVA_HIGH, ADDRESS, 5, 0)
4088DEP_REG32(SMMU_CB8_TLBIVAA_LOW, 0x18608)
4089DEP_REG32(SMMU_CB8_TLBIVAA_HIGH, 0x1860c)
4090    DEP_FIELD(SMMU_CB8_TLBIVAA_HIGH, ASID, 16, 16)
4091    DEP_FIELD(SMMU_CB8_TLBIVAA_HIGH, ADDRESS, 5, 0)
4092DEP_REG32(SMMU_CB8_TLBIASID, 0x18610)
4093    DEP_FIELD(SMMU_CB8_TLBIASID, ASID, 16, 0)
4094DEP_REG32(SMMU_CB8_TLBIALL, 0x18618)
4095DEP_REG32(SMMU_CB8_TLBIVAL_LOW, 0x18620)
4096DEP_REG32(SMMU_CB8_TLBIVAL_HIGH, 0x18624)
4097    DEP_FIELD(SMMU_CB8_TLBIVAL_HIGH, ASID, 16, 16)
4098    DEP_FIELD(SMMU_CB8_TLBIVAL_HIGH, ADDRESS, 5, 0)
4099DEP_REG32(SMMU_CB8_TLBIVAAL_LOW, 0x18628)
4100DEP_REG32(SMMU_CB8_TLBIVAAL_HIGH, 0x1862c)
4101    DEP_FIELD(SMMU_CB8_TLBIVAAL_HIGH, ASID, 16, 16)
4102    DEP_FIELD(SMMU_CB8_TLBIVAAL_HIGH, ADDRESS, 5, 0)
4103DEP_REG32(SMMU_CB8_TLBIIPAS2_LOW, 0x18630)
4104DEP_REG32(SMMU_CB8_TLBIIPAS2_HIGH, 0x18634)
4105    DEP_FIELD(SMMU_CB8_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
4106DEP_REG32(SMMU_CB8_TLBIIPAS2L_LOW, 0x18638)
4107DEP_REG32(SMMU_CB8_TLBIIPAS2L_HIGH, 0x1863c)
4108    DEP_FIELD(SMMU_CB8_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
4109DEP_REG32(SMMU_CB8_TLBSYNC, 0x187f0)
4110DEP_REG32(SMMU_CB8_TLBSTATUS, 0x187f4)
4111    DEP_FIELD(SMMU_CB8_TLBSTATUS, SACTIVE, 1, 0)
4112DEP_REG32(SMMU_CB8_PMEVCNTR0, 0x18e00)
4113DEP_REG32(SMMU_CB8_PMEVCNTR1, 0x18e04)
4114DEP_REG32(SMMU_CB8_PMEVCNTR2, 0x18e08)
4115DEP_REG32(SMMU_CB8_PMEVCNTR3, 0x18e0c)
4116DEP_REG32(SMMU_CB8_PMEVTYPER0, 0x18e80)
4117    DEP_FIELD(SMMU_CB8_PMEVTYPER0, P, 1, 31)
4118    DEP_FIELD(SMMU_CB8_PMEVTYPER0, U, 1, 30)
4119    DEP_FIELD(SMMU_CB8_PMEVTYPER0, NSP, 1, 29)
4120    DEP_FIELD(SMMU_CB8_PMEVTYPER0, NSU, 1, 28)
4121    DEP_FIELD(SMMU_CB8_PMEVTYPER0, EVENT, 5, 0)
4122DEP_REG32(SMMU_CB8_PMEVTYPER1, 0x18e84)
4123    DEP_FIELD(SMMU_CB8_PMEVTYPER1, P, 1, 31)
4124    DEP_FIELD(SMMU_CB8_PMEVTYPER1, U, 1, 30)
4125    DEP_FIELD(SMMU_CB8_PMEVTYPER1, NSP, 1, 29)
4126    DEP_FIELD(SMMU_CB8_PMEVTYPER1, NSU, 1, 28)
4127    DEP_FIELD(SMMU_CB8_PMEVTYPER1, EVENT, 5, 0)
4128DEP_REG32(SMMU_CB8_PMEVTYPER2, 0x18e88)
4129    DEP_FIELD(SMMU_CB8_PMEVTYPER2, P, 1, 31)
4130    DEP_FIELD(SMMU_CB8_PMEVTYPER2, U, 1, 30)
4131    DEP_FIELD(SMMU_CB8_PMEVTYPER2, NSP, 1, 29)
4132    DEP_FIELD(SMMU_CB8_PMEVTYPER2, NSU, 1, 28)
4133    DEP_FIELD(SMMU_CB8_PMEVTYPER2, EVENT, 5, 0)
4134DEP_REG32(SMMU_CB8_PMEVTYPER3, 0x18e8c)
4135    DEP_FIELD(SMMU_CB8_PMEVTYPER3, P, 1, 31)
4136    DEP_FIELD(SMMU_CB8_PMEVTYPER3, U, 1, 30)
4137    DEP_FIELD(SMMU_CB8_PMEVTYPER3, NSP, 1, 29)
4138    DEP_FIELD(SMMU_CB8_PMEVTYPER3, NSU, 1, 28)
4139    DEP_FIELD(SMMU_CB8_PMEVTYPER3, EVENT, 5, 0)
4140DEP_REG32(SMMU_CB8_PMCFGR, 0x18f00)
4141    DEP_FIELD(SMMU_CB8_PMCFGR, NCG, 8, 24)
4142    DEP_FIELD(SMMU_CB8_PMCFGR, UEN, 1, 19)
4143    DEP_FIELD(SMMU_CB8_PMCFGR, EX, 1, 16)
4144    DEP_FIELD(SMMU_CB8_PMCFGR, CCD, 1, 15)
4145    DEP_FIELD(SMMU_CB8_PMCFGR, CC, 1, 14)
4146    DEP_FIELD(SMMU_CB8_PMCFGR, SIZE, 6, 8)
4147    DEP_FIELD(SMMU_CB8_PMCFGR, N, 8, 0)
4148DEP_REG32(SMMU_CB8_PMCR, 0x18f04)
4149    DEP_FIELD(SMMU_CB8_PMCR, IMP, 8, 24)
4150    DEP_FIELD(SMMU_CB8_PMCR, X, 1, 4)
4151    DEP_FIELD(SMMU_CB8_PMCR, P, 1, 1)
4152    DEP_FIELD(SMMU_CB8_PMCR, E, 1, 0)
4153DEP_REG32(SMMU_CB8_PMCEID, 0x18f20)
4154    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X12, 1, 17)
4155    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X11, 1, 16)
4156    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X10, 1, 15)
4157    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X0A, 1, 9)
4158    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X09, 1, 8)
4159    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X08, 1, 7)
4160    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X01, 1, 1)
4161    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X00, 1, 0)
4162DEP_REG32(SMMU_CB8_PMCNTENSE, 0x18f40)
4163    DEP_FIELD(SMMU_CB8_PMCNTENSE, P3, 1, 3)
4164    DEP_FIELD(SMMU_CB8_PMCNTENSE, P2, 1, 2)
4165    DEP_FIELD(SMMU_CB8_PMCNTENSE, P1, 1, 1)
4166    DEP_FIELD(SMMU_CB8_PMCNTENSE, P0, 1, 0)
4167DEP_REG32(SMMU_CB8_PMCNTENCLR, 0x18f44)
4168    DEP_FIELD(SMMU_CB8_PMCNTENCLR, P3, 1, 3)
4169    DEP_FIELD(SMMU_CB8_PMCNTENCLR, P2, 1, 2)
4170    DEP_FIELD(SMMU_CB8_PMCNTENCLR, P1, 1, 1)
4171    DEP_FIELD(SMMU_CB8_PMCNTENCLR, P0, 1, 0)
4172DEP_REG32(SMMU_CB8_PMCNTENSET, 0x18f48)
4173    DEP_FIELD(SMMU_CB8_PMCNTENSET, P3, 1, 3)
4174    DEP_FIELD(SMMU_CB8_PMCNTENSET, P2, 1, 2)
4175    DEP_FIELD(SMMU_CB8_PMCNTENSET, P1, 1, 1)
4176    DEP_FIELD(SMMU_CB8_PMCNTENSET, P0, 1, 0)
4177DEP_REG32(SMMU_CB8_PMINTENCLR, 0x18f4c)
4178    DEP_FIELD(SMMU_CB8_PMINTENCLR, P3, 1, 3)
4179    DEP_FIELD(SMMU_CB8_PMINTENCLR, P2, 1, 2)
4180    DEP_FIELD(SMMU_CB8_PMINTENCLR, P1, 1, 1)
4181    DEP_FIELD(SMMU_CB8_PMINTENCLR, P0, 1, 0)
4182DEP_REG32(SMMU_CB8_PMOVSCLR, 0x18f50)
4183    DEP_FIELD(SMMU_CB8_PMOVSCLR, P3, 1, 3)
4184    DEP_FIELD(SMMU_CB8_PMOVSCLR, P2, 1, 2)
4185    DEP_FIELD(SMMU_CB8_PMOVSCLR, P1, 1, 1)
4186    DEP_FIELD(SMMU_CB8_PMOVSCLR, P0, 1, 0)
4187DEP_REG32(SMMU_CB8_PMOVSSET, 0x18f58)
4188    DEP_FIELD(SMMU_CB8_PMOVSSET, P3, 1, 3)
4189    DEP_FIELD(SMMU_CB8_PMOVSSET, P2, 1, 2)
4190    DEP_FIELD(SMMU_CB8_PMOVSSET, P1, 1, 1)
4191    DEP_FIELD(SMMU_CB8_PMOVSSET, P0, 1, 0)
4192DEP_REG32(SMMU_CB8_PMAUTHSTATUS, 0x18fb8)
4193    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, SNI, 1, 7)
4194    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, SNE, 1, 6)
4195    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, SI, 1, 5)
4196    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, SE, 1, 4)
4197    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, NSNI, 1, 3)
4198    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, NSNE, 1, 2)
4199    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, NSI, 1, 1)
4200    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, NSE, 1, 0)
4201DEP_REG32(SMMU_CB9_SCTLR, 0x19000)
4202    DEP_FIELD(SMMU_CB9_SCTLR, NSCFG, 2, 28)
4203    DEP_FIELD(SMMU_CB9_SCTLR, WACFG, 2, 26)
4204    DEP_FIELD(SMMU_CB9_SCTLR, RACFG, 2, 24)
4205    DEP_FIELD(SMMU_CB9_SCTLR, SHCFG, 2, 22)
4206    DEP_FIELD(SMMU_CB9_SCTLR, FB, 1, 21)
4207    DEP_FIELD(SMMU_CB9_SCTLR, MTCFG, 1, 20)
4208    DEP_FIELD(SMMU_CB9_SCTLR, MEMATTR, 4, 16)
4209    DEP_FIELD(SMMU_CB9_SCTLR, TRANSIENTCFG, 2, 14)
4210    DEP_FIELD(SMMU_CB9_SCTLR, PTW, 1, 13)
4211    DEP_FIELD(SMMU_CB9_SCTLR, ASIDPNE, 1, 12)
4212    DEP_FIELD(SMMU_CB9_SCTLR, UWXN, 1, 10)
4213    DEP_FIELD(SMMU_CB9_SCTLR, WXN, 1, 9)
4214    DEP_FIELD(SMMU_CB9_SCTLR, HUPCF, 1, 8)
4215    DEP_FIELD(SMMU_CB9_SCTLR, CFCFG, 1, 7)
4216    DEP_FIELD(SMMU_CB9_SCTLR, CFIE, 1, 6)
4217    DEP_FIELD(SMMU_CB9_SCTLR, CFRE, 1, 5)
4218    DEP_FIELD(SMMU_CB9_SCTLR, E, 1, 4)
4219    DEP_FIELD(SMMU_CB9_SCTLR, AFFD, 1, 3)
4220    DEP_FIELD(SMMU_CB9_SCTLR, AFE, 1, 2)
4221    DEP_FIELD(SMMU_CB9_SCTLR, TRE, 1, 1)
4222    DEP_FIELD(SMMU_CB9_SCTLR, M, 1, 0)
4223DEP_REG32(SMMU_CB9_ACTLR, 0x19004)
4224    DEP_FIELD(SMMU_CB9_ACTLR, CPRE, 1, 1)
4225    DEP_FIELD(SMMU_CB9_ACTLR, CMTLB, 1, 0)
4226DEP_REG32(SMMU_CB9_RESUME, 0x19008)
4227    DEP_FIELD(SMMU_CB9_RESUME, TNR, 1, 0)
4228DEP_REG32(SMMU_CB9_TCR2, 0x19010)
4229    DEP_FIELD(SMMU_CB9_TCR2, NSCFG1, 1, 30)
4230    DEP_FIELD(SMMU_CB9_TCR2, SEP, 3, 15)
4231    DEP_FIELD(SMMU_CB9_TCR2, NSCFG0, 1, 14)
4232    DEP_FIELD(SMMU_CB9_TCR2, TBI1, 1, 6)
4233    DEP_FIELD(SMMU_CB9_TCR2, TBI0, 1, 5)
4234    DEP_FIELD(SMMU_CB9_TCR2, AS, 1, 4)
4235    DEP_FIELD(SMMU_CB9_TCR2, PASIZE, 3, 0)
4236DEP_REG32(SMMU_CB9_TTBR0_LOW, 0x19020)
4237    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_31_7, 25, 7)
4238    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
4239    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
4240    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
4241    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_2, 1, 2)
4242    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_1_S, 1, 1)
4243    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
4244DEP_REG32(SMMU_CB9_TTBR0_HIGH, 0x19024)
4245    DEP_FIELD(SMMU_CB9_TTBR0_HIGH, ASID, 16, 16)
4246    DEP_FIELD(SMMU_CB9_TTBR0_HIGH, ADDRESS, 16, 0)
4247DEP_REG32(SMMU_CB9_TTBR1_LOW, 0x19028)
4248    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_31_7, 25, 7)
4249    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
4250    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
4251    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
4252    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_2, 1, 2)
4253    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_1_S, 1, 1)
4254    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
4255DEP_REG32(SMMU_CB9_TTBR1_HIGH, 0x1902c)
4256    DEP_FIELD(SMMU_CB9_TTBR1_HIGH, ASID, 16, 16)
4257    DEP_FIELD(SMMU_CB9_TTBR1_HIGH, ADDRESS, 16, 0)
4258DEP_REG32(SMMU_CB9_TCR_LPAE, 0x19030)
4259    DEP_FIELD(SMMU_CB9_TCR_LPAE, EAE, 1, 31)
4260    DEP_FIELD(SMMU_CB9_TCR_LPAE, NSCFG1_TG1, 1, 30)
4261    DEP_FIELD(SMMU_CB9_TCR_LPAE, SH1, 2, 28)
4262    DEP_FIELD(SMMU_CB9_TCR_LPAE, ORGN1, 2, 26)
4263    DEP_FIELD(SMMU_CB9_TCR_LPAE, IRGN1, 2, 24)
4264    DEP_FIELD(SMMU_CB9_TCR_LPAE, EPD1, 1, 23)
4265    DEP_FIELD(SMMU_CB9_TCR_LPAE, A1, 1, 22)
4266    DEP_FIELD(SMMU_CB9_TCR_LPAE, T1SZ_5_3, 3, 19)
4267    DEP_FIELD(SMMU_CB9_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
4268    DEP_FIELD(SMMU_CB9_TCR_LPAE, NSCFG0_TG0, 1, 14)
4269    DEP_FIELD(SMMU_CB9_TCR_LPAE, SH0, 2, 12)
4270    DEP_FIELD(SMMU_CB9_TCR_LPAE, ORGN0, 2, 10)
4271    DEP_FIELD(SMMU_CB9_TCR_LPAE, IRGN0, 2, 8)
4272    DEP_FIELD(SMMU_CB9_TCR_LPAE, SL0_1_EPD0, 1, 7)
4273    DEP_FIELD(SMMU_CB9_TCR_LPAE, SL0_0, 1, 6)
4274    DEP_FIELD(SMMU_CB9_TCR_LPAE, PD1_T0SZ_5, 1, 5)
4275    DEP_FIELD(SMMU_CB9_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
4276    DEP_FIELD(SMMU_CB9_TCR_LPAE, T0SZ_3_0, 4, 0)
4277DEP_REG32(SMMU_CB9_CONTEXTIDR, 0x19034)
4278    DEP_FIELD(SMMU_CB9_CONTEXTIDR, PROCID, 24, 8)
4279    DEP_FIELD(SMMU_CB9_CONTEXTIDR, ASID, 8, 0)
4280DEP_REG32(SMMU_CB9_PRRR_MAIR0, 0x19038)
4281    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS7, 1, 31)
4282    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS6, 1, 30)
4283    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS5, 1, 29)
4284    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS4, 1, 28)
4285    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS3, 1, 27)
4286    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS2, 1, 26)
4287    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS1, 1, 25)
4288    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS0, 1, 24)
4289    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NS1, 1, 19)
4290    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NS0, 1, 18)
4291    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, DS1, 1, 17)
4292    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, DS0, 1, 16)
4293    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR7, 2, 14)
4294    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR6, 2, 12)
4295    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR5, 2, 10)
4296    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR4, 2, 8)
4297    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR3, 2, 6)
4298    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR2, 2, 4)
4299    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR1, 2, 2)
4300    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR0, 2, 0)
4301DEP_REG32(SMMU_CB9_NMRR_MAIR1, 0x1903c)
4302    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR7, 2, 30)
4303    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR6, 2, 28)
4304    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR5, 2, 26)
4305    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR4, 2, 24)
4306    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR3, 2, 22)
4307    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR2, 2, 20)
4308    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR1, 2, 18)
4309    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR0, 2, 16)
4310    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR7, 2, 14)
4311    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR6, 2, 12)
4312    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR5, 2, 10)
4313    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR4, 2, 8)
4314    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR3, 2, 6)
4315    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR2, 2, 4)
4316    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR1, 2, 2)
4317    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR0, 2, 0)
4318DEP_REG32(SMMU_CB9_FSR, 0x19058)
4319    DEP_FIELD(SMMU_CB9_FSR, MULTI, 1, 31)
4320    DEP_FIELD(SMMU_CB9_FSR, SS, 1, 30)
4321    DEP_FIELD(SMMU_CB9_FSR, FORMAT, 2, 9)
4322    DEP_FIELD(SMMU_CB9_FSR, UUT, 1, 8)
4323    DEP_FIELD(SMMU_CB9_FSR, ASF, 1, 7)
4324    DEP_FIELD(SMMU_CB9_FSR, TLBLKF, 1, 6)
4325    DEP_FIELD(SMMU_CB9_FSR, TLBMCF, 1, 5)
4326    DEP_FIELD(SMMU_CB9_FSR, EF, 1, 4)
4327    DEP_FIELD(SMMU_CB9_FSR, PF, 1, 3)
4328    DEP_FIELD(SMMU_CB9_FSR, AFF, 1, 2)
4329    DEP_FIELD(SMMU_CB9_FSR, TF, 1, 1)
4330DEP_REG32(SMMU_CB9_FSRRESTORE, 0x1905c)
4331DEP_REG32(SMMU_CB9_FAR_LOW, 0x19060)
4332DEP_REG32(SMMU_CB9_FAR_HIGH, 0x19064)
4333    DEP_FIELD(SMMU_CB9_FAR_HIGH, BITS, 17, 0)
4334DEP_REG32(SMMU_CB9_FSYNR0, 0x19068)
4335    DEP_FIELD(SMMU_CB9_FSYNR0, S1CBNDX, 4, 16)
4336    DEP_FIELD(SMMU_CB9_FSYNR0, AFR, 1, 11)
4337    DEP_FIELD(SMMU_CB9_FSYNR0, PTWF, 1, 10)
4338    DEP_FIELD(SMMU_CB9_FSYNR0, ATOF, 1, 9)
4339    DEP_FIELD(SMMU_CB9_FSYNR0, NSATTR, 1, 8)
4340    DEP_FIELD(SMMU_CB9_FSYNR0, IND, 1, 6)
4341    DEP_FIELD(SMMU_CB9_FSYNR0, PNU, 1, 5)
4342    DEP_FIELD(SMMU_CB9_FSYNR0, WNR, 1, 4)
4343    DEP_FIELD(SMMU_CB9_FSYNR0, PLVL, 2, 0)
4344DEP_REG32(SMMU_CB9_IPAFAR_LOW, 0x19070)
4345    DEP_FIELD(SMMU_CB9_IPAFAR_LOW, IPAFAR_L, 20, 12)
4346    DEP_FIELD(SMMU_CB9_IPAFAR_LOW, FAR_RO, 12, 0)
4347DEP_REG32(SMMU_CB9_IPAFAR_HIGH, 0x19074)
4348    DEP_FIELD(SMMU_CB9_IPAFAR_HIGH, BITS, 16, 0)
4349DEP_REG32(SMMU_CB9_TLBIVA_LOW, 0x19600)
4350DEP_REG32(SMMU_CB9_TLBIVA_HIGH, 0x19604)
4351    DEP_FIELD(SMMU_CB9_TLBIVA_HIGH, ASID, 16, 16)
4352    DEP_FIELD(SMMU_CB9_TLBIVA_HIGH, ADDRESS, 5, 0)
4353DEP_REG32(SMMU_CB9_TLBIVAA_LOW, 0x19608)
4354DEP_REG32(SMMU_CB9_TLBIVAA_HIGH, 0x1960c)
4355    DEP_FIELD(SMMU_CB9_TLBIVAA_HIGH, ASID, 16, 16)
4356    DEP_FIELD(SMMU_CB9_TLBIVAA_HIGH, ADDRESS, 5, 0)
4357DEP_REG32(SMMU_CB9_TLBIASID, 0x19610)
4358    DEP_FIELD(SMMU_CB9_TLBIASID, ASID, 16, 0)
4359DEP_REG32(SMMU_CB9_TLBIALL, 0x19618)
4360DEP_REG32(SMMU_CB9_TLBIVAL_LOW, 0x19620)
4361DEP_REG32(SMMU_CB9_TLBIVAL_HIGH, 0x19624)
4362    DEP_FIELD(SMMU_CB9_TLBIVAL_HIGH, ASID, 16, 16)
4363    DEP_FIELD(SMMU_CB9_TLBIVAL_HIGH, ADDRESS, 5, 0)
4364DEP_REG32(SMMU_CB9_TLBIVAAL_LOW, 0x19628)
4365DEP_REG32(SMMU_CB9_TLBIVAAL_HIGH, 0x1962c)
4366    DEP_FIELD(SMMU_CB9_TLBIVAAL_HIGH, ASID, 16, 16)
4367    DEP_FIELD(SMMU_CB9_TLBIVAAL_HIGH, ADDRESS, 5, 0)
4368DEP_REG32(SMMU_CB9_TLBIIPAS2_LOW, 0x19630)
4369DEP_REG32(SMMU_CB9_TLBIIPAS2_HIGH, 0x19634)
4370    DEP_FIELD(SMMU_CB9_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
4371DEP_REG32(SMMU_CB9_TLBIIPAS2L_LOW, 0x19638)
4372DEP_REG32(SMMU_CB9_TLBIIPAS2L_HIGH, 0x1963c)
4373    DEP_FIELD(SMMU_CB9_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
4374DEP_REG32(SMMU_CB9_TLBSYNC, 0x197f0)
4375DEP_REG32(SMMU_CB9_TLBSTATUS, 0x197f4)
4376    DEP_FIELD(SMMU_CB9_TLBSTATUS, SACTIVE, 1, 0)
4377DEP_REG32(SMMU_CB9_PMEVCNTR0, 0x19e00)
4378DEP_REG32(SMMU_CB9_PMEVCNTR1, 0x19e04)
4379DEP_REG32(SMMU_CB9_PMEVCNTR2, 0x19e08)
4380DEP_REG32(SMMU_CB9_PMEVCNTR3, 0x19e0c)
4381DEP_REG32(SMMU_CB9_PMEVTYPER0, 0x19e80)
4382    DEP_FIELD(SMMU_CB9_PMEVTYPER0, P, 1, 31)
4383    DEP_FIELD(SMMU_CB9_PMEVTYPER0, U, 1, 30)
4384    DEP_FIELD(SMMU_CB9_PMEVTYPER0, NSP, 1, 29)
4385    DEP_FIELD(SMMU_CB9_PMEVTYPER0, NSU, 1, 28)
4386    DEP_FIELD(SMMU_CB9_PMEVTYPER0, EVENT, 5, 0)
4387DEP_REG32(SMMU_CB9_PMEVTYPER1, 0x19e84)
4388    DEP_FIELD(SMMU_CB9_PMEVTYPER1, P, 1, 31)
4389    DEP_FIELD(SMMU_CB9_PMEVTYPER1, U, 1, 30)
4390    DEP_FIELD(SMMU_CB9_PMEVTYPER1, NSP, 1, 29)
4391    DEP_FIELD(SMMU_CB9_PMEVTYPER1, NSU, 1, 28)
4392    DEP_FIELD(SMMU_CB9_PMEVTYPER1, EVENT, 5, 0)
4393DEP_REG32(SMMU_CB9_PMEVTYPER2, 0x19e88)
4394    DEP_FIELD(SMMU_CB9_PMEVTYPER2, P, 1, 31)
4395    DEP_FIELD(SMMU_CB9_PMEVTYPER2, U, 1, 30)
4396    DEP_FIELD(SMMU_CB9_PMEVTYPER2, NSP, 1, 29)
4397    DEP_FIELD(SMMU_CB9_PMEVTYPER2, NSU, 1, 28)
4398    DEP_FIELD(SMMU_CB9_PMEVTYPER2, EVENT, 5, 0)
4399DEP_REG32(SMMU_CB9_PMEVTYPER3, 0x19e8c)
4400    DEP_FIELD(SMMU_CB9_PMEVTYPER3, P, 1, 31)
4401    DEP_FIELD(SMMU_CB9_PMEVTYPER3, U, 1, 30)
4402    DEP_FIELD(SMMU_CB9_PMEVTYPER3, NSP, 1, 29)
4403    DEP_FIELD(SMMU_CB9_PMEVTYPER3, NSU, 1, 28)
4404    DEP_FIELD(SMMU_CB9_PMEVTYPER3, EVENT, 5, 0)
4405DEP_REG32(SMMU_CB9_PMCFGR, 0x19f00)
4406    DEP_FIELD(SMMU_CB9_PMCFGR, NCG, 8, 24)
4407    DEP_FIELD(SMMU_CB9_PMCFGR, UEN, 1, 19)
4408    DEP_FIELD(SMMU_CB9_PMCFGR, EX, 1, 16)
4409    DEP_FIELD(SMMU_CB9_PMCFGR, CCD, 1, 15)
4410    DEP_FIELD(SMMU_CB9_PMCFGR, CC, 1, 14)
4411    DEP_FIELD(SMMU_CB9_PMCFGR, SIZE, 6, 8)
4412    DEP_FIELD(SMMU_CB9_PMCFGR, N, 8, 0)
4413DEP_REG32(SMMU_CB9_PMCR, 0x19f04)
4414    DEP_FIELD(SMMU_CB9_PMCR, IMP, 8, 24)
4415    DEP_FIELD(SMMU_CB9_PMCR, X, 1, 4)
4416    DEP_FIELD(SMMU_CB9_PMCR, P, 1, 1)
4417    DEP_FIELD(SMMU_CB9_PMCR, E, 1, 0)
4418DEP_REG32(SMMU_CB9_PMCEID, 0x19f20)
4419    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X12, 1, 17)
4420    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X11, 1, 16)
4421    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X10, 1, 15)
4422    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X0A, 1, 9)
4423    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X09, 1, 8)
4424    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X08, 1, 7)
4425    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X01, 1, 1)
4426    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X00, 1, 0)
4427DEP_REG32(SMMU_CB9_PMCNTENSE, 0x19f40)
4428    DEP_FIELD(SMMU_CB9_PMCNTENSE, P3, 1, 3)
4429    DEP_FIELD(SMMU_CB9_PMCNTENSE, P2, 1, 2)
4430    DEP_FIELD(SMMU_CB9_PMCNTENSE, P1, 1, 1)
4431    DEP_FIELD(SMMU_CB9_PMCNTENSE, P0, 1, 0)
4432DEP_REG32(SMMU_CB9_PMCNTENCLR, 0x19f44)
4433    DEP_FIELD(SMMU_CB9_PMCNTENCLR, P3, 1, 3)
4434    DEP_FIELD(SMMU_CB9_PMCNTENCLR, P2, 1, 2)
4435    DEP_FIELD(SMMU_CB9_PMCNTENCLR, P1, 1, 1)
4436    DEP_FIELD(SMMU_CB9_PMCNTENCLR, P0, 1, 0)
4437DEP_REG32(SMMU_CB9_PMCNTENSET, 0x19f48)
4438    DEP_FIELD(SMMU_CB9_PMCNTENSET, P3, 1, 3)
4439    DEP_FIELD(SMMU_CB9_PMCNTENSET, P2, 1, 2)
4440    DEP_FIELD(SMMU_CB9_PMCNTENSET, P1, 1, 1)
4441    DEP_FIELD(SMMU_CB9_PMCNTENSET, P0, 1, 0)
4442DEP_REG32(SMMU_CB9_PMINTENCLR, 0x19f4c)
4443    DEP_FIELD(SMMU_CB9_PMINTENCLR, P3, 1, 3)
4444    DEP_FIELD(SMMU_CB9_PMINTENCLR, P2, 1, 2)
4445    DEP_FIELD(SMMU_CB9_PMINTENCLR, P1, 1, 1)
4446    DEP_FIELD(SMMU_CB9_PMINTENCLR, P0, 1, 0)
4447DEP_REG32(SMMU_CB9_PMOVSCLR, 0x19f50)
4448    DEP_FIELD(SMMU_CB9_PMOVSCLR, P3, 1, 3)
4449    DEP_FIELD(SMMU_CB9_PMOVSCLR, P2, 1, 2)
4450    DEP_FIELD(SMMU_CB9_PMOVSCLR, P1, 1, 1)
4451    DEP_FIELD(SMMU_CB9_PMOVSCLR, P0, 1, 0)
4452DEP_REG32(SMMU_CB9_PMOVSSET, 0x19f58)
4453    DEP_FIELD(SMMU_CB9_PMOVSSET, P3, 1, 3)
4454    DEP_FIELD(SMMU_CB9_PMOVSSET, P2, 1, 2)
4455    DEP_FIELD(SMMU_CB9_PMOVSSET, P1, 1, 1)
4456    DEP_FIELD(SMMU_CB9_PMOVSSET, P0, 1, 0)
4457DEP_REG32(SMMU_CB9_PMAUTHSTATUS, 0x19fb8)
4458    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, SNI, 1, 7)
4459    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, SNE, 1, 6)
4460    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, SI, 1, 5)
4461    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, SE, 1, 4)
4462    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, NSNI, 1, 3)
4463    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, NSNE, 1, 2)
4464    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, NSI, 1, 1)
4465    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, NSE, 1, 0)
4466DEP_REG32(SMMU_CB10_SCTLR, 0x1a000)
4467    DEP_FIELD(SMMU_CB10_SCTLR, NSCFG, 2, 28)
4468    DEP_FIELD(SMMU_CB10_SCTLR, WACFG, 2, 26)
4469    DEP_FIELD(SMMU_CB10_SCTLR, RACFG, 2, 24)
4470    DEP_FIELD(SMMU_CB10_SCTLR, SHCFG, 2, 22)
4471    DEP_FIELD(SMMU_CB10_SCTLR, FB, 1, 21)
4472    DEP_FIELD(SMMU_CB10_SCTLR, MTCFG, 1, 20)
4473    DEP_FIELD(SMMU_CB10_SCTLR, MEMATTR, 4, 16)
4474    DEP_FIELD(SMMU_CB10_SCTLR, TRANSIENTCFG, 2, 14)
4475    DEP_FIELD(SMMU_CB10_SCTLR, PTW, 1, 13)
4476    DEP_FIELD(SMMU_CB10_SCTLR, ASIDPNE, 1, 12)
4477    DEP_FIELD(SMMU_CB10_SCTLR, UWXN, 1, 10)
4478    DEP_FIELD(SMMU_CB10_SCTLR, WXN, 1, 9)
4479    DEP_FIELD(SMMU_CB10_SCTLR, HUPCF, 1, 8)
4480    DEP_FIELD(SMMU_CB10_SCTLR, CFCFG, 1, 7)
4481    DEP_FIELD(SMMU_CB10_SCTLR, CFIE, 1, 6)
4482    DEP_FIELD(SMMU_CB10_SCTLR, CFRE, 1, 5)
4483    DEP_FIELD(SMMU_CB10_SCTLR, E, 1, 4)
4484    DEP_FIELD(SMMU_CB10_SCTLR, AFFD, 1, 3)
4485    DEP_FIELD(SMMU_CB10_SCTLR, AFE, 1, 2)
4486    DEP_FIELD(SMMU_CB10_SCTLR, TRE, 1, 1)
4487    DEP_FIELD(SMMU_CB10_SCTLR, M, 1, 0)
4488DEP_REG32(SMMU_CB10_ACTLR, 0x1a004)
4489    DEP_FIELD(SMMU_CB10_ACTLR, CPRE, 1, 1)
4490    DEP_FIELD(SMMU_CB10_ACTLR, CMTLB, 1, 0)
4491DEP_REG32(SMMU_CB10_RESUME, 0x1a008)
4492    DEP_FIELD(SMMU_CB10_RESUME, TNR, 1, 0)
4493DEP_REG32(SMMU_CB10_TCR2, 0x1a010)
4494    DEP_FIELD(SMMU_CB10_TCR2, NSCFG1, 1, 30)
4495    DEP_FIELD(SMMU_CB10_TCR2, SEP, 3, 15)
4496    DEP_FIELD(SMMU_CB10_TCR2, NSCFG0, 1, 14)
4497    DEP_FIELD(SMMU_CB10_TCR2, TBI1, 1, 6)
4498    DEP_FIELD(SMMU_CB10_TCR2, TBI0, 1, 5)
4499    DEP_FIELD(SMMU_CB10_TCR2, AS, 1, 4)
4500    DEP_FIELD(SMMU_CB10_TCR2, PASIZE, 3, 0)
4501DEP_REG32(SMMU_CB10_TTBR0_LOW, 0x1a020)
4502    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_31_7, 25, 7)
4503    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
4504    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
4505    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
4506    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_2, 1, 2)
4507    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_1_S, 1, 1)
4508    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
4509DEP_REG32(SMMU_CB10_TTBR0_HIGH, 0x1a024)
4510    DEP_FIELD(SMMU_CB10_TTBR0_HIGH, ASID, 16, 16)
4511    DEP_FIELD(SMMU_CB10_TTBR0_HIGH, ADDRESS, 16, 0)
4512DEP_REG32(SMMU_CB10_TTBR1_LOW, 0x1a028)
4513    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_31_7, 25, 7)
4514    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
4515    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
4516    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
4517    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_2, 1, 2)
4518    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_1_S, 1, 1)
4519    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
4520DEP_REG32(SMMU_CB10_TTBR1_HIGH, 0x1a02c)
4521    DEP_FIELD(SMMU_CB10_TTBR1_HIGH, ASID, 16, 16)
4522    DEP_FIELD(SMMU_CB10_TTBR1_HIGH, ADDRESS, 16, 0)
4523DEP_REG32(SMMU_CB10_TCR_LPAE, 0x1a030)
4524    DEP_FIELD(SMMU_CB10_TCR_LPAE, EAE, 1, 31)
4525    DEP_FIELD(SMMU_CB10_TCR_LPAE, NSCFG1_TG1, 1, 30)
4526    DEP_FIELD(SMMU_CB10_TCR_LPAE, SH1, 2, 28)
4527    DEP_FIELD(SMMU_CB10_TCR_LPAE, ORGN1, 2, 26)
4528    DEP_FIELD(SMMU_CB10_TCR_LPAE, IRGN1, 2, 24)
4529    DEP_FIELD(SMMU_CB10_TCR_LPAE, EPD1, 1, 23)
4530    DEP_FIELD(SMMU_CB10_TCR_LPAE, A1, 1, 22)
4531    DEP_FIELD(SMMU_CB10_TCR_LPAE, T1SZ_5_3, 3, 19)
4532    DEP_FIELD(SMMU_CB10_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
4533    DEP_FIELD(SMMU_CB10_TCR_LPAE, NSCFG0_TG0, 1, 14)
4534    DEP_FIELD(SMMU_CB10_TCR_LPAE, SH0, 2, 12)
4535    DEP_FIELD(SMMU_CB10_TCR_LPAE, ORGN0, 2, 10)
4536    DEP_FIELD(SMMU_CB10_TCR_LPAE, IRGN0, 2, 8)
4537    DEP_FIELD(SMMU_CB10_TCR_LPAE, SL0_1_EPD0, 1, 7)
4538    DEP_FIELD(SMMU_CB10_TCR_LPAE, SL0_0, 1, 6)
4539    DEP_FIELD(SMMU_CB10_TCR_LPAE, PD1_T0SZ_5, 1, 5)
4540    DEP_FIELD(SMMU_CB10_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
4541    DEP_FIELD(SMMU_CB10_TCR_LPAE, T0SZ_3_0, 4, 0)
4542DEP_REG32(SMMU_CB10_CONTEXTIDR, 0x1a034)
4543    DEP_FIELD(SMMU_CB10_CONTEXTIDR, PROCID, 24, 8)
4544    DEP_FIELD(SMMU_CB10_CONTEXTIDR, ASID, 8, 0)
4545DEP_REG32(SMMU_CB10_PRRR_MAIR0, 0x1a038)
4546    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS7, 1, 31)
4547    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS6, 1, 30)
4548    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS5, 1, 29)
4549    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS4, 1, 28)
4550    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS3, 1, 27)
4551    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS2, 1, 26)
4552    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS1, 1, 25)
4553    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS0, 1, 24)
4554    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NS1, 1, 19)
4555    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NS0, 1, 18)
4556    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, DS1, 1, 17)
4557    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, DS0, 1, 16)
4558    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR7, 2, 14)
4559    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR6, 2, 12)
4560    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR5, 2, 10)
4561    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR4, 2, 8)
4562    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR3, 2, 6)
4563    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR2, 2, 4)
4564    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR1, 2, 2)
4565    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR0, 2, 0)
4566DEP_REG32(SMMU_CB10_NMRR_MAIR1, 0x1a03c)
4567    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR7, 2, 30)
4568    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR6, 2, 28)
4569    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR5, 2, 26)
4570    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR4, 2, 24)
4571    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR3, 2, 22)
4572    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR2, 2, 20)
4573    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR1, 2, 18)
4574    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR0, 2, 16)
4575    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR7, 2, 14)
4576    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR6, 2, 12)
4577    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR5, 2, 10)
4578    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR4, 2, 8)
4579    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR3, 2, 6)
4580    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR2, 2, 4)
4581    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR1, 2, 2)
4582    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR0, 2, 0)
4583DEP_REG32(SMMU_CB10_FSR, 0x1a058)
4584    DEP_FIELD(SMMU_CB10_FSR, MULTI, 1, 31)
4585    DEP_FIELD(SMMU_CB10_FSR, SS, 1, 30)
4586    DEP_FIELD(SMMU_CB10_FSR, FORMAT, 2, 9)
4587    DEP_FIELD(SMMU_CB10_FSR, UUT, 1, 8)
4588    DEP_FIELD(SMMU_CB10_FSR, ASF, 1, 7)
4589    DEP_FIELD(SMMU_CB10_FSR, TLBLKF, 1, 6)
4590    DEP_FIELD(SMMU_CB10_FSR, TLBMCF, 1, 5)
4591    DEP_FIELD(SMMU_CB10_FSR, EF, 1, 4)
4592    DEP_FIELD(SMMU_CB10_FSR, PF, 1, 3)
4593    DEP_FIELD(SMMU_CB10_FSR, AFF, 1, 2)
4594    DEP_FIELD(SMMU_CB10_FSR, TF, 1, 1)
4595DEP_REG32(SMMU_CB10_FSRRESTORE, 0x1a05c)
4596DEP_REG32(SMMU_CB10_FAR_LOW, 0x1a060)
4597DEP_REG32(SMMU_CB10_FAR_HIGH, 0x1a064)
4598    DEP_FIELD(SMMU_CB10_FAR_HIGH, BITS, 17, 0)
4599DEP_REG32(SMMU_CB10_FSYNR0, 0x1a068)
4600    DEP_FIELD(SMMU_CB10_FSYNR0, S1CBNDX, 4, 16)
4601    DEP_FIELD(SMMU_CB10_FSYNR0, AFR, 1, 11)
4602    DEP_FIELD(SMMU_CB10_FSYNR0, PTWF, 1, 10)
4603    DEP_FIELD(SMMU_CB10_FSYNR0, ATOF, 1, 9)
4604    DEP_FIELD(SMMU_CB10_FSYNR0, NSATTR, 1, 8)
4605    DEP_FIELD(SMMU_CB10_FSYNR0, IND, 1, 6)
4606    DEP_FIELD(SMMU_CB10_FSYNR0, PNU, 1, 5)
4607    DEP_FIELD(SMMU_CB10_FSYNR0, WNR, 1, 4)
4608    DEP_FIELD(SMMU_CB10_FSYNR0, PLVL, 2, 0)
4609DEP_REG32(SMMU_CB10_IPAFAR_LOW, 0x1a070)
4610    DEP_FIELD(SMMU_CB10_IPAFAR_LOW, IPAFAR_L, 20, 12)
4611    DEP_FIELD(SMMU_CB10_IPAFAR_LOW, FAR_RO, 12, 0)
4612DEP_REG32(SMMU_CB10_IPAFAR_HIGH, 0x1a074)
4613    DEP_FIELD(SMMU_CB10_IPAFAR_HIGH, BITS, 16, 0)
4614DEP_REG32(SMMU_CB10_TLBIVA_LOW, 0x1a600)
4615DEP_REG32(SMMU_CB10_TLBIVA_HIGH, 0x1a604)
4616    DEP_FIELD(SMMU_CB10_TLBIVA_HIGH, ASID, 16, 16)
4617    DEP_FIELD(SMMU_CB10_TLBIVA_HIGH, ADDRESS, 5, 0)
4618DEP_REG32(SMMU_CB10_TLBIVAA_LOW, 0x1a608)
4619DEP_REG32(SMMU_CB10_TLBIVAA_HIGH, 0x1a60c)
4620    DEP_FIELD(SMMU_CB10_TLBIVAA_HIGH, ASID, 16, 16)
4621    DEP_FIELD(SMMU_CB10_TLBIVAA_HIGH, ADDRESS, 5, 0)
4622DEP_REG32(SMMU_CB10_TLBIASID, 0x1a610)
4623    DEP_FIELD(SMMU_CB10_TLBIASID, ASID, 16, 0)
4624DEP_REG32(SMMU_CB10_TLBIALL, 0x1a618)
4625DEP_REG32(SMMU_CB10_TLBIVAL_LOW, 0x1a620)
4626DEP_REG32(SMMU_CB10_TLBIVAL_HIGH, 0x1a624)
4627    DEP_FIELD(SMMU_CB10_TLBIVAL_HIGH, ASID, 16, 16)
4628    DEP_FIELD(SMMU_CB10_TLBIVAL_HIGH, ADDRESS, 5, 0)
4629DEP_REG32(SMMU_CB10_TLBIVAAL_LOW, 0x1a628)
4630DEP_REG32(SMMU_CB10_TLBIVAAL_HIGH, 0x1a62c)
4631    DEP_FIELD(SMMU_CB10_TLBIVAAL_HIGH, ASID, 16, 16)
4632    DEP_FIELD(SMMU_CB10_TLBIVAAL_HIGH, ADDRESS, 5, 0)
4633DEP_REG32(SMMU_CB10_TLBIIPAS2_LOW, 0x1a630)
4634DEP_REG32(SMMU_CB10_TLBIIPAS2_HIGH, 0x1a634)
4635    DEP_FIELD(SMMU_CB10_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
4636DEP_REG32(SMMU_CB10_TLBIIPAS2L_LOW, 0x1a638)
4637DEP_REG32(SMMU_CB10_TLBIIPAS2L_HIGH, 0x1a63c)
4638    DEP_FIELD(SMMU_CB10_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
4639DEP_REG32(SMMU_CB10_TLBSYNC, 0x1a7f0)
4640DEP_REG32(SMMU_CB10_TLBSTATUS, 0x1a7f4)
4641    DEP_FIELD(SMMU_CB10_TLBSTATUS, SACTIVE, 1, 0)
4642DEP_REG32(SMMU_CB10_PMEVCNTR0, 0x1ae00)
4643DEP_REG32(SMMU_CB10_PMEVCNTR1, 0x1ae04)
4644DEP_REG32(SMMU_CB10_PMEVCNTR2, 0x1ae08)
4645DEP_REG32(SMMU_CB10_PMEVCNTR3, 0x1ae0c)
4646DEP_REG32(SMMU_CB10_PMEVTYPER0, 0x1ae80)
4647    DEP_FIELD(SMMU_CB10_PMEVTYPER0, P, 1, 31)
4648    DEP_FIELD(SMMU_CB10_PMEVTYPER0, U, 1, 30)
4649    DEP_FIELD(SMMU_CB10_PMEVTYPER0, NSP, 1, 29)
4650    DEP_FIELD(SMMU_CB10_PMEVTYPER0, NSU, 1, 28)
4651    DEP_FIELD(SMMU_CB10_PMEVTYPER0, EVENT, 5, 0)
4652DEP_REG32(SMMU_CB10_PMEVTYPER1, 0x1ae84)
4653    DEP_FIELD(SMMU_CB10_PMEVTYPER1, P, 1, 31)
4654    DEP_FIELD(SMMU_CB10_PMEVTYPER1, U, 1, 30)
4655    DEP_FIELD(SMMU_CB10_PMEVTYPER1, NSP, 1, 29)
4656    DEP_FIELD(SMMU_CB10_PMEVTYPER1, NSU, 1, 28)
4657    DEP_FIELD(SMMU_CB10_PMEVTYPER1, EVENT, 5, 0)
4658DEP_REG32(SMMU_CB10_PMEVTYPER2, 0x1ae88)
4659    DEP_FIELD(SMMU_CB10_PMEVTYPER2, P, 1, 31)
4660    DEP_FIELD(SMMU_CB10_PMEVTYPER2, U, 1, 30)
4661    DEP_FIELD(SMMU_CB10_PMEVTYPER2, NSP, 1, 29)
4662    DEP_FIELD(SMMU_CB10_PMEVTYPER2, NSU, 1, 28)
4663    DEP_FIELD(SMMU_CB10_PMEVTYPER2, EVENT, 5, 0)
4664DEP_REG32(SMMU_CB10_PMEVTYPER3, 0x1ae8c)
4665    DEP_FIELD(SMMU_CB10_PMEVTYPER3, P, 1, 31)
4666    DEP_FIELD(SMMU_CB10_PMEVTYPER3, U, 1, 30)
4667    DEP_FIELD(SMMU_CB10_PMEVTYPER3, NSP, 1, 29)
4668    DEP_FIELD(SMMU_CB10_PMEVTYPER3, NSU, 1, 28)
4669    DEP_FIELD(SMMU_CB10_PMEVTYPER3, EVENT, 5, 0)
4670DEP_REG32(SMMU_CB10_PMCFGR, 0x1af00)
4671    DEP_FIELD(SMMU_CB10_PMCFGR, NCG, 8, 24)
4672    DEP_FIELD(SMMU_CB10_PMCFGR, UEN, 1, 19)
4673    DEP_FIELD(SMMU_CB10_PMCFGR, EX, 1, 16)
4674    DEP_FIELD(SMMU_CB10_PMCFGR, CCD, 1, 15)
4675    DEP_FIELD(SMMU_CB10_PMCFGR, CC, 1, 14)
4676    DEP_FIELD(SMMU_CB10_PMCFGR, SIZE, 6, 8)
4677    DEP_FIELD(SMMU_CB10_PMCFGR, N, 8, 0)
4678DEP_REG32(SMMU_CB10_PMCR, 0x1af04)
4679    DEP_FIELD(SMMU_CB10_PMCR, IMP, 8, 24)
4680    DEP_FIELD(SMMU_CB10_PMCR, X, 1, 4)
4681    DEP_FIELD(SMMU_CB10_PMCR, P, 1, 1)
4682    DEP_FIELD(SMMU_CB10_PMCR, E, 1, 0)
4683DEP_REG32(SMMU_CB10_PMCEID, 0x1af20)
4684    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X12, 1, 17)
4685    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X11, 1, 16)
4686    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X10, 1, 15)
4687    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X0A, 1, 9)
4688    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X09, 1, 8)
4689    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X08, 1, 7)
4690    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X01, 1, 1)
4691    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X00, 1, 0)
4692DEP_REG32(SMMU_CB10_PMCNTENSE, 0x1af40)
4693    DEP_FIELD(SMMU_CB10_PMCNTENSE, P3, 1, 3)
4694    DEP_FIELD(SMMU_CB10_PMCNTENSE, P2, 1, 2)
4695    DEP_FIELD(SMMU_CB10_PMCNTENSE, P1, 1, 1)
4696    DEP_FIELD(SMMU_CB10_PMCNTENSE, P0, 1, 0)
4697DEP_REG32(SMMU_CB10_PMCNTENCLR, 0x1af44)
4698    DEP_FIELD(SMMU_CB10_PMCNTENCLR, P3, 1, 3)
4699    DEP_FIELD(SMMU_CB10_PMCNTENCLR, P2, 1, 2)
4700    DEP_FIELD(SMMU_CB10_PMCNTENCLR, P1, 1, 1)
4701    DEP_FIELD(SMMU_CB10_PMCNTENCLR, P0, 1, 0)
4702DEP_REG32(SMMU_CB10_PMCNTENSET, 0x1af48)
4703    DEP_FIELD(SMMU_CB10_PMCNTENSET, P3, 1, 3)
4704    DEP_FIELD(SMMU_CB10_PMCNTENSET, P2, 1, 2)
4705    DEP_FIELD(SMMU_CB10_PMCNTENSET, P1, 1, 1)
4706    DEP_FIELD(SMMU_CB10_PMCNTENSET, P0, 1, 0)
4707DEP_REG32(SMMU_CB10_PMINTENCLR, 0x1af4c)
4708    DEP_FIELD(SMMU_CB10_PMINTENCLR, P3, 1, 3)
4709    DEP_FIELD(SMMU_CB10_PMINTENCLR, P2, 1, 2)
4710    DEP_FIELD(SMMU_CB10_PMINTENCLR, P1, 1, 1)
4711    DEP_FIELD(SMMU_CB10_PMINTENCLR, P0, 1, 0)
4712DEP_REG32(SMMU_CB10_PMOVSCLR, 0x1af50)
4713    DEP_FIELD(SMMU_CB10_PMOVSCLR, P3, 1, 3)
4714    DEP_FIELD(SMMU_CB10_PMOVSCLR, P2, 1, 2)
4715    DEP_FIELD(SMMU_CB10_PMOVSCLR, P1, 1, 1)
4716    DEP_FIELD(SMMU_CB10_PMOVSCLR, P0, 1, 0)
4717DEP_REG32(SMMU_CB10_PMOVSSET, 0x1af58)
4718    DEP_FIELD(SMMU_CB10_PMOVSSET, P3, 1, 3)
4719    DEP_FIELD(SMMU_CB10_PMOVSSET, P2, 1, 2)
4720    DEP_FIELD(SMMU_CB10_PMOVSSET, P1, 1, 1)
4721    DEP_FIELD(SMMU_CB10_PMOVSSET, P0, 1, 0)
4722DEP_REG32(SMMU_CB10_PMAUTHSTATUS, 0x1afb8)
4723    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, SNI, 1, 7)
4724    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, SNE, 1, 6)
4725    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, SI, 1, 5)
4726    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, SE, 1, 4)
4727    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, NSNI, 1, 3)
4728    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, NSNE, 1, 2)
4729    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, NSI, 1, 1)
4730    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, NSE, 1, 0)
4731DEP_REG32(SMMU_CB11_SCTLR, 0x1b000)
4732    DEP_FIELD(SMMU_CB11_SCTLR, NSCFG, 2, 28)
4733    DEP_FIELD(SMMU_CB11_SCTLR, WACFG, 2, 26)
4734    DEP_FIELD(SMMU_CB11_SCTLR, RACFG, 2, 24)
4735    DEP_FIELD(SMMU_CB11_SCTLR, SHCFG, 2, 22)
4736    DEP_FIELD(SMMU_CB11_SCTLR, FB, 1, 21)
4737    DEP_FIELD(SMMU_CB11_SCTLR, MTCFG, 1, 20)
4738    DEP_FIELD(SMMU_CB11_SCTLR, MEMATTR, 4, 16)
4739    DEP_FIELD(SMMU_CB11_SCTLR, TRANSIENTCFG, 2, 14)
4740    DEP_FIELD(SMMU_CB11_SCTLR, PTW, 1, 13)
4741    DEP_FIELD(SMMU_CB11_SCTLR, ASIDPNE, 1, 12)
4742    DEP_FIELD(SMMU_CB11_SCTLR, UWXN, 1, 10)
4743    DEP_FIELD(SMMU_CB11_SCTLR, WXN, 1, 9)
4744    DEP_FIELD(SMMU_CB11_SCTLR, HUPCF, 1, 8)
4745    DEP_FIELD(SMMU_CB11_SCTLR, CFCFG, 1, 7)
4746    DEP_FIELD(SMMU_CB11_SCTLR, CFIE, 1, 6)
4747    DEP_FIELD(SMMU_CB11_SCTLR, CFRE, 1, 5)
4748    DEP_FIELD(SMMU_CB11_SCTLR, E, 1, 4)
4749    DEP_FIELD(SMMU_CB11_SCTLR, AFFD, 1, 3)
4750    DEP_FIELD(SMMU_CB11_SCTLR, AFE, 1, 2)
4751    DEP_FIELD(SMMU_CB11_SCTLR, TRE, 1, 1)
4752    DEP_FIELD(SMMU_CB11_SCTLR, M, 1, 0)
4753DEP_REG32(SMMU_CB11_ACTLR, 0x1b004)
4754    DEP_FIELD(SMMU_CB11_ACTLR, CPRE, 1, 1)
4755    DEP_FIELD(SMMU_CB11_ACTLR, CMTLB, 1, 0)
4756DEP_REG32(SMMU_CB11_RESUME, 0x1b008)
4757    DEP_FIELD(SMMU_CB11_RESUME, TNR, 1, 0)
4758DEP_REG32(SMMU_CB11_TCR2, 0x1b010)
4759    DEP_FIELD(SMMU_CB11_TCR2, NSCFG1, 1, 30)
4760    DEP_FIELD(SMMU_CB11_TCR2, SEP, 3, 15)
4761    DEP_FIELD(SMMU_CB11_TCR2, NSCFG0, 1, 14)
4762    DEP_FIELD(SMMU_CB11_TCR2, TBI1, 1, 6)
4763    DEP_FIELD(SMMU_CB11_TCR2, TBI0, 1, 5)
4764    DEP_FIELD(SMMU_CB11_TCR2, AS, 1, 4)
4765    DEP_FIELD(SMMU_CB11_TCR2, PASIZE, 3, 0)
4766DEP_REG32(SMMU_CB11_TTBR0_LOW, 0x1b020)
4767    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_31_7, 25, 7)
4768    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
4769    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
4770    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
4771    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_2, 1, 2)
4772    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_1_S, 1, 1)
4773    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
4774DEP_REG32(SMMU_CB11_TTBR0_HIGH, 0x1b024)
4775    DEP_FIELD(SMMU_CB11_TTBR0_HIGH, ASID, 16, 16)
4776    DEP_FIELD(SMMU_CB11_TTBR0_HIGH, ADDRESS, 16, 0)
4777DEP_REG32(SMMU_CB11_TTBR1_LOW, 0x1b028)
4778    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_31_7, 25, 7)
4779    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
4780    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
4781    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
4782    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_2, 1, 2)
4783    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_1_S, 1, 1)
4784    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
4785DEP_REG32(SMMU_CB11_TTBR1_HIGH, 0x1b02c)
4786    DEP_FIELD(SMMU_CB11_TTBR1_HIGH, ASID, 16, 16)
4787    DEP_FIELD(SMMU_CB11_TTBR1_HIGH, ADDRESS, 16, 0)
4788DEP_REG32(SMMU_CB11_TCR_LPAE, 0x1b030)
4789    DEP_FIELD(SMMU_CB11_TCR_LPAE, EAE, 1, 31)
4790    DEP_FIELD(SMMU_CB11_TCR_LPAE, NSCFG1_TG1, 1, 30)
4791    DEP_FIELD(SMMU_CB11_TCR_LPAE, SH1, 2, 28)
4792    DEP_FIELD(SMMU_CB11_TCR_LPAE, ORGN1, 2, 26)
4793    DEP_FIELD(SMMU_CB11_TCR_LPAE, IRGN1, 2, 24)
4794    DEP_FIELD(SMMU_CB11_TCR_LPAE, EPD1, 1, 23)
4795    DEP_FIELD(SMMU_CB11_TCR_LPAE, A1, 1, 22)
4796    DEP_FIELD(SMMU_CB11_TCR_LPAE, T1SZ_5_3, 3, 19)
4797    DEP_FIELD(SMMU_CB11_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
4798    DEP_FIELD(SMMU_CB11_TCR_LPAE, NSCFG0_TG0, 1, 14)
4799    DEP_FIELD(SMMU_CB11_TCR_LPAE, SH0, 2, 12)
4800    DEP_FIELD(SMMU_CB11_TCR_LPAE, ORGN0, 2, 10)
4801    DEP_FIELD(SMMU_CB11_TCR_LPAE, IRGN0, 2, 8)
4802    DEP_FIELD(SMMU_CB11_TCR_LPAE, SL0_1_EPD0, 1, 7)
4803    DEP_FIELD(SMMU_CB11_TCR_LPAE, SL0_0, 1, 6)
4804    DEP_FIELD(SMMU_CB11_TCR_LPAE, PD1_T0SZ_5, 1, 5)
4805    DEP_FIELD(SMMU_CB11_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
4806    DEP_FIELD(SMMU_CB11_TCR_LPAE, T0SZ_3_0, 4, 0)
4807DEP_REG32(SMMU_CB11_CONTEXTIDR, 0x1b034)
4808    DEP_FIELD(SMMU_CB11_CONTEXTIDR, PROCID, 24, 8)
4809    DEP_FIELD(SMMU_CB11_CONTEXTIDR, ASID, 8, 0)
4810DEP_REG32(SMMU_CB11_PRRR_MAIR0, 0x1b038)
4811    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS7, 1, 31)
4812    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS6, 1, 30)
4813    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS5, 1, 29)
4814    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS4, 1, 28)
4815    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS3, 1, 27)
4816    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS2, 1, 26)
4817    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS1, 1, 25)
4818    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS0, 1, 24)
4819    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NS1, 1, 19)
4820    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NS0, 1, 18)
4821    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, DS1, 1, 17)
4822    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, DS0, 1, 16)
4823    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR7, 2, 14)
4824    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR6, 2, 12)
4825    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR5, 2, 10)
4826    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR4, 2, 8)
4827    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR3, 2, 6)
4828    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR2, 2, 4)
4829    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR1, 2, 2)
4830    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR0, 2, 0)
4831DEP_REG32(SMMU_CB11_NMRR_MAIR1, 0x1b03c)
4832    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR7, 2, 30)
4833    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR6, 2, 28)
4834    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR5, 2, 26)
4835    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR4, 2, 24)
4836    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR3, 2, 22)
4837    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR2, 2, 20)
4838    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR1, 2, 18)
4839    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR0, 2, 16)
4840    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR7, 2, 14)
4841    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR6, 2, 12)
4842    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR5, 2, 10)
4843    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR4, 2, 8)
4844    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR3, 2, 6)
4845    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR2, 2, 4)
4846    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR1, 2, 2)
4847    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR0, 2, 0)
4848DEP_REG32(SMMU_CB11_FSR, 0x1b058)
4849    DEP_FIELD(SMMU_CB11_FSR, MULTI, 1, 31)
4850    DEP_FIELD(SMMU_CB11_FSR, SS, 1, 30)
4851    DEP_FIELD(SMMU_CB11_FSR, FORMAT, 2, 9)
4852    DEP_FIELD(SMMU_CB11_FSR, UUT, 1, 8)
4853    DEP_FIELD(SMMU_CB11_FSR, ASF, 1, 7)
4854    DEP_FIELD(SMMU_CB11_FSR, TLBLKF, 1, 6)
4855    DEP_FIELD(SMMU_CB11_FSR, TLBMCF, 1, 5)
4856    DEP_FIELD(SMMU_CB11_FSR, EF, 1, 4)
4857    DEP_FIELD(SMMU_CB11_FSR, PF, 1, 3)
4858    DEP_FIELD(SMMU_CB11_FSR, AFF, 1, 2)
4859    DEP_FIELD(SMMU_CB11_FSR, TF, 1, 1)
4860DEP_REG32(SMMU_CB11_FSRRESTORE, 0x1b05c)
4861DEP_REG32(SMMU_CB11_FAR_LOW, 0x1b060)
4862DEP_REG32(SMMU_CB11_FAR_HIGH, 0x1b064)
4863    DEP_FIELD(SMMU_CB11_FAR_HIGH, BITS, 17, 0)
4864DEP_REG32(SMMU_CB11_FSYNR0, 0x1b068)
4865    DEP_FIELD(SMMU_CB11_FSYNR0, S1CBNDX, 4, 16)
4866    DEP_FIELD(SMMU_CB11_FSYNR0, AFR, 1, 11)
4867    DEP_FIELD(SMMU_CB11_FSYNR0, PTWF, 1, 10)
4868    DEP_FIELD(SMMU_CB11_FSYNR0, ATOF, 1, 9)
4869    DEP_FIELD(SMMU_CB11_FSYNR0, NSATTR, 1, 8)
4870    DEP_FIELD(SMMU_CB11_FSYNR0, IND, 1, 6)
4871    DEP_FIELD(SMMU_CB11_FSYNR0, PNU, 1, 5)
4872    DEP_FIELD(SMMU_CB11_FSYNR0, WNR, 1, 4)
4873    DEP_FIELD(SMMU_CB11_FSYNR0, PLVL, 2, 0)
4874DEP_REG32(SMMU_CB11_IPAFAR_LOW, 0x1b070)
4875    DEP_FIELD(SMMU_CB11_IPAFAR_LOW, IPAFAR_L, 20, 12)
4876    DEP_FIELD(SMMU_CB11_IPAFAR_LOW, FAR_RO, 12, 0)
4877DEP_REG32(SMMU_CB11_IPAFAR_HIGH, 0x1b074)
4878    DEP_FIELD(SMMU_CB11_IPAFAR_HIGH, BITS, 16, 0)
4879DEP_REG32(SMMU_CB11_TLBIVA_LOW, 0x1b600)
4880DEP_REG32(SMMU_CB11_TLBIVA_HIGH, 0x1b604)
4881    DEP_FIELD(SMMU_CB11_TLBIVA_HIGH, ASID, 16, 16)
4882    DEP_FIELD(SMMU_CB11_TLBIVA_HIGH, ADDRESS, 5, 0)
4883DEP_REG32(SMMU_CB11_TLBIVAA_LOW, 0x1b608)
4884DEP_REG32(SMMU_CB11_TLBIVAA_HIGH, 0x1b60c)
4885    DEP_FIELD(SMMU_CB11_TLBIVAA_HIGH, ASID, 16, 16)
4886    DEP_FIELD(SMMU_CB11_TLBIVAA_HIGH, ADDRESS, 5, 0)
4887DEP_REG32(SMMU_CB11_TLBIASID, 0x1b610)
4888    DEP_FIELD(SMMU_CB11_TLBIASID, ASID, 16, 0)
4889DEP_REG32(SMMU_CB11_TLBIALL, 0x1b618)
4890DEP_REG32(SMMU_CB11_TLBIVAL_LOW, 0x1b620)
4891DEP_REG32(SMMU_CB11_TLBIVAL_HIGH, 0x1b624)
4892    DEP_FIELD(SMMU_CB11_TLBIVAL_HIGH, ASID, 16, 16)
4893    DEP_FIELD(SMMU_CB11_TLBIVAL_HIGH, ADDRESS, 5, 0)
4894DEP_REG32(SMMU_CB11_TLBIVAAL_LOW, 0x1b628)
4895DEP_REG32(SMMU_CB11_TLBIVAAL_HIGH, 0x1b62c)
4896    DEP_FIELD(SMMU_CB11_TLBIVAAL_HIGH, ASID, 16, 16)
4897    DEP_FIELD(SMMU_CB11_TLBIVAAL_HIGH, ADDRESS, 5, 0)
4898DEP_REG32(SMMU_CB11_TLBIIPAS2_LOW, 0x1b630)
4899DEP_REG32(SMMU_CB11_TLBIIPAS2_HIGH, 0x1b634)
4900    DEP_FIELD(SMMU_CB11_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
4901DEP_REG32(SMMU_CB11_TLBIIPAS2L_LOW, 0x1b638)
4902DEP_REG32(SMMU_CB11_TLBIIPAS2L_HIGH, 0x1b63c)
4903    DEP_FIELD(SMMU_CB11_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
4904DEP_REG32(SMMU_CB11_TLBSYNC, 0x1b7f0)
4905DEP_REG32(SMMU_CB11_TLBSTATUS, 0x1b7f4)
4906    DEP_FIELD(SMMU_CB11_TLBSTATUS, SACTIVE, 1, 0)
4907DEP_REG32(SMMU_CB11_PMEVCNTR0, 0x1be00)
4908DEP_REG32(SMMU_CB11_PMEVCNTR1, 0x1be04)
4909DEP_REG32(SMMU_CB11_PMEVCNTR2, 0x1be08)
4910DEP_REG32(SMMU_CB11_PMEVCNTR3, 0x1be0c)
4911DEP_REG32(SMMU_CB11_PMEVTYPER0, 0x1be80)
4912    DEP_FIELD(SMMU_CB11_PMEVTYPER0, P, 1, 31)
4913    DEP_FIELD(SMMU_CB11_PMEVTYPER0, U, 1, 30)
4914    DEP_FIELD(SMMU_CB11_PMEVTYPER0, NSP, 1, 29)
4915    DEP_FIELD(SMMU_CB11_PMEVTYPER0, NSU, 1, 28)
4916    DEP_FIELD(SMMU_CB11_PMEVTYPER0, EVENT, 5, 0)
4917DEP_REG32(SMMU_CB11_PMEVTYPER1, 0x1be84)
4918    DEP_FIELD(SMMU_CB11_PMEVTYPER1, P, 1, 31)
4919    DEP_FIELD(SMMU_CB11_PMEVTYPER1, U, 1, 30)
4920    DEP_FIELD(SMMU_CB11_PMEVTYPER1, NSP, 1, 29)
4921    DEP_FIELD(SMMU_CB11_PMEVTYPER1, NSU, 1, 28)
4922    DEP_FIELD(SMMU_CB11_PMEVTYPER1, EVENT, 5, 0)
4923DEP_REG32(SMMU_CB11_PMEVTYPER2, 0x1be88)
4924    DEP_FIELD(SMMU_CB11_PMEVTYPER2, P, 1, 31)
4925    DEP_FIELD(SMMU_CB11_PMEVTYPER2, U, 1, 30)
4926    DEP_FIELD(SMMU_CB11_PMEVTYPER2, NSP, 1, 29)
4927    DEP_FIELD(SMMU_CB11_PMEVTYPER2, NSU, 1, 28)
4928    DEP_FIELD(SMMU_CB11_PMEVTYPER2, EVENT, 5, 0)
4929DEP_REG32(SMMU_CB11_PMEVTYPER3, 0x1be8c)
4930    DEP_FIELD(SMMU_CB11_PMEVTYPER3, P, 1, 31)
4931    DEP_FIELD(SMMU_CB11_PMEVTYPER3, U, 1, 30)
4932    DEP_FIELD(SMMU_CB11_PMEVTYPER3, NSP, 1, 29)
4933    DEP_FIELD(SMMU_CB11_PMEVTYPER3, NSU, 1, 28)
4934    DEP_FIELD(SMMU_CB11_PMEVTYPER3, EVENT, 5, 0)
4935DEP_REG32(SMMU_CB11_PMCFGR, 0x1bf00)
4936    DEP_FIELD(SMMU_CB11_PMCFGR, NCG, 8, 24)
4937    DEP_FIELD(SMMU_CB11_PMCFGR, UEN, 1, 19)
4938    DEP_FIELD(SMMU_CB11_PMCFGR, EX, 1, 16)
4939    DEP_FIELD(SMMU_CB11_PMCFGR, CCD, 1, 15)
4940    DEP_FIELD(SMMU_CB11_PMCFGR, CC, 1, 14)
4941    DEP_FIELD(SMMU_CB11_PMCFGR, SIZE, 6, 8)
4942    DEP_FIELD(SMMU_CB11_PMCFGR, N, 8, 0)
4943DEP_REG32(SMMU_CB11_PMCR, 0x1bf04)
4944    DEP_FIELD(SMMU_CB11_PMCR, IMP, 8, 24)
4945    DEP_FIELD(SMMU_CB11_PMCR, X, 1, 4)
4946    DEP_FIELD(SMMU_CB11_PMCR, P, 1, 1)
4947    DEP_FIELD(SMMU_CB11_PMCR, E, 1, 0)
4948DEP_REG32(SMMU_CB11_PMCEID, 0x1bf20)
4949    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X12, 1, 17)
4950    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X11, 1, 16)
4951    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X10, 1, 15)
4952    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X0A, 1, 9)
4953    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X09, 1, 8)
4954    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X08, 1, 7)
4955    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X01, 1, 1)
4956    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X00, 1, 0)
4957DEP_REG32(SMMU_CB11_PMCNTENSE, 0x1bf40)
4958    DEP_FIELD(SMMU_CB11_PMCNTENSE, P3, 1, 3)
4959    DEP_FIELD(SMMU_CB11_PMCNTENSE, P2, 1, 2)
4960    DEP_FIELD(SMMU_CB11_PMCNTENSE, P1, 1, 1)
4961    DEP_FIELD(SMMU_CB11_PMCNTENSE, P0, 1, 0)
4962DEP_REG32(SMMU_CB11_PMCNTENCLR, 0x1bf44)
4963    DEP_FIELD(SMMU_CB11_PMCNTENCLR, P3, 1, 3)
4964    DEP_FIELD(SMMU_CB11_PMCNTENCLR, P2, 1, 2)
4965    DEP_FIELD(SMMU_CB11_PMCNTENCLR, P1, 1, 1)
4966    DEP_FIELD(SMMU_CB11_PMCNTENCLR, P0, 1, 0)
4967DEP_REG32(SMMU_CB11_PMCNTENSET, 0x1bf48)
4968    DEP_FIELD(SMMU_CB11_PMCNTENSET, P3, 1, 3)
4969    DEP_FIELD(SMMU_CB11_PMCNTENSET, P2, 1, 2)
4970    DEP_FIELD(SMMU_CB11_PMCNTENSET, P1, 1, 1)
4971    DEP_FIELD(SMMU_CB11_PMCNTENSET, P0, 1, 0)
4972DEP_REG32(SMMU_CB11_PMINTENCLR, 0x1bf4c)
4973    DEP_FIELD(SMMU_CB11_PMINTENCLR, P3, 1, 3)
4974    DEP_FIELD(SMMU_CB11_PMINTENCLR, P2, 1, 2)
4975    DEP_FIELD(SMMU_CB11_PMINTENCLR, P1, 1, 1)
4976    DEP_FIELD(SMMU_CB11_PMINTENCLR, P0, 1, 0)
4977DEP_REG32(SMMU_CB11_PMOVSCLR, 0x1bf50)
4978    DEP_FIELD(SMMU_CB11_PMOVSCLR, P3, 1, 3)
4979    DEP_FIELD(SMMU_CB11_PMOVSCLR, P2, 1, 2)
4980    DEP_FIELD(SMMU_CB11_PMOVSCLR, P1, 1, 1)
4981    DEP_FIELD(SMMU_CB11_PMOVSCLR, P0, 1, 0)
4982DEP_REG32(SMMU_CB11_PMOVSSET, 0x1bf58)
4983    DEP_FIELD(SMMU_CB11_PMOVSSET, P3, 1, 3)
4984    DEP_FIELD(SMMU_CB11_PMOVSSET, P2, 1, 2)
4985    DEP_FIELD(SMMU_CB11_PMOVSSET, P1, 1, 1)
4986    DEP_FIELD(SMMU_CB11_PMOVSSET, P0, 1, 0)
4987DEP_REG32(SMMU_CB11_PMAUTHSTATUS, 0x1bfb8)
4988    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, SNI, 1, 7)
4989    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, SNE, 1, 6)
4990    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, SI, 1, 5)
4991    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, SE, 1, 4)
4992    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, NSNI, 1, 3)
4993    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, NSNE, 1, 2)
4994    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, NSI, 1, 1)
4995    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, NSE, 1, 0)
4996DEP_REG32(SMMU_CB12_SCTLR, 0x1c000)
4997    DEP_FIELD(SMMU_CB12_SCTLR, NSCFG, 2, 28)
4998    DEP_FIELD(SMMU_CB12_SCTLR, WACFG, 2, 26)
4999    DEP_FIELD(SMMU_CB12_SCTLR, RACFG, 2, 24)
5000    DEP_FIELD(SMMU_CB12_SCTLR, SHCFG, 2, 22)

5001    DEP_FIELD(SMMU_CB12_SCTLR, FB, 1, 21)
5002    DEP_FIELD(SMMU_CB12_SCTLR, MTCFG, 1, 20)
5003    DEP_FIELD(SMMU_CB12_SCTLR, MEMATTR, 4, 16)
5004    DEP_FIELD(SMMU_CB12_SCTLR, TRANSIENTCFG, 2, 14)
5005    DEP_FIELD(SMMU_CB12_SCTLR, PTW, 1, 13)
5006    DEP_FIELD(SMMU_CB12_SCTLR, ASIDPNE, 1, 12)
5007    DEP_FIELD(SMMU_CB12_SCTLR, UWXN, 1, 10)
5008    DEP_FIELD(SMMU_CB12_SCTLR, WXN, 1, 9)
5009    DEP_FIELD(SMMU_CB12_SCTLR, HUPCF, 1, 8)
5010    DEP_FIELD(SMMU_CB12_SCTLR, CFCFG, 1, 7)
5011    DEP_FIELD(SMMU_CB12_SCTLR, CFIE, 1, 6)
5012    DEP_FIELD(SMMU_CB12_SCTLR, CFRE, 1, 5)
5013    DEP_FIELD(SMMU_CB12_SCTLR, E, 1, 4)
5014    DEP_FIELD(SMMU_CB12_SCTLR, AFFD, 1, 3)
5015    DEP_FIELD(SMMU_CB12_SCTLR, AFE, 1, 2)
5016    DEP_FIELD(SMMU_CB12_SCTLR, TRE, 1, 1)
5017    DEP_FIELD(SMMU_CB12_SCTLR, M, 1, 0)
5018DEP_REG32(SMMU_CB12_ACTLR, 0x1c004)
5019    DEP_FIELD(SMMU_CB12_ACTLR, CPRE, 1, 1)
5020    DEP_FIELD(SMMU_CB12_ACTLR, CMTLB, 1, 0)
5021DEP_REG32(SMMU_CB12_RESUME, 0x1c008)
5022    DEP_FIELD(SMMU_CB12_RESUME, TNR, 1, 0)
5023DEP_REG32(SMMU_CB12_TCR2, 0x1c010)
5024    DEP_FIELD(SMMU_CB12_TCR2, NSCFG1, 1, 30)
5025    DEP_FIELD(SMMU_CB12_TCR2, SEP, 3, 15)
5026    DEP_FIELD(SMMU_CB12_TCR2, NSCFG0, 1, 14)
5027    DEP_FIELD(SMMU_CB12_TCR2, TBI1, 1, 6)
5028    DEP_FIELD(SMMU_CB12_TCR2, TBI0, 1, 5)
5029    DEP_FIELD(SMMU_CB12_TCR2, AS, 1, 4)
5030    DEP_FIELD(SMMU_CB12_TCR2, PASIZE, 3, 0)
5031DEP_REG32(SMMU_CB12_TTBR0_LOW, 0x1c020)
5032    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_31_7, 25, 7)
5033    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
5034    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
5035    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
5036    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_2, 1, 2)
5037    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_1_S, 1, 1)
5038    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
5039DEP_REG32(SMMU_CB12_TTBR0_HIGH, 0x1c024)
5040    DEP_FIELD(SMMU_CB12_TTBR0_HIGH, ASID, 16, 16)
5041    DEP_FIELD(SMMU_CB12_TTBR0_HIGH, ADDRESS, 16, 0)
5042DEP_REG32(SMMU_CB12_TTBR1_LOW, 0x1c028)
5043    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_31_7, 25, 7)
5044    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
5045    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
5046    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
5047    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_2, 1, 2)
5048    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_1_S, 1, 1)
5049    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
5050DEP_REG32(SMMU_CB12_TTBR1_HIGH, 0x1c02c)
5051    DEP_FIELD(SMMU_CB12_TTBR1_HIGH, ASID, 16, 16)
5052    DEP_FIELD(SMMU_CB12_TTBR1_HIGH, ADDRESS, 16, 0)
5053DEP_REG32(SMMU_CB12_TCR_LPAE, 0x1c030)
5054    DEP_FIELD(SMMU_CB12_TCR_LPAE, EAE, 1, 31)
5055    DEP_FIELD(SMMU_CB12_TCR_LPAE, NSCFG1_TG1, 1, 30)
5056    DEP_FIELD(SMMU_CB12_TCR_LPAE, SH1, 2, 28)
5057    DEP_FIELD(SMMU_CB12_TCR_LPAE, ORGN1, 2, 26)
5058    DEP_FIELD(SMMU_CB12_TCR_LPAE, IRGN1, 2, 24)
5059    DEP_FIELD(SMMU_CB12_TCR_LPAE, EPD1, 1, 23)
5060    DEP_FIELD(SMMU_CB12_TCR_LPAE, A1, 1, 22)
5061    DEP_FIELD(SMMU_CB12_TCR_LPAE, T1SZ_5_3, 3, 19)
5062    DEP_FIELD(SMMU_CB12_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
5063    DEP_FIELD(SMMU_CB12_TCR_LPAE, NSCFG0_TG0, 1, 14)
5064    DEP_FIELD(SMMU_CB12_TCR_LPAE, SH0, 2, 12)
5065    DEP_FIELD(SMMU_CB12_TCR_LPAE, ORGN0, 2, 10)
5066    DEP_FIELD(SMMU_CB12_TCR_LPAE, IRGN0, 2, 8)
5067    DEP_FIELD(SMMU_CB12_TCR_LPAE, SL0_1_EPD0, 1, 7)
5068    DEP_FIELD(SMMU_CB12_TCR_LPAE, SL0_0, 1, 6)
5069    DEP_FIELD(SMMU_CB12_TCR_LPAE, PD1_T0SZ_5, 1, 5)
5070    DEP_FIELD(SMMU_CB12_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
5071    DEP_FIELD(SMMU_CB12_TCR_LPAE, T0SZ_3_0, 4, 0)
5072DEP_REG32(SMMU_CB12_CONTEXTIDR, 0x1c034)
5073    DEP_FIELD(SMMU_CB12_CONTEXTIDR, PROCID, 24, 8)
5074    DEP_FIELD(SMMU_CB12_CONTEXTIDR, ASID, 8, 0)
5075DEP_REG32(SMMU_CB12_PRRR_MAIR0, 0x1c038)
5076    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS7, 1, 31)
5077    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS6, 1, 30)
5078    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS5, 1, 29)
5079    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS4, 1, 28)
5080    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS3, 1, 27)
5081    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS2, 1, 26)
5082    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS1, 1, 25)
5083    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS0, 1, 24)
5084    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NS1, 1, 19)
5085    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NS0, 1, 18)
5086    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, DS1, 1, 17)
5087    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, DS0, 1, 16)
5088    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR7, 2, 14)
5089    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR6, 2, 12)
5090    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR5, 2, 10)
5091    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR4, 2, 8)
5092    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR3, 2, 6)
5093    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR2, 2, 4)
5094    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR1, 2, 2)
5095    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR0, 2, 0)
5096DEP_REG32(SMMU_CB12_NMRR_MAIR1, 0x1c03c)
5097    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR7, 2, 30)
5098    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR6, 2, 28)
5099    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR5, 2, 26)
5100    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR4, 2, 24)
5101    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR3, 2, 22)
5102    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR2, 2, 20)
5103    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR1, 2, 18)
5104    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR0, 2, 16)
5105    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR7, 2, 14)
5106    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR6, 2, 12)
5107    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR5, 2, 10)
5108    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR4, 2, 8)
5109    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR3, 2, 6)
5110    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR2, 2, 4)
5111    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR1, 2, 2)
5112    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR0, 2, 0)
5113DEP_REG32(SMMU_CB12_FSR, 0x1c058)
5114    DEP_FIELD(SMMU_CB12_FSR, MULTI, 1, 31)
5115    DEP_FIELD(SMMU_CB12_FSR, SS, 1, 30)
5116    DEP_FIELD(SMMU_CB12_FSR, FORMAT, 2, 9)
5117    DEP_FIELD(SMMU_CB12_FSR, UUT, 1, 8)
5118    DEP_FIELD(SMMU_CB12_FSR, ASF, 1, 7)
5119    DEP_FIELD(SMMU_CB12_FSR, TLBLKF, 1, 6)
5120    DEP_FIELD(SMMU_CB12_FSR, TLBMCF, 1, 5)
5121    DEP_FIELD(SMMU_CB12_FSR, EF, 1, 4)
5122    DEP_FIELD(SMMU_CB12_FSR, PF, 1, 3)
5123    DEP_FIELD(SMMU_CB12_FSR, AFF, 1, 2)
5124    DEP_FIELD(SMMU_CB12_FSR, TF, 1, 1)
5125DEP_REG32(SMMU_CB12_FSRRESTORE, 0x1c05c)
5126DEP_REG32(SMMU_CB12_FAR_LOW, 0x1c060)
5127DEP_REG32(SMMU_CB12_FAR_HIGH, 0x1c064)
5128    DEP_FIELD(SMMU_CB12_FAR_HIGH, BITS, 17, 0)
5129DEP_REG32(SMMU_CB12_FSYNR0, 0x1c068)
5130    DEP_FIELD(SMMU_CB12_FSYNR0, S1CBNDX, 4, 16)
5131    DEP_FIELD(SMMU_CB12_FSYNR0, AFR, 1, 11)
5132    DEP_FIELD(SMMU_CB12_FSYNR0, PTWF, 1, 10)
5133    DEP_FIELD(SMMU_CB12_FSYNR0, ATOF, 1, 9)
5134    DEP_FIELD(SMMU_CB12_FSYNR0, NSATTR, 1, 8)
5135    DEP_FIELD(SMMU_CB12_FSYNR0, IND, 1, 6)
5136    DEP_FIELD(SMMU_CB12_FSYNR0, PNU, 1, 5)
5137    DEP_FIELD(SMMU_CB12_FSYNR0, WNR, 1, 4)
5138    DEP_FIELD(SMMU_CB12_FSYNR0, PLVL, 2, 0)
5139DEP_REG32(SMMU_CB12_IPAFAR_LOW, 0x1c070)
5140    DEP_FIELD(SMMU_CB12_IPAFAR_LOW, IPAFAR_L, 20, 12)
5141    DEP_FIELD(SMMU_CB12_IPAFAR_LOW, FAR_RO, 12, 0)
5142DEP_REG32(SMMU_CB12_IPAFAR_HIGH, 0x1c074)
5143    DEP_FIELD(SMMU_CB12_IPAFAR_HIGH, BITS, 16, 0)
5144DEP_REG32(SMMU_CB12_TLBIVA_LOW, 0x1c600)
5145DEP_REG32(SMMU_CB12_TLBIVA_HIGH, 0x1c604)
5146    DEP_FIELD(SMMU_CB12_TLBIVA_HIGH, ASID, 16, 16)
5147    DEP_FIELD(SMMU_CB12_TLBIVA_HIGH, ADDRESS, 5, 0)
5148DEP_REG32(SMMU_CB12_TLBIVAA_LOW, 0x1c608)
5149DEP_REG32(SMMU_CB12_TLBIVAA_HIGH, 0x1c60c)
5150    DEP_FIELD(SMMU_CB12_TLBIVAA_HIGH, ASID, 16, 16)
5151    DEP_FIELD(SMMU_CB12_TLBIVAA_HIGH, ADDRESS, 5, 0)
5152DEP_REG32(SMMU_CB12_TLBIASID, 0x1c610)
5153    DEP_FIELD(SMMU_CB12_TLBIASID, ASID, 16, 0)
5154DEP_REG32(SMMU_CB12_TLBIALL, 0x1c618)
5155DEP_REG32(SMMU_CB12_TLBIVAL_LOW, 0x1c620)
5156DEP_REG32(SMMU_CB12_TLBIVAL_HIGH, 0x1c624)
5157    DEP_FIELD(SMMU_CB12_TLBIVAL_HIGH, ASID, 16, 16)
5158    DEP_FIELD(SMMU_CB12_TLBIVAL_HIGH, ADDRESS, 5, 0)
5159DEP_REG32(SMMU_CB12_TLBIVAAL_LOW, 0x1c628)
5160DEP_REG32(SMMU_CB12_TLBIVAAL_HIGH, 0x1c62c)
5161    DEP_FIELD(SMMU_CB12_TLBIVAAL_HIGH, ASID, 16, 16)
5162    DEP_FIELD(SMMU_CB12_TLBIVAAL_HIGH, ADDRESS, 5, 0)
5163DEP_REG32(SMMU_CB12_TLBIIPAS2_LOW, 0x1c630)
5164DEP_REG32(SMMU_CB12_TLBIIPAS2_HIGH, 0x1c634)
5165    DEP_FIELD(SMMU_CB12_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
5166DEP_REG32(SMMU_CB12_TLBIIPAS2L_LOW, 0x1c638)
5167DEP_REG32(SMMU_CB12_TLBIIPAS2L_HIGH, 0x1c63c)
5168    DEP_FIELD(SMMU_CB12_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
5169DEP_REG32(SMMU_CB12_TLBSYNC, 0x1c7f0)
5170DEP_REG32(SMMU_CB12_TLBSTATUS, 0x1c7f4)
5171    DEP_FIELD(SMMU_CB12_TLBSTATUS, SACTIVE, 1, 0)
5172DEP_REG32(SMMU_CB12_PMEVCNTR0, 0x1ce00)
5173DEP_REG32(SMMU_CB12_PMEVCNTR1, 0x1ce04)
5174DEP_REG32(SMMU_CB12_PMEVCNTR2, 0x1ce08)
5175DEP_REG32(SMMU_CB12_PMEVCNTR3, 0x1ce0c)
5176DEP_REG32(SMMU_CB12_PMEVTYPER0, 0x1ce80)
5177    DEP_FIELD(SMMU_CB12_PMEVTYPER0, P, 1, 31)
5178    DEP_FIELD(SMMU_CB12_PMEVTYPER0, U, 1, 30)
5179    DEP_FIELD(SMMU_CB12_PMEVTYPER0, NSP, 1, 29)
5180    DEP_FIELD(SMMU_CB12_PMEVTYPER0, NSU, 1, 28)
5181    DEP_FIELD(SMMU_CB12_PMEVTYPER0, EVENT, 5, 0)
5182DEP_REG32(SMMU_CB12_PMEVTYPER1, 0x1ce84)
5183    DEP_FIELD(SMMU_CB12_PMEVTYPER1, P, 1, 31)
5184    DEP_FIELD(SMMU_CB12_PMEVTYPER1, U, 1, 30)
5185    DEP_FIELD(SMMU_CB12_PMEVTYPER1, NSP, 1, 29)
5186    DEP_FIELD(SMMU_CB12_PMEVTYPER1, NSU, 1, 28)
5187    DEP_FIELD(SMMU_CB12_PMEVTYPER1, EVENT, 5, 0)
5188DEP_REG32(SMMU_CB12_PMEVTYPER2, 0x1ce88)
5189    DEP_FIELD(SMMU_CB12_PMEVTYPER2, P, 1, 31)
5190    DEP_FIELD(SMMU_CB12_PMEVTYPER2, U, 1, 30)
5191    DEP_FIELD(SMMU_CB12_PMEVTYPER2, NSP, 1, 29)
5192    DEP_FIELD(SMMU_CB12_PMEVTYPER2, NSU, 1, 28)
5193    DEP_FIELD(SMMU_CB12_PMEVTYPER2, EVENT, 5, 0)
5194DEP_REG32(SMMU_CB12_PMEVTYPER3, 0x1ce8c)
5195    DEP_FIELD(SMMU_CB12_PMEVTYPER3, P, 1, 31)
5196    DEP_FIELD(SMMU_CB12_PMEVTYPER3, U, 1, 30)
5197    DEP_FIELD(SMMU_CB12_PMEVTYPER3, NSP, 1, 29)
5198    DEP_FIELD(SMMU_CB12_PMEVTYPER3, NSU, 1, 28)
5199    DEP_FIELD(SMMU_CB12_PMEVTYPER3, EVENT, 5, 0)
5200DEP_REG32(SMMU_CB12_PMCFGR, 0x1cf00)
5201    DEP_FIELD(SMMU_CB12_PMCFGR, NCG, 8, 24)
5202    DEP_FIELD(SMMU_CB12_PMCFGR, UEN, 1, 19)
5203    DEP_FIELD(SMMU_CB12_PMCFGR, EX, 1, 16)
5204    DEP_FIELD(SMMU_CB12_PMCFGR, CCD, 1, 15)
5205    DEP_FIELD(SMMU_CB12_PMCFGR, CC, 1, 14)
5206    DEP_FIELD(SMMU_CB12_PMCFGR, SIZE, 6, 8)
5207    DEP_FIELD(SMMU_CB12_PMCFGR, N, 8, 0)
5208DEP_REG32(SMMU_CB12_PMCR, 0x1cf04)
5209    DEP_FIELD(SMMU_CB12_PMCR, IMP, 8, 24)
5210    DEP_FIELD(SMMU_CB12_PMCR, X, 1, 4)
5211    DEP_FIELD(SMMU_CB12_PMCR, P, 1, 1)
5212    DEP_FIELD(SMMU_CB12_PMCR, E, 1, 0)
5213DEP_REG32(SMMU_CB12_PMCEID, 0x1cf20)
5214    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X12, 1, 17)
5215    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X11, 1, 16)
5216    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X10, 1, 15)
5217    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X0A, 1, 9)
5218    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X09, 1, 8)
5219    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X08, 1, 7)
5220    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X01, 1, 1)
5221    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X00, 1, 0)
5222DEP_REG32(SMMU_CB12_PMCNTENSE, 0x1cf40)
5223    DEP_FIELD(SMMU_CB12_PMCNTENSE, P3, 1, 3)
5224    DEP_FIELD(SMMU_CB12_PMCNTENSE, P2, 1, 2)
5225    DEP_FIELD(SMMU_CB12_PMCNTENSE, P1, 1, 1)
5226    DEP_FIELD(SMMU_CB12_PMCNTENSE, P0, 1, 0)
5227DEP_REG32(SMMU_CB12_PMCNTENCLR, 0x1cf44)
5228    DEP_FIELD(SMMU_CB12_PMCNTENCLR, P3, 1, 3)
5229    DEP_FIELD(SMMU_CB12_PMCNTENCLR, P2, 1, 2)
5230    DEP_FIELD(SMMU_CB12_PMCNTENCLR, P1, 1, 1)
5231    DEP_FIELD(SMMU_CB12_PMCNTENCLR, P0, 1, 0)
5232DEP_REG32(SMMU_CB12_PMCNTENSET, 0x1cf48)
5233    DEP_FIELD(SMMU_CB12_PMCNTENSET, P3, 1, 3)
5234    DEP_FIELD(SMMU_CB12_PMCNTENSET, P2, 1, 2)
5235    DEP_FIELD(SMMU_CB12_PMCNTENSET, P1, 1, 1)
5236    DEP_FIELD(SMMU_CB12_PMCNTENSET, P0, 1, 0)
5237DEP_REG32(SMMU_CB12_PMINTENCLR, 0x1cf4c)
5238    DEP_FIELD(SMMU_CB12_PMINTENCLR, P3, 1, 3)
5239    DEP_FIELD(SMMU_CB12_PMINTENCLR, P2, 1, 2)
5240    DEP_FIELD(SMMU_CB12_PMINTENCLR, P1, 1, 1)
5241    DEP_FIELD(SMMU_CB12_PMINTENCLR, P0, 1, 0)
5242DEP_REG32(SMMU_CB12_PMOVSCLR, 0x1cf50)
5243    DEP_FIELD(SMMU_CB12_PMOVSCLR, P3, 1, 3)
5244    DEP_FIELD(SMMU_CB12_PMOVSCLR, P2, 1, 2)
5245    DEP_FIELD(SMMU_CB12_PMOVSCLR, P1, 1, 1)
5246    DEP_FIELD(SMMU_CB12_PMOVSCLR, P0, 1, 0)
5247DEP_REG32(SMMU_CB12_PMOVSSET, 0x1cf58)
5248    DEP_FIELD(SMMU_CB12_PMOVSSET, P3, 1, 3)
5249    DEP_FIELD(SMMU_CB12_PMOVSSET, P2, 1, 2)
5250    DEP_FIELD(SMMU_CB12_PMOVSSET, P1, 1, 1)
5251    DEP_FIELD(SMMU_CB12_PMOVSSET, P0, 1, 0)
5252DEP_REG32(SMMU_CB12_PMAUTHSTATUS, 0x1cfb8)
5253    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, SNI, 1, 7)
5254    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, SNE, 1, 6)
5255    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, SI, 1, 5)
5256    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, SE, 1, 4)
5257    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, NSNI, 1, 3)
5258    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, NSNE, 1, 2)
5259    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, NSI, 1, 1)
5260    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, NSE, 1, 0)
5261DEP_REG32(SMMU_CB13_SCTLR, 0x1d000)
5262    DEP_FIELD(SMMU_CB13_SCTLR, NSCFG, 2, 28)
5263    DEP_FIELD(SMMU_CB13_SCTLR, WACFG, 2, 26)
5264    DEP_FIELD(SMMU_CB13_SCTLR, RACFG, 2, 24)
5265    DEP_FIELD(SMMU_CB13_SCTLR, SHCFG, 2, 22)
5266    DEP_FIELD(SMMU_CB13_SCTLR, FB, 1, 21)
5267    DEP_FIELD(SMMU_CB13_SCTLR, MTCFG, 1, 20)
5268    DEP_FIELD(SMMU_CB13_SCTLR, MEMATTR, 4, 16)
5269    DEP_FIELD(SMMU_CB13_SCTLR, TRANSIENTCFG, 2, 14)
5270    DEP_FIELD(SMMU_CB13_SCTLR, PTW, 1, 13)
5271    DEP_FIELD(SMMU_CB13_SCTLR, ASIDPNE, 1, 12)
5272    DEP_FIELD(SMMU_CB13_SCTLR, UWXN, 1, 10)
5273    DEP_FIELD(SMMU_CB13_SCTLR, WXN, 1, 9)
5274    DEP_FIELD(SMMU_CB13_SCTLR, HUPCF, 1, 8)
5275    DEP_FIELD(SMMU_CB13_SCTLR, CFCFG, 1, 7)
5276    DEP_FIELD(SMMU_CB13_SCTLR, CFIE, 1, 6)
5277    DEP_FIELD(SMMU_CB13_SCTLR, CFRE, 1, 5)
5278    DEP_FIELD(SMMU_CB13_SCTLR, E, 1, 4)
5279    DEP_FIELD(SMMU_CB13_SCTLR, AFFD, 1, 3)
5280    DEP_FIELD(SMMU_CB13_SCTLR, AFE, 1, 2)
5281    DEP_FIELD(SMMU_CB13_SCTLR, TRE, 1, 1)
5282    DEP_FIELD(SMMU_CB13_SCTLR, M, 1, 0)
5283DEP_REG32(SMMU_CB13_ACTLR, 0x1d004)
5284    DEP_FIELD(SMMU_CB13_ACTLR, CPRE, 1, 1)
5285    DEP_FIELD(SMMU_CB13_ACTLR, CMTLB, 1, 0)
5286DEP_REG32(SMMU_CB13_RESUME, 0x1d008)
5287    DEP_FIELD(SMMU_CB13_RESUME, TNR, 1, 0)
5288DEP_REG32(SMMU_CB13_TCR2, 0x1d010)
5289    DEP_FIELD(SMMU_CB13_TCR2, NSCFG1, 1, 30)
5290    DEP_FIELD(SMMU_CB13_TCR2, SEP, 3, 15)
5291    DEP_FIELD(SMMU_CB13_TCR2, NSCFG0, 1, 14)
5292    DEP_FIELD(SMMU_CB13_TCR2, TBI1, 1, 6)
5293    DEP_FIELD(SMMU_CB13_TCR2, TBI0, 1, 5)
5294    DEP_FIELD(SMMU_CB13_TCR2, AS, 1, 4)
5295    DEP_FIELD(SMMU_CB13_TCR2, PASIZE, 3, 0)
5296DEP_REG32(SMMU_CB13_TTBR0_LOW, 0x1d020)
5297    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_31_7, 25, 7)
5298    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
5299    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
5300    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
5301    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_2, 1, 2)
5302    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_1_S, 1, 1)
5303    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
5304DEP_REG32(SMMU_CB13_TTBR0_HIGH, 0x1d024)
5305    DEP_FIELD(SMMU_CB13_TTBR0_HIGH, ASID, 16, 16)
5306    DEP_FIELD(SMMU_CB13_TTBR0_HIGH, ADDRESS, 16, 0)
5307DEP_REG32(SMMU_CB13_TTBR1_LOW, 0x1d028)
5308    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_31_7, 25, 7)
5309    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
5310    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
5311    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
5312    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_2, 1, 2)
5313    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_1_S, 1, 1)
5314    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
5315DEP_REG32(SMMU_CB13_TTBR1_HIGH, 0x1d02c)
5316    DEP_FIELD(SMMU_CB13_TTBR1_HIGH, ASID, 16, 16)
5317    DEP_FIELD(SMMU_CB13_TTBR1_HIGH, ADDRESS, 16, 0)
5318DEP_REG32(SMMU_CB13_TCR_LPAE, 0x1d030)
5319    DEP_FIELD(SMMU_CB13_TCR_LPAE, EAE, 1, 31)
5320    DEP_FIELD(SMMU_CB13_TCR_LPAE, NSCFG1_TG1, 1, 30)
5321    DEP_FIELD(SMMU_CB13_TCR_LPAE, SH1, 2, 28)
5322    DEP_FIELD(SMMU_CB13_TCR_LPAE, ORGN1, 2, 26)
5323    DEP_FIELD(SMMU_CB13_TCR_LPAE, IRGN1, 2, 24)
5324    DEP_FIELD(SMMU_CB13_TCR_LPAE, EPD1, 1, 23)
5325    DEP_FIELD(SMMU_CB13_TCR_LPAE, A1, 1, 22)
5326    DEP_FIELD(SMMU_CB13_TCR_LPAE, T1SZ_5_3, 3, 19)
5327    DEP_FIELD(SMMU_CB13_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
5328    DEP_FIELD(SMMU_CB13_TCR_LPAE, NSCFG0_TG0, 1, 14)
5329    DEP_FIELD(SMMU_CB13_TCR_LPAE, SH0, 2, 12)
5330    DEP_FIELD(SMMU_CB13_TCR_LPAE, ORGN0, 2, 10)
5331    DEP_FIELD(SMMU_CB13_TCR_LPAE, IRGN0, 2, 8)
5332    DEP_FIELD(SMMU_CB13_TCR_LPAE, SL0_1_EPD0, 1, 7)
5333    DEP_FIELD(SMMU_CB13_TCR_LPAE, SL0_0, 1, 6)
5334    DEP_FIELD(SMMU_CB13_TCR_LPAE, PD1_T0SZ_5, 1, 5)
5335    DEP_FIELD(SMMU_CB13_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
5336    DEP_FIELD(SMMU_CB13_TCR_LPAE, T0SZ_3_0, 4, 0)
5337DEP_REG32(SMMU_CB13_CONTEXTIDR, 0x1d034)
5338    DEP_FIELD(SMMU_CB13_CONTEXTIDR, PROCID, 24, 8)
5339    DEP_FIELD(SMMU_CB13_CONTEXTIDR, ASID, 8, 0)
5340DEP_REG32(SMMU_CB13_PRRR_MAIR0, 0x1d038)
5341    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS7, 1, 31)
5342    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS6, 1, 30)
5343    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS5, 1, 29)
5344    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS4, 1, 28)
5345    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS3, 1, 27)
5346    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS2, 1, 26)
5347    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS1, 1, 25)
5348    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS0, 1, 24)
5349    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NS1, 1, 19)
5350    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NS0, 1, 18)
5351    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, DS1, 1, 17)
5352    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, DS0, 1, 16)
5353    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR7, 2, 14)
5354    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR6, 2, 12)
5355    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR5, 2, 10)
5356    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR4, 2, 8)
5357    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR3, 2, 6)
5358    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR2, 2, 4)
5359    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR1, 2, 2)
5360    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR0, 2, 0)
5361DEP_REG32(SMMU_CB13_NMRR_MAIR1, 0x1d03c)
5362    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR7, 2, 30)
5363    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR6, 2, 28)
5364    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR5, 2, 26)
5365    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR4, 2, 24)
5366    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR3, 2, 22)
5367    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR2, 2, 20)
5368    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR1, 2, 18)
5369    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR0, 2, 16)
5370    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR7, 2, 14)
5371    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR6, 2, 12)
5372    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR5, 2, 10)
5373    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR4, 2, 8)
5374    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR3, 2, 6)
5375    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR2, 2, 4)
5376    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR1, 2, 2)
5377    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR0, 2, 0)
5378DEP_REG32(SMMU_CB13_FSR, 0x1d058)
5379    DEP_FIELD(SMMU_CB13_FSR, MULTI, 1, 31)
5380    DEP_FIELD(SMMU_CB13_FSR, SS, 1, 30)
5381    DEP_FIELD(SMMU_CB13_FSR, FORMAT, 2, 9)
5382    DEP_FIELD(SMMU_CB13_FSR, UUT, 1, 8)
5383    DEP_FIELD(SMMU_CB13_FSR, ASF, 1, 7)
5384    DEP_FIELD(SMMU_CB13_FSR, TLBLKF, 1, 6)
5385    DEP_FIELD(SMMU_CB13_FSR, TLBMCF, 1, 5)
5386    DEP_FIELD(SMMU_CB13_FSR, EF, 1, 4)
5387    DEP_FIELD(SMMU_CB13_FSR, PF, 1, 3)
5388    DEP_FIELD(SMMU_CB13_FSR, AFF, 1, 2)
5389    DEP_FIELD(SMMU_CB13_FSR, TF, 1, 1)
5390DEP_REG32(SMMU_CB13_FSRRESTORE, 0x1d05c)
5391DEP_REG32(SMMU_CB13_FAR_LOW, 0x1d060)
5392DEP_REG32(SMMU_CB13_FAR_HIGH, 0x1d064)
5393    DEP_FIELD(SMMU_CB13_FAR_HIGH, BITS, 17, 0)
5394DEP_REG32(SMMU_CB13_FSYNR0, 0x1d068)
5395    DEP_FIELD(SMMU_CB13_FSYNR0, S1CBNDX, 4, 16)
5396    DEP_FIELD(SMMU_CB13_FSYNR0, AFR, 1, 11)
5397    DEP_FIELD(SMMU_CB13_FSYNR0, PTWF, 1, 10)
5398    DEP_FIELD(SMMU_CB13_FSYNR0, ATOF, 1, 9)
5399    DEP_FIELD(SMMU_CB13_FSYNR0, NSATTR, 1, 8)
5400    DEP_FIELD(SMMU_CB13_FSYNR0, IND, 1, 6)
5401    DEP_FIELD(SMMU_CB13_FSYNR0, PNU, 1, 5)
5402    DEP_FIELD(SMMU_CB13_FSYNR0, WNR, 1, 4)
5403    DEP_FIELD(SMMU_CB13_FSYNR0, PLVL, 2, 0)
5404DEP_REG32(SMMU_CB13_IPAFAR_LOW, 0x1d070)
5405    DEP_FIELD(SMMU_CB13_IPAFAR_LOW, IPAFAR_L, 20, 12)
5406    DEP_FIELD(SMMU_CB13_IPAFAR_LOW, FAR_RO, 12, 0)
5407DEP_REG32(SMMU_CB13_IPAFAR_HIGH, 0x1d074)
5408    DEP_FIELD(SMMU_CB13_IPAFAR_HIGH, BITS, 16, 0)
5409DEP_REG32(SMMU_CB13_TLBIVA_LOW, 0x1d600)
5410DEP_REG32(SMMU_CB13_TLBIVA_HIGH, 0x1d604)
5411    DEP_FIELD(SMMU_CB13_TLBIVA_HIGH, ASID, 16, 16)
5412    DEP_FIELD(SMMU_CB13_TLBIVA_HIGH, ADDRESS, 5, 0)
5413DEP_REG32(SMMU_CB13_TLBIVAA_LOW, 0x1d608)
5414DEP_REG32(SMMU_CB13_TLBIVAA_HIGH, 0x1d60c)
5415    DEP_FIELD(SMMU_CB13_TLBIVAA_HIGH, ASID, 16, 16)
5416    DEP_FIELD(SMMU_CB13_TLBIVAA_HIGH, ADDRESS, 5, 0)
5417DEP_REG32(SMMU_CB13_TLBIASID, 0x1d610)
5418    DEP_FIELD(SMMU_CB13_TLBIASID, ASID, 16, 0)
5419DEP_REG32(SMMU_CB13_TLBIALL, 0x1d618)
5420DEP_REG32(SMMU_CB13_TLBIVAL_LOW, 0x1d620)
5421DEP_REG32(SMMU_CB13_TLBIVAL_HIGH, 0x1d624)
5422    DEP_FIELD(SMMU_CB13_TLBIVAL_HIGH, ASID, 16, 16)
5423    DEP_FIELD(SMMU_CB13_TLBIVAL_HIGH, ADDRESS, 5, 0)
5424DEP_REG32(SMMU_CB13_TLBIVAAL_LOW, 0x1d628)
5425DEP_REG32(SMMU_CB13_TLBIVAAL_HIGH, 0x1d62c)
5426    DEP_FIELD(SMMU_CB13_TLBIVAAL_HIGH, ASID, 16, 16)
5427    DEP_FIELD(SMMU_CB13_TLBIVAAL_HIGH, ADDRESS, 5, 0)
5428DEP_REG32(SMMU_CB13_TLBIIPAS2_LOW, 0x1d630)
5429DEP_REG32(SMMU_CB13_TLBIIPAS2_HIGH, 0x1d634)
5430    DEP_FIELD(SMMU_CB13_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
5431DEP_REG32(SMMU_CB13_TLBIIPAS2L_LOW, 0x1d638)
5432DEP_REG32(SMMU_CB13_TLBIIPAS2L_HIGH, 0x1d63c)
5433    DEP_FIELD(SMMU_CB13_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
5434DEP_REG32(SMMU_CB13_TLBSYNC, 0x1d7f0)
5435DEP_REG32(SMMU_CB13_TLBSTATUS, 0x1d7f4)
5436    DEP_FIELD(SMMU_CB13_TLBSTATUS, SACTIVE, 1, 0)
5437DEP_REG32(SMMU_CB13_PMEVCNTR0, 0x1de00)
5438DEP_REG32(SMMU_CB13_PMEVCNTR1, 0x1de04)
5439DEP_REG32(SMMU_CB13_PMEVCNTR2, 0x1de08)
5440DEP_REG32(SMMU_CB13_PMEVCNTR3, 0x1de0c)
5441DEP_REG32(SMMU_CB13_PMEVTYPER0, 0x1de80)
5442    DEP_FIELD(SMMU_CB13_PMEVTYPER0, P, 1, 31)
5443    DEP_FIELD(SMMU_CB13_PMEVTYPER0, U, 1, 30)
5444    DEP_FIELD(SMMU_CB13_PMEVTYPER0, NSP, 1, 29)
5445    DEP_FIELD(SMMU_CB13_PMEVTYPER0, NSU, 1, 28)
5446    DEP_FIELD(SMMU_CB13_PMEVTYPER0, EVENT, 5, 0)
5447DEP_REG32(SMMU_CB13_PMEVTYPER1, 0x1de84)
5448    DEP_FIELD(SMMU_CB13_PMEVTYPER1, P, 1, 31)
5449    DEP_FIELD(SMMU_CB13_PMEVTYPER1, U, 1, 30)
5450    DEP_FIELD(SMMU_CB13_PMEVTYPER1, NSP, 1, 29)
5451    DEP_FIELD(SMMU_CB13_PMEVTYPER1, NSU, 1, 28)
5452    DEP_FIELD(SMMU_CB13_PMEVTYPER1, EVENT, 5, 0)
5453DEP_REG32(SMMU_CB13_PMEVTYPER2, 0x1de88)
5454    DEP_FIELD(SMMU_CB13_PMEVTYPER2, P, 1, 31)
5455    DEP_FIELD(SMMU_CB13_PMEVTYPER2, U, 1, 30)
5456    DEP_FIELD(SMMU_CB13_PMEVTYPER2, NSP, 1, 29)
5457    DEP_FIELD(SMMU_CB13_PMEVTYPER2, NSU, 1, 28)
5458    DEP_FIELD(SMMU_CB13_PMEVTYPER2, EVENT, 5, 0)
5459DEP_REG32(SMMU_CB13_PMEVTYPER3, 0x1de8c)
5460    DEP_FIELD(SMMU_CB13_PMEVTYPER3, P, 1, 31)
5461    DEP_FIELD(SMMU_CB13_PMEVTYPER3, U, 1, 30)
5462    DEP_FIELD(SMMU_CB13_PMEVTYPER3, NSP, 1, 29)
5463    DEP_FIELD(SMMU_CB13_PMEVTYPER3, NSU, 1, 28)
5464    DEP_FIELD(SMMU_CB13_PMEVTYPER3, EVENT, 5, 0)
5465DEP_REG32(SMMU_CB13_PMCFGR, 0x1df00)
5466    DEP_FIELD(SMMU_CB13_PMCFGR, NCG, 8, 24)
5467    DEP_FIELD(SMMU_CB13_PMCFGR, UEN, 1, 19)
5468    DEP_FIELD(SMMU_CB13_PMCFGR, EX, 1, 16)
5469    DEP_FIELD(SMMU_CB13_PMCFGR, CCD, 1, 15)
5470    DEP_FIELD(SMMU_CB13_PMCFGR, CC, 1, 14)
5471    DEP_FIELD(SMMU_CB13_PMCFGR, SIZE, 6, 8)
5472    DEP_FIELD(SMMU_CB13_PMCFGR, N, 8, 0)
5473DEP_REG32(SMMU_CB13_PMCR, 0x1df04)
5474    DEP_FIELD(SMMU_CB13_PMCR, IMP, 8, 24)
5475    DEP_FIELD(SMMU_CB13_PMCR, X, 1, 4)
5476    DEP_FIELD(SMMU_CB13_PMCR, P, 1, 1)
5477    DEP_FIELD(SMMU_CB13_PMCR, E, 1, 0)
5478DEP_REG32(SMMU_CB13_PMCEID, 0x1df20)
5479    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X12, 1, 17)
5480    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X11, 1, 16)
5481    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X10, 1, 15)
5482    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X0A, 1, 9)
5483    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X09, 1, 8)
5484    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X08, 1, 7)
5485    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X01, 1, 1)
5486    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X00, 1, 0)
5487DEP_REG32(SMMU_CB13_PMCNTENSE, 0x1df40)
5488    DEP_FIELD(SMMU_CB13_PMCNTENSE, P3, 1, 3)
5489    DEP_FIELD(SMMU_CB13_PMCNTENSE, P2, 1, 2)
5490    DEP_FIELD(SMMU_CB13_PMCNTENSE, P1, 1, 1)
5491    DEP_FIELD(SMMU_CB13_PMCNTENSE, P0, 1, 0)
5492DEP_REG32(SMMU_CB13_PMCNTENCLR, 0x1df44)
5493    DEP_FIELD(SMMU_CB13_PMCNTENCLR, P3, 1, 3)
5494    DEP_FIELD(SMMU_CB13_PMCNTENCLR, P2, 1, 2)
5495    DEP_FIELD(SMMU_CB13_PMCNTENCLR, P1, 1, 1)
5496    DEP_FIELD(SMMU_CB13_PMCNTENCLR, P0, 1, 0)
5497DEP_REG32(SMMU_CB13_PMCNTENSET, 0x1df48)
5498    DEP_FIELD(SMMU_CB13_PMCNTENSET, P3, 1, 3)
5499    DEP_FIELD(SMMU_CB13_PMCNTENSET, P2, 1, 2)
5500    DEP_FIELD(SMMU_CB13_PMCNTENSET, P1, 1, 1)
5501    DEP_FIELD(SMMU_CB13_PMCNTENSET, P0, 1, 0)
5502DEP_REG32(SMMU_CB13_PMINTENCLR, 0x1df4c)
5503    DEP_FIELD(SMMU_CB13_PMINTENCLR, P3, 1, 3)
5504    DEP_FIELD(SMMU_CB13_PMINTENCLR, P2, 1, 2)
5505    DEP_FIELD(SMMU_CB13_PMINTENCLR, P1, 1, 1)
5506    DEP_FIELD(SMMU_CB13_PMINTENCLR, P0, 1, 0)
5507DEP_REG32(SMMU_CB13_PMOVSCLR, 0x1df50)
5508    DEP_FIELD(SMMU_CB13_PMOVSCLR, P3, 1, 3)
5509    DEP_FIELD(SMMU_CB13_PMOVSCLR, P2, 1, 2)
5510    DEP_FIELD(SMMU_CB13_PMOVSCLR, P1, 1, 1)
5511    DEP_FIELD(SMMU_CB13_PMOVSCLR, P0, 1, 0)
5512DEP_REG32(SMMU_CB13_PMOVSSET, 0x1df58)
5513    DEP_FIELD(SMMU_CB13_PMOVSSET, P3, 1, 3)
5514    DEP_FIELD(SMMU_CB13_PMOVSSET, P2, 1, 2)
5515    DEP_FIELD(SMMU_CB13_PMOVSSET, P1, 1, 1)
5516    DEP_FIELD(SMMU_CB13_PMOVSSET, P0, 1, 0)
5517DEP_REG32(SMMU_CB13_PMAUTHSTATUS, 0x1dfb8)
5518    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, SNI, 1, 7)
5519    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, SNE, 1, 6)
5520    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, SI, 1, 5)
5521    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, SE, 1, 4)
5522    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, NSNI, 1, 3)
5523    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, NSNE, 1, 2)
5524    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, NSI, 1, 1)
5525    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, NSE, 1, 0)
5526DEP_REG32(SMMU_CB14_SCTLR, 0x1e000)
5527    DEP_FIELD(SMMU_CB14_SCTLR, NSCFG, 2, 28)
5528    DEP_FIELD(SMMU_CB14_SCTLR, WACFG, 2, 26)
5529    DEP_FIELD(SMMU_CB14_SCTLR, RACFG, 2, 24)
5530    DEP_FIELD(SMMU_CB14_SCTLR, SHCFG, 2, 22)
5531    DEP_FIELD(SMMU_CB14_SCTLR, FB, 1, 21)
5532    DEP_FIELD(SMMU_CB14_SCTLR, MTCFG, 1, 20)
5533    DEP_FIELD(SMMU_CB14_SCTLR, MEMATTR, 4, 16)
5534    DEP_FIELD(SMMU_CB14_SCTLR, TRANSIENTCFG, 2, 14)
5535    DEP_FIELD(SMMU_CB14_SCTLR, PTW, 1, 13)
5536    DEP_FIELD(SMMU_CB14_SCTLR, ASIDPNE, 1, 12)
5537    DEP_FIELD(SMMU_CB14_SCTLR, UWXN, 1, 10)
5538    DEP_FIELD(SMMU_CB14_SCTLR, WXN, 1, 9)
5539    DEP_FIELD(SMMU_CB14_SCTLR, HUPCF, 1, 8)
5540    DEP_FIELD(SMMU_CB14_SCTLR, CFCFG, 1, 7)
5541    DEP_FIELD(SMMU_CB14_SCTLR, CFIE, 1, 6)
5542    DEP_FIELD(SMMU_CB14_SCTLR, CFRE, 1, 5)
5543    DEP_FIELD(SMMU_CB14_SCTLR, E, 1, 4)
5544    DEP_FIELD(SMMU_CB14_SCTLR, AFFD, 1, 3)
5545    DEP_FIELD(SMMU_CB14_SCTLR, AFE, 1, 2)
5546    DEP_FIELD(SMMU_CB14_SCTLR, TRE, 1, 1)
5547    DEP_FIELD(SMMU_CB14_SCTLR, M, 1, 0)
5548DEP_REG32(SMMU_CB14_ACTLR, 0x1e004)
5549    DEP_FIELD(SMMU_CB14_ACTLR, CPRE, 1, 1)
5550    DEP_FIELD(SMMU_CB14_ACTLR, CMTLB, 1, 0)
5551DEP_REG32(SMMU_CB14_RESUME, 0x1e008)
5552    DEP_FIELD(SMMU_CB14_RESUME, TNR, 1, 0)
5553DEP_REG32(SMMU_CB14_TCR2, 0x1e010)
5554    DEP_FIELD(SMMU_CB14_TCR2, NSCFG1, 1, 30)
5555    DEP_FIELD(SMMU_CB14_TCR2, SEP, 3, 15)
5556    DEP_FIELD(SMMU_CB14_TCR2, NSCFG0, 1, 14)
5557    DEP_FIELD(SMMU_CB14_TCR2, TBI1, 1, 6)
5558    DEP_FIELD(SMMU_CB14_TCR2, TBI0, 1, 5)
5559    DEP_FIELD(SMMU_CB14_TCR2, AS, 1, 4)
5560    DEP_FIELD(SMMU_CB14_TCR2, PASIZE, 3, 0)
5561DEP_REG32(SMMU_CB14_TTBR0_LOW, 0x1e020)
5562    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_31_7, 25, 7)
5563    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
5564    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
5565    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
5566    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_2, 1, 2)
5567    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_1_S, 1, 1)
5568    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
5569DEP_REG32(SMMU_CB14_TTBR0_HIGH, 0x1e024)
5570    DEP_FIELD(SMMU_CB14_TTBR0_HIGH, ASID, 16, 16)
5571    DEP_FIELD(SMMU_CB14_TTBR0_HIGH, ADDRESS, 16, 0)
5572DEP_REG32(SMMU_CB14_TTBR1_LOW, 0x1e028)
5573    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_31_7, 25, 7)
5574    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
5575    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
5576    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
5577    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_2, 1, 2)
5578    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_1_S, 1, 1)
5579    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
5580DEP_REG32(SMMU_CB14_TTBR1_HIGH, 0x1e02c)
5581    DEP_FIELD(SMMU_CB14_TTBR1_HIGH, ASID, 16, 16)
5582    DEP_FIELD(SMMU_CB14_TTBR1_HIGH, ADDRESS, 16, 0)
5583DEP_REG32(SMMU_CB14_TCR_LPAE, 0x1e030)
5584    DEP_FIELD(SMMU_CB14_TCR_LPAE, EAE, 1, 31)
5585    DEP_FIELD(SMMU_CB14_TCR_LPAE, NSCFG1_TG1, 1, 30)
5586    DEP_FIELD(SMMU_CB14_TCR_LPAE, SH1, 2, 28)
5587    DEP_FIELD(SMMU_CB14_TCR_LPAE, ORGN1, 2, 26)
5588    DEP_FIELD(SMMU_CB14_TCR_LPAE, IRGN1, 2, 24)
5589    DEP_FIELD(SMMU_CB14_TCR_LPAE, EPD1, 1, 23)
5590    DEP_FIELD(SMMU_CB14_TCR_LPAE, A1, 1, 22)
5591    DEP_FIELD(SMMU_CB14_TCR_LPAE, T1SZ_5_3, 3, 19)
5592    DEP_FIELD(SMMU_CB14_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
5593    DEP_FIELD(SMMU_CB14_TCR_LPAE, NSCFG0_TG0, 1, 14)
5594    DEP_FIELD(SMMU_CB14_TCR_LPAE, SH0, 2, 12)
5595    DEP_FIELD(SMMU_CB14_TCR_LPAE, ORGN0, 2, 10)
5596    DEP_FIELD(SMMU_CB14_TCR_LPAE, IRGN0, 2, 8)
5597    DEP_FIELD(SMMU_CB14_TCR_LPAE, SL0_1_EPD0, 1, 7)
5598    DEP_FIELD(SMMU_CB14_TCR_LPAE, SL0_0, 1, 6)
5599    DEP_FIELD(SMMU_CB14_TCR_LPAE, PD1_T0SZ_5, 1, 5)
5600    DEP_FIELD(SMMU_CB14_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
5601    DEP_FIELD(SMMU_CB14_TCR_LPAE, T0SZ_3_0, 4, 0)
5602DEP_REG32(SMMU_CB14_CONTEXTIDR, 0x1e034)
5603    DEP_FIELD(SMMU_CB14_CONTEXTIDR, PROCID, 24, 8)
5604    DEP_FIELD(SMMU_CB14_CONTEXTIDR, ASID, 8, 0)
5605DEP_REG32(SMMU_CB14_PRRR_MAIR0, 0x1e038)
5606    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS7, 1, 31)
5607    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS6, 1, 30)
5608    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS5, 1, 29)
5609    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS4, 1, 28)
5610    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS3, 1, 27)
5611    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS2, 1, 26)
5612    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS1, 1, 25)
5613    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS0, 1, 24)
5614    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NS1, 1, 19)
5615    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NS0, 1, 18)
5616    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, DS1, 1, 17)
5617    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, DS0, 1, 16)
5618    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR7, 2, 14)
5619    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR6, 2, 12)
5620    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR5, 2, 10)
5621    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR4, 2, 8)
5622    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR3, 2, 6)
5623    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR2, 2, 4)
5624    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR1, 2, 2)
5625    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR0, 2, 0)
5626DEP_REG32(SMMU_CB14_NMRR_MAIR1, 0x1e03c)
5627    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR7, 2, 30)
5628    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR6, 2, 28)
5629    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR5, 2, 26)
5630    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR4, 2, 24)
5631    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR3, 2, 22)
5632    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR2, 2, 20)
5633    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR1, 2, 18)
5634    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR0, 2, 16)
5635    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR7, 2, 14)
5636    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR6, 2, 12)
5637    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR5, 2, 10)
5638    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR4, 2, 8)
5639    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR3, 2, 6)
5640    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR2, 2, 4)
5641    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR1, 2, 2)
5642    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR0, 2, 0)
5643DEP_REG32(SMMU_CB14_FSR, 0x1e058)
5644    DEP_FIELD(SMMU_CB14_FSR, MULTI, 1, 31)
5645    DEP_FIELD(SMMU_CB14_FSR, SS, 1, 30)
5646    DEP_FIELD(SMMU_CB14_FSR, FORMAT, 2, 9)
5647    DEP_FIELD(SMMU_CB14_FSR, UUT, 1, 8)
5648    DEP_FIELD(SMMU_CB14_FSR, ASF, 1, 7)
5649    DEP_FIELD(SMMU_CB14_FSR, TLBLKF, 1, 6)
5650    DEP_FIELD(SMMU_CB14_FSR, TLBMCF, 1, 5)
5651    DEP_FIELD(SMMU_CB14_FSR, EF, 1, 4)
5652    DEP_FIELD(SMMU_CB14_FSR, PF, 1, 3)
5653    DEP_FIELD(SMMU_CB14_FSR, AFF, 1, 2)
5654    DEP_FIELD(SMMU_CB14_FSR, TF, 1, 1)
5655DEP_REG32(SMMU_CB14_FSRRESTORE, 0x1e05c)
5656DEP_REG32(SMMU_CB14_FAR_LOW, 0x1e060)
5657DEP_REG32(SMMU_CB14_FAR_HIGH, 0x1e064)
5658    DEP_FIELD(SMMU_CB14_FAR_HIGH, BITS, 17, 0)
5659DEP_REG32(SMMU_CB14_FSYNR0, 0x1e068)
5660    DEP_FIELD(SMMU_CB14_FSYNR0, S1CBNDX, 4, 16)
5661    DEP_FIELD(SMMU_CB14_FSYNR0, AFR, 1, 11)
5662    DEP_FIELD(SMMU_CB14_FSYNR0, PTWF, 1, 10)
5663    DEP_FIELD(SMMU_CB14_FSYNR0, ATOF, 1, 9)
5664    DEP_FIELD(SMMU_CB14_FSYNR0, NSATTR, 1, 8)
5665    DEP_FIELD(SMMU_CB14_FSYNR0, IND, 1, 6)
5666    DEP_FIELD(SMMU_CB14_FSYNR0, PNU, 1, 5)
5667    DEP_FIELD(SMMU_CB14_FSYNR0, WNR, 1, 4)
5668    DEP_FIELD(SMMU_CB14_FSYNR0, PLVL, 2, 0)
5669DEP_REG32(SMMU_CB14_IPAFAR_LOW, 0x1e070)
5670    DEP_FIELD(SMMU_CB14_IPAFAR_LOW, IPAFAR_L, 20, 12)
5671    DEP_FIELD(SMMU_CB14_IPAFAR_LOW, FAR_RO, 12, 0)
5672DEP_REG32(SMMU_CB14_IPAFAR_HIGH, 0x1e074)
5673    DEP_FIELD(SMMU_CB14_IPAFAR_HIGH, BITS, 16, 0)
5674DEP_REG32(SMMU_CB14_TLBIVA_LOW, 0x1e600)
5675DEP_REG32(SMMU_CB14_TLBIVA_HIGH, 0x1e604)
5676    DEP_FIELD(SMMU_CB14_TLBIVA_HIGH, ASID, 16, 16)
5677    DEP_FIELD(SMMU_CB14_TLBIVA_HIGH, ADDRESS, 5, 0)
5678DEP_REG32(SMMU_CB14_TLBIVAA_LOW, 0x1e608)
5679DEP_REG32(SMMU_CB14_TLBIVAA_HIGH, 0x1e60c)
5680    DEP_FIELD(SMMU_CB14_TLBIVAA_HIGH, ASID, 16, 16)
5681    DEP_FIELD(SMMU_CB14_TLBIVAA_HIGH, ADDRESS, 5, 0)
5682DEP_REG32(SMMU_CB14_TLBIASID, 0x1e610)
5683    DEP_FIELD(SMMU_CB14_TLBIASID, ASID, 16, 0)
5684DEP_REG32(SMMU_CB14_TLBIALL, 0x1e618)
5685DEP_REG32(SMMU_CB14_TLBIVAL_LOW, 0x1e620)
5686DEP_REG32(SMMU_CB14_TLBIVAL_HIGH, 0x1e624)
5687    DEP_FIELD(SMMU_CB14_TLBIVAL_HIGH, ASID, 16, 16)
5688    DEP_FIELD(SMMU_CB14_TLBIVAL_HIGH, ADDRESS, 5, 0)
5689DEP_REG32(SMMU_CB14_TLBIVAAL_LOW, 0x1e628)
5690DEP_REG32(SMMU_CB14_TLBIVAAL_HIGH, 0x1e62c)
5691    DEP_FIELD(SMMU_CB14_TLBIVAAL_HIGH, ASID, 16, 16)
5692    DEP_FIELD(SMMU_CB14_TLBIVAAL_HIGH, ADDRESS, 5, 0)
5693DEP_REG32(SMMU_CB14_TLBIIPAS2_LOW, 0x1e630)
5694DEP_REG32(SMMU_CB14_TLBIIPAS2_HIGH, 0x1e634)
5695    DEP_FIELD(SMMU_CB14_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
5696DEP_REG32(SMMU_CB14_TLBIIPAS2L_LOW, 0x1e638)
5697DEP_REG32(SMMU_CB14_TLBIIPAS2L_HIGH, 0x1e63c)
5698    DEP_FIELD(SMMU_CB14_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
5699DEP_REG32(SMMU_CB14_TLBSYNC, 0x1e7f0)
5700DEP_REG32(SMMU_CB14_TLBSTATUS, 0x1e7f4)
5701    DEP_FIELD(SMMU_CB14_TLBSTATUS, SACTIVE, 1, 0)
5702DEP_REG32(SMMU_CB14_PMEVCNTR0, 0x1ee00)
5703DEP_REG32(SMMU_CB14_PMEVCNTR1, 0x1ee04)
5704DEP_REG32(SMMU_CB14_PMEVCNTR2, 0x1ee08)
5705DEP_REG32(SMMU_CB14_PMEVCNTR3, 0x1ee0c)
5706DEP_REG32(SMMU_CB14_PMEVTYPER0, 0x1ee80)
5707    DEP_FIELD(SMMU_CB14_PMEVTYPER0, P, 1, 31)
5708    DEP_FIELD(SMMU_CB14_PMEVTYPER0, U, 1, 30)
5709    DEP_FIELD(SMMU_CB14_PMEVTYPER0, NSP, 1, 29)
5710    DEP_FIELD(SMMU_CB14_PMEVTYPER0, NSU, 1, 28)
5711    DEP_FIELD(SMMU_CB14_PMEVTYPER0, EVENT, 5, 0)
5712DEP_REG32(SMMU_CB14_PMEVTYPER1, 0x1ee84)
5713    DEP_FIELD(SMMU_CB14_PMEVTYPER1, P, 1, 31)
5714    DEP_FIELD(SMMU_CB14_PMEVTYPER1, U, 1, 30)
5715    DEP_FIELD(SMMU_CB14_PMEVTYPER1, NSP, 1, 29)
5716    DEP_FIELD(SMMU_CB14_PMEVTYPER1, NSU, 1, 28)
5717    DEP_FIELD(SMMU_CB14_PMEVTYPER1, EVENT, 5, 0)
5718DEP_REG32(SMMU_CB14_PMEVTYPER2, 0x1ee88)
5719    DEP_FIELD(SMMU_CB14_PMEVTYPER2, P, 1, 31)
5720    DEP_FIELD(SMMU_CB14_PMEVTYPER2, U, 1, 30)
5721    DEP_FIELD(SMMU_CB14_PMEVTYPER2, NSP, 1, 29)
5722    DEP_FIELD(SMMU_CB14_PMEVTYPER2, NSU, 1, 28)
5723    DEP_FIELD(SMMU_CB14_PMEVTYPER2, EVENT, 5, 0)
5724DEP_REG32(SMMU_CB14_PMEVTYPER3, 0x1ee8c)
5725    DEP_FIELD(SMMU_CB14_PMEVTYPER3, P, 1, 31)
5726    DEP_FIELD(SMMU_CB14_PMEVTYPER3, U, 1, 30)
5727    DEP_FIELD(SMMU_CB14_PMEVTYPER3, NSP, 1, 29)
5728    DEP_FIELD(SMMU_CB14_PMEVTYPER3, NSU, 1, 28)
5729    DEP_FIELD(SMMU_CB14_PMEVTYPER3, EVENT, 5, 0)
5730DEP_REG32(SMMU_CB14_PMCFGR, 0x1ef00)
5731    DEP_FIELD(SMMU_CB14_PMCFGR, NCG, 8, 24)
5732    DEP_FIELD(SMMU_CB14_PMCFGR, UEN, 1, 19)
5733    DEP_FIELD(SMMU_CB14_PMCFGR, EX, 1, 16)
5734    DEP_FIELD(SMMU_CB14_PMCFGR, CCD, 1, 15)
5735    DEP_FIELD(SMMU_CB14_PMCFGR, CC, 1, 14)
5736    DEP_FIELD(SMMU_CB14_PMCFGR, SIZE, 6, 8)
5737    DEP_FIELD(SMMU_CB14_PMCFGR, N, 8, 0)
5738DEP_REG32(SMMU_CB14_PMCR, 0x1ef04)
5739    DEP_FIELD(SMMU_CB14_PMCR, IMP, 8, 24)
5740    DEP_FIELD(SMMU_CB14_PMCR, X, 1, 4)
5741    DEP_FIELD(SMMU_CB14_PMCR, P, 1, 1)
5742    DEP_FIELD(SMMU_CB14_PMCR, E, 1, 0)
5743DEP_REG32(SMMU_CB14_PMCEID, 0x1ef20)
5744    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X12, 1, 17)
5745    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X11, 1, 16)
5746    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X10, 1, 15)
5747    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X0A, 1, 9)
5748    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X09, 1, 8)
5749    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X08, 1, 7)
5750    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X01, 1, 1)
5751    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X00, 1, 0)
5752DEP_REG32(SMMU_CB14_PMCNTENSE, 0x1ef40)
5753    DEP_FIELD(SMMU_CB14_PMCNTENSE, P3, 1, 3)
5754    DEP_FIELD(SMMU_CB14_PMCNTENSE, P2, 1, 2)
5755    DEP_FIELD(SMMU_CB14_PMCNTENSE, P1, 1, 1)
5756    DEP_FIELD(SMMU_CB14_PMCNTENSE, P0, 1, 0)
5757DEP_REG32(SMMU_CB14_PMCNTENCLR, 0x1ef44)
5758    DEP_FIELD(SMMU_CB14_PMCNTENCLR, P3, 1, 3)
5759    DEP_FIELD(SMMU_CB14_PMCNTENCLR, P2, 1, 2)
5760    DEP_FIELD(SMMU_CB14_PMCNTENCLR, P1, 1, 1)
5761    DEP_FIELD(SMMU_CB14_PMCNTENCLR, P0, 1, 0)
5762DEP_REG32(SMMU_CB14_PMCNTENSET, 0x1ef48)
5763    DEP_FIELD(SMMU_CB14_PMCNTENSET, P3, 1, 3)
5764    DEP_FIELD(SMMU_CB14_PMCNTENSET, P2, 1, 2)
5765    DEP_FIELD(SMMU_CB14_PMCNTENSET, P1, 1, 1)
5766    DEP_FIELD(SMMU_CB14_PMCNTENSET, P0, 1, 0)
5767DEP_REG32(SMMU_CB14_PMINTENCLR, 0x1ef4c)
5768    DEP_FIELD(SMMU_CB14_PMINTENCLR, P3, 1, 3)
5769    DEP_FIELD(SMMU_CB14_PMINTENCLR, P2, 1, 2)
5770    DEP_FIELD(SMMU_CB14_PMINTENCLR, P1, 1, 1)
5771    DEP_FIELD(SMMU_CB14_PMINTENCLR, P0, 1, 0)
5772DEP_REG32(SMMU_CB14_PMOVSCLR, 0x1ef50)
5773    DEP_FIELD(SMMU_CB14_PMOVSCLR, P3, 1, 3)
5774    DEP_FIELD(SMMU_CB14_PMOVSCLR, P2, 1, 2)
5775    DEP_FIELD(SMMU_CB14_PMOVSCLR, P1, 1, 1)
5776    DEP_FIELD(SMMU_CB14_PMOVSCLR, P0, 1, 0)
5777DEP_REG32(SMMU_CB14_PMOVSSET, 0x1ef58)
5778    DEP_FIELD(SMMU_CB14_PMOVSSET, P3, 1, 3)
5779    DEP_FIELD(SMMU_CB14_PMOVSSET, P2, 1, 2)
5780    DEP_FIELD(SMMU_CB14_PMOVSSET, P1, 1, 1)
5781    DEP_FIELD(SMMU_CB14_PMOVSSET, P0, 1, 0)
5782DEP_REG32(SMMU_CB14_PMAUTHSTATUS, 0x1efb8)
5783    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, SNI, 1, 7)
5784    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, SNE, 1, 6)
5785    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, SI, 1, 5)
5786    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, SE, 1, 4)
5787    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, NSNI, 1, 3)
5788    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, NSNE, 1, 2)
5789    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, NSI, 1, 1)
5790    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, NSE, 1, 0)
5791DEP_REG32(SMMU_CB15_SCTLR, 0x1f000)
5792    DEP_FIELD(SMMU_CB15_SCTLR, NSCFG, 2, 28)
5793    DEP_FIELD(SMMU_CB15_SCTLR, WACFG, 2, 26)
5794    DEP_FIELD(SMMU_CB15_SCTLR, RACFG, 2, 24)
5795    DEP_FIELD(SMMU_CB15_SCTLR, SHCFG, 2, 22)
5796    DEP_FIELD(SMMU_CB15_SCTLR, FB, 1, 21)
5797    DEP_FIELD(SMMU_CB15_SCTLR, MTCFG, 1, 20)
5798    DEP_FIELD(SMMU_CB15_SCTLR, MEMATTR, 4, 16)
5799    DEP_FIELD(SMMU_CB15_SCTLR, TRANSIENTCFG, 2, 14)
5800    DEP_FIELD(SMMU_CB15_SCTLR, PTW, 1, 13)
5801    DEP_FIELD(SMMU_CB15_SCTLR, ASIDPNE, 1, 12)
5802    DEP_FIELD(SMMU_CB15_SCTLR, UWXN, 1, 10)
5803    DEP_FIELD(SMMU_CB15_SCTLR, WXN, 1, 9)
5804    DEP_FIELD(SMMU_CB15_SCTLR, HUPCF, 1, 8)
5805    DEP_FIELD(SMMU_CB15_SCTLR, CFCFG, 1, 7)
5806    DEP_FIELD(SMMU_CB15_SCTLR, CFIE, 1, 6)
5807    DEP_FIELD(SMMU_CB15_SCTLR, CFRE, 1, 5)
5808    DEP_FIELD(SMMU_CB15_SCTLR, E, 1, 4)
5809    DEP_FIELD(SMMU_CB15_SCTLR, AFFD, 1, 3)
5810    DEP_FIELD(SMMU_CB15_SCTLR, AFE, 1, 2)
5811    DEP_FIELD(SMMU_CB15_SCTLR, TRE, 1, 1)
5812    DEP_FIELD(SMMU_CB15_SCTLR, M, 1, 0)
5813DEP_REG32(SMMU_CB15_ACTLR, 0x1f004)
5814    DEP_FIELD(SMMU_CB15_ACTLR, CPRE, 1, 1)
5815    DEP_FIELD(SMMU_CB15_ACTLR, CMTLB, 1, 0)
5816DEP_REG32(SMMU_CB15_RESUME, 0x1f008)
5817    DEP_FIELD(SMMU_CB15_RESUME, TNR, 1, 0)
5818DEP_REG32(SMMU_CB15_TCR2, 0x1f010)
5819    DEP_FIELD(SMMU_CB15_TCR2, NSCFG1, 1, 30)
5820    DEP_FIELD(SMMU_CB15_TCR2, SEP, 3, 15)
5821    DEP_FIELD(SMMU_CB15_TCR2, NSCFG0, 1, 14)
5822    DEP_FIELD(SMMU_CB15_TCR2, TBI1, 1, 6)
5823    DEP_FIELD(SMMU_CB15_TCR2, TBI0, 1, 5)
5824    DEP_FIELD(SMMU_CB15_TCR2, AS, 1, 4)
5825    DEP_FIELD(SMMU_CB15_TCR2, PASIZE, 3, 0)
5826DEP_REG32(SMMU_CB15_TTBR0_LOW, 0x1f020)
5827    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_31_7, 25, 7)
5828    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
5829    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
5830    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
5831    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_2, 1, 2)
5832    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_1_S, 1, 1)
5833    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
5834DEP_REG32(SMMU_CB15_TTBR0_HIGH, 0x1f024)
5835    DEP_FIELD(SMMU_CB15_TTBR0_HIGH, ASID, 16, 16)
5836    DEP_FIELD(SMMU_CB15_TTBR0_HIGH, ADDRESS, 16, 0)
5837DEP_REG32(SMMU_CB15_TTBR1_LOW, 0x1f028)
5838    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_31_7, 25, 7)
5839    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
5840    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
5841    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
5842    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_2, 1, 2)
5843    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_1_S, 1, 1)
5844    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
5845DEP_REG32(SMMU_CB15_TTBR1_HIGH, 0x1f02c)
5846    DEP_FIELD(SMMU_CB15_TTBR1_HIGH, ASID, 16, 16)
5847    DEP_FIELD(SMMU_CB15_TTBR1_HIGH, ADDRESS, 16, 0)
5848DEP_REG32(SMMU_CB15_TCR_LPAE, 0x1f030)
5849    DEP_FIELD(SMMU_CB15_TCR_LPAE, EAE, 1, 31)
5850    DEP_FIELD(SMMU_CB15_TCR_LPAE, NSCFG1_TG1, 1, 30)
5851    DEP_FIELD(SMMU_CB15_TCR_LPAE, SH1, 2, 28)
5852    DEP_FIELD(SMMU_CB15_TCR_LPAE, ORGN1, 2, 26)
5853    DEP_FIELD(SMMU_CB15_TCR_LPAE, IRGN1, 2, 24)
5854    DEP_FIELD(SMMU_CB15_TCR_LPAE, EPD1, 1, 23)
5855    DEP_FIELD(SMMU_CB15_TCR_LPAE, A1, 1, 22)
5856    DEP_FIELD(SMMU_CB15_TCR_LPAE, T1SZ_5_3, 3, 19)
5857    DEP_FIELD(SMMU_CB15_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
5858    DEP_FIELD(SMMU_CB15_TCR_LPAE, NSCFG0_TG0, 1, 14)
5859    DEP_FIELD(SMMU_CB15_TCR_LPAE, SH0, 2, 12)
5860    DEP_FIELD(SMMU_CB15_TCR_LPAE, ORGN0, 2, 10)
5861    DEP_FIELD(SMMU_CB15_TCR_LPAE, IRGN0, 2, 8)
5862    DEP_FIELD(SMMU_CB15_TCR_LPAE, SL0_1_EPD0, 1, 7)
5863    DEP_FIELD(SMMU_CB15_TCR_LPAE, SL0_0, 1, 6)
5864    DEP_FIELD(SMMU_CB15_TCR_LPAE, PD1_T0SZ_5, 1, 5)
5865    DEP_FIELD(SMMU_CB15_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
5866    DEP_FIELD(SMMU_CB15_TCR_LPAE, T0SZ_3_0, 4, 0)
5867DEP_REG32(SMMU_CB15_CONTEXTIDR, 0x1f034)
5868    DEP_FIELD(SMMU_CB15_CONTEXTIDR, PROCID, 24, 8)
5869    DEP_FIELD(SMMU_CB15_CONTEXTIDR, ASID, 8, 0)
5870DEP_REG32(SMMU_CB15_PRRR_MAIR0, 0x1f038)
5871    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS7, 1, 31)
5872    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS6, 1, 30)
5873    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS5, 1, 29)
5874    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS4, 1, 28)
5875    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS3, 1, 27)
5876    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS2, 1, 26)
5877    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS1, 1, 25)
5878    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS0, 1, 24)
5879    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NS1, 1, 19)
5880    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NS0, 1, 18)
5881    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, DS1, 1, 17)
5882    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, DS0, 1, 16)
5883    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR7, 2, 14)
5884    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR6, 2, 12)
5885    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR5, 2, 10)
5886    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR4, 2, 8)
5887    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR3, 2, 6)
5888    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR2, 2, 4)
5889    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR1, 2, 2)
5890    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR0, 2, 0)
5891DEP_REG32(SMMU_CB15_NMRR_MAIR1, 0x1f03c)
5892    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR7, 2, 30)
5893    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR6, 2, 28)
5894    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR5, 2, 26)
5895    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR4, 2, 24)
5896    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR3, 2, 22)
5897    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR2, 2, 20)
5898    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR1, 2, 18)
5899    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR0, 2, 16)
5900    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR7, 2, 14)
5901    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR6, 2, 12)
5902    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR5, 2, 10)
5903    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR4, 2, 8)
5904    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR3, 2, 6)
5905    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR2, 2, 4)
5906    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR1, 2, 2)
5907    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR0, 2, 0)
5908DEP_REG32(SMMU_CB15_FSR, 0x1f058)
5909    DEP_FIELD(SMMU_CB15_FSR, MULTI, 1, 31)
5910    DEP_FIELD(SMMU_CB15_FSR, SS, 1, 30)
5911    DEP_FIELD(SMMU_CB15_FSR, FORMAT, 2, 9)
5912    DEP_FIELD(SMMU_CB15_FSR, UUT, 1, 8)
5913    DEP_FIELD(SMMU_CB15_FSR, ASF, 1, 7)
5914    DEP_FIELD(SMMU_CB15_FSR, TLBLKF, 1, 6)
5915    DEP_FIELD(SMMU_CB15_FSR, TLBMCF, 1, 5)
5916    DEP_FIELD(SMMU_CB15_FSR, EF, 1, 4)
5917    DEP_FIELD(SMMU_CB15_FSR, PF, 1, 3)
5918    DEP_FIELD(SMMU_CB15_FSR, AFF, 1, 2)
5919    DEP_FIELD(SMMU_CB15_FSR, TF, 1, 1)
5920DEP_REG32(SMMU_CB15_FSRRESTORE, 0x1f05c)
5921DEP_REG32(SMMU_CB15_FAR_LOW, 0x1f060)
5922DEP_REG32(SMMU_CB15_FAR_HIGH, 0x1f064)
5923    DEP_FIELD(SMMU_CB15_FAR_HIGH, BITS, 17, 0)
5924DEP_REG32(SMMU_CB15_FSYNR0, 0x1f068)
5925    DEP_FIELD(SMMU_CB15_FSYNR0, S1CBNDX, 4, 16)
5926    DEP_FIELD(SMMU_CB15_FSYNR0, AFR, 1, 11)
5927    DEP_FIELD(SMMU_CB15_FSYNR0, PTWF, 1, 10)
5928    DEP_FIELD(SMMU_CB15_FSYNR0, ATOF, 1, 9)
5929    DEP_FIELD(SMMU_CB15_FSYNR0, NSATTR, 1, 8)
5930    DEP_FIELD(SMMU_CB15_FSYNR0, IND, 1, 6)
5931    DEP_FIELD(SMMU_CB15_FSYNR0, PNU, 1, 5)
5932    DEP_FIELD(SMMU_CB15_FSYNR0, WNR, 1, 4)
5933    DEP_FIELD(SMMU_CB15_FSYNR0, PLVL, 2, 0)
5934DEP_REG32(SMMU_CB15_IPAFAR_LOW, 0x1f070)
5935    DEP_FIELD(SMMU_CB15_IPAFAR_LOW, IPAFAR_L, 20, 12)
5936    DEP_FIELD(SMMU_CB15_IPAFAR_LOW, FAR_RO, 12, 0)
5937DEP_REG32(SMMU_CB15_IPAFAR_HIGH, 0x1f074)
5938    DEP_FIELD(SMMU_CB15_IPAFAR_HIGH, BITS, 16, 0)
5939DEP_REG32(SMMU_CB15_TLBIVA_LOW, 0x1f600)
5940DEP_REG32(SMMU_CB15_TLBIVA_HIGH, 0x1f604)
5941    DEP_FIELD(SMMU_CB15_TLBIVA_HIGH, ASID, 16, 16)
5942    DEP_FIELD(SMMU_CB15_TLBIVA_HIGH, ADDRESS, 5, 0)
5943DEP_REG32(SMMU_CB15_TLBIVAA_LOW, 0x1f608)
5944DEP_REG32(SMMU_CB15_TLBIVAA_HIGH, 0x1f60c)
5945    DEP_FIELD(SMMU_CB15_TLBIVAA_HIGH, ASID, 16, 16)
5946    DEP_FIELD(SMMU_CB15_TLBIVAA_HIGH, ADDRESS, 5, 0)
5947DEP_REG32(SMMU_CB15_TLBIASID, 0x1f610)
5948    DEP_FIELD(SMMU_CB15_TLBIASID, ASID, 16, 0)
5949DEP_REG32(SMMU_CB15_TLBIALL, 0x1f618)
5950DEP_REG32(SMMU_CB15_TLBIVAL_LOW, 0x1f620)
5951DEP_REG32(SMMU_CB15_TLBIVAL_HIGH, 0x1f624)
5952    DEP_FIELD(SMMU_CB15_TLBIVAL_HIGH, ASID, 16, 16)
5953    DEP_FIELD(SMMU_CB15_TLBIVAL_HIGH, ADDRESS, 5, 0)
5954DEP_REG32(SMMU_CB15_TLBIVAAL_LOW, 0x1f628)
5955DEP_REG32(SMMU_CB15_TLBIVAAL_HIGH, 0x1f62c)
5956    DEP_FIELD(SMMU_CB15_TLBIVAAL_HIGH, ASID, 16, 16)
5957    DEP_FIELD(SMMU_CB15_TLBIVAAL_HIGH, ADDRESS, 5, 0)
5958DEP_REG32(SMMU_CB15_TLBIIPAS2_LOW, 0x1f630)
5959DEP_REG32(SMMU_CB15_TLBIIPAS2_HIGH, 0x1f634)
5960    DEP_FIELD(SMMU_CB15_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
5961DEP_REG32(SMMU_CB15_TLBIIPAS2L_LOW, 0x1f638)
5962DEP_REG32(SMMU_CB15_TLBIIPAS2L_HIGH, 0x1f63c)
5963    DEP_FIELD(SMMU_CB15_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
5964DEP_REG32(SMMU_CB15_TLBSYNC, 0x1f7f0)
5965DEP_REG32(SMMU_CB15_TLBSTATUS, 0x1f7f4)
5966    DEP_FIELD(SMMU_CB15_TLBSTATUS, SACTIVE, 1, 0)
5967DEP_REG32(SMMU_CB15_PMEVCNTR0, 0x1fe00)
5968DEP_REG32(SMMU_CB15_PMEVCNTR1, 0x1fe04)
5969DEP_REG32(SMMU_CB15_PMEVCNTR2, 0x1fe08)
5970DEP_REG32(SMMU_CB15_PMEVCNTR3, 0x1fe0c)
5971DEP_REG32(SMMU_CB15_PMEVTYPER0, 0x1fe80)
5972    DEP_FIELD(SMMU_CB15_PMEVTYPER0, P, 1, 31)
5973    DEP_FIELD(SMMU_CB15_PMEVTYPER0, U, 1, 30)
5974    DEP_FIELD(SMMU_CB15_PMEVTYPER0, NSP, 1, 29)
5975    DEP_FIELD(SMMU_CB15_PMEVTYPER0, NSU, 1, 28)
5976    DEP_FIELD(SMMU_CB15_PMEVTYPER0, EVENT, 5, 0)
5977DEP_REG32(SMMU_CB15_PMEVTYPER1, 0x1fe84)
5978    DEP_FIELD(SMMU_CB15_PMEVTYPER1, P, 1, 31)
5979    DEP_FIELD(SMMU_CB15_PMEVTYPER1, U, 1, 30)
5980    DEP_FIELD(SMMU_CB15_PMEVTYPER1, NSP, 1, 29)
5981    DEP_FIELD(SMMU_CB15_PMEVTYPER1, NSU, 1, 28)
5982    DEP_FIELD(SMMU_CB15_PMEVTYPER1, EVENT, 5, 0)
5983DEP_REG32(SMMU_CB15_PMEVTYPER2, 0x1fe88)
5984    DEP_FIELD(SMMU_CB15_PMEVTYPER2, P, 1, 31)
5985    DEP_FIELD(SMMU_CB15_PMEVTYPER2, U, 1, 30)
5986    DEP_FIELD(SMMU_CB15_PMEVTYPER2, NSP, 1, 29)
5987    DEP_FIELD(SMMU_CB15_PMEVTYPER2, NSU, 1, 28)
5988    DEP_FIELD(SMMU_CB15_PMEVTYPER2, EVENT, 5, 0)
5989DEP_REG32(SMMU_CB15_PMEVTYPER3, 0x1fe8c)
5990    DEP_FIELD(SMMU_CB15_PMEVTYPER3, P, 1, 31)
5991    DEP_FIELD(SMMU_CB15_PMEVTYPER3, U, 1, 30)
5992    DEP_FIELD(SMMU_CB15_PMEVTYPER3, NSP, 1, 29)
5993    DEP_FIELD(SMMU_CB15_PMEVTYPER3, NSU, 1, 28)
5994    DEP_FIELD(SMMU_CB15_PMEVTYPER3, EVENT, 5, 0)
5995DEP_REG32(SMMU_CB15_PMCFGR, 0x1ff00)
5996    DEP_FIELD(SMMU_CB15_PMCFGR, NCG, 8, 24)
5997    DEP_FIELD(SMMU_CB15_PMCFGR, UEN, 1, 19)
5998    DEP_FIELD(SMMU_CB15_PMCFGR, EX, 1, 16)
5999    DEP_FIELD(SMMU_CB15_PMCFGR, CCD, 1, 15)
6000    DEP_FIELD(SMMU_CB15_PMCFGR, CC, 1, 14)

6001    DEP_FIELD(SMMU_CB15_PMCFGR, SIZE, 6, 8)
6002    DEP_FIELD(SMMU_CB15_PMCFGR, N, 8, 0)
6003DEP_REG32(SMMU_CB15_PMCR, 0x1ff04)
6004    DEP_FIELD(SMMU_CB15_PMCR, IMP, 8, 24)
6005    DEP_FIELD(SMMU_CB15_PMCR, X, 1, 4)
6006    DEP_FIELD(SMMU_CB15_PMCR, P, 1, 1)
6007    DEP_FIELD(SMMU_CB15_PMCR, E, 1, 0)
6008DEP_REG32(SMMU_CB15_PMCEID, 0x1ff20)
6009    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X12, 1, 17)
6010    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X11, 1, 16)
6011    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X10, 1, 15)
6012    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X0A, 1, 9)
6013    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X09, 1, 8)
6014    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X08, 1, 7)
6015    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X01, 1, 1)
6016    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X00, 1, 0)
6017DEP_REG32(SMMU_CB15_PMCNTENSE, 0x1ff40)
6018    DEP_FIELD(SMMU_CB15_PMCNTENSE, P3, 1, 3)
6019    DEP_FIELD(SMMU_CB15_PMCNTENSE, P2, 1, 2)
6020    DEP_FIELD(SMMU_CB15_PMCNTENSE, P1, 1, 1)
6021    DEP_FIELD(SMMU_CB15_PMCNTENSE, P0, 1, 0)
6022DEP_REG32(SMMU_CB15_PMCNTENCLR, 0x1ff44)
6023    DEP_FIELD(SMMU_CB15_PMCNTENCLR, P3, 1, 3)
6024    DEP_FIELD(SMMU_CB15_PMCNTENCLR, P2, 1, 2)
6025    DEP_FIELD(SMMU_CB15_PMCNTENCLR, P1, 1, 1)
6026    DEP_FIELD(SMMU_CB15_PMCNTENCLR, P0, 1, 0)
6027DEP_REG32(SMMU_CB15_PMCNTENSET, 0x1ff48)
6028    DEP_FIELD(SMMU_CB15_PMCNTENSET, P3, 1, 3)
6029    DEP_FIELD(SMMU_CB15_PMCNTENSET, P2, 1, 2)
6030    DEP_FIELD(SMMU_CB15_PMCNTENSET, P1, 1, 1)
6031    DEP_FIELD(SMMU_CB15_PMCNTENSET, P0, 1, 0)
6032DEP_REG32(SMMU_CB15_PMINTENCLR, 0x1ff4c)
6033    DEP_FIELD(SMMU_CB15_PMINTENCLR, P3, 1, 3)
6034    DEP_FIELD(SMMU_CB15_PMINTENCLR, P2, 1, 2)
6035    DEP_FIELD(SMMU_CB15_PMINTENCLR, P1, 1, 1)
6036    DEP_FIELD(SMMU_CB15_PMINTENCLR, P0, 1, 0)
6037DEP_REG32(SMMU_CB15_PMOVSCLR, 0x1ff50)
6038    DEP_FIELD(SMMU_CB15_PMOVSCLR, P3, 1, 3)
6039    DEP_FIELD(SMMU_CB15_PMOVSCLR, P2, 1, 2)
6040    DEP_FIELD(SMMU_CB15_PMOVSCLR, P1, 1, 1)
6041    DEP_FIELD(SMMU_CB15_PMOVSCLR, P0, 1, 0)
6042DEP_REG32(SMMU_CB15_PMOVSSET, 0x1ff58)
6043    DEP_FIELD(SMMU_CB15_PMOVSSET, P3, 1, 3)
6044    DEP_FIELD(SMMU_CB15_PMOVSSET, P2, 1, 2)
6045    DEP_FIELD(SMMU_CB15_PMOVSSET, P1, 1, 1)
6046    DEP_FIELD(SMMU_CB15_PMOVSSET, P0, 1, 0)
6047DEP_REG32(SMMU_CB15_PMAUTHSTATUS, 0x1ffb8)
6048    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, SNI, 1, 7)
6049    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, SNE, 1, 6)
6050    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, SI, 1, 5)
6051    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, SE, 1, 4)
6052    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, NSNI, 1, 3)
6053    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, NSNE, 1, 2)
6054    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, NSI, 1, 1)
6055    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, NSE, 1, 0)
6056
6057/* Missing from the regspec.  */
6058DEP_REG32(SMMU_GATS1PR, 0x110)
6059DEP_REG32(SMMU_GATS1PR_H, 0x114)
6060DEP_REG32(SMMU_GATS1PW, 0x118)
6061DEP_REG32(SMMU_GATS1PW_H, 0x11C)
6062DEP_REG32(SMMU_GATS12PR, 0x130)
6063DEP_REG32(SMMU_GATS12PR_H, 0x134)
6064DEP_REG32(SMMU_GATS12PW, 0x138)
6065DEP_REG32(SMMU_GATS12PW_H, 0x13C)
6066DEP_REG32(SMMU_GPAR, 0x180)
6067DEP_REG32(SMMU_GPAR_H, 0x184)
6068DEP_REG32(SMMU_GATSR, 0x188)
6069
6070#define R_MAX (R_SMMU_CB15_PMAUTHSTATUS + 1)
6071
6072/* This should be configurable per instance.  */
6073#define PAGESIZE (A_SMMU_CB1_TTBR0_LOW - A_SMMU_CB0_TTBR0_LOW)
6074
6075/* Maximum number of TBUs supported by this model.  */
6076#define MAX_TBU 16
6077
6078typedef struct SMMU SMMU;
6079typedef struct TBU {
6080    SMMU *smmu;
6081    MemoryRegion iommu;
6082    AddressSpace *as;
6083    MemoryRegion *mr;
6084} TBU;
6085
6086struct SMMU {
6087    SysBusDevice parent_obj;
6088    MemoryRegion iomem;
6089
6090    MemoryRegion *dma_mr;
6091    AddressSpace *dma_as;
6092
6093    TBU tbu[MAX_TBU];
6094
6095    struct {
6096        qemu_irq global;
6097        qemu_irq context[16];
6098    } irq;
6099
6100    struct {
6101        uint32_t pamax;
6102    } cfg;
6103
6104    uint32_t regs[R_MAX];
6105    DepRegisterInfo regs_info[R_MAX];
6106};
6107
6108/* Generic page attributes.  */
6109typedef struct PageAttr {
6110    uint64_t pa;
6111    unsigned int block : 1;
6112    unsigned int rd : 1;
6113    unsigned int wr : 1;
6114    unsigned int ns : 1;
6115} PageAttr;
6116
6117typedef struct TransReq {
6118    uint64_t va;
6119    uint64_t tcr[3];
6120    uint64_t ttbr[3][2];
6121    uint32_t access;
6122    unsigned int stage;
6123    bool s2_enabled;
6124    unsigned int s2_cb;
6125
6126    uint64_t pa;
6127    uint32_t prot;
6128
6129    bool err;
6130} TransReq;
6131
6132static void smmu_update_ctx_irq(SMMU *s, unsigned int cb)
6133{
6134    unsigned int cb_offset = (cb * PAGESIZE) / 4;
6135    uint32_t sctlr;
6136    uint32_t fsr;
6137    bool ie, tf;
6138    bool pending;
6139
6140    fsr = s->regs[R_SMMU_CB0_FSR + cb_offset];
6141    sctlr = s->regs[R_SMMU_CB0_SCTLR + cb_offset];
6142
6143    tf = DEP_F_EX32(fsr, SMMU_CB0_FSR, TF);
6144    ie = DEP_F_EX32(sctlr, SMMU_CB0_SCTLR, CFIE);
6145    pending = tf && ie;
6146    qemu_set_irq(s->irq.context[cb], pending);
6147}
6148
6149static void smmu_fault(SMMU *s, unsigned int cb, TransReq *req, uint64_t syn)
6150{
6151    unsigned int cb_offset = (cb * PAGESIZE) / 4;
6152
6153    s->regs[R_SMMU_CB0_FSR + cb_offset] |= 1 << 1;
6154
6155    req->err = true;
6156    s->regs[R_SMMU_CB0_IPAFAR_LOW + cb_offset] = req->va;
6157    s->regs[R_SMMU_CB0_IPAFAR_HIGH + cb_offset] = req->va >> 32;
6158    if (req->stage == 2) {
6159        s->regs[R_SMMU_CB0_FAR_LOW + cb_offset] = req->va;
6160        s->regs[R_SMMU_CB0_FAR_HIGH + cb_offset] = req->va >> 32;
6161    }
6162    smmu_update_ctx_irq(s, cb);
6163}
6164
6165static int smmu_stream_id_match(SMMU *s, uint32_t stream_id)
6166{
6167    unsigned int nr_smr = DEP_AF_EX32(s->regs, SMMU_SIDR0, NUMSMRG);
6168    unsigned int i;
6169    uint32_t s2cr;
6170    unsigned int cbndx = -1;
6171
6172    for (i = 0; i < nr_smr; i++) {
6173        uint32_t v = s->regs[R_SMMU_SMR0 + i];
6174        bool valid = DEP_F_EX32(v, SMMU_SMR0, VALID);
6175        uint16_t mask = DEP_F_EX32(v, SMMU_SMR0, MASK);
6176        uint16_t id = DEP_F_EX32(v, SMMU_SMR0, ID);
6177
6178
6179        if (valid && (~mask & id) == (~mask & stream_id)) {
6180            s2cr = s->regs[R_SMMU_S2CR0 + i];
6181            cbndx = DEP_F_EX32(s2cr, SMMU_S2CR0, CBNDX_VMID);
6182            break;
6183        }
6184    }
6185    return cbndx;
6186}
6187
6188static bool check_s2_startlevel(bool is_aa64, unsigned int pamax, int level,
6189                                int inputsize, int stride)
6190{
6191    /* Negative levels are never allowed.  */
6192    if (level < 0) {
6193        return false;
6194    }
6195
6196    if (is_aa64) {
6197        switch (stride) {
6198        case 13: /* 64KB Pages.  */
6199            if (level == 0 || (level == 1 && pamax <= 42)) {
6200                return false;
6201            }
6202            break;
6203        case 11: /* 16KB Pages.  */
6204            if (level == 0 || (level == 1 && pamax <= 40)) {
6205                return false;
6206            }
6207            break;
6208        case 9: /* 4KB Pages.  */
6209            if (level == 0 && pamax <= 42) {
6210                return false;
6211            }
6212            break;
6213        default:
6214            g_assert_not_reached();
6215        }
6216    } else {
6217        const int grainsize = stride + 3;
6218        int startsizecheck;
6219
6220        /* AArch32 only supports 4KB pages. Assert on that.  */
6221        assert(stride == 9);
6222
6223        if (level == 0) {
6224            return false;
6225        }
6226
6227        startsizecheck = inputsize - ((3 - level) * stride + grainsize);
6228        if (startsizecheck < 1 || startsizecheck > stride + 4) {
6229            return false;
6230        }
6231    }
6232    return true;
6233}
6234
6235static bool check_out_addr(uint64_t addr, unsigned int outputsize)
6236{
6237    if (outputsize != 48 && extract64(addr, outputsize, 48 - outputsize)) {
6238        return false;
6239    }
6240    return true;
6241}
6242
6243static void smmu_ptw64(SMMU *s, unsigned int cb, TransReq *req)
6244{
6245    static const unsigned int outsize_map[] = {
6246        [0] = 32,
6247        [1] = 36,
6248        [2] = 40,
6249        [3] = 42,
6250        [4] = 44,
6251        [5] = 48,
6252        [6] = 48,
6253        [7] = 48,
6254    };
6255    unsigned int cb_offset = (cb * PAGESIZE) / 4;
6256    uint32_t sctlr;
6257    unsigned int tsz;
6258    unsigned int t0sz;
6259    unsigned int t1sz;
6260    unsigned int inputsize;
6261    unsigned int outputsize;
6262    unsigned int grainsize = -1;
6263    unsigned int stride;
6264    int level = 0;
6265    unsigned int firstblocklevel = 0;
6266    unsigned int tg;
6267    unsigned int ps;
6268    unsigned int baselowerbound;
6269    unsigned int stage = req->stage;
6270    bool blocktranslate = false;
6271    bool epd = false;
6272    bool va64;
6273    bool type64;
6274    uint32_t tableattrs = 0;
6275    uint32_t attrs;
6276    uint32_t s2attrs;
6277    uint64_t descmask;
6278    uint64_t ttbr;
6279    uint64_t desc;
6280
6281    req->err = false;
6282    sctlr = s->regs[R_SMMU_CB0_SCTLR + cb_offset];
6283
6284    if (DEP_F_EX32(sctlr, SMMU_CB0_SCTLR, M) == 0) {
6285        req->pa = req->va;
6286        req->prot = IOMMU_RW;
6287        D("SMMU disabled for context %d sctlr=%x\n", cb, sctlr);
6288        return;
6289    }
6290
6291    ttbr = req->ttbr[stage][0];
6292    tg = extract32(req->tcr[stage], 14, 2);
6293    if (stage == 1) {
6294        ps = extract64(req->tcr[stage], 32, 3);
6295    } else {
6296        ps = extract64(req->tcr[stage], 16, 3);
6297    }
6298    t0sz = extract32(req->tcr[stage], 0, 6);
6299    tsz = t0sz;
6300    req->pa = req->va;
6301
6302    va64 = s->regs[R_SMMU_CBA2R0 + cb] & 1;
6303    if (req->stage == 1) {
6304        type64 = va64 || extract32(req->tcr[1], 31, 1);
6305        /* We don't support 32bit page-tables yet.  */
6306        assert(type64);
6307
6308        if ((req->va & (1ULL << 63)) == 0) {
6309        } else {
6310            static const unsigned int tg1map[] = {
6311                [0] = 3,
6312                [1] = 2,
6313                [2] = 0,
6314                [3] = 1,
6315            };
6316            if (!va64 && type64) {
6317                /* LPAE uses 4K pages.  */
6318                tg = extract32(req->tcr[stage], 30, 2);
6319                tg = tg1map[tg];
6320                t1sz = extract32(req->tcr[stage], 16, 6);
6321            } else {
6322                /* Default to 4K.  */
6323                tg = 0;
6324                t1sz = extract32(req->tcr[stage], 16, 3);
6325            }
6326            ttbr = req->ttbr[stage][1];
6327            tsz = t1sz;
6328        }
6329        epd = extract32(req->tcr[1], 7, 1);
6330    } else {
6331        type64 = true;
6332    }
6333
6334    if (epd) {
6335        /* We've already missed the TLB at this stage so fault.  */
6336        goto do_fault;
6337    }
6338
6339    inputsize = 64 - tsz;
6340    switch (tg) {
6341    case 1:
6342        /* 64KB pages.  */
6343        grainsize = 16;
6344        level = 3;
6345        firstblocklevel = 2;
6346        break;
6347    case 2:
6348        /* 16KB pages.  */
6349        grainsize = 14;
6350        level = 3;
6351        firstblocklevel = 2;
6352        break;
6353    case 0:
6354        /* 4KB pages.  */
6355        grainsize = 12;
6356        level = 2;
6357        firstblocklevel = 1;
6358        break;
6359    default:
6360        qemu_log_mask(LOG_GUEST_ERROR, "SMMU: Wrong pagesize\n");
6361        break;
6362    }
6363
6364    stride = grainsize - 3;
6365    if (req->stage == 1) {
6366        if (grainsize < 16 && (inputsize > (grainsize + 3 * stride))) {
6367            level = 0;
6368        } else if (inputsize > (grainsize + 2 * stride)) {
6369            level = 1;
6370        } else if (inputsize > (grainsize + stride)) {
6371            level = 2;
6372        }
6373
6374        if (inputsize < 25 || inputsize > 48
6375            || extract64(req->va, inputsize, 64 - inputsize)) {
6376            goto do_fault;
6377        }
6378    } else {
6379        unsigned int startlevel = extract32(req->tcr[stage], 6, 2);
6380        bool ok;
6381
6382        level = 3 - startlevel;
6383        if (grainsize == 12) {
6384            level = 2 - startlevel;
6385        }
6386
6387        ok = check_s2_startlevel(true, 40, level, inputsize, stride);
6388        if (!ok) {
6389            goto do_fault;
6390        }
6391    }
6392
6393    outputsize = outsize_map[ps];
6394    if (outputsize > s->cfg.pamax) {
6395        outputsize = s->cfg.pamax;
6396    }
6397
6398    baselowerbound = 3 + inputsize - ((3 - level) * stride + grainsize);
6399    ttbr = extract64(ttbr, 0, 48);
6400    ttbr &= ~((1ULL << baselowerbound) - 1);
6401
6402    if (!check_out_addr(ttbr, outputsize)) {
6403        goto do_fault;
6404    }
6405
6406    descmask = (1ULL << grainsize) - 1;
6407    do {
6408        unsigned int addrselectbottom = (3 - level) * stride + grainsize;
6409        uint64_t index;
6410        uint64_t descaddr;
6411        unsigned int type;
6412
6413        index = (req->va >> (addrselectbottom - 3)) & descmask;
6414        index &= ~7ULL;
6415        descaddr = ttbr | index;
6416
6417        /* S1 PTW through the S2 system.  */
6418        if (req->stage == 1 && req->s2_enabled) {
6419            TransReq s2req = *req;
6420
6421            s2req.stage = 2;
6422            s2req.va = descaddr;
6423            smmu_ptw64(s, s2req.s2_cb, &s2req);
6424            if (req->err) {
6425                s->regs[R_SMMU_CB0_IPAFAR_LOW] = descaddr;
6426                s->regs[R_SMMU_CB0_IPAFAR_HIGH] = descaddr >> 32;
6427                goto do_fault;
6428            }
6429            descaddr = s2req.pa;
6430        }
6431        dma_memory_read(s->dma_as, descaddr, &desc, sizeof(desc));
6432        type = desc & 3;
6433
6434        D_PTW("smmu: S%d L%d va=0x%"PRIx64" gz=%d descaddr=0x%"PRIx64" "
6435              "desc=0x%"PRIx64" asb=%d index=0x%"PRIx64" osize=%d\n",
6436              req->stage, level, req->va, grainsize, descaddr, desc,
6437              addrselectbottom, index, outputsize);
6438        ttbr = extract64(desc, 0, 48);
6439        ttbr &= ~descmask;
6440
6441        /* special case.  */
6442        if (!(type & 2) && level == 3) {
6443            D("smmu: bad level 3 desc\n");
6444            goto do_fault;
6445        }
6446
6447        if (level == 3) {
6448            break;
6449        }
6450        switch (type) {
6451        case 2:
6452        case 0:
6453            /* Invalid.  */
6454            D("smmu: bad desc\n");
6455            goto do_fault;
6456            break;
6457        case 1:
6458            blocktranslate = true;
6459            if (level < firstblocklevel) {
6460                goto do_fault;
6461            }
6462            break;
6463        case 3:
6464            tableattrs |= extract64(desc, 59, 5);
6465            if (!check_out_addr(ttbr, outputsize)) {
6466                goto do_fault;
6467            }
6468            level++;
6469            break;
6470        }
6471    } while (!blocktranslate);
6472
6473    if (!check_out_addr(ttbr, outputsize)) {
6474        goto do_fault;
6475    }
6476
6477    {
6478        unsigned long page_size;
6479        page_size = (1ULL << ((stride * (4 - level)) + 3));
6480        ttbr |= (req->va & (page_size - 1));
6481    }
6482
6483    s2attrs = attrs = extract64(desc, 2, 10)
6484                      | (extract64(desc, 52, 12) << 10);
6485    if (req->stage == 1) {
6486        attrs |= extract32(tableattrs, 0, 2) << 11; /* XN, PXN */
6487        attrs |= extract32(tableattrs, 3, 1) << 5; /* APTable[1] => AP[2] */
6488        /* The sense of AP[1] vs APTable[0] is reversed, as APTable[0] == 1
6489         * means "force PL1 access only", which means forcing AP[1] to 0.
6490         */
6491        if (extract32(tableattrs, 2, 1)) {
6492            attrs &= ~(1 << 4);
6493        }
6494    }
6495
6496    req->prot = IOMMU_RW;
6497    if ((attrs & (1 << 8)) == 0) {
6498        /* Access flag */
6499        D("smmu: access forbidden %x\n", attrs);
6500        goto do_fault;
6501    }
6502
6503    /* AP[1] SBO.  */
6504    if (!(attrs & (1 << 4))) {
6505        D("smmu: AP[1] should be one but set to zero!\n");
6506        goto do_fault;
6507    }
6508    if (req->stage == 1) {
6509        if (attrs & (1 << 5)) {
6510            /* Write access forbidden */
6511            if (req->access == IOMMU_WO) {
6512                D("smmu: Write access forbidden %x\n", attrs);
6513                goto do_fault;
6514            }
6515            req->prot &= ~IOMMU_WO;
6516        }
6517    } else {
6518        switch ((s2attrs >> 4) & 3) {
6519        /* None.  */
6520        case 0:
6521            goto do_fault;
6522            break;
6523        /* RO.  */
6524        case 1:
6525            if (req->access == IOMMU_WO) {
6526                goto do_fault;
6527            }
6528            req->prot &= ~IOMMU_WO;
6529            break;
6530        /* WO.  */
6531        case 2:
6532            if (req->access == IOMMU_RO) {
6533                goto do_fault;
6534            }
6535            req->prot &= ~IOMMU_RO;
6536            break;
6537        /* RW.  */
6538        case 3:
6539            break;
6540        }
6541    }
6542
6543    req->pa = ttbr;
6544    D("SMMU: 0x%"PRIx64" -> 0x%"PRIx64"\n", req->va, req->pa);
6545    return;
6546
6547do_fault:
6548    D("smmu fault\n");
6549    smmu_fault(s, cb, req, level);
6550}
6551
6552static bool smmu500_at64(SMMU *s, unsigned int cb, hwaddr va,
6553                         bool wr, bool s2, hwaddr *pa, int *prot)
6554{
6555    unsigned int cb_offset = (cb * PAGESIZE) / 4;
6556    unsigned int cb2_offset = 0;
6557    TransReq req;
6558    uint32_t v;
6559    unsigned int t;
6560
6561    v = s->regs[R_SMMU_CBAR0 + cb];
6562    t = DEP_F_EX32(v, SMMU_CBAR0, TYPE);
6563    switch (t) {
6564    case 0:
6565        req.stage = 2;
6566        req.s2_enabled = true;
6567        req.s2_cb = cb;
6568        cb2_offset = cb_offset;
6569        break;
6570    case 1:
6571        req.stage = 1;
6572        req.s2_enabled = false;
6573        break;
6574    case 2:
6575        req.stage = 1;
6576        req.s2_enabled = false;
6577        /* Invalid ??? */
6578        break;
6579    case 3:
6580        req.stage = 1;
6581        req.s2_enabled = true;
6582        req.s2_cb = extract32(v, 8, 8);
6583        cb2_offset = (req.s2_cb * PAGESIZE) / 4;
6584        break;
6585    }
6586
6587    req.va = va;
6588    req.tcr[1] = s->regs[R_SMMU_CB0_TCR2 + cb_offset];
6589    req.tcr[1] <<= 32;
6590    req.tcr[1] |= s->regs[R_SMMU_CB0_TCR_LPAE + cb_offset];
6591
6592    req.ttbr[1][0] = s->regs[R_SMMU_CB0_TTBR0_HIGH + cb_offset];
6593    req.ttbr[1][0] <<= 32;
6594    req.ttbr[1][0] |= s->regs[R_SMMU_CB0_TTBR0_LOW + cb_offset];
6595
6596    req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_HIGH + cb_offset];
6597    req.ttbr[1][1] <<= 32;
6598    req.ttbr[1][1] |= s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset];
6599
6600    if (req.s2_enabled) {
6601        req.tcr[2] = s->regs[R_SMMU_CB0_TCR_LPAE + cb2_offset];
6602        req.ttbr[2][0] = s->regs[R_SMMU_CB0_TTBR0_HIGH + cb2_offset];
6603        req.ttbr[2][0] <<= 32;
6604        req.ttbr[2][0] |= s->regs[R_SMMU_CB0_TTBR0_LOW + cb2_offset];
6605    }
6606
6607    req.access = wr ? IOMMU_WO : IOMMU_RO;
6608
6609    if (req.stage == 1) {
6610        smmu_ptw64(s, cb, &req);
6611        req.stage++;
6612    } else {
6613        req.pa = req.va;
6614    }
6615
6616    if (s2 && req.s2_enabled) {
6617        req.va = req.pa;
6618
6619        smmu_ptw64(s, cb, &req);
6620    }
6621
6622    *pa = req.pa;
6623    *prot = req.prot;
6624    return req.err;
6625}
6626
6627static bool smmu500_at(SMMU *s, unsigned int cb, hwaddr va,
6628                       bool wr, bool s2, hwaddr *pa, int *prot)
6629{
6630    return smmu500_at64(s, cb, va, wr, s2, pa, prot);
6631}
6632
6633#define ADDRMASK    ((1ULL << 12) - 1)
6634
6635static void smmu500_gat(SMMU *s, uint64_t v, bool wr, bool s2)
6636{
6637    uint64_t va = v & ~ADDRMASK;
6638    unsigned int cb = v & ADDRMASK;
6639    hwaddr pa;
6640    int prot;
6641    bool err;
6642
6643    D("ATS: va=0x%"PRIx64" cb=%d wr=%d s2=%d\n", va, cb, wr, s2);
6644    err = smmu500_at(s, cb, va, wr, s2, &pa, &prot);
6645
6646    s->regs[R_SMMU_GPAR] = pa | err;
6647    s->regs[R_SMMU_GPAR_H] = pa >> 32;
6648}
6649
6650static void smmu_gats1pr(DepRegisterInfo *reg, uint64_t val)
6651{
6652    SMMU *s = XILINX_SMMU500(reg->opaque);
6653
6654    val <<= 32;
6655    val |= s->regs[(reg->access->decode.addr / 4) - 1];
6656    smmu500_gat(s, val, false, false);
6657}
6658
6659static void smmu_gats1pw(DepRegisterInfo *reg, uint64_t val)
6660{
6661    SMMU *s = XILINX_SMMU500(reg->opaque);
6662
6663    val <<= 32;
6664    val |= s->regs[(reg->access->decode.addr / 4) - 1];
6665    smmu500_gat(s, val, true, false);
6666}
6667
6668static void smmu_gats12pr(DepRegisterInfo *reg, uint64_t val)
6669{
6670    SMMU *s = XILINX_SMMU500(reg->opaque);
6671
6672    val <<= 32;
6673    val |= s->regs[(reg->access->decode.addr / 4) - 1];
6674    smmu500_gat(s, val, false, true);
6675}
6676
6677static void smmu_gats12pw(DepRegisterInfo *reg, uint64_t val)
6678{
6679    SMMU *s = XILINX_SMMU500(reg->opaque);
6680
6681    val <<= 32;
6682    val |= s->regs[(reg->access->decode.addr / 4) - 1];
6683    smmu500_gat(s, val, true, true);
6684}
6685
6686static void smmu_nscr0_pw(DepRegisterInfo *reg, uint64_t val)
6687{
6688    SMMU *s = XILINX_SMMU500(reg->opaque);
6689
6690    /* FIXME: Take care of secure vs non-secure accesses.  */
6691    s->regs[R_SMMU_SCR0] = val;
6692    s->regs[R_SMMU_NSCR0] = val;
6693}
6694
6695static IOMMUTLBEntry smmu_translate(MemoryRegion *mr, hwaddr addr,
6696                                    bool is_write,
6697                                    MemTxAttrs *attr)
6698{
6699    TBU *tbu = container_of(mr, TBU, iommu);
6700    SMMU *s = tbu->smmu;
6701    IOMMUTLBEntry ret = {
6702        .target_as = tbu->as,
6703        .translated_addr = addr,
6704        .addr_mask = (1ULL << 12) - 1,
6705        .perm = IOMMU_RW,
6706    };
6707    int cb;
6708    uint64_t va = addr & ~ADDRMASK;
6709    hwaddr pa = va;
6710    int prot;
6711    bool err = false;
6712    uint64_t master_id = attr->master_id;
6713    bool clientpd = DEP_AF_EX32(s->regs, SMMU_SCR0, CLIENTPD);
6714
6715    if (clientpd) {
6716        return ret;
6717    }
6718
6719    cb = smmu_stream_id_match(s, master_id);
6720
6721    if (cb >= 0) {
6722        err = smmu500_at(s, cb, va, false, true, &pa, &prot);
6723        ret.translated_addr = pa;
6724        ret.perm = prot;
6725        if (err) {
6726            memset(&ret, 0, sizeof ret);
6727            ret.perm = IOMMU_NONE;
6728        }
6729    }
6730    return ret;
6731}
6732
6733static void smmu_fsr_pw(DepRegisterInfo *reg, uint64_t val)
6734{
6735    SMMU *s = XILINX_SMMU500(reg->opaque);
6736    unsigned int i;
6737
6738    for (i = 0; i < 16; i++) {
6739        smmu_update_ctx_irq(s, i);
6740    }
6741}
6742
6743static DepRegisterAccessInfo smmu500_regs_info[] = {
6744    /* Manually added.  */
6745    {   .name = "SMMU_GATS1PR",  .decode.addr = A_SMMU_GATS1PR,
6746    },
6747    {   .name = "SMMU_GATS1PR_H",  .decode.addr = A_SMMU_GATS1PR_H,
6748        .post_write = smmu_gats1pr,
6749    },
6750
6751    {   .name = "SMMU_GATS1PW",  .decode.addr = A_SMMU_GATS1PW,
6752    },
6753    {   .name = "SMMU_GATS1PW_H",  .decode.addr = A_SMMU_GATS1PW_H,
6754        .post_write = smmu_gats1pw,
6755    },
6756
6757    {   .name = "SMMU_GATS12PR",  .decode.addr = A_SMMU_GATS12PR,
6758    },
6759    {   .name = "SMMU_GATS12PR_H",  .decode.addr = A_SMMU_GATS12PR_H,
6760        .post_write = smmu_gats12pr,
6761    },
6762
6763    {   .name = "SMMU_GATS12PW",  .decode.addr = A_SMMU_GATS12PW,
6764    },
6765    {   .name = "SMMU_GATS12PW_H",  .decode.addr = A_SMMU_GATS12PW_H,
6766        .post_write = smmu_gats12pw,
6767    },
6768
6769    {   .name = "SMMU_GPAR",  .decode.addr = A_SMMU_GPAR, },
6770    {   .name = "SMMU_GPAR_H",  .decode.addr = A_SMMU_GPAR_H, },
6771    {   .name = "SMMU_GATSR",  .decode.addr = A_SMMU_GATSR, },
6772
6773
6774    {   .name = "SMMU_SCR0",  .decode.addr = A_SMMU_SCR0,
6775        .reset = 0x200001,
6776        .ro = 0x200330,
6777    },{ .name = "SMMU_SCR1",  .decode.addr = A_SMMU_SCR1,
6778        .reset = 0x2013010,
6779        .ro = 0x10ff0000,
6780    },{ .name = "SMMU_SACR",  .decode.addr = A_SMMU_SACR,
6781        .reset = 0x4000004,
6782    },{ .name = "SMMU_SIDR0",  .decode.addr = A_SMMU_SIDR0,
6783        .reset = 0xfc013e30,
6784        .ro = 0xffff7eff,
6785    },{ .name = "SMMU_SIDR1",  .decode.addr = A_SMMU_SIDR1,
6786        .reset = 0x30000f10,
6787        .ro = 0xf0ff9fff,
6788    },{ .name = "SMMU_SIDR2",  .decode.addr = A_SMMU_SIDR2,
6789        .reset = 0x5555,
6790        .ro = 0x7fff,
6791    },{ .name = "SMMU_SIDR7",  .decode.addr = A_SMMU_SIDR7,
6792        .reset = 0x21,
6793        .ro = 0xff,
6794    },{ .name = "SMMU_SGFAR_LOW",  .decode.addr = A_SMMU_SGFAR_LOW,
6795    },{ .name = "SMMU_SGFAR_HIGH",  .decode.addr = A_SMMU_SGFAR_HIGH,
6796    },{ .name = "SMMU_SGFSR",  .decode.addr = A_SMMU_SGFSR,
6797    },{ .name = "SMMU_SGFSRRESTORE",  .decode.addr = A_SMMU_SGFSRRESTORE,
6798    },{ .name = "SMMU_SGFSYNR0",  .decode.addr = A_SMMU_SGFSYNR0,
6799        .ro = 0x40,
6800    },{ .name = "SMMU_SGFSYNR1",  .decode.addr = A_SMMU_SGFSYNR1,
6801    },{ .name = "SMMU_STLBIALL",  .decode.addr = A_SMMU_STLBIALL,
6802    },{ .name = "SMMU_TLBIVMID",  .decode.addr = A_SMMU_TLBIVMID,
6803    },{ .name = "SMMU_TLBIALLNSNH",  .decode.addr = A_SMMU_TLBIALLNSNH,
6804    },{ .name = "SMMU_STLBGSYNC",  .decode.addr = A_SMMU_STLBGSYNC,
6805    },{ .name = "SMMU_STLBGSTATUS",  .decode.addr = A_SMMU_STLBGSTATUS,
6806        .ro = 0x1,
6807    },{ .name = "SMMU_DBGRPTRTBU",  .decode.addr = A_SMMU_DBGRPTRTBU,
6808    },{ .name = "SMMU_DBGRDATATBU",  .decode.addr = A_SMMU_DBGRDATATBU,
6809        .ro = 0xffffffff,
6810    },{ .name = "SMMU_DBGRPTRTCU",  .decode.addr = A_SMMU_DBGRPTRTCU,
6811    },{ .name = "SMMU_DBGRDATATCU",  .decode.addr = A_SMMU_DBGRDATATCU,
6812        .ro = 0xffffffff,
6813    },{ .name = "SMMU_STLBIVALM_LOW",  .decode.addr = A_SMMU_STLBIVALM_LOW,
6814    },{ .name = "SMMU_STLBIVALM_HIGH",  .decode.addr = A_SMMU_STLBIVALM_HIGH,
6815    },{ .name = "SMMU_STLBIVAM_LOW",  .decode.addr = A_SMMU_STLBIVAM_LOW,
6816    },{ .name = "SMMU_STLBIVAM_HIGH",  .decode.addr = A_SMMU_STLBIVAM_HIGH,
6817    },{ .name = "SMMU_STLBIALLM",  .decode.addr = A_SMMU_STLBIALLM,
6818    },{ .name = "SMMU_NSCR0",  .decode.addr = A_SMMU_NSCR0,
6819        .reset = 0x200001,
6820        .ro = 0x200330,
6821        .post_write = smmu_nscr0_pw,
6822    },{ .name = "SMMU_NSACR",  .decode.addr = A_SMMU_NSACR,
6823        .reset = 0x400001c,
6824    },{ .name = "SMMU_NSGFAR_LOW",  .decode.addr = A_SMMU_NSGFAR_LOW,
6825    },{ .name = "SMMU_NSGFAR_HIGH",  .decode.addr = A_SMMU_NSGFAR_HIGH,
6826    },{ .name = "SMMU_NSGFSR",  .decode.addr = A_SMMU_NSGFSR,
6827    },{ .name = "SMMU_NSGFSRRESTORE",  .decode.addr = A_SMMU_NSGFSRRESTORE,
6828    },{ .name = "SMMU_NSGFSYNR0",  .decode.addr = A_SMMU_NSGFSYNR0,
6829        .ro = 0x40,
6830    },{ .name = "SMMU_NSGFSYNDR1",  .decode.addr = A_SMMU_NSGFSYNDR1,
6831        .ro = 0x7fff0000,
6832    },{ .name = "SMMU_NSTLBGSYNC",  .decode.addr = A_SMMU_NSTLBGSYNC,
6833    },{ .name = "SMMU_NSTLBGSTATUS",  .decode.addr = A_SMMU_NSTLBGSTATUS,
6834        .ro = 0x1,
6835    },{ .name = "SMMU_SMR0",  .decode.addr = A_SMMU_SMR0,
6836    },{ .name = "SMMU_SMR1",  .decode.addr = A_SMMU_SMR1,
6837    },{ .name = "SMMU_SMR2",  .decode.addr = A_SMMU_SMR2,
6838    },{ .name = "SMMU_SMR3",  .decode.addr = A_SMMU_SMR3,
6839    },{ .name = "SMMU_SMR4",  .decode.addr = A_SMMU_SMR4,
6840    },{ .name = "SMMU_SMR5",  .decode.addr = A_SMMU_SMR5,
6841    },{ .name = "SMMU_SMR6",  .decode.addr = A_SMMU_SMR6,
6842    },{ .name = "SMMU_SMR7",  .decode.addr = A_SMMU_SMR7,
6843    },{ .name = "SMMU_SMR8",  .decode.addr = A_SMMU_SMR8,
6844    },{ .name = "SMMU_SMR9",  .decode.addr = A_SMMU_SMR9,
6845    },{ .name = "SMMU_SMR10",  .decode.addr = A_SMMU_SMR10,
6846    },{ .name = "SMMU_SMR11",  .decode.addr = A_SMMU_SMR11,
6847    },{ .name = "SMMU_SMR12",  .decode.addr = A_SMMU_SMR12,
6848    },{ .name = "SMMU_SMR13",  .decode.addr = A_SMMU_SMR13,
6849    },{ .name = "SMMU_SMR14",  .decode.addr = A_SMMU_SMR14,
6850    },{ .name = "SMMU_SMR15",  .decode.addr = A_SMMU_SMR15,
6851    },{ .name = "SMMU_SMR16",  .decode.addr = A_SMMU_SMR16,
6852    },{ .name = "SMMU_SMR17",  .decode.addr = A_SMMU_SMR17,
6853    },{ .name = "SMMU_SMR18",  .decode.addr = A_SMMU_SMR18,
6854    },{ .name = "SMMU_SMR19",  .decode.addr = A_SMMU_SMR19,
6855    },{ .name = "SMMU_SMR20",  .decode.addr = A_SMMU_SMR20,
6856    },{ .name = "SMMU_SMR21",  .decode.addr = A_SMMU_SMR21,
6857    },{ .name = "SMMU_SMR22",  .decode.addr = A_SMMU_SMR22,
6858    },{ .name = "SMMU_SMR23",  .decode.addr = A_SMMU_SMR23,
6859    },{ .name = "SMMU_SMR24",  .decode.addr = A_SMMU_SMR24,
6860    },{ .name = "SMMU_SMR25",  .decode.addr = A_SMMU_SMR25,
6861    },{ .name = "SMMU_SMR26",  .decode.addr = A_SMMU_SMR26,
6862    },{ .name = "SMMU_SMR27",  .decode.addr = A_SMMU_SMR27,
6863    },{ .name = "SMMU_SMR28",  .decode.addr = A_SMMU_SMR28,
6864    },{ .name = "SMMU_SMR29",  .decode.addr = A_SMMU_SMR29,
6865    },{ .name = "SMMU_SMR30",  .decode.addr = A_SMMU_SMR30,
6866    },{ .name = "SMMU_SMR31",  .decode.addr = A_SMMU_SMR31,
6867    },{ .name = "SMMU_SMR32",  .decode.addr = A_SMMU_SMR32,
6868    },{ .name = "SMMU_SMR33",  .decode.addr = A_SMMU_SMR33,
6869    },{ .name = "SMMU_SMR34",  .decode.addr = A_SMMU_SMR34,
6870    },{ .name = "SMMU_SMR35",  .decode.addr = A_SMMU_SMR35,
6871    },{ .name = "SMMU_SMR36",  .decode.addr = A_SMMU_SMR36,
6872    },{ .name = "SMMU_SMR37",  .decode.addr = A_SMMU_SMR37,
6873    },{ .name = "SMMU_SMR38",  .decode.addr = A_SMMU_SMR38,
6874    },{ .name = "SMMU_SMR39",  .decode.addr = A_SMMU_SMR39,
6875    },{ .name = "SMMU_SMR40",  .decode.addr = A_SMMU_SMR40,
6876    },{ .name = "SMMU_SMR41",  .decode.addr = A_SMMU_SMR41,
6877    },{ .name = "SMMU_SMR42",  .decode.addr = A_SMMU_SMR42,
6878    },{ .name = "SMMU_SMR43",  .decode.addr = A_SMMU_SMR43,
6879    },{ .name = "SMMU_SMR44",  .decode.addr = A_SMMU_SMR44,
6880    },{ .name = "SMMU_SMR45",  .decode.addr = A_SMMU_SMR45,
6881    },{ .name = "SMMU_SMR46",  .decode.addr = A_SMMU_SMR46,
6882    },{ .name = "SMMU_SMR47",  .decode.addr = A_SMMU_SMR47,
6883    },{ .name = "SMMU_S2CR0",  .decode.addr = A_SMMU_S2CR0,
6884        .reset = 0x20000,
6885    },{ .name = "SMMU_S2CR1",  .decode.addr = A_SMMU_S2CR1,
6886        .reset = 0x20000,
6887    },{ .name = "SMMU_S2CR2",  .decode.addr = A_SMMU_S2CR2,
6888        .reset = 0x20000,
6889    },{ .name = "SMMU_S2CR3",  .decode.addr = A_SMMU_S2CR3,
6890        .reset = 0x20000,
6891    },{ .name = "SMMU_S2CR4",  .decode.addr = A_SMMU_S2CR4,
6892        .reset = 0x20000,
6893    },{ .name = "SMMU_S2CR5",  .decode.addr = A_SMMU_S2CR5,
6894        .reset = 0x20000,
6895    },{ .name = "SMMU_S2CR6",  .decode.addr = A_SMMU_S2CR6,
6896        .reset = 0x20000,
6897    },{ .name = "SMMU_S2CR7",  .decode.addr = A_SMMU_S2CR7,
6898        .reset = 0x20000,
6899    },{ .name = "SMMU_S2CR8",  .decode.addr = A_SMMU_S2CR8,
6900        .reset = 0x20000,
6901    },{ .name = "SMMU_S2CR9",  .decode.addr = A_SMMU_S2CR9,
6902        .reset = 0x20000,
6903    },{ .name = "SMMU_S2CR10",  .decode.addr = A_SMMU_S2CR10,
6904        .reset = 0x20000,
6905    },{ .name = "SMMU_S2CR11",  .decode.addr = A_SMMU_S2CR11,
6906        .reset = 0x20000,
6907    },{ .name = "SMMU_S2CR12",  .decode.addr = A_SMMU_S2CR12,
6908        .reset = 0x20000,
6909    },{ .name = "SMMU_S2CR13",  .decode.addr = A_SMMU_S2CR13,
6910        .reset = 0x20000,
6911    },{ .name = "SMMU_S2CR14",  .decode.addr = A_SMMU_S2CR14,
6912        .reset = 0x20000,
6913    },{ .name = "SMMU_S2CR15",  .decode.addr = A_SMMU_S2CR15,
6914        .reset = 0x20000,
6915    },{ .name = "SMMU_S2CR16",  .decode.addr = A_SMMU_S2CR16,
6916        .reset = 0x20000,
6917    },{ .name = "SMMU_S2CR17",  .decode.addr = A_SMMU_S2CR17,
6918        .reset = 0x20000,
6919    },{ .name = "SMMU_S2CR18",  .decode.addr = A_SMMU_S2CR18,
6920        .reset = 0x20000,
6921    },{ .name = "SMMU_S2CR19",  .decode.addr = A_SMMU_S2CR19,
6922        .reset = 0x20000,
6923    },{ .name = "SMMU_S2CR20",  .decode.addr = A_SMMU_S2CR20,
6924        .reset = 0x20000,
6925    },{ .name = "SMMU_S2CR21",  .decode.addr = A_SMMU_S2CR21,
6926        .reset = 0x20000,
6927    },{ .name = "SMMU_S2CR22",  .decode.addr = A_SMMU_S2CR22,
6928        .reset = 0x20000,
6929    },{ .name = "SMMU_S2CR23",  .decode.addr = A_SMMU_S2CR23,
6930        .reset = 0x20000,
6931    },{ .name = "SMMU_S2CR24",  .decode.addr = A_SMMU_S2CR24,
6932        .reset = 0x20000,
6933    },{ .name = "SMMU_S2CR25",  .decode.addr = A_SMMU_S2CR25,
6934        .reset = 0x20000,
6935    },{ .name = "SMMU_S2CR26",  .decode.addr = A_SMMU_S2CR26,
6936        .reset = 0x20000,
6937    },{ .name = "SMMU_S2CR27",  .decode.addr = A_SMMU_S2CR27,
6938        .reset = 0x20000,
6939    },{ .name = "SMMU_S2CR28",  .decode.addr = A_SMMU_S2CR28,
6940        .reset = 0x20000,
6941    },{ .name = "SMMU_S2CR29",  .decode.addr = A_SMMU_S2CR29,
6942        .reset = 0x20000,
6943    },{ .name = "SMMU_S2CR30",  .decode.addr = A_SMMU_S2CR30,
6944        .reset = 0x20000,
6945    },{ .name = "SMMU_S2CR31",  .decode.addr = A_SMMU_S2CR31,
6946        .reset = 0x20000,
6947    },{ .name = "SMMU_S2CR32",  .decode.addr = A_SMMU_S2CR32,
6948        .reset = 0x20000,
6949    },{ .name = "SMMU_S2CR33",  .decode.addr = A_SMMU_S2CR33,
6950        .reset = 0x20000,
6951    },{ .name = "SMMU_S2CR34",  .decode.addr = A_SMMU_S2CR34,
6952        .reset = 0x20000,
6953    },{ .name = "SMMU_S2CR35",  .decode.addr = A_SMMU_S2CR35,
6954        .reset = 0x20000,
6955    },{ .name = "SMMU_S2CR36",  .decode.addr = A_SMMU_S2CR36,
6956        .reset = 0x20000,
6957    },{ .name = "SMMU_S2CR37",  .decode.addr = A_SMMU_S2CR37,
6958        .reset = 0x20000,
6959    },{ .name = "SMMU_S2CR38",  .decode.addr = A_SMMU_S2CR38,
6960        .reset = 0x20000,
6961    },{ .name = "SMMU_S2CR39",  .decode.addr = A_SMMU_S2CR39,
6962        .reset = 0x20000,
6963    },{ .name = "SMMU_S2CR40",  .decode.addr = A_SMMU_S2CR40,
6964        .reset = 0x20000,
6965    },{ .name = "SMMU_S2CR41",  .decode.addr = A_SMMU_S2CR41,
6966        .reset = 0x20000,
6967    },{ .name = "SMMU_S2CR42",  .decode.addr = A_SMMU_S2CR42,
6968        .reset = 0x20000,
6969    },{ .name = "SMMU_S2CR43",  .decode.addr = A_SMMU_S2CR43,
6970        .reset = 0x20000,
6971    },{ .name = "SMMU_S2CR44",  .decode.addr = A_SMMU_S2CR44,
6972        .reset = 0x20000,
6973    },{ .name = "SMMU_S2CR45",  .decode.addr = A_SMMU_S2CR45,
6974        .reset = 0x20000,
6975    },{ .name = "SMMU_S2CR46",  .decode.addr = A_SMMU_S2CR46,
6976        .reset = 0x20000,
6977    },{ .name = "SMMU_S2CR47",  .decode.addr = A_SMMU_S2CR47,
6978        .reset = 0x20000,
6979    },{ .name = "SMMU_PIDR4",  .decode.addr = A_SMMU_PIDR4,
6980        .reset = 0x4,
6981        .ro = 0xff,
6982    },{ .name = "SMMU_PIDR5",  .decode.addr = A_SMMU_PIDR5,
6983        .ro = 0xffffffff,
6984    },{ .name = "SMMU_PIDR6",  .decode.addr = A_SMMU_PIDR6,
6985        .ro = 0xffffffff,
6986    },{ .name = "SMMU_PIDR7",  .decode.addr = A_SMMU_PIDR7,
6987        .ro = 0xffffffff,
6988    },{ .name = "SMMU_PIDR0",  .decode.addr = A_SMMU_PIDR0,
6989        .reset = 0x81,
6990        .ro = 0xff,
6991    },{ .name = "SMMU_PIDR1",  .decode.addr = A_SMMU_PIDR1,
6992        .reset = 0xb4,
6993        .ro = 0xff,
6994    },{ .name = "SMMU_PIDR2",  .decode.addr = A_SMMU_PIDR2,
6995        .reset = 0x1b,
6996        .ro = 0xff,
6997    },{ .name = "SMMU_PIDR3",  .decode.addr = A_SMMU_PIDR3,
6998        .ro = 0xff,
6999    },{ .name = "SMMU_CIDR0",  .decode.addr = A_SMMU_CIDR0,
7000        .reset = 0xd,

7001        .ro = 0xff,
7002    },{ .name = "SMMU_CIDR1",  .decode.addr = A_SMMU_CIDR1,
7003        .reset = 0xf0,
7004        .ro = 0xff,
7005    },{ .name = "SMMU_CIDR2",  .decode.addr = A_SMMU_CIDR2,
7006        .reset = 0x5,
7007        .ro = 0xff,
7008    },{ .name = "SMMU_CIDR3",  .decode.addr = A_SMMU_CIDR3,
7009        .reset = 0xb1,
7010        .ro = 0xff,
7011    },{ .name = "SMMU_CBAR0",  .decode.addr = A_SMMU_CBAR0,
7012        .reset = 0x20000,
7013        .ro = 0xff000000,
7014    },{ .name = "SMMU_CBAR1",  .decode.addr = A_SMMU_CBAR1,
7015        .reset = 0x20000,
7016        .ro = 0xff000000,
7017    },{ .name = "SMMU_CBAR2",  .decode.addr = A_SMMU_CBAR2,
7018        .reset = 0x20000,
7019        .ro = 0xff000000,
7020    },{ .name = "SMMU_CBAR3",  .decode.addr = A_SMMU_CBAR3,
7021        .reset = 0x20000,
7022        .ro = 0xff000000,
7023    },{ .name = "SMMU_CBAR4",  .decode.addr = A_SMMU_CBAR4,
7024        .reset = 0x20000,
7025        .ro = 0xff000000,
7026    },{ .name = "SMMU_CBAR5",  .decode.addr = A_SMMU_CBAR5,
7027        .reset = 0x20000,
7028        .ro = 0xff000000,
7029    },{ .name = "SMMU_CBAR6",  .decode.addr = A_SMMU_CBAR6,
7030        .reset = 0x20000,
7031        .ro = 0xff000000,
7032    },{ .name = "SMMU_CBAR7",  .decode.addr = A_SMMU_CBAR7,
7033        .reset = 0x20000,
7034        .ro = 0xff000000,
7035    },{ .name = "SMMU_CBAR8",  .decode.addr = A_SMMU_CBAR8,
7036        .reset = 0x20000,
7037        .ro = 0xff000000,
7038    },{ .name = "SMMU_CBAR9",  .decode.addr = A_SMMU_CBAR9,
7039        .reset = 0x20000,
7040        .ro = 0xff000000,
7041    },{ .name = "SMMU_CBAR10",  .decode.addr = A_SMMU_CBAR10,
7042        .reset = 0x20000,
7043        .ro = 0xff000000,
7044    },{ .name = "SMMU_CBAR11",  .decode.addr = A_SMMU_CBAR11,
7045        .reset = 0x20000,
7046        .ro = 0xff000000,
7047    },{ .name = "SMMU_CBAR12",  .decode.addr = A_SMMU_CBAR12,
7048        .reset = 0x20000,
7049        .ro = 0xff000000,
7050    },{ .name = "SMMU_CBAR13",  .decode.addr = A_SMMU_CBAR13,
7051        .reset = 0x20000,
7052        .ro = 0xff000000,
7053    },{ .name = "SMMU_CBAR14",  .decode.addr = A_SMMU_CBAR14,
7054        .reset = 0x20000,
7055        .ro = 0xff000000,
7056    },{ .name = "SMMU_CBAR15",  .decode.addr = A_SMMU_CBAR15,
7057        .reset = 0x20000,
7058        .ro = 0xff000000,
7059    },{ .name = "SMMU_CBFRSYNRA0",  .decode.addr = A_SMMU_CBFRSYNRA0,
7060        .ro = 0x7fff0000,
7061    },{ .name = "SMMU_CBFRSYNRA1",  .decode.addr = A_SMMU_CBFRSYNRA1,
7062        .ro = 0x7fff0000,
7063    },{ .name = "SMMU_CBFRSYNRA2",  .decode.addr = A_SMMU_CBFRSYNRA2,
7064        .ro = 0x7fff0000,
7065    },{ .name = "SMMU_CBFRSYNRA3",  .decode.addr = A_SMMU_CBFRSYNRA3,
7066        .ro = 0x7fff0000,
7067    },{ .name = "SMMU_CBFRSYNRA4",  .decode.addr = A_SMMU_CBFRSYNRA4,
7068        .ro = 0x7fff0000,
7069    },{ .name = "SMMU_CBFRSYNRA5",  .decode.addr = A_SMMU_CBFRSYNRA5,
7070        .ro = 0x7fff0000,
7071    },{ .name = "SMMU_CBFRSYNRA6",  .decode.addr = A_SMMU_CBFRSYNRA6,
7072        .ro = 0x7fff0000,
7073    },{ .name = "SMMU_CBFRSYNRA7",  .decode.addr = A_SMMU_CBFRSYNRA7,
7074        .ro = 0x7fff0000,
7075    },{ .name = "SMMU_CBFRSYNRA8",  .decode.addr = A_SMMU_CBFRSYNRA8,
7076        .ro = 0x7fff0000,
7077    },{ .name = "SMMU_CBFRSYNRA9",  .decode.addr = A_SMMU_CBFRSYNRA9,
7078        .ro = 0x7fff0000,
7079    },{ .name = "SMMU_CBFRSYNRA10",  .decode.addr = A_SMMU_CBFRSYNRA10,
7080        .ro = 0x7fff0000,
7081    },{ .name = "SMMU_CBFRSYNRA11",  .decode.addr = A_SMMU_CBFRSYNRA11,
7082        .ro = 0x7fff0000,
7083    },{ .name = "SMMU_CBFRSYNRA12",  .decode.addr = A_SMMU_CBFRSYNRA12,
7084        .ro = 0x7fff0000,
7085    },{ .name = "SMMU_CBFRSYNRA13",  .decode.addr = A_SMMU_CBFRSYNRA13,
7086        .ro = 0x7fff0000,
7087    },{ .name = "SMMU_CBFRSYNRA14",  .decode.addr = A_SMMU_CBFRSYNRA14,
7088        .ro = 0x7fff0000,
7089    },{ .name = "SMMU_CBFRSYNRA15",  .decode.addr = A_SMMU_CBFRSYNRA15,
7090        .ro = 0x7fff0000,
7091    },{ .name = "SMMU_CBA2R0",  .decode.addr = A_SMMU_CBA2R0,
7092    },{ .name = "SMMU_CBA2R1",  .decode.addr = A_SMMU_CBA2R1,
7093    },{ .name = "SMMU_CBA2R2",  .decode.addr = A_SMMU_CBA2R2,
7094    },{ .name = "SMMU_CBA2R3",  .decode.addr = A_SMMU_CBA2R3,
7095    },{ .name = "SMMU_CBA2R4",  .decode.addr = A_SMMU_CBA2R4,
7096    },{ .name = "SMMU_CBA2R5",  .decode.addr = A_SMMU_CBA2R5,
7097    },{ .name = "SMMU_CBA2R6",  .decode.addr = A_SMMU_CBA2R6,
7098    },{ .name = "SMMU_CBA2R7",  .decode.addr = A_SMMU_CBA2R7,
7099    },{ .name = "SMMU_CBA2R8",  .decode.addr = A_SMMU_CBA2R8,
7100    },{ .name = "SMMU_CBA2R9",  .decode.addr = A_SMMU_CBA2R9,
7101    },{ .name = "SMMU_CBA2R10",  .decode.addr = A_SMMU_CBA2R10,
7102    },{ .name = "SMMU_CBA2R11",  .decode.addr = A_SMMU_CBA2R11,
7103    },{ .name = "SMMU_CBA2R12",  .decode.addr = A_SMMU_CBA2R12,
7104    },{ .name = "SMMU_CBA2R13",  .decode.addr = A_SMMU_CBA2R13,
7105    },{ .name = "SMMU_CBA2R14",  .decode.addr = A_SMMU_CBA2R14,
7106    },{ .name = "SMMU_CBA2R15",  .decode.addr = A_SMMU_CBA2R15,
7107    },{ .name = "SMMU_ITCTRL",  .decode.addr = A_SMMU_ITCTRL,
7108    },{ .name = "SMMU_ITIP",  .decode.addr = A_SMMU_ITIP,
7109        .ro = 0x1,
7110    },{ .name = "SMMU_ITOP_GLBL",  .decode.addr = A_SMMU_ITOP_GLBL,
7111        .ro = 0x202,
7112    },{ .name = "SMMU_ITOP_PERF_INDEX",  .decode.addr = A_SMMU_ITOP_PERF_INDEX,
7113    },{ .name = "SMMU_ITOP_CXT0TO31_RAM0",  .decode.addr = A_SMMU_ITOP_CXT0TO31_RAM0,
7114    },{ .name = "SMMU_TBUQOS0",  .decode.addr = A_SMMU_TBUQOS0,
7115    },{ .name = "SMMU_PER",  .decode.addr = A_SMMU_PER,
7116        .ro = 0xffff,
7117    },{ .name = "SMMU_TBU_PWR_STATUS",  .decode.addr = A_SMMU_TBU_PWR_STATUS,
7118        .ro = 0xffffffff,
7119    },{ .name = "PMEVCNTR0",  .decode.addr = A_PMEVCNTR0,
7120    },{ .name = "PMEVCNTR1",  .decode.addr = A_PMEVCNTR1,
7121    },{ .name = "PMEVCNTR2",  .decode.addr = A_PMEVCNTR2,
7122    },{ .name = "PMEVCNTR3",  .decode.addr = A_PMEVCNTR3,
7123    },{ .name = "PMEVCNTR4",  .decode.addr = A_PMEVCNTR4,
7124    },{ .name = "PMEVCNTR5",  .decode.addr = A_PMEVCNTR5,
7125    },{ .name = "PMEVCNTR6",  .decode.addr = A_PMEVCNTR6,
7126    },{ .name = "PMEVCNTR7",  .decode.addr = A_PMEVCNTR7,
7127    },{ .name = "PMEVCNTR8",  .decode.addr = A_PMEVCNTR8,
7128    },{ .name = "PMEVCNTR9",  .decode.addr = A_PMEVCNTR9,
7129    },{ .name = "PMEVCNTR10",  .decode.addr = A_PMEVCNTR10,
7130    },{ .name = "PMEVCNTR11",  .decode.addr = A_PMEVCNTR11,
7131    },{ .name = "PMEVCNTR12",  .decode.addr = A_PMEVCNTR12,
7132    },{ .name = "PMEVCNTR13",  .decode.addr = A_PMEVCNTR13,
7133    },{ .name = "PMEVCNTR14",  .decode.addr = A_PMEVCNTR14,
7134    },{ .name = "PMEVCNTR15",  .decode.addr = A_PMEVCNTR15,
7135    },{ .name = "PMEVCNTR16",  .decode.addr = A_PMEVCNTR16,
7136    },{ .name = "PMEVCNTR17",  .decode.addr = A_PMEVCNTR17,
7137    },{ .name = "PMEVCNTR18",  .decode.addr = A_PMEVCNTR18,
7138    },{ .name = "PMEVCNTR19",  .decode.addr = A_PMEVCNTR19,
7139    },{ .name = "PMEVCNTR20",  .decode.addr = A_PMEVCNTR20,
7140    },{ .name = "PMEVCNTR21",  .decode.addr = A_PMEVCNTR21,
7141    },{ .name = "PMEVCNTR22",  .decode.addr = A_PMEVCNTR22,
7142    },{ .name = "PMEVCNTR23",  .decode.addr = A_PMEVCNTR23,
7143    },{ .name = "PMEVTYPER0",  .decode.addr = A_PMEVTYPER0,
7144    },{ .name = "PMEVTYPER1",  .decode.addr = A_PMEVTYPER1,
7145    },{ .name = "PMEVTYPER2",  .decode.addr = A_PMEVTYPER2,
7146    },{ .name = "PMEVTYPER3",  .decode.addr = A_PMEVTYPER3,
7147    },{ .name = "PMEVTYPER4",  .decode.addr = A_PMEVTYPER4,
7148    },{ .name = "PMEVTYPER5",  .decode.addr = A_PMEVTYPER5,
7149    },{ .name = "PMEVTYPER6",  .decode.addr = A_PMEVTYPER6,
7150    },{ .name = "PMEVTYPER7",  .decode.addr = A_PMEVTYPER7,
7151    },{ .name = "PMEVTYPER8",  .decode.addr = A_PMEVTYPER8,
7152    },{ .name = "PMEVTYPER9",  .decode.addr = A_PMEVTYPER9,
7153    },{ .name = "PMEVTYPER10",  .decode.addr = A_PMEVTYPER10,
7154    },{ .name = "PMEVTYPER11",  .decode.addr = A_PMEVTYPER11,
7155    },{ .name = "PMEVTYPER12",  .decode.addr = A_PMEVTYPER12,
7156    },{ .name = "PMEVTYPER13",  .decode.addr = A_PMEVTYPER13,
7157    },{ .name = "PMEVTYPER14",  .decode.addr = A_PMEVTYPER14,
7158    },{ .name = "PMEVTYPER15",  .decode.addr = A_PMEVTYPER15,
7159    },{ .name = "PMEVTYPER16",  .decode.addr = A_PMEVTYPER16,
7160    },{ .name = "PMEVTYPER17",  .decode.addr = A_PMEVTYPER17,
7161    },{ .name = "PMEVTYPER18",  .decode.addr = A_PMEVTYPER18,
7162    },{ .name = "PMEVTYPER19",  .decode.addr = A_PMEVTYPER19,
7163    },{ .name = "PMEVTYPER20",  .decode.addr = A_PMEVTYPER20,
7164    },{ .name = "PMEVTYPER21",  .decode.addr = A_PMEVTYPER21,
7165    },{ .name = "PMEVTYPER22",  .decode.addr = A_PMEVTYPER22,
7166    },{ .name = "PMEVTYPER23",  .decode.addr = A_PMEVTYPER23,
7167    },{ .name = "PMCGCR0",  .decode.addr = A_PMCGCR0,
7168        .reset = 0x4000000,
7169        .ro = 0xf7f0000,
7170    },{ .name = "PMCGCR1",  .decode.addr = A_PMCGCR1,
7171        .reset = 0x4010000,
7172        .ro = 0xf7f0000,
7173    },{ .name = "PMCGCR2",  .decode.addr = A_PMCGCR2,
7174        .reset = 0x4020000,
7175        .ro = 0xf7f0000,
7176    },{ .name = "PMCGCR3",  .decode.addr = A_PMCGCR3,
7177        .reset = 0x4030000,
7178        .ro = 0xf7f0000,
7179    },{ .name = "PMCGCR4",  .decode.addr = A_PMCGCR4,
7180        .reset = 0x4040000,
7181        .ro = 0xf7f0000,
7182    },{ .name = "PMCGCR5",  .decode.addr = A_PMCGCR5,
7183        .reset = 0x4050000,
7184        .ro = 0xf7f0000,
7185    },{ .name = "PMCGSMR0",  .decode.addr = A_PMCGSMR0,
7186    },{ .name = "PMCGSMR1",  .decode.addr = A_PMCGSMR1,
7187    },{ .name = "PMCGSMR2",  .decode.addr = A_PMCGSMR2,
7188    },{ .name = "PMCGSMR3",  .decode.addr = A_PMCGSMR3,
7189    },{ .name = "PMCGSMR4",  .decode.addr = A_PMCGSMR4,
7190    },{ .name = "PMCGSMR5",  .decode.addr = A_PMCGSMR5,
7191    },{ .name = "PMCNTENSET",  .decode.addr = A_PMCNTENSET,
7192    },{ .name = "PMCNTENCLR",  .decode.addr = A_PMCNTENCLR,
7193    },{ .name = "PMINTENSET",  .decode.addr = A_PMINTENSET,
7194    },{ .name = "PMINTENCLR",  .decode.addr = A_PMINTENCLR,
7195    },{ .name = "PMOVSCLR",  .decode.addr = A_PMOVSCLR,
7196    },{ .name = "PMOVSSET",  .decode.addr = A_PMOVSSET,
7197    },{ .name = "PMCFGR",  .decode.addr = A_PMCFGR,
7198        .reset = 0x5011f17,
7199        .ro = 0xff09ffff,
7200    },{ .name = "PMCR",  .decode.addr = A_PMCR,
7201        .ro = 0xff000002,
7202    },{ .name = "PMCEID0",  .decode.addr = A_PMCEID0,
7203        .reset = 0x30303,
7204        .ro = 0x38383,
7205    },{ .name = "PMAUTHSTATUS",  .decode.addr = A_PMAUTHSTATUS,
7206        .reset = 0x80,
7207        .ro = 0xff,
7208    },{ .name = "PMDEVTYPE",  .decode.addr = A_PMDEVTYPE,
7209        .reset = 0x56,
7210        .ro = 0xff,
7211    },{ .name = "SMMU_CB0_SCTLR",  .decode.addr = A_SMMU_CB0_SCTLR,
7212        .reset = 0x100,
7213        .ro = 0x1000,
7214    },{ .name = "SMMU_CB0_ACTLR",  .decode.addr = A_SMMU_CB0_ACTLR,
7215        .reset = 0x3,
7216    },{ .name = "SMMU_CB0_RESUME",  .decode.addr = A_SMMU_CB0_RESUME,
7217    },{ .name = "SMMU_CB0_TCR2",  .decode.addr = A_SMMU_CB0_TCR2,
7218        .reset = 0x60,
7219        .ro = 0x60,
7220    },{ .name = "SMMU_CB0_TTBR0_LOW",  .decode.addr = A_SMMU_CB0_TTBR0_LOW,
7221        .ro = 0x4,
7222    },{ .name = "SMMU_CB0_TTBR0_HIGH",  .decode.addr = A_SMMU_CB0_TTBR0_HIGH,
7223    },{ .name = "SMMU_CB0_TTBR1_LOW",  .decode.addr = A_SMMU_CB0_TTBR1_LOW,
7224    },{ .name = "SMMU_CB0_TTBR1_HIGH",  .decode.addr = A_SMMU_CB0_TTBR1_HIGH,
7225    },{ .name = "SMMU_CB0_TCR_LPAE",  .decode.addr = A_SMMU_CB0_TCR_LPAE,
7226    },{ .name = "SMMU_CB0_CONTEXTIDR",  .decode.addr = A_SMMU_CB0_CONTEXTIDR,
7227    },{ .name = "SMMU_CB0_PRRR_MAIR0",  .decode.addr = A_SMMU_CB0_PRRR_MAIR0,
7228    },{ .name = "SMMU_CB0_NMRR_MAIR1",  .decode.addr = A_SMMU_CB0_NMRR_MAIR1,
7229    },{ .name = "SMMU_CB0_FSR",  .decode.addr = A_SMMU_CB0_FSR,
7230        .w1c = 0xffffffff,
7231        .post_write = smmu_fsr_pw,
7232    },{ .name = "SMMU_CB0_FSRRESTORE",  .decode.addr = A_SMMU_CB0_FSRRESTORE,
7233    },{ .name = "SMMU_CB0_FAR_LOW",  .decode.addr = A_SMMU_CB0_FAR_LOW,
7234    },{ .name = "SMMU_CB0_FAR_HIGH",  .decode.addr = A_SMMU_CB0_FAR_HIGH,
7235    },{ .name = "SMMU_CB0_FSYNR0",  .decode.addr = A_SMMU_CB0_FSYNR0,
7236        .ro = 0x200,
7237    },{ .name = "SMMU_CB0_IPAFAR_LOW",  .decode.addr = A_SMMU_CB0_IPAFAR_LOW,
7238        .ro = 0xfff,
7239    },{ .name = "SMMU_CB0_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB0_IPAFAR_HIGH,
7240    },{ .name = "SMMU_CB0_TLBIVA_LOW",  .decode.addr = A_SMMU_CB0_TLBIVA_LOW,
7241    },{ .name = "SMMU_CB0_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB0_TLBIVA_HIGH,
7242    },{ .name = "SMMU_CB0_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB0_TLBIVAA_LOW,
7243    },{ .name = "SMMU_CB0_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB0_TLBIVAA_HIGH,
7244    },{ .name = "SMMU_CB0_TLBIASID",  .decode.addr = A_SMMU_CB0_TLBIASID,
7245    },{ .name = "SMMU_CB0_TLBIALL",  .decode.addr = A_SMMU_CB0_TLBIALL,
7246    },{ .name = "SMMU_CB0_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB0_TLBIVAL_LOW,
7247    },{ .name = "SMMU_CB0_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB0_TLBIVAL_HIGH,
7248    },{ .name = "SMMU_CB0_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB0_TLBIVAAL_LOW,
7249    },{ .name = "SMMU_CB0_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB0_TLBIVAAL_HIGH,
7250    },{ .name = "SMMU_CB0_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB0_TLBIIPAS2_LOW,
7251    },{ .name = "SMMU_CB0_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB0_TLBIIPAS2_HIGH,
7252    },{ .name = "SMMU_CB0_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB0_TLBIIPAS2L_LOW,
7253    },{ .name = "SMMU_CB0_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB0_TLBIIPAS2L_HIGH,
7254    },{ .name = "SMMU_CB0_TLBSYNC",  .decode.addr = A_SMMU_CB0_TLBSYNC,
7255    },{ .name = "SMMU_CB0_TLBSTATUS",  .decode.addr = A_SMMU_CB0_TLBSTATUS,
7256        .ro = 0x1,
7257    },{ .name = "SMMU_CB0_PMEVCNTR0",  .decode.addr = A_SMMU_CB0_PMEVCNTR0,
7258    },{ .name = "SMMU_CB0_PMEVCNTR1",  .decode.addr = A_SMMU_CB0_PMEVCNTR1,
7259    },{ .name = "SMMU_CB0_PMEVCNTR2",  .decode.addr = A_SMMU_CB0_PMEVCNTR2,
7260    },{ .name = "SMMU_CB0_PMEVCNTR3",  .decode.addr = A_SMMU_CB0_PMEVCNTR3,
7261    },{ .name = "SMMU_CB0_PMEVTYPER0",  .decode.addr = A_SMMU_CB0_PMEVTYPER0,
7262    },{ .name = "SMMU_CB0_PMEVTYPER1",  .decode.addr = A_SMMU_CB0_PMEVTYPER1,
7263    },{ .name = "SMMU_CB0_PMEVTYPER2",  .decode.addr = A_SMMU_CB0_PMEVTYPER2,
7264    },{ .name = "SMMU_CB0_PMEVTYPER3",  .decode.addr = A_SMMU_CB0_PMEVTYPER3,
7265    },{ .name = "SMMU_CB0_PMCFGR",  .decode.addr = A_SMMU_CB0_PMCFGR,
7266        .reset = 0x11f03,
7267        .ro = 0xff09ffff,
7268    },{ .name = "SMMU_CB0_PMCR",  .decode.addr = A_SMMU_CB0_PMCR,
7269        .ro = 0xff000002,
7270    },{ .name = "SMMU_CB0_PMCEID",  .decode.addr = A_SMMU_CB0_PMCEID,
7271        .reset = 0x30303,
7272        .ro = 0x38383,
7273    },{ .name = "SMMU_CB0_PMCNTENSE",  .decode.addr = A_SMMU_CB0_PMCNTENSE,
7274    },{ .name = "SMMU_CB0_PMCNTENCLR",  .decode.addr = A_SMMU_CB0_PMCNTENCLR,
7275    },{ .name = "SMMU_CB0_PMCNTENSET",  .decode.addr = A_SMMU_CB0_PMCNTENSET,
7276    },{ .name = "SMMU_CB0_PMINTENCLR",  .decode.addr = A_SMMU_CB0_PMINTENCLR,
7277    },{ .name = "SMMU_CB0_PMOVSCLR",  .decode.addr = A_SMMU_CB0_PMOVSCLR,
7278    },{ .name = "SMMU_CB0_PMOVSSET",  .decode.addr = A_SMMU_CB0_PMOVSSET,
7279    },{ .name = "SMMU_CB0_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB0_PMAUTHSTATUS,
7280        .reset = 0x80,
7281        .ro = 0xff,
7282    },{ .name = "SMMU_CB1_SCTLR",  .decode.addr = A_SMMU_CB1_SCTLR,
7283        .reset = 0x100,
7284        .ro = 0x1000,
7285    },{ .name = "SMMU_CB1_ACTLR",  .decode.addr = A_SMMU_CB1_ACTLR,
7286        .reset = 0x3,
7287    },{ .name = "SMMU_CB1_RESUME",  .decode.addr = A_SMMU_CB1_RESUME,
7288    },{ .name = "SMMU_CB1_TCR2",  .decode.addr = A_SMMU_CB1_TCR2,
7289        .reset = 0x60,
7290        .ro = 0x60,
7291    },{ .name = "SMMU_CB1_TTBR0_LOW",  .decode.addr = A_SMMU_CB1_TTBR0_LOW,
7292        .ro = 0x4,
7293    },{ .name = "SMMU_CB1_TTBR0_HIGH",  .decode.addr = A_SMMU_CB1_TTBR0_HIGH,
7294    },{ .name = "SMMU_CB1_TTBR1_LOW",  .decode.addr = A_SMMU_CB1_TTBR1_LOW,
7295    },{ .name = "SMMU_CB1_TTBR1_HIGH",  .decode.addr = A_SMMU_CB1_TTBR1_HIGH,
7296    },{ .name = "SMMU_CB1_TCR_LPAE",  .decode.addr = A_SMMU_CB1_TCR_LPAE,
7297    },{ .name = "SMMU_CB1_CONTEXTIDR",  .decode.addr = A_SMMU_CB1_CONTEXTIDR,
7298    },{ .name = "SMMU_CB1_PRRR_MAIR0",  .decode.addr = A_SMMU_CB1_PRRR_MAIR0,
7299    },{ .name = "SMMU_CB1_NMRR_MAIR1",  .decode.addr = A_SMMU_CB1_NMRR_MAIR1,
7300    },{ .name = "SMMU_CB1_FSR",  .decode.addr = A_SMMU_CB1_FSR,
7301        .w1c = 0xffffffff,
7302        .post_write = smmu_fsr_pw,
7303    },{ .name = "SMMU_CB1_FSRRESTORE",  .decode.addr = A_SMMU_CB1_FSRRESTORE,
7304    },{ .name = "SMMU_CB1_FAR_LOW",  .decode.addr = A_SMMU_CB1_FAR_LOW,
7305    },{ .name = "SMMU_CB1_FAR_HIGH",  .decode.addr = A_SMMU_CB1_FAR_HIGH,
7306    },{ .name = "SMMU_CB1_FSYNR0",  .decode.addr = A_SMMU_CB1_FSYNR0,
7307        .ro = 0x200,
7308    },{ .name = "SMMU_CB1_IPAFAR_LOW",  .decode.addr = A_SMMU_CB1_IPAFAR_LOW,
7309        .ro = 0xfff,
7310    },{ .name = "SMMU_CB1_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB1_IPAFAR_HIGH,
7311    },{ .name = "SMMU_CB1_TLBIVA_LOW",  .decode.addr = A_SMMU_CB1_TLBIVA_LOW,
7312    },{ .name = "SMMU_CB1_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB1_TLBIVA_HIGH,
7313    },{ .name = "SMMU_CB1_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB1_TLBIVAA_LOW,
7314    },{ .name = "SMMU_CB1_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB1_TLBIVAA_HIGH,
7315    },{ .name = "SMMU_CB1_TLBIASID",  .decode.addr = A_SMMU_CB1_TLBIASID,
7316    },{ .name = "SMMU_CB1_TLBIALL",  .decode.addr = A_SMMU_CB1_TLBIALL,
7317    },{ .name = "SMMU_CB1_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB1_TLBIVAL_LOW,
7318    },{ .name = "SMMU_CB1_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB1_TLBIVAL_HIGH,
7319    },{ .name = "SMMU_CB1_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB1_TLBIVAAL_LOW,
7320    },{ .name = "SMMU_CB1_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB1_TLBIVAAL_HIGH,
7321    },{ .name = "SMMU_CB1_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB1_TLBIIPAS2_LOW,
7322    },{ .name = "SMMU_CB1_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB1_TLBIIPAS2_HIGH,
7323    },{ .name = "SMMU_CB1_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB1_TLBIIPAS2L_LOW,
7324    },{ .name = "SMMU_CB1_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB1_TLBIIPAS2L_HIGH,
7325    },{ .name = "SMMU_CB1_TLBSYNC",  .decode.addr = A_SMMU_CB1_TLBSYNC,
7326    },{ .name = "SMMU_CB1_TLBSTATUS",  .decode.addr = A_SMMU_CB1_TLBSTATUS,
7327        .ro = 0x1,
7328    },{ .name = "SMMU_CB1_PMEVCNTR0",  .decode.addr = A_SMMU_CB1_PMEVCNTR0,
7329    },{ .name = "SMMU_CB1_PMEVCNTR1",  .decode.addr = A_SMMU_CB1_PMEVCNTR1,
7330    },{ .name = "SMMU_CB1_PMEVCNTR2",  .decode.addr = A_SMMU_CB1_PMEVCNTR2,
7331    },{ .name = "SMMU_CB1_PMEVCNTR3",  .decode.addr = A_SMMU_CB1_PMEVCNTR3,
7332    },{ .name = "SMMU_CB1_PMEVTYPER0",  .decode.addr = A_SMMU_CB1_PMEVTYPER0,
7333    },{ .name = "SMMU_CB1_PMEVTYPER1",  .decode.addr = A_SMMU_CB1_PMEVTYPER1,
7334    },{ .name = "SMMU_CB1_PMEVTYPER2",  .decode.addr = A_SMMU_CB1_PMEVTYPER2,
7335    },{ .name = "SMMU_CB1_PMEVTYPER3",  .decode.addr = A_SMMU_CB1_PMEVTYPER3,
7336    },{ .name = "SMMU_CB1_PMCFGR",  .decode.addr = A_SMMU_CB1_PMCFGR,
7337        .reset = 0x11f03,
7338        .ro = 0xff09ffff,
7339    },{ .name = "SMMU_CB1_PMCR",  .decode.addr = A_SMMU_CB1_PMCR,
7340        .ro = 0xff000002,
7341    },{ .name = "SMMU_CB1_PMCEID",  .decode.addr = A_SMMU_CB1_PMCEID,
7342        .reset = 0x30303,
7343        .ro = 0x38383,
7344    },{ .name = "SMMU_CB1_PMCNTENSE",  .decode.addr = A_SMMU_CB1_PMCNTENSE,
7345    },{ .name = "SMMU_CB1_PMCNTENCLR",  .decode.addr = A_SMMU_CB1_PMCNTENCLR,
7346    },{ .name = "SMMU_CB1_PMCNTENSET",  .decode.addr = A_SMMU_CB1_PMCNTENSET,
7347    },{ .name = "SMMU_CB1_PMINTENCLR",  .decode.addr = A_SMMU_CB1_PMINTENCLR,
7348    },{ .name = "SMMU_CB1_PMOVSCLR",  .decode.addr = A_SMMU_CB1_PMOVSCLR,
7349    },{ .name = "SMMU_CB1_PMOVSSET",  .decode.addr = A_SMMU_CB1_PMOVSSET,
7350    },{ .name = "SMMU_CB1_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB1_PMAUTHSTATUS,
7351        .reset = 0x80,
7352        .ro = 0xff,
7353    },{ .name = "SMMU_CB2_SCTLR",  .decode.addr = A_SMMU_CB2_SCTLR,
7354        .reset = 0x100,
7355        .ro = 0x1000,
7356    },{ .name = "SMMU_CB2_ACTLR",  .decode.addr = A_SMMU_CB2_ACTLR,
7357        .reset = 0x3,
7358    },{ .name = "SMMU_CB2_RESUME",  .decode.addr = A_SMMU_CB2_RESUME,
7359    },{ .name = "SMMU_CB2_TCR2",  .decode.addr = A_SMMU_CB2_TCR2,
7360        .reset = 0x60,
7361        .ro = 0x60,
7362    },{ .name = "SMMU_CB2_TTBR0_LOW",  .decode.addr = A_SMMU_CB2_TTBR0_LOW,
7363        .ro = 0x4,
7364    },{ .name = "SMMU_CB2_TTBR0_HIGH",  .decode.addr = A_SMMU_CB2_TTBR0_HIGH,
7365    },{ .name = "SMMU_CB2_TTBR1_LOW",  .decode.addr = A_SMMU_CB2_TTBR1_LOW,
7366    },{ .name = "SMMU_CB2_TTBR1_HIGH",  .decode.addr = A_SMMU_CB2_TTBR1_HIGH,
7367    },{ .name = "SMMU_CB2_TCR_LPAE",  .decode.addr = A_SMMU_CB2_TCR_LPAE,
7368    },{ .name = "SMMU_CB2_CONTEXTIDR",  .decode.addr = A_SMMU_CB2_CONTEXTIDR,
7369    },{ .name = "SMMU_CB2_PRRR_MAIR0",  .decode.addr = A_SMMU_CB2_PRRR_MAIR0,
7370    },{ .name = "SMMU_CB2_NMRR_MAIR1",  .decode.addr = A_SMMU_CB2_NMRR_MAIR1,
7371    },{ .name = "SMMU_CB2_FSR",  .decode.addr = A_SMMU_CB2_FSR,
7372        .w1c = 0xffffffff,
7373        .post_write = smmu_fsr_pw,
7374    },{ .name = "SMMU_CB2_FSRRESTORE",  .decode.addr = A_SMMU_CB2_FSRRESTORE,
7375    },{ .name = "SMMU_CB2_FAR_LOW",  .decode.addr = A_SMMU_CB2_FAR_LOW,
7376    },{ .name = "SMMU_CB2_FAR_HIGH",  .decode.addr = A_SMMU_CB2_FAR_HIGH,
7377    },{ .name = "SMMU_CB2_FSYNR0",  .decode.addr = A_SMMU_CB2_FSYNR0,
7378        .ro = 0x200,
7379    },{ .name = "SMMU_CB2_IPAFAR_LOW",  .decode.addr = A_SMMU_CB2_IPAFAR_LOW,
7380        .ro = 0xfff,
7381    },{ .name = "SMMU_CB2_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB2_IPAFAR_HIGH,
7382    },{ .name = "SMMU_CB2_TLBIVA_LOW",  .decode.addr = A_SMMU_CB2_TLBIVA_LOW,
7383    },{ .name = "SMMU_CB2_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB2_TLBIVA_HIGH,
7384    },{ .name = "SMMU_CB2_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB2_TLBIVAA_LOW,
7385    },{ .name = "SMMU_CB2_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB2_TLBIVAA_HIGH,
7386    },{ .name = "SMMU_CB2_TLBIASID",  .decode.addr = A_SMMU_CB2_TLBIASID,
7387    },{ .name = "SMMU_CB2_TLBIALL",  .decode.addr = A_SMMU_CB2_TLBIALL,
7388    },{ .name = "SMMU_CB2_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB2_TLBIVAL_LOW,
7389    },{ .name = "SMMU_CB2_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB2_TLBIVAL_HIGH,
7390    },{ .name = "SMMU_CB2_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB2_TLBIVAAL_LOW,
7391    },{ .name = "SMMU_CB2_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB2_TLBIVAAL_HIGH,
7392    },{ .name = "SMMU_CB2_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB2_TLBIIPAS2_LOW,
7393    },{ .name = "SMMU_CB2_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB2_TLBIIPAS2_HIGH,
7394    },{ .name = "SMMU_CB2_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB2_TLBIIPAS2L_LOW,
7395    },{ .name = "SMMU_CB2_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB2_TLBIIPAS2L_HIGH,
7396    },{ .name = "SMMU_CB2_TLBSYNC",  .decode.addr = A_SMMU_CB2_TLBSYNC,
7397    },{ .name = "SMMU_CB2_TLBSTATUS",  .decode.addr = A_SMMU_CB2_TLBSTATUS,
7398        .ro = 0x1,
7399    },{ .name = "SMMU_CB2_PMEVCNTR0",  .decode.addr = A_SMMU_CB2_PMEVCNTR0,
7400    },{ .name = "SMMU_CB2_PMEVCNTR1",  .decode.addr = A_SMMU_CB2_PMEVCNTR1,
7401    },{ .name = "SMMU_CB2_PMEVCNTR2",  .decode.addr = A_SMMU_CB2_PMEVCNTR2,
7402    },{ .name = "SMMU_CB2_PMEVCNTR3",  .decode.addr = A_SMMU_CB2_PMEVCNTR3,
7403    },{ .name = "SMMU_CB2_PMEVTYPER0",  .decode.addr = A_SMMU_CB2_PMEVTYPER0,
7404    },{ .name = "SMMU_CB2_PMEVTYPER1",  .decode.addr = A_SMMU_CB2_PMEVTYPER1,
7405    },{ .name = "SMMU_CB2_PMEVTYPER2",  .decode.addr = A_SMMU_CB2_PMEVTYPER2,
7406    },{ .name = "SMMU_CB2_PMEVTYPER3",  .decode.addr = A_SMMU_CB2_PMEVTYPER3,
7407    },{ .name = "SMMU_CB2_PMCFGR",  .decode.addr = A_SMMU_CB2_PMCFGR,
7408        .reset = 0x11f03,
7409        .ro = 0xff09ffff,
7410    },{ .name = "SMMU_CB2_PMCR",  .decode.addr = A_SMMU_CB2_PMCR,
7411        .ro = 0xff000002,
7412    },{ .name = "SMMU_CB2_PMCEID",  .decode.addr = A_SMMU_CB2_PMCEID,
7413        .reset = 0x30303,
7414        .ro = 0x38383,
7415    },{ .name = "SMMU_CB2_PMCNTENSE",  .decode.addr = A_SMMU_CB2_PMCNTENSE,
7416    },{ .name = "SMMU_CB2_PMCNTENCLR",  .decode.addr = A_SMMU_CB2_PMCNTENCLR,
7417    },{ .name = "SMMU_CB2_PMCNTENSET",  .decode.addr = A_SMMU_CB2_PMCNTENSET,
7418    },{ .name = "SMMU_CB2_PMINTENCLR",  .decode.addr = A_SMMU_CB2_PMINTENCLR,
7419    },{ .name = "SMMU_CB2_PMOVSCLR",  .decode.addr = A_SMMU_CB2_PMOVSCLR,
7420    },{ .name = "SMMU_CB2_PMOVSSET",  .decode.addr = A_SMMU_CB2_PMOVSSET,
7421    },{ .name = "SMMU_CB2_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB2_PMAUTHSTATUS,
7422        .reset = 0x80,
7423        .ro = 0xff,
7424    },{ .name = "SMMU_CB3_SCTLR",  .decode.addr = A_SMMU_CB3_SCTLR,
7425        .reset = 0x100,
7426        .ro = 0x1000,
7427    },{ .name = "SMMU_CB3_ACTLR",  .decode.addr = A_SMMU_CB3_ACTLR,
7428        .reset = 0x3,
7429    },{ .name = "SMMU_CB3_RESUME",  .decode.addr = A_SMMU_CB3_RESUME,
7430    },{ .name = "SMMU_CB3_TCR2",  .decode.addr = A_SMMU_CB3_TCR2,
7431        .reset = 0x60,
7432        .ro = 0x60,
7433    },{ .name = "SMMU_CB3_TTBR0_LOW",  .decode.addr = A_SMMU_CB3_TTBR0_LOW,
7434        .ro = 0x4,
7435    },{ .name = "SMMU_CB3_TTBR0_HIGH",  .decode.addr = A_SMMU_CB3_TTBR0_HIGH,
7436    },{ .name = "SMMU_CB3_TTBR1_LOW",  .decode.addr = A_SMMU_CB3_TTBR1_LOW,
7437    },{ .name = "SMMU_CB3_TTBR1_HIGH",  .decode.addr = A_SMMU_CB3_TTBR1_HIGH,
7438    },{ .name = "SMMU_CB3_TCR_LPAE",  .decode.addr = A_SMMU_CB3_TCR_LPAE,
7439    },{ .name = "SMMU_CB3_CONTEXTIDR",  .decode.addr = A_SMMU_CB3_CONTEXTIDR,
7440    },{ .name = "SMMU_CB3_PRRR_MAIR0",  .decode.addr = A_SMMU_CB3_PRRR_MAIR0,
7441    },{ .name = "SMMU_CB3_NMRR_MAIR1",  .decode.addr = A_SMMU_CB3_NMRR_MAIR1,
7442    },{ .name = "SMMU_CB3_FSR",  .decode.addr = A_SMMU_CB3_FSR,
7443        .w1c = 0xffffffff,
7444        .post_write = smmu_fsr_pw,
7445    },{ .name = "SMMU_CB3_FSRRESTORE",  .decode.addr = A_SMMU_CB3_FSRRESTORE,
7446    },{ .name = "SMMU_CB3_FAR_LOW",  .decode.addr = A_SMMU_CB3_FAR_LOW,
7447    },{ .name = "SMMU_CB3_FAR_HIGH",  .decode.addr = A_SMMU_CB3_FAR_HIGH,
7448    },{ .name = "SMMU_CB3_FSYNR0",  .decode.addr = A_SMMU_CB3_FSYNR0,
7449        .ro = 0x200,
7450    },{ .name = "SMMU_CB3_IPAFAR_LOW",  .decode.addr = A_SMMU_CB3_IPAFAR_LOW,
7451        .ro = 0xfff,
7452    },{ .name = "SMMU_CB3_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB3_IPAFAR_HIGH,
7453    },{ .name = "SMMU_CB3_TLBIVA_LOW",  .decode.addr = A_SMMU_CB3_TLBIVA_LOW,
7454    },{ .name = "SMMU_CB3_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB3_TLBIVA_HIGH,
7455    },{ .name = "SMMU_CB3_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB3_TLBIVAA_LOW,
7456    },{ .name = "SMMU_CB3_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB3_TLBIVAA_HIGH,
7457    },{ .name = "SMMU_CB3_TLBIASID",  .decode.addr = A_SMMU_CB3_TLBIASID,
7458    },{ .name = "SMMU_CB3_TLBIALL",  .decode.addr = A_SMMU_CB3_TLBIALL,
7459    },{ .name = "SMMU_CB3_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB3_TLBIVAL_LOW,
7460    },{ .name = "SMMU_CB3_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB3_TLBIVAL_HIGH,
7461    },{ .name = "SMMU_CB3_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB3_TLBIVAAL_LOW,
7462    },{ .name = "SMMU_CB3_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB3_TLBIVAAL_HIGH,
7463    },{ .name = "SMMU_CB3_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB3_TLBIIPAS2_LOW,
7464    },{ .name = "SMMU_CB3_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB3_TLBIIPAS2_HIGH,
7465    },{ .name = "SMMU_CB3_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB3_TLBIIPAS2L_LOW,
7466    },{ .name = "SMMU_CB3_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB3_TLBIIPAS2L_HIGH,
7467    },{ .name = "SMMU_CB3_TLBSYNC",  .decode.addr = A_SMMU_CB3_TLBSYNC,
7468    },{ .name = "SMMU_CB3_TLBSTATUS",  .decode.addr = A_SMMU_CB3_TLBSTATUS,
7469        .ro = 0x1,
7470    },{ .name = "SMMU_CB3_PMEVCNTR0",  .decode.addr = A_SMMU_CB3_PMEVCNTR0,
7471    },{ .name = "SMMU_CB3_PMEVCNTR1",  .decode.addr = A_SMMU_CB3_PMEVCNTR1,
7472    },{ .name = "SMMU_CB3_PMEVCNTR2",  .decode.addr = A_SMMU_CB3_PMEVCNTR2,
7473    },{ .name = "SMMU_CB3_PMEVCNTR3",  .decode.addr = A_SMMU_CB3_PMEVCNTR3,
7474    },{ .name = "SMMU_CB3_PMEVTYPER0",  .decode.addr = A_SMMU_CB3_PMEVTYPER0,
7475    },{ .name = "SMMU_CB3_PMEVTYPER1",  .decode.addr = A_SMMU_CB3_PMEVTYPER1,
7476    },{ .name = "SMMU_CB3_PMEVTYPER2",  .decode.addr = A_SMMU_CB3_PMEVTYPER2,
7477    },{ .name = "SMMU_CB3_PMEVTYPER3",  .decode.addr = A_SMMU_CB3_PMEVTYPER3,
7478    },{ .name = "SMMU_CB3_PMCFGR",  .decode.addr = A_SMMU_CB3_PMCFGR,
7479        .reset = 0x11f03,
7480        .ro = 0xff09ffff,
7481    },{ .name = "SMMU_CB3_PMCR",  .decode.addr = A_SMMU_CB3_PMCR,
7482        .ro = 0xff000002,
7483    },{ .name = "SMMU_CB3_PMCEID",  .decode.addr = A_SMMU_CB3_PMCEID,
7484        .reset = 0x30303,
7485        .ro = 0x38383,
7486    },{ .name = "SMMU_CB3_PMCNTENSE",  .decode.addr = A_SMMU_CB3_PMCNTENSE,
7487    },{ .name = "SMMU_CB3_PMCNTENCLR",  .decode.addr = A_SMMU_CB3_PMCNTENCLR,
7488    },{ .name = "SMMU_CB3_PMCNTENSET",  .decode.addr = A_SMMU_CB3_PMCNTENSET,
7489    },{ .name = "SMMU_CB3_PMINTENCLR",  .decode.addr = A_SMMU_CB3_PMINTENCLR,
7490    },{ .name = "SMMU_CB3_PMOVSCLR",  .decode.addr = A_SMMU_CB3_PMOVSCLR,
7491    },{ .name = "SMMU_CB3_PMOVSSET",  .decode.addr = A_SMMU_CB3_PMOVSSET,
7492    },{ .name = "SMMU_CB3_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB3_PMAUTHSTATUS,
7493        .reset = 0x80,
7494        .ro = 0xff,
7495    },{ .name = "SMMU_CB4_SCTLR",  .decode.addr = A_SMMU_CB4_SCTLR,
7496        .reset = 0x100,
7497        .ro = 0x1000,
7498    },{ .name = "SMMU_CB4_ACTLR",  .decode.addr = A_SMMU_CB4_ACTLR,
7499        .reset = 0x3,
7500    },{ .name = "SMMU_CB4_RESUME",  .decode.addr = A_SMMU_CB4_RESUME,
7501    },{ .name = "SMMU_CB4_TCR2",  .decode.addr = A_SMMU_CB4_TCR2,
7502        .reset = 0x60,
7503        .ro = 0x60,
7504    },{ .name = "SMMU_CB4_TTBR0_LOW",  .decode.addr = A_SMMU_CB4_TTBR0_LOW,
7505        .ro = 0x4,
7506    },{ .name = "SMMU_CB4_TTBR0_HIGH",  .decode.addr = A_SMMU_CB4_TTBR0_HIGH,
7507    },{ .name = "SMMU_CB4_TTBR1_LOW",  .decode.addr = A_SMMU_CB4_TTBR1_LOW,
7508    },{ .name = "SMMU_CB4_TTBR1_HIGH",  .decode.addr = A_SMMU_CB4_TTBR1_HIGH,
7509    },{ .name = "SMMU_CB4_TCR_LPAE",  .decode.addr = A_SMMU_CB4_TCR_LPAE,
7510    },{ .name = "SMMU_CB4_CONTEXTIDR",  .decode.addr = A_SMMU_CB4_CONTEXTIDR,
7511    },{ .name = "SMMU_CB4_PRRR_MAIR0",  .decode.addr = A_SMMU_CB4_PRRR_MAIR0,
7512    },{ .name = "SMMU_CB4_NMRR_MAIR1",  .decode.addr = A_SMMU_CB4_NMRR_MAIR1,
7513    },{ .name = "SMMU_CB4_FSR",  .decode.addr = A_SMMU_CB4_FSR,
7514        .w1c = 0xffffffff,
7515        .post_write = smmu_fsr_pw,
7516    },{ .name = "SMMU_CB4_FSRRESTORE",  .decode.addr = A_SMMU_CB4_FSRRESTORE,
7517    },{ .name = "SMMU_CB4_FAR_LOW",  .decode.addr = A_SMMU_CB4_FAR_LOW,
7518    },{ .name = "SMMU_CB4_FAR_HIGH",  .decode.addr = A_SMMU_CB4_FAR_HIGH,
7519    },{ .name = "SMMU_CB4_FSYNR0",  .decode.addr = A_SMMU_CB4_FSYNR0,
7520        .ro = 0x200,
7521    },{ .name = "SMMU_CB4_IPAFAR_LOW",  .decode.addr = A_SMMU_CB4_IPAFAR_LOW,
7522        .ro = 0xfff,
7523    },{ .name = "SMMU_CB4_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB4_IPAFAR_HIGH,
7524    },{ .name = "SMMU_CB4_TLBIVA_LOW",  .decode.addr = A_SMMU_CB4_TLBIVA_LOW,
7525    },{ .name = "SMMU_CB4_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB4_TLBIVA_HIGH,
7526    },{ .name = "SMMU_CB4_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB4_TLBIVAA_LOW,
7527    },{ .name = "SMMU_CB4_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB4_TLBIVAA_HIGH,
7528    },{ .name = "SMMU_CB4_TLBIASID",  .decode.addr = A_SMMU_CB4_TLBIASID,
7529    },{ .name = "SMMU_CB4_TLBIALL",  .decode.addr = A_SMMU_CB4_TLBIALL,
7530    },{ .name = "SMMU_CB4_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB4_TLBIVAL_LOW,
7531    },{ .name = "SMMU_CB4_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB4_TLBIVAL_HIGH,
7532    },{ .name = "SMMU_CB4_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB4_TLBIVAAL_LOW,
7533    },{ .name = "SMMU_CB4_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB4_TLBIVAAL_HIGH,
7534    },{ .name = "SMMU_CB4_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB4_TLBIIPAS2_LOW,
7535    },{ .name = "SMMU_CB4_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB4_TLBIIPAS2_HIGH,
7536    },{ .name = "SMMU_CB4_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB4_TLBIIPAS2L_LOW,
7537    },{ .name = "SMMU_CB4_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB4_TLBIIPAS2L_HIGH,
7538    },{ .name = "SMMU_CB4_TLBSYNC",  .decode.addr = A_SMMU_CB4_TLBSYNC,
7539    },{ .name = "SMMU_CB4_TLBSTATUS",  .decode.addr = A_SMMU_CB4_TLBSTATUS,
7540        .ro = 0x1,
7541    },{ .name = "SMMU_CB4_PMEVCNTR0",  .decode.addr = A_SMMU_CB4_PMEVCNTR0,
7542    },{ .name = "SMMU_CB4_PMEVCNTR1",  .decode.addr = A_SMMU_CB4_PMEVCNTR1,
7543    },{ .name = "SMMU_CB4_PMEVCNTR2",  .decode.addr = A_SMMU_CB4_PMEVCNTR2,
7544    },{ .name = "SMMU_CB4_PMEVCNTR3",  .decode.addr = A_SMMU_CB4_PMEVCNTR3,
7545    },{ .name = "SMMU_CB4_PMEVTYPER0",  .decode.addr = A_SMMU_CB4_PMEVTYPER0,
7546    },{ .name = "SMMU_CB4_PMEVTYPER1",  .decode.addr = A_SMMU_CB4_PMEVTYPER1,
7547    },{ .name = "SMMU_CB4_PMEVTYPER2",  .decode.addr = A_SMMU_CB4_PMEVTYPER2,
7548    },{ .name = "SMMU_CB4_PMEVTYPER3",  .decode.addr = A_SMMU_CB4_PMEVTYPER3,
7549    },{ .name = "SMMU_CB4_PMCFGR",  .decode.addr = A_SMMU_CB4_PMCFGR,
7550        .reset = 0x11f03,
7551        .ro = 0xff09ffff,
7552    },{ .name = "SMMU_CB4_PMCR",  .decode.addr = A_SMMU_CB4_PMCR,
7553        .ro = 0xff000002,
7554    },{ .name = "SMMU_CB4_PMCEID",  .decode.addr = A_SMMU_CB4_PMCEID,
7555        .reset = 0x30303,
7556        .ro = 0x38383,
7557    },{ .name = "SMMU_CB4_PMCNTENSE",  .decode.addr = A_SMMU_CB4_PMCNTENSE,
7558    },{ .name = "SMMU_CB4_PMCNTENCLR",  .decode.addr = A_SMMU_CB4_PMCNTENCLR,
7559    },{ .name = "SMMU_CB4_PMCNTENSET",  .decode.addr = A_SMMU_CB4_PMCNTENSET,
7560    },{ .name = "SMMU_CB4_PMINTENCLR",  .decode.addr = A_SMMU_CB4_PMINTENCLR,
7561    },{ .name = "SMMU_CB4_PMOVSCLR",  .decode.addr = A_SMMU_CB4_PMOVSCLR,
7562    },{ .name = "SMMU_CB4_PMOVSSET",  .decode.addr = A_SMMU_CB4_PMOVSSET,
7563    },{ .name = "SMMU_CB4_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB4_PMAUTHSTATUS,
7564        .reset = 0x80,
7565        .ro = 0xff,
7566    },{ .name = "SMMU_CB5_SCTLR",  .decode.addr = A_SMMU_CB5_SCTLR,
7567        .reset = 0x100,
7568        .ro = 0x1000,
7569    },{ .name = "SMMU_CB5_ACTLR",  .decode.addr = A_SMMU_CB5_ACTLR,
7570        .reset = 0x3,
7571    },{ .name = "SMMU_CB5_RESUME",  .decode.addr = A_SMMU_CB5_RESUME,
7572    },{ .name = "SMMU_CB5_TCR2",  .decode.addr = A_SMMU_CB5_TCR2,
7573        .reset = 0x60,
7574        .ro = 0x60,
7575    },{ .name = "SMMU_CB5_TTBR0_LOW",  .decode.addr = A_SMMU_CB5_TTBR0_LOW,
7576        .ro = 0x4,
7577    },{ .name = "SMMU_CB5_TTBR0_HIGH",  .decode.addr = A_SMMU_CB5_TTBR0_HIGH,
7578    },{ .name = "SMMU_CB5_TTBR1_LOW",  .decode.addr = A_SMMU_CB5_TTBR1_LOW,
7579    },{ .name = "SMMU_CB5_TTBR1_HIGH",  .decode.addr = A_SMMU_CB5_TTBR1_HIGH,
7580    },{ .name = "SMMU_CB5_TCR_LPAE",  .decode.addr = A_SMMU_CB5_TCR_LPAE,
7581    },{ .name = "SMMU_CB5_CONTEXTIDR",  .decode.addr = A_SMMU_CB5_CONTEXTIDR,
7582    },{ .name = "SMMU_CB5_PRRR_MAIR0",  .decode.addr = A_SMMU_CB5_PRRR_MAIR0,
7583    },{ .name = "SMMU_CB5_NMRR_MAIR1",  .decode.addr = A_SMMU_CB5_NMRR_MAIR1,
7584    },{ .name = "SMMU_CB5_FSR",  .decode.addr = A_SMMU_CB5_FSR,
7585        .w1c = 0xffffffff,
7586        .post_write = smmu_fsr_pw,
7587    },{ .name = "SMMU_CB5_FSRRESTORE",  .decode.addr = A_SMMU_CB5_FSRRESTORE,
7588    },{ .name = "SMMU_CB5_FAR_LOW",  .decode.addr = A_SMMU_CB5_FAR_LOW,
7589    },{ .name = "SMMU_CB5_FAR_HIGH",  .decode.addr = A_SMMU_CB5_FAR_HIGH,
7590    },{ .name = "SMMU_CB5_FSYNR0",  .decode.addr = A_SMMU_CB5_FSYNR0,
7591        .ro = 0x200,
7592    },{ .name = "SMMU_CB5_IPAFAR_LOW",  .decode.addr = A_SMMU_CB5_IPAFAR_LOW,
7593        .ro = 0xfff,
7594    },{ .name = "SMMU_CB5_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB5_IPAFAR_HIGH,
7595    },{ .name = "SMMU_CB5_TLBIVA_LOW",  .decode.addr = A_SMMU_CB5_TLBIVA_LOW,
7596    },{ .name = "SMMU_CB5_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB5_TLBIVA_HIGH,
7597    },{ .name = "SMMU_CB5_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB5_TLBIVAA_LOW,
7598    },{ .name = "SMMU_CB5_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB5_TLBIVAA_HIGH,
7599    },{ .name = "SMMU_CB5_TLBIASID",  .decode.addr = A_SMMU_CB5_TLBIASID,
7600    },{ .name = "SMMU_CB5_TLBIALL",  .decode.addr = A_SMMU_CB5_TLBIALL,
7601    },{ .name = "SMMU_CB5_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB5_TLBIVAL_LOW,
7602    },{ .name = "SMMU_CB5_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB5_TLBIVAL_HIGH,
7603    },{ .name = "SMMU_CB5_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB5_TLBIVAAL_LOW,
7604    },{ .name = "SMMU_CB5_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB5_TLBIVAAL_HIGH,
7605    },{ .name = "SMMU_CB5_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB5_TLBIIPAS2_LOW,
7606    },{ .name = "SMMU_CB5_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB5_TLBIIPAS2_HIGH,
7607    },{ .name = "SMMU_CB5_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB5_TLBIIPAS2L_LOW,
7608    },{ .name = "SMMU_CB5_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB5_TLBIIPAS2L_HIGH,
7609    },{ .name = "SMMU_CB5_TLBSYNC",  .decode.addr = A_SMMU_CB5_TLBSYNC,
7610    },{ .name = "SMMU_CB5_TLBSTATUS",  .decode.addr = A_SMMU_CB5_TLBSTATUS,
7611        .ro = 0x1,
7612    },{ .name = "SMMU_CB5_PMEVCNTR0",  .decode.addr = A_SMMU_CB5_PMEVCNTR0,
7613    },{ .name = "SMMU_CB5_PMEVCNTR1",  .decode.addr = A_SMMU_CB5_PMEVCNTR1,
7614    },{ .name = "SMMU_CB5_PMEVCNTR2",  .decode.addr = A_SMMU_CB5_PMEVCNTR2,
7615    },{ .name = "SMMU_CB5_PMEVCNTR3",  .decode.addr = A_SMMU_CB5_PMEVCNTR3,
7616    },{ .name = "SMMU_CB5_PMEVTYPER0",  .decode.addr = A_SMMU_CB5_PMEVTYPER0,
7617    },{ .name = "SMMU_CB5_PMEVTYPER1",  .decode.addr = A_SMMU_CB5_PMEVTYPER1,
7618    },{ .name = "SMMU_CB5_PMEVTYPER2",  .decode.addr = A_SMMU_CB5_PMEVTYPER2,
7619    },{ .name = "SMMU_CB5_PMEVTYPER3",  .decode.addr = A_SMMU_CB5_PMEVTYPER3,
7620    },{ .name = "SMMU_CB5_PMCFGR",  .decode.addr = A_SMMU_CB5_PMCFGR,
7621        .reset = 0x11f03,
7622        .ro = 0xff09ffff,
7623    },{ .name = "SMMU_CB5_PMCR",  .decode.addr = A_SMMU_CB5_PMCR,
7624        .ro = 0xff000002,
7625    },{ .name = "SMMU_CB5_PMCEID",  .decode.addr = A_SMMU_CB5_PMCEID,
7626        .reset = 0x30303,
7627        .ro = 0x38383,
7628    },{ .name = "SMMU_CB5_PMCNTENSE",  .decode.addr = A_SMMU_CB5_PMCNTENSE,
7629    },{ .name = "SMMU_CB5_PMCNTENCLR",  .decode.addr = A_SMMU_CB5_PMCNTENCLR,
7630    },{ .name = "SMMU_CB5_PMCNTENSET",  .decode.addr = A_SMMU_CB5_PMCNTENSET,
7631    },{ .name = "SMMU_CB5_PMINTENCLR",  .decode.addr = A_SMMU_CB5_PMINTENCLR,
7632    },{ .name = "SMMU_CB5_PMOVSCLR",  .decode.addr = A_SMMU_CB5_PMOVSCLR,
7633    },{ .name = "SMMU_CB5_PMOVSSET",  .decode.addr = A_SMMU_CB5_PMOVSSET,
7634    },{ .name = "SMMU_CB5_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB5_PMAUTHSTATUS,
7635        .reset = 0x80,
7636        .ro = 0xff,
7637    },{ .name = "SMMU_CB6_SCTLR",  .decode.addr = A_SMMU_CB6_SCTLR,
7638        .reset = 0x100,
7639        .ro = 0x1000,
7640    },{ .name = "SMMU_CB6_ACTLR",  .decode.addr = A_SMMU_CB6_ACTLR,
7641        .reset = 0x3,
7642    },{ .name = "SMMU_CB6_RESUME",  .decode.addr = A_SMMU_CB6_RESUME,
7643    },{ .name = "SMMU_CB6_TCR2",  .decode.addr = A_SMMU_CB6_TCR2,
7644        .reset = 0x60,
7645        .ro = 0x60,
7646    },{ .name = "SMMU_CB6_TTBR0_LOW",  .decode.addr = A_SMMU_CB6_TTBR0_LOW,
7647        .ro = 0x4,
7648    },{ .name = "SMMU_CB6_TTBR0_HIGH",  .decode.addr = A_SMMU_CB6_TTBR0_HIGH,
7649    },{ .name = "SMMU_CB6_TTBR1_LOW",  .decode.addr = A_SMMU_CB6_TTBR1_LOW,
7650    },{ .name = "SMMU_CB6_TTBR1_HIGH",  .decode.addr = A_SMMU_CB6_TTBR1_HIGH,
7651    },{ .name = "SMMU_CB6_TCR_LPAE",  .decode.addr = A_SMMU_CB6_TCR_LPAE,
7652    },{ .name = "SMMU_CB6_CONTEXTIDR",  .decode.addr = A_SMMU_CB6_CONTEXTIDR,
7653    },{ .name = "SMMU_CB6_PRRR_MAIR0",  .decode.addr = A_SMMU_CB6_PRRR_MAIR0,
7654    },{ .name = "SMMU_CB6_NMRR_MAIR1",  .decode.addr = A_SMMU_CB6_NMRR_MAIR1,
7655    },{ .name = "SMMU_CB6_FSR",  .decode.addr = A_SMMU_CB6_FSR,
7656        .w1c = 0xffffffff,
7657        .post_write = smmu_fsr_pw,
7658    },{ .name = "SMMU_CB6_FSRRESTORE",  .decode.addr = A_SMMU_CB6_FSRRESTORE,
7659    },{ .name = "SMMU_CB6_FAR_LOW",  .decode.addr = A_SMMU_CB6_FAR_LOW,
7660    },{ .name = "SMMU_CB6_FAR_HIGH",  .decode.addr = A_SMMU_CB6_FAR_HIGH,
7661    },{ .name = "SMMU_CB6_FSYNR0",  .decode.addr = A_SMMU_CB6_FSYNR0,
7662        .ro = 0x200,
7663    },{ .name = "SMMU_CB6_IPAFAR_LOW",  .decode.addr = A_SMMU_CB6_IPAFAR_LOW,
7664        .ro = 0xfff,
7665    },{ .name = "SMMU_CB6_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB6_IPAFAR_HIGH,
7666    },{ .name = "SMMU_CB6_TLBIVA_LOW",  .decode.addr = A_SMMU_CB6_TLBIVA_LOW,
7667    },{ .name = "SMMU_CB6_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB6_TLBIVA_HIGH,
7668    },{ .name = "SMMU_CB6_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB6_TLBIVAA_LOW,
7669    },{ .name = "SMMU_CB6_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB6_TLBIVAA_HIGH,
7670    },{ .name = "SMMU_CB6_TLBIASID",  .decode.addr = A_SMMU_CB6_TLBIASID,
7671    },{ .name = "SMMU_CB6_TLBIALL",  .decode.addr = A_SMMU_CB6_TLBIALL,
7672    },{ .name = "SMMU_CB6_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB6_TLBIVAL_LOW,
7673    },{ .name = "SMMU_CB6_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB6_TLBIVAL_HIGH,
7674    },{ .name = "SMMU_CB6_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB6_TLBIVAAL_LOW,
7675    },{ .name = "SMMU_CB6_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB6_TLBIVAAL_HIGH,
7676    },{ .name = "SMMU_CB6_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB6_TLBIIPAS2_LOW,
7677    },{ .name = "SMMU_CB6_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB6_TLBIIPAS2_HIGH,
7678    },{ .name = "SMMU_CB6_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB6_TLBIIPAS2L_LOW,
7679    },{ .name = "SMMU_CB6_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB6_TLBIIPAS2L_HIGH,
7680    },{ .name = "SMMU_CB6_TLBSYNC",  .decode.addr = A_SMMU_CB6_TLBSYNC,
7681    },{ .name = "SMMU_CB6_TLBSTATUS",  .decode.addr = A_SMMU_CB6_TLBSTATUS,
7682        .ro = 0x1,
7683    },{ .name = "SMMU_CB6_PMEVCNTR0",  .decode.addr = A_SMMU_CB6_PMEVCNTR0,
7684    },{ .name = "SMMU_CB6_PMEVCNTR1",  .decode.addr = A_SMMU_CB6_PMEVCNTR1,
7685    },{ .name = "SMMU_CB6_PMEVCNTR2",  .decode.addr = A_SMMU_CB6_PMEVCNTR2,
7686    },{ .name = "SMMU_CB6_PMEVCNTR3",  .decode.addr = A_SMMU_CB6_PMEVCNTR3,
7687    },{ .name = "SMMU_CB6_PMEVTYPER0",  .decode.addr = A_SMMU_CB6_PMEVTYPER0,
7688    },{ .name = "SMMU_CB6_PMEVTYPER1",  .decode.addr = A_SMMU_CB6_PMEVTYPER1,
7689    },{ .name = "SMMU_CB6_PMEVTYPER2",  .decode.addr = A_SMMU_CB6_PMEVTYPER2,
7690    },{ .name = "SMMU_CB6_PMEVTYPER3",  .decode.addr = A_SMMU_CB6_PMEVTYPER3,
7691    },{ .name = "SMMU_CB6_PMCFGR",  .decode.addr = A_SMMU_CB6_PMCFGR,
7692        .reset = 0x11f03,
7693        .ro = 0xff09ffff,
7694    },{ .name = "SMMU_CB6_PMCR",  .decode.addr = A_SMMU_CB6_PMCR,
7695        .ro = 0xff000002,
7696    },{ .name = "SMMU_CB6_PMCEID",  .decode.addr = A_SMMU_CB6_PMCEID,
7697        .reset = 0x30303,
7698        .ro = 0x38383,
7699    },{ .name = "SMMU_CB6_PMCNTENSE",  .decode.addr = A_SMMU_CB6_PMCNTENSE,
7700    },{ .name = "SMMU_CB6_PMCNTENCLR",  .decode.addr = A_SMMU_CB6_PMCNTENCLR,
7701    },{ .name = "SMMU_CB6_PMCNTENSET",  .decode.addr = A_SMMU_CB6_PMCNTENSET,
7702    },{ .name = "SMMU_CB6_PMINTENCLR",  .decode.addr = A_SMMU_CB6_PMINTENCLR,
7703    },{ .name = "SMMU_CB6_PMOVSCLR",  .decode.addr = A_SMMU_CB6_PMOVSCLR,
7704    },{ .name = "SMMU_CB6_PMOVSSET",  .decode.addr = A_SMMU_CB6_PMOVSSET,
7705    },{ .name = "SMMU_CB6_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB6_PMAUTHSTATUS,
7706        .reset = 0x80,
7707        .ro = 0xff,
7708    },{ .name = "SMMU_CB7_SCTLR",  .decode.addr = A_SMMU_CB7_SCTLR,
7709        .reset = 0x100,
7710        .ro = 0x1000,
7711    },{ .name = "SMMU_CB7_ACTLR",  .decode.addr = A_SMMU_CB7_ACTLR,
7712        .reset = 0x3,
7713    },{ .name = "SMMU_CB7_RESUME",  .decode.addr = A_SMMU_CB7_RESUME,
7714    },{ .name = "SMMU_CB7_TCR2",  .decode.addr = A_SMMU_CB7_TCR2,
7715        .reset = 0x60,
7716        .ro = 0x60,
7717    },{ .name = "SMMU_CB7_TTBR0_LOW",  .decode.addr = A_SMMU_CB7_TTBR0_LOW,
7718        .ro = 0x4,
7719    },{ .name = "SMMU_CB7_TTBR0_HIGH",  .decode.addr = A_SMMU_CB7_TTBR0_HIGH,
7720    },{ .name = "SMMU_CB7_TTBR1_LOW",  .decode.addr = A_SMMU_CB7_TTBR1_LOW,
7721    },{ .name = "SMMU_CB7_TTBR1_HIGH",  .decode.addr = A_SMMU_CB7_TTBR1_HIGH,
7722    },{ .name = "SMMU_CB7_TCR_LPAE",  .decode.addr = A_SMMU_CB7_TCR_LPAE,
7723    },{ .name = "SMMU_CB7_CONTEXTIDR",  .decode.addr = A_SMMU_CB7_CONTEXTIDR,
7724    },{ .name = "SMMU_CB7_PRRR_MAIR0",  .decode.addr = A_SMMU_CB7_PRRR_MAIR0,
7725    },{ .name = "SMMU_CB7_NMRR_MAIR1",  .decode.addr = A_SMMU_CB7_NMRR_MAIR1,
7726    },{ .name = "SMMU_CB7_FSR",  .decode.addr = A_SMMU_CB7_FSR,
7727        .w1c = 0xffffffff,
7728        .post_write = smmu_fsr_pw,
7729    },{ .name = "SMMU_CB7_FSRRESTORE",  .decode.addr = A_SMMU_CB7_FSRRESTORE,
7730    },{ .name = "SMMU_CB7_FAR_LOW",  .decode.addr = A_SMMU_CB7_FAR_LOW,
7731    },{ .name = "SMMU_CB7_FAR_HIGH",  .decode.addr = A_SMMU_CB7_FAR_HIGH,
7732    },{ .name = "SMMU_CB7_FSYNR0",  .decode.addr = A_SMMU_CB7_FSYNR0,
7733        .ro = 0x200,
7734    },{ .name = "SMMU_CB7_IPAFAR_LOW",  .decode.addr = A_SMMU_CB7_IPAFAR_LOW,
7735        .ro = 0xfff,
7736    },{ .name = "SMMU_CB7_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB7_IPAFAR_HIGH,
7737    },{ .name = "SMMU_CB7_TLBIVA_LOW",  .decode.addr = A_SMMU_CB7_TLBIVA_LOW,
7738    },{ .name = "SMMU_CB7_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB7_TLBIVA_HIGH,
7739    },{ .name = "SMMU_CB7_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB7_TLBIVAA_LOW,
7740    },{ .name = "SMMU_CB7_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB7_TLBIVAA_HIGH,
7741    },{ .name = "SMMU_CB7_TLBIASID",  .decode.addr = A_SMMU_CB7_TLBIASID,
7742    },{ .name = "SMMU_CB7_TLBIALL",  .decode.addr = A_SMMU_CB7_TLBIALL,
7743    },{ .name = "SMMU_CB7_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB7_TLBIVAL_LOW,
7744    },{ .name = "SMMU_CB7_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB7_TLBIVAL_HIGH,
7745    },{ .name = "SMMU_CB7_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB7_TLBIVAAL_LOW,
7746    },{ .name = "SMMU_CB7_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB7_TLBIVAAL_HIGH,
7747    },{ .name = "SMMU_CB7_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB7_TLBIIPAS2_LOW,
7748    },{ .name = "SMMU_CB7_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB7_TLBIIPAS2_HIGH,
7749    },{ .name = "SMMU_CB7_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB7_TLBIIPAS2L_LOW,
7750    },{ .name = "SMMU_CB7_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB7_TLBIIPAS2L_HIGH,
7751    },{ .name = "SMMU_CB7_TLBSYNC",  .decode.addr = A_SMMU_CB7_TLBSYNC,
7752    },{ .name = "SMMU_CB7_TLBSTATUS",  .decode.addr = A_SMMU_CB7_TLBSTATUS,
7753        .ro = 0x1,
7754    },{ .name = "SMMU_CB7_PMEVCNTR0",  .decode.addr = A_SMMU_CB7_PMEVCNTR0,
7755    },{ .name = "SMMU_CB7_PMEVCNTR1",  .decode.addr = A_SMMU_CB7_PMEVCNTR1,
7756    },{ .name = "SMMU_CB7_PMEVCNTR2",  .decode.addr = A_SMMU_CB7_PMEVCNTR2,
7757    },{ .name = "SMMU_CB7_PMEVCNTR3",  .decode.addr = A_SMMU_CB7_PMEVCNTR3,
7758    },{ .name = "SMMU_CB7_PMEVTYPER0",  .decode.addr = A_SMMU_CB7_PMEVTYPER0,
7759    },{ .name = "SMMU_CB7_PMEVTYPER1",  .decode.addr = A_SMMU_CB7_PMEVTYPER1,
7760    },{ .name = "SMMU_CB7_PMEVTYPER2",  .decode.addr = A_SMMU_CB7_PMEVTYPER2,
7761    },{ .name = "SMMU_CB7_PMEVTYPER3",  .decode.addr = A_SMMU_CB7_PMEVTYPER3,
7762    },{ .name = "SMMU_CB7_PMCFGR",  .decode.addr = A_SMMU_CB7_PMCFGR,
7763        .reset = 0x11f03,
7764        .ro = 0xff09ffff,
7765    },{ .name = "SMMU_CB7_PMCR",  .decode.addr = A_SMMU_CB7_PMCR,
7766        .ro = 0xff000002,
7767    },{ .name = "SMMU_CB7_PMCEID",  .decode.addr = A_SMMU_CB7_PMCEID,
7768        .reset = 0x30303,
7769        .ro = 0x38383,
7770    },{ .name = "SMMU_CB7_PMCNTENSE",  .decode.addr = A_SMMU_CB7_PMCNTENSE,
7771    },{ .name = "SMMU_CB7_PMCNTENCLR",  .decode.addr = A_SMMU_CB7_PMCNTENCLR,
7772    },{ .name = "SMMU_CB7_PMCNTENSET",  .decode.addr = A_SMMU_CB7_PMCNTENSET,
7773    },{ .name = "SMMU_CB7_PMINTENCLR",  .decode.addr = A_SMMU_CB7_PMINTENCLR,
7774    },{ .name = "SMMU_CB7_PMOVSCLR",  .decode.addr = A_SMMU_CB7_PMOVSCLR,
7775    },{ .name = "SMMU_CB7_PMOVSSET",  .decode.addr = A_SMMU_CB7_PMOVSSET,
7776    },{ .name = "SMMU_CB7_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB7_PMAUTHSTATUS,
7777        .reset = 0x80,
7778        .ro = 0xff,
7779    },{ .name = "SMMU_CB8_SCTLR",  .decode.addr = A_SMMU_CB8_SCTLR,
7780        .reset = 0x100,
7781        .ro = 0x1000,
7782    },{ .name = "SMMU_CB8_ACTLR",  .decode.addr = A_SMMU_CB8_ACTLR,
7783        .reset = 0x3,
7784    },{ .name = "SMMU_CB8_RESUME",  .decode.addr = A_SMMU_CB8_RESUME,
7785    },{ .name = "SMMU_CB8_TCR2",  .decode.addr = A_SMMU_CB8_TCR2,
7786        .reset = 0x60,
7787        .ro = 0x60,
7788    },{ .name = "SMMU_CB8_TTBR0_LOW",  .decode.addr = A_SMMU_CB8_TTBR0_LOW,
7789        .ro = 0x4,
7790    },{ .name = "SMMU_CB8_TTBR0_HIGH",  .decode.addr = A_SMMU_CB8_TTBR0_HIGH,
7791    },{ .name = "SMMU_CB8_TTBR1_LOW",  .decode.addr = A_SMMU_CB8_TTBR1_LOW,
7792    },{ .name = "SMMU_CB8_TTBR1_HIGH",  .decode.addr = A_SMMU_CB8_TTBR1_HIGH,
7793    },{ .name = "SMMU_CB8_TCR_LPAE",  .decode.addr = A_SMMU_CB8_TCR_LPAE,
7794    },{ .name = "SMMU_CB8_CONTEXTIDR",  .decode.addr = A_SMMU_CB8_CONTEXTIDR,
7795    },{ .name = "SMMU_CB8_PRRR_MAIR0",  .decode.addr = A_SMMU_CB8_PRRR_MAIR0,
7796    },{ .name = "SMMU_CB8_NMRR_MAIR1",  .decode.addr = A_SMMU_CB8_NMRR_MAIR1,
7797    },{ .name = "SMMU_CB8_FSR",  .decode.addr = A_SMMU_CB8_FSR,
7798        .w1c = 0xffffffff,
7799        .post_write = smmu_fsr_pw,
7800    },{ .name = "SMMU_CB8_FSRRESTORE",  .decode.addr = A_SMMU_CB8_FSRRESTORE,
7801    },{ .name = "SMMU_CB8_FAR_LOW",  .decode.addr = A_SMMU_CB8_FAR_LOW,
7802    },{ .name = "SMMU_CB8_FAR_HIGH",  .decode.addr = A_SMMU_CB8_FAR_HIGH,
7803    },{ .name = "SMMU_CB8_FSYNR0",  .decode.addr = A_SMMU_CB8_FSYNR0,
7804        .ro = 0x200,
7805    },{ .name = "SMMU_CB8_IPAFAR_LOW",  .decode.addr = A_SMMU_CB8_IPAFAR_LOW,
7806        .ro = 0xfff,
7807    },{ .name = "SMMU_CB8_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB8_IPAFAR_HIGH,
7808    },{ .name = "SMMU_CB8_TLBIVA_LOW",  .decode.addr = A_SMMU_CB8_TLBIVA_LOW,
7809    },{ .name = "SMMU_CB8_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB8_TLBIVA_HIGH,
7810    },{ .name = "SMMU_CB8_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB8_TLBIVAA_LOW,
7811    },{ .name = "SMMU_CB8_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB8_TLBIVAA_HIGH,
7812    },{ .name = "SMMU_CB8_TLBIASID",  .decode.addr = A_SMMU_CB8_TLBIASID,
7813    },{ .name = "SMMU_CB8_TLBIALL",  .decode.addr = A_SMMU_CB8_TLBIALL,
7814    },{ .name = "SMMU_CB8_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB8_TLBIVAL_LOW,
7815    },{ .name = "SMMU_CB8_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB8_TLBIVAL_HIGH,
7816    },{ .name = "SMMU_CB8_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB8_TLBIVAAL_LOW,
7817    },{ .name = "SMMU_CB8_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB8_TLBIVAAL_HIGH,
7818    },{ .name = "SMMU_CB8_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB8_TLBIIPAS2_LOW,
7819    },{ .name = "SMMU_CB8_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB8_TLBIIPAS2_HIGH,
7820    },{ .name = "SMMU_CB8_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB8_TLBIIPAS2L_LOW,
7821    },{ .name = "SMMU_CB8_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB8_TLBIIPAS2L_HIGH,
7822    },{ .name = "SMMU_CB8_TLBSYNC",  .decode.addr = A_SMMU_CB8_TLBSYNC,
7823    },{ .name = "SMMU_CB8_TLBSTATUS",  .decode.addr = A_SMMU_CB8_TLBSTATUS,
7824        .ro = 0x1,
7825    },{ .name = "SMMU_CB8_PMEVCNTR0",  .decode.addr = A_SMMU_CB8_PMEVCNTR0,
7826    },{ .name = "SMMU_CB8_PMEVCNTR1",  .decode.addr = A_SMMU_CB8_PMEVCNTR1,
7827    },{ .name = "SMMU_CB8_PMEVCNTR2",  .decode.addr = A_SMMU_CB8_PMEVCNTR2,
7828    },{ .name = "SMMU_CB8_PMEVCNTR3",  .decode.addr = A_SMMU_CB8_PMEVCNTR3,
7829    },{ .name = "SMMU_CB8_PMEVTYPER0",  .decode.addr = A_SMMU_CB8_PMEVTYPER0,
7830    },{ .name = "SMMU_CB8_PMEVTYPER1",  .decode.addr = A_SMMU_CB8_PMEVTYPER1,
7831    },{ .name = "SMMU_CB8_PMEVTYPER2",  .decode.addr = A_SMMU_CB8_PMEVTYPER2,
7832    },{ .name = "SMMU_CB8_PMEVTYPER3",  .decode.addr = A_SMMU_CB8_PMEVTYPER3,
7833    },{ .name = "SMMU_CB8_PMCFGR",  .decode.addr = A_SMMU_CB8_PMCFGR,
7834        .reset = 0x11f03,
7835        .ro = 0xff09ffff,
7836    },{ .name = "SMMU_CB8_PMCR",  .decode.addr = A_SMMU_CB8_PMCR,
7837        .ro = 0xff000002,
7838    },{ .name = "SMMU_CB8_PMCEID",  .decode.addr = A_SMMU_CB8_PMCEID,
7839        .reset = 0x30303,
7840        .ro = 0x38383,
7841    },{ .name = "SMMU_CB8_PMCNTENSE",  .decode.addr = A_SMMU_CB8_PMCNTENSE,
7842    },{ .name = "SMMU_CB8_PMCNTENCLR",  .decode.addr = A_SMMU_CB8_PMCNTENCLR,
7843    },{ .name = "SMMU_CB8_PMCNTENSET",  .decode.addr = A_SMMU_CB8_PMCNTENSET,
7844    },{ .name = "SMMU_CB8_PMINTENCLR",  .decode.addr = A_SMMU_CB8_PMINTENCLR,
7845    },{ .name = "SMMU_CB8_PMOVSCLR",  .decode.addr = A_SMMU_CB8_PMOVSCLR,
7846    },{ .name = "SMMU_CB8_PMOVSSET",  .decode.addr = A_SMMU_CB8_PMOVSSET,
7847    },{ .name = "SMMU_CB8_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB8_PMAUTHSTATUS,
7848        .reset = 0x80,
7849        .ro = 0xff,
7850    },{ .name = "SMMU_CB9_SCTLR",  .decode.addr = A_SMMU_CB9_SCTLR,
7851        .reset = 0x100,
7852        .ro = 0x1000,
7853    },{ .name = "SMMU_CB9_ACTLR",  .decode.addr = A_SMMU_CB9_ACTLR,
7854        .reset = 0x3,
7855    },{ .name = "SMMU_CB9_RESUME",  .decode.addr = A_SMMU_CB9_RESUME,
7856    },{ .name = "SMMU_CB9_TCR2",  .decode.addr = A_SMMU_CB9_TCR2,
7857        .reset = 0x60,
7858        .ro = 0x60,
7859    },{ .name = "SMMU_CB9_TTBR0_LOW",  .decode.addr = A_SMMU_CB9_TTBR0_LOW,
7860        .ro = 0x4,
7861    },{ .name = "SMMU_CB9_TTBR0_HIGH",  .decode.addr = A_SMMU_CB9_TTBR0_HIGH,
7862    },{ .name = "SMMU_CB9_TTBR1_LOW",  .decode.addr = A_SMMU_CB9_TTBR1_LOW,
7863    },{ .name = "SMMU_CB9_TTBR1_HIGH",  .decode.addr = A_SMMU_CB9_TTBR1_HIGH,
7864    },{ .name = "SMMU_CB9_TCR_LPAE",  .decode.addr = A_SMMU_CB9_TCR_LPAE,
7865    },{ .name = "SMMU_CB9_CONTEXTIDR",  .decode.addr = A_SMMU_CB9_CONTEXTIDR,
7866    },{ .name = "SMMU_CB9_PRRR_MAIR0",  .decode.addr = A_SMMU_CB9_PRRR_MAIR0,
7867    },{ .name = "SMMU_CB9_NMRR_MAIR1",  .decode.addr = A_SMMU_CB9_NMRR_MAIR1,
7868    },{ .name = "SMMU_CB9_FSR",  .decode.addr = A_SMMU_CB9_FSR,
7869        .w1c = 0xffffffff,
7870        .post_write = smmu_fsr_pw,
7871    },{ .name = "SMMU_CB9_FSRRESTORE",  .decode.addr = A_SMMU_CB9_FSRRESTORE,
7872    },{ .name = "SMMU_CB9_FAR_LOW",  .decode.addr = A_SMMU_CB9_FAR_LOW,
7873    },{ .name = "SMMU_CB9_FAR_HIGH",  .decode.addr = A_SMMU_CB9_FAR_HIGH,
7874    },{ .name = "SMMU_CB9_FSYNR0",  .decode.addr = A_SMMU_CB9_FSYNR0,
7875        .ro = 0x200,
7876    },{ .name = "SMMU_CB9_IPAFAR_LOW",  .decode.addr = A_SMMU_CB9_IPAFAR_LOW,
7877        .ro = 0xfff,
7878    },{ .name = "SMMU_CB9_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB9_IPAFAR_HIGH,
7879    },{ .name = "SMMU_CB9_TLBIVA_LOW",  .decode.addr = A_SMMU_CB9_TLBIVA_LOW,
7880    },{ .name = "SMMU_CB9_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB9_TLBIVA_HIGH,
7881    },{ .name = "SMMU_CB9_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB9_TLBIVAA_LOW,
7882    },{ .name = "SMMU_CB9_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB9_TLBIVAA_HIGH,
7883    },{ .name = "SMMU_CB9_TLBIASID",  .decode.addr = A_SMMU_CB9_TLBIASID,
7884    },{ .name = "SMMU_CB9_TLBIALL",  .decode.addr = A_SMMU_CB9_TLBIALL,
7885    },{ .name = "SMMU_CB9_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB9_TLBIVAL_LOW,
7886    },{ .name = "SMMU_CB9_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB9_TLBIVAL_HIGH,
7887    },{ .name = "SMMU_CB9_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB9_TLBIVAAL_LOW,
7888    },{ .name = "SMMU_CB9_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB9_TLBIVAAL_HIGH,
7889    },{ .name = "SMMU_CB9_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB9_TLBIIPAS2_LOW,
7890    },{ .name = "SMMU_CB9_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB9_TLBIIPAS2_HIGH,
7891    },{ .name = "SMMU_CB9_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB9_TLBIIPAS2L_LOW,
7892    },{ .name = "SMMU_CB9_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB9_TLBIIPAS2L_HIGH,
7893    },{ .name = "SMMU_CB9_TLBSYNC",  .decode.addr = A_SMMU_CB9_TLBSYNC,
7894    },{ .name = "SMMU_CB9_TLBSTATUS",  .decode.addr = A_SMMU_CB9_TLBSTATUS,
7895        .ro = 0x1,
7896    },{ .name = "SMMU_CB9_PMEVCNTR0",  .decode.addr = A_SMMU_CB9_PMEVCNTR0,
7897    },{ .name = "SMMU_CB9_PMEVCNTR1",  .decode.addr = A_SMMU_CB9_PMEVCNTR1,
7898    },{ .name = "SMMU_CB9_PMEVCNTR2",  .decode.addr = A_SMMU_CB9_PMEVCNTR2,
7899    },{ .name = "SMMU_CB9_PMEVCNTR3",  .decode.addr = A_SMMU_CB9_PMEVCNTR3,
7900    },{ .name = "SMMU_CB9_PMEVTYPER0",  .decode.addr = A_SMMU_CB9_PMEVTYPER0,
7901    },{ .name = "SMMU_CB9_PMEVTYPER1",  .decode.addr = A_SMMU_CB9_PMEVTYPER1,
7902    },{ .name = "SMMU_CB9_PMEVTYPER2",  .decode.addr = A_SMMU_CB9_PMEVTYPER2,
7903    },{ .name = "SMMU_CB9_PMEVTYPER3",  .decode.addr = A_SMMU_CB9_PMEVTYPER3,
7904    },{ .name = "SMMU_CB9_PMCFGR",  .decode.addr = A_SMMU_CB9_PMCFGR,
7905        .reset = 0x11f03,
7906        .ro = 0xff09ffff,
7907    },{ .name = "SMMU_CB9_PMCR",  .decode.addr = A_SMMU_CB9_PMCR,
7908        .ro = 0xff000002,
7909    },{ .name = "SMMU_CB9_PMCEID",  .decode.addr = A_SMMU_CB9_PMCEID,
7910        .reset = 0x30303,
7911        .ro = 0x38383,
7912    },{ .name = "SMMU_CB9_PMCNTENSE",  .decode.addr = A_SMMU_CB9_PMCNTENSE,
7913    },{ .name = "SMMU_CB9_PMCNTENCLR",  .decode.addr = A_SMMU_CB9_PMCNTENCLR,
7914    },{ .name = "SMMU_CB9_PMCNTENSET",  .decode.addr = A_SMMU_CB9_PMCNTENSET,
7915    },{ .name = "SMMU_CB9_PMINTENCLR",  .decode.addr = A_SMMU_CB9_PMINTENCLR,
7916    },{ .name = "SMMU_CB9_PMOVSCLR",  .decode.addr = A_SMMU_CB9_PMOVSCLR,
7917    },{ .name = "SMMU_CB9_PMOVSSET",  .decode.addr = A_SMMU_CB9_PMOVSSET,
7918    },{ .name = "SMMU_CB9_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB9_PMAUTHSTATUS,
7919        .reset = 0x80,
7920        .ro = 0xff,
7921    },{ .name = "SMMU_CB10_SCTLR",  .decode.addr = A_SMMU_CB10_SCTLR,
7922        .reset = 0x100,
7923        .ro = 0x1000,
7924    },{ .name = "SMMU_CB10_ACTLR",  .decode.addr = A_SMMU_CB10_ACTLR,
7925        .reset = 0x3,
7926    },{ .name = "SMMU_CB10_RESUME",  .decode.addr = A_SMMU_CB10_RESUME,
7927    },{ .name = "SMMU_CB10_TCR2",  .decode.addr = A_SMMU_CB10_TCR2,
7928        .reset = 0x60,
7929        .ro = 0x60,
7930    },{ .name = "SMMU_CB10_TTBR0_LOW",  .decode.addr = A_SMMU_CB10_TTBR0_LOW,
7931        .ro = 0x4,
7932    },{ .name = "SMMU_CB10_TTBR0_HIGH",  .decode.addr = A_SMMU_CB10_TTBR0_HIGH,
7933    },{ .name = "SMMU_CB10_TTBR1_LOW",  .decode.addr = A_SMMU_CB10_TTBR1_LOW,
7934    },{ .name = "SMMU_CB10_TTBR1_HIGH",  .decode.addr = A_SMMU_CB10_TTBR1_HIGH,
7935    },{ .name = "SMMU_CB10_TCR_LPAE",  .decode.addr = A_SMMU_CB10_TCR_LPAE,
7936    },{ .name = "SMMU_CB10_CONTEXTIDR",  .decode.addr = A_SMMU_CB10_CONTEXTIDR,
7937    },{ .name = "SMMU_CB10_PRRR_MAIR0",  .decode.addr = A_SMMU_CB10_PRRR_MAIR0,
7938    },{ .name = "SMMU_CB10_NMRR_MAIR1",  .decode.addr = A_SMMU_CB10_NMRR_MAIR1,
7939    },{ .name = "SMMU_CB10_FSR",  .decode.addr = A_SMMU_CB10_FSR,
7940        .w1c = 0xffffffff,
7941        .post_write = smmu_fsr_pw,
7942    },{ .name = "SMMU_CB10_FSRRESTORE",  .decode.addr = A_SMMU_CB10_FSRRESTORE,
7943    },{ .name = "SMMU_CB10_FAR_LOW",  .decode.addr = A_SMMU_CB10_FAR_LOW,
7944    },{ .name = "SMMU_CB10_FAR_HIGH",  .decode.addr = A_SMMU_CB10_FAR_HIGH,
7945    },{ .name = "SMMU_CB10_FSYNR0",  .decode.addr = A_SMMU_CB10_FSYNR0,
7946        .ro = 0x200,
7947    },{ .name = "SMMU_CB10_IPAFAR_LOW",  .decode.addr = A_SMMU_CB10_IPAFAR_LOW,
7948        .ro = 0xfff,
7949    },{ .name = "SMMU_CB10_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB10_IPAFAR_HIGH,
7950    },{ .name = "SMMU_CB10_TLBIVA_LOW",  .decode.addr = A_SMMU_CB10_TLBIVA_LOW,
7951    },{ .name = "SMMU_CB10_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB10_TLBIVA_HIGH,
7952    },{ .name = "SMMU_CB10_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB10_TLBIVAA_LOW,
7953    },{ .name = "SMMU_CB10_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB10_TLBIVAA_HIGH,
7954    },{ .name = "SMMU_CB10_TLBIASID",  .decode.addr = A_SMMU_CB10_TLBIASID,
7955    },{ .name = "SMMU_CB10_TLBIALL",  .decode.addr = A_SMMU_CB10_TLBIALL,
7956    },{ .name = "SMMU_CB10_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB10_TLBIVAL_LOW,
7957    },{ .name = "SMMU_CB10_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB10_TLBIVAL_HIGH,
7958    },{ .name = "SMMU_CB10_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB10_TLBIVAAL_LOW,
7959    },{ .name = "SMMU_CB10_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB10_TLBIVAAL_HIGH,
7960    },{ .name = "SMMU_CB10_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB10_TLBIIPAS2_LOW,
7961    },{ .name = "SMMU_CB10_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB10_TLBIIPAS2_HIGH,
7962    },{ .name = "SMMU_CB10_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB10_TLBIIPAS2L_LOW,
7963    },{ .name = "SMMU_CB10_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB10_TLBIIPAS2L_HIGH,
7964    },{ .name = "SMMU_CB10_TLBSYNC",  .decode.addr = A_SMMU_CB10_TLBSYNC,
7965    },{ .name = "SMMU_CB10_TLBSTATUS",  .decode.addr = A_SMMU_CB10_TLBSTATUS,
7966        .ro = 0x1,
7967    },{ .name = "SMMU_CB10_PMEVCNTR0",  .decode.addr = A_SMMU_CB10_PMEVCNTR0,
7968    },{ .name = "SMMU_CB10_PMEVCNTR1",  .decode.addr = A_SMMU_CB10_PMEVCNTR1,
7969    },{ .name = "SMMU_CB10_PMEVCNTR2",  .decode.addr = A_SMMU_CB10_PMEVCNTR2,
7970    },{ .name = "SMMU_CB10_PMEVCNTR3",  .decode.addr = A_SMMU_CB10_PMEVCNTR3,
7971    },{ .name = "SMMU_CB10_PMEVTYPER0",  .decode.addr = A_SMMU_CB10_PMEVTYPER0,
7972    },{ .name = "SMMU_CB10_PMEVTYPER1",  .decode.addr = A_SMMU_CB10_PMEVTYPER1,
7973    },{ .name = "SMMU_CB10_PMEVTYPER2",  .decode.addr = A_SMMU_CB10_PMEVTYPER2,
7974    },{ .name = "SMMU_CB10_PMEVTYPER3",  .decode.addr = A_SMMU_CB10_PMEVTYPER3,
7975    },{ .name = "SMMU_CB10_PMCFGR",  .decode.addr = A_SMMU_CB10_PMCFGR,
7976        .reset = 0x11f03,
7977        .ro = 0xff09ffff,
7978    },{ .name = "SMMU_CB10_PMCR",  .decode.addr = A_SMMU_CB10_PMCR,
7979        .ro = 0xff000002,
7980    },{ .name = "SMMU_CB10_PMCEID",  .decode.addr = A_SMMU_CB10_PMCEID,
7981        .reset = 0x30303,
7982        .ro = 0x38383,
7983    },{ .name = "SMMU_CB10_PMCNTENSE",  .decode.addr = A_SMMU_CB10_PMCNTENSE,
7984    },{ .name = "SMMU_CB10_PMCNTENCLR",  .decode.addr = A_SMMU_CB10_PMCNTENCLR,
7985    },{ .name = "SMMU_CB10_PMCNTENSET",  .decode.addr = A_SMMU_CB10_PMCNTENSET,
7986    },{ .name = "SMMU_CB10_PMINTENCLR",  .decode.addr = A_SMMU_CB10_PMINTENCLR,
7987    },{ .name = "SMMU_CB10_PMOVSCLR",  .decode.addr = A_SMMU_CB10_PMOVSCLR,
7988    },{ .name = "SMMU_CB10_PMOVSSET",  .decode.addr = A_SMMU_CB10_PMOVSSET,
7989    },{ .name = "SMMU_CB10_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB10_PMAUTHSTATUS,
7990        .reset = 0x80,
7991        .ro = 0xff,
7992    },{ .name = "SMMU_CB11_SCTLR",  .decode.addr = A_SMMU_CB11_SCTLR,
7993        .reset = 0x100,
7994        .ro = 0x1000,
7995    },{ .name = "SMMU_CB11_ACTLR",  .decode.addr = A_SMMU_CB11_ACTLR,
7996        .reset = 0x3,
7997    },{ .name = "SMMU_CB11_RESUME",  .decode.addr = A_SMMU_CB11_RESUME,
7998    },{ .name = "SMMU_CB11_TCR2",  .decode.addr = A_SMMU_CB11_TCR2,
7999        .reset = 0x60,
8000        .ro = 0x60,

8001    },{ .name = "SMMU_CB11_TTBR0_LOW",  .decode.addr = A_SMMU_CB11_TTBR0_LOW,
8002        .ro = 0x4,
8003    },{ .name = "SMMU_CB11_TTBR0_HIGH",  .decode.addr = A_SMMU_CB11_TTBR0_HIGH,
8004    },{ .name = "SMMU_CB11_TTBR1_LOW",  .decode.addr = A_SMMU_CB11_TTBR1_LOW,
8005    },{ .name = "SMMU_CB11_TTBR1_HIGH",  .decode.addr = A_SMMU_CB11_TTBR1_HIGH,
8006    },{ .name = "SMMU_CB11_TCR_LPAE",  .decode.addr = A_SMMU_CB11_TCR_LPAE,
8007    },{ .name = "SMMU_CB11_CONTEXTIDR",  .decode.addr = A_SMMU_CB11_CONTEXTIDR,
8008    },{ .name = "SMMU_CB11_PRRR_MAIR0",  .decode.addr = A_SMMU_CB11_PRRR_MAIR0,
8009    },{ .name = "SMMU_CB11_NMRR_MAIR1",  .decode.addr = A_SMMU_CB11_NMRR_MAIR1,
8010    },{ .name = "SMMU_CB11_FSR",  .decode.addr = A_SMMU_CB11_FSR,
8011        .w1c = 0xffffffff,
8012        .post_write = smmu_fsr_pw,
8013    },{ .name = "SMMU_CB11_FSRRESTORE",  .decode.addr = A_SMMU_CB11_FSRRESTORE,
8014    },{ .name = "SMMU_CB11_FAR_LOW",  .decode.addr = A_SMMU_CB11_FAR_LOW,
8015    },{ .name = "SMMU_CB11_FAR_HIGH",  .decode.addr = A_SMMU_CB11_FAR_HIGH,
8016    },{ .name = "SMMU_CB11_FSYNR0",  .decode.addr = A_SMMU_CB11_FSYNR0,
8017        .ro = 0x200,
8018    },{ .name = "SMMU_CB11_IPAFAR_LOW",  .decode.addr = A_SMMU_CB11_IPAFAR_LOW,
8019        .ro = 0xfff,
8020    },{ .name = "SMMU_CB11_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB11_IPAFAR_HIGH,
8021    },{ .name = "SMMU_CB11_TLBIVA_LOW",  .decode.addr = A_SMMU_CB11_TLBIVA_LOW,
8022    },{ .name = "SMMU_CB11_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB11_TLBIVA_HIGH,
8023    },{ .name = "SMMU_CB11_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB11_TLBIVAA_LOW,
8024    },{ .name = "SMMU_CB11_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB11_TLBIVAA_HIGH,
8025    },{ .name = "SMMU_CB11_TLBIASID",  .decode.addr = A_SMMU_CB11_TLBIASID,
8026    },{ .name = "SMMU_CB11_TLBIALL",  .decode.addr = A_SMMU_CB11_TLBIALL,
8027    },{ .name = "SMMU_CB11_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB11_TLBIVAL_LOW,
8028    },{ .name = "SMMU_CB11_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB11_TLBIVAL_HIGH,
8029    },{ .name = "SMMU_CB11_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB11_TLBIVAAL_LOW,
8030    },{ .name = "SMMU_CB11_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB11_TLBIVAAL_HIGH,
8031    },{ .name = "SMMU_CB11_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB11_TLBIIPAS2_LOW,
8032    },{ .name = "SMMU_CB11_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB11_TLBIIPAS2_HIGH,
8033    },{ .name = "SMMU_CB11_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB11_TLBIIPAS2L_LOW,
8034    },{ .name = "SMMU_CB11_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB11_TLBIIPAS2L_HIGH,
8035    },{ .name = "SMMU_CB11_TLBSYNC",  .decode.addr = A_SMMU_CB11_TLBSYNC,
8036    },{ .name = "SMMU_CB11_TLBSTATUS",  .decode.addr = A_SMMU_CB11_TLBSTATUS,
8037        .ro = 0x1,
8038    },{ .name = "SMMU_CB11_PMEVCNTR0",  .decode.addr = A_SMMU_CB11_PMEVCNTR0,
8039    },{ .name = "SMMU_CB11_PMEVCNTR1",  .decode.addr = A_SMMU_CB11_PMEVCNTR1,
8040    },{ .name = "SMMU_CB11_PMEVCNTR2",  .decode.addr = A_SMMU_CB11_PMEVCNTR2,
8041    },{ .name = "SMMU_CB11_PMEVCNTR3",  .decode.addr = A_SMMU_CB11_PMEVCNTR3,
8042    },{ .name = "SMMU_CB11_PMEVTYPER0",  .decode.addr = A_SMMU_CB11_PMEVTYPER0,
8043    },{ .name = "SMMU_CB11_PMEVTYPER1",  .decode.addr = A_SMMU_CB11_PMEVTYPER1,
8044    },{ .name = "SMMU_CB11_PMEVTYPER2",  .decode.addr = A_SMMU_CB11_PMEVTYPER2,
8045    },{ .name = "SMMU_CB11_PMEVTYPER3",  .decode.addr = A_SMMU_CB11_PMEVTYPER3,
8046    },{ .name = "SMMU_CB11_PMCFGR",  .decode.addr = A_SMMU_CB11_PMCFGR,
8047        .reset = 0x11f03,
8048        .ro = 0xff09ffff,
8049    },{ .name = "SMMU_CB11_PMCR",  .decode.addr = A_SMMU_CB11_PMCR,
8050        .ro = 0xff000002,
8051    },{ .name = "SMMU_CB11_PMCEID",  .decode.addr = A_SMMU_CB11_PMCEID,
8052        .reset = 0x30303,
8053        .ro = 0x38383,
8054    },{ .name = "SMMU_CB11_PMCNTENSE",  .decode.addr = A_SMMU_CB11_PMCNTENSE,
8055    },{ .name = "SMMU_CB11_PMCNTENCLR",  .decode.addr = A_SMMU_CB11_PMCNTENCLR,
8056    },{ .name = "SMMU_CB11_PMCNTENSET",  .decode.addr = A_SMMU_CB11_PMCNTENSET,
8057    },{ .name = "SMMU_CB11_PMINTENCLR",  .decode.addr = A_SMMU_CB11_PMINTENCLR,
8058    },{ .name = "SMMU_CB11_PMOVSCLR",  .decode.addr = A_SMMU_CB11_PMOVSCLR,
8059    },{ .name = "SMMU_CB11_PMOVSSET",  .decode.addr = A_SMMU_CB11_PMOVSSET,
8060    },{ .name = "SMMU_CB11_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB11_PMAUTHSTATUS,
8061        .reset = 0x80,
8062        .ro = 0xff,
8063    },{ .name = "SMMU_CB12_SCTLR",  .decode.addr = A_SMMU_CB12_SCTLR,
8064        .reset = 0x100,
8065        .ro = 0x1000,
8066    },{ .name = "SMMU_CB12_ACTLR",  .decode.addr = A_SMMU_CB12_ACTLR,
8067        .reset = 0x3,
8068    },{ .name = "SMMU_CB12_RESUME",  .decode.addr = A_SMMU_CB12_RESUME,
8069    },{ .name = "SMMU_CB12_TCR2",  .decode.addr = A_SMMU_CB12_TCR2,
8070        .reset = 0x60,
8071        .ro = 0x60,
8072    },{ .name = "SMMU_CB12_TTBR0_LOW",  .decode.addr = A_SMMU_CB12_TTBR0_LOW,
8073        .ro = 0x4,
8074    },{ .name = "SMMU_CB12_TTBR0_HIGH",  .decode.addr = A_SMMU_CB12_TTBR0_HIGH,
8075    },{ .name = "SMMU_CB12_TTBR1_LOW",  .decode.addr = A_SMMU_CB12_TTBR1_LOW,
8076    },{ .name = "SMMU_CB12_TTBR1_HIGH",  .decode.addr = A_SMMU_CB12_TTBR1_HIGH,
8077    },{ .name = "SMMU_CB12_TCR_LPAE",  .decode.addr = A_SMMU_CB12_TCR_LPAE,
8078    },{ .name = "SMMU_CB12_CONTEXTIDR",  .decode.addr = A_SMMU_CB12_CONTEXTIDR,
8079    },{ .name = "SMMU_CB12_PRRR_MAIR0",  .decode.addr = A_SMMU_CB12_PRRR_MAIR0,
8080    },{ .name = "SMMU_CB12_NMRR_MAIR1",  .decode.addr = A_SMMU_CB12_NMRR_MAIR1,
8081    },{ .name = "SMMU_CB12_FSR",  .decode.addr = A_SMMU_CB12_FSR,
8082        .w1c = 0xffffffff,
8083        .post_write = smmu_fsr_pw,
8084    },{ .name = "SMMU_CB12_FSRRESTORE",  .decode.addr = A_SMMU_CB12_FSRRESTORE,
8085    },{ .name = "SMMU_CB12_FAR_LOW",  .decode.addr = A_SMMU_CB12_FAR_LOW,
8086    },{ .name = "SMMU_CB12_FAR_HIGH",  .decode.addr = A_SMMU_CB12_FAR_HIGH,
8087    },{ .name = "SMMU_CB12_FSYNR0",  .decode.addr = A_SMMU_CB12_FSYNR0,
8088        .ro = 0x200,
8089    },{ .name = "SMMU_CB12_IPAFAR_LOW",  .decode.addr = A_SMMU_CB12_IPAFAR_LOW,
8090        .ro = 0xfff,
8091    },{ .name = "SMMU_CB12_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB12_IPAFAR_HIGH,
8092    },{ .name = "SMMU_CB12_TLBIVA_LOW",  .decode.addr = A_SMMU_CB12_TLBIVA_LOW,
8093    },{ .name = "SMMU_CB12_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB12_TLBIVA_HIGH,
8094    },{ .name = "SMMU_CB12_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB12_TLBIVAA_LOW,
8095    },{ .name = "SMMU_CB12_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB12_TLBIVAA_HIGH,
8096    },{ .name = "SMMU_CB12_TLBIASID",  .decode.addr = A_SMMU_CB12_TLBIASID,
8097    },{ .name = "SMMU_CB12_TLBIALL",  .decode.addr = A_SMMU_CB12_TLBIALL,
8098    },{ .name = "SMMU_CB12_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB12_TLBIVAL_LOW,
8099    },{ .name = "SMMU_CB12_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB12_TLBIVAL_HIGH,
8100    },{ .name = "SMMU_CB12_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB12_TLBIVAAL_LOW,
8101    },{ .name = "SMMU_CB12_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB12_TLBIVAAL_HIGH,
8102    },{ .name = "SMMU_CB12_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB12_TLBIIPAS2_LOW,
8103    },{ .name = "SMMU_CB12_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB12_TLBIIPAS2_HIGH,
8104    },{ .name = "SMMU_CB12_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB12_TLBIIPAS2L_LOW,
8105    },{ .name = "SMMU_CB12_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB12_TLBIIPAS2L_HIGH,
8106    },{ .name = "SMMU_CB12_TLBSYNC",  .decode.addr = A_SMMU_CB12_TLBSYNC,
8107    },{ .name = "SMMU_CB12_TLBSTATUS",  .decode.addr = A_SMMU_CB12_TLBSTATUS,
8108        .ro = 0x1,
8109    },{ .name = "SMMU_CB12_PMEVCNTR0",  .decode.addr = A_SMMU_CB12_PMEVCNTR0,
8110    },{ .name = "SMMU_CB12_PMEVCNTR1",  .decode.addr = A_SMMU_CB12_PMEVCNTR1,
8111    },{ .name = "SMMU_CB12_PMEVCNTR2",  .decode.addr = A_SMMU_CB12_PMEVCNTR2,
8112    },{ .name = "SMMU_CB12_PMEVCNTR3",  .decode.addr = A_SMMU_CB12_PMEVCNTR3,
8113    },{ .name = "SMMU_CB12_PMEVTYPER0",  .decode.addr = A_SMMU_CB12_PMEVTYPER0,
8114    },{ .name = "SMMU_CB12_PMEVTYPER1",  .decode.addr = A_SMMU_CB12_PMEVTYPER1,
8115    },{ .name = "SMMU_CB12_PMEVTYPER2",  .decode.addr = A_SMMU_CB12_PMEVTYPER2,
8116    },{ .name = "SMMU_CB12_PMEVTYPER3",  .decode.addr = A_SMMU_CB12_PMEVTYPER3,
8117    },{ .name = "SMMU_CB12_PMCFGR",  .decode.addr = A_SMMU_CB12_PMCFGR,
8118        .reset = 0x11f03,
8119        .ro = 0xff09ffff,
8120    },{ .name = "SMMU_CB12_PMCR",  .decode.addr = A_SMMU_CB12_PMCR,
8121        .ro = 0xff000002,
8122    },{ .name = "SMMU_CB12_PMCEID",  .decode.addr = A_SMMU_CB12_PMCEID,
8123        .reset = 0x30303,
8124        .ro = 0x38383,
8125    },{ .name = "SMMU_CB12_PMCNTENSE",  .decode.addr = A_SMMU_CB12_PMCNTENSE,
8126    },{ .name = "SMMU_CB12_PMCNTENCLR",  .decode.addr = A_SMMU_CB12_PMCNTENCLR,
8127    },{ .name = "SMMU_CB12_PMCNTENSET",  .decode.addr = A_SMMU_CB12_PMCNTENSET,
8128    },{ .name = "SMMU_CB12_PMINTENCLR",  .decode.addr = A_SMMU_CB12_PMINTENCLR,
8129    },{ .name = "SMMU_CB12_PMOVSCLR",  .decode.addr = A_SMMU_CB12_PMOVSCLR,
8130    },{ .name = "SMMU_CB12_PMOVSSET",  .decode.addr = A_SMMU_CB12_PMOVSSET,
8131    },{ .name = "SMMU_CB12_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB12_PMAUTHSTATUS,
8132        .reset = 0x80,
8133        .ro = 0xff,
8134    },{ .name = "SMMU_CB13_SCTLR",  .decode.addr = A_SMMU_CB13_SCTLR,
8135        .reset = 0x100,
8136        .ro = 0x1000,
8137    },{ .name = "SMMU_CB13_ACTLR",  .decode.addr = A_SMMU_CB13_ACTLR,
8138        .reset = 0x3,
8139    },{ .name = "SMMU_CB13_RESUME",  .decode.addr = A_SMMU_CB13_RESUME,
8140    },{ .name = "SMMU_CB13_TCR2",  .decode.addr = A_SMMU_CB13_TCR2,
8141        .reset = 0x60,
8142        .ro = 0x60,
8143    },{ .name = "SMMU_CB13_TTBR0_LOW",  .decode.addr = A_SMMU_CB13_TTBR0_LOW,
8144        .ro = 0x4,
8145    },{ .name = "SMMU_CB13_TTBR0_HIGH",  .decode.addr = A_SMMU_CB13_TTBR0_HIGH,
8146    },{ .name = "SMMU_CB13_TTBR1_LOW",  .decode.addr = A_SMMU_CB13_TTBR1_LOW,
8147    },{ .name = "SMMU_CB13_TTBR1_HIGH",  .decode.addr = A_SMMU_CB13_TTBR1_HIGH,
8148    },{ .name = "SMMU_CB13_TCR_LPAE",  .decode.addr = A_SMMU_CB13_TCR_LPAE,
8149    },{ .name = "SMMU_CB13_CONTEXTIDR",  .decode.addr = A_SMMU_CB13_CONTEXTIDR,
8150    },{ .name = "SMMU_CB13_PRRR_MAIR0",  .decode.addr = A_SMMU_CB13_PRRR_MAIR0,
8151    },{ .name = "SMMU_CB13_NMRR_MAIR1",  .decode.addr = A_SMMU_CB13_NMRR_MAIR1,
8152    },{ .name = "SMMU_CB13_FSR",  .decode.addr = A_SMMU_CB13_FSR,
8153        .w1c = 0xffffffff,
8154        .post_write = smmu_fsr_pw,
8155    },{ .name = "SMMU_CB13_FSRRESTORE",  .decode.addr = A_SMMU_CB13_FSRRESTORE,
8156    },{ .name = "SMMU_CB13_FAR_LOW",  .decode.addr = A_SMMU_CB13_FAR_LOW,
8157    },{ .name = "SMMU_CB13_FAR_HIGH",  .decode.addr = A_SMMU_CB13_FAR_HIGH,
8158    },{ .name = "SMMU_CB13_FSYNR0",  .decode.addr = A_SMMU_CB13_FSYNR0,
8159        .ro = 0x200,
8160    },{ .name = "SMMU_CB13_IPAFAR_LOW",  .decode.addr = A_SMMU_CB13_IPAFAR_LOW,
8161        .ro = 0xfff,
8162    },{ .name = "SMMU_CB13_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB13_IPAFAR_HIGH,
8163    },{ .name = "SMMU_CB13_TLBIVA_LOW",  .decode.addr = A_SMMU_CB13_TLBIVA_LOW,
8164    },{ .name = "SMMU_CB13_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB13_TLBIVA_HIGH,
8165    },{ .name = "SMMU_CB13_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB13_TLBIVAA_LOW,
8166    },{ .name = "SMMU_CB13_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB13_TLBIVAA_HIGH,
8167    },{ .name = "SMMU_CB13_TLBIASID",  .decode.addr = A_SMMU_CB13_TLBIASID,
8168    },{ .name = "SMMU_CB13_TLBIALL",  .decode.addr = A_SMMU_CB13_TLBIALL,
8169    },{ .name = "SMMU_CB13_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB13_TLBIVAL_LOW,
8170    },{ .name = "SMMU_CB13_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB13_TLBIVAL_HIGH,
8171    },{ .name = "SMMU_CB13_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB13_TLBIVAAL_LOW,
8172    },{ .name = "SMMU_CB13_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB13_TLBIVAAL_HIGH,
8173    },{ .name = "SMMU_CB13_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB13_TLBIIPAS2_LOW,
8174    },{ .name = "SMMU_CB13_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB13_TLBIIPAS2_HIGH,
8175    },{ .name = "SMMU_CB13_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB13_TLBIIPAS2L_LOW,
8176    },{ .name = "SMMU_CB13_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB13_TLBIIPAS2L_HIGH,
8177    },{ .name = "SMMU_CB13_TLBSYNC",  .decode.addr = A_SMMU_CB13_TLBSYNC,
8178    },{ .name = "SMMU_CB13_TLBSTATUS",  .decode.addr = A_SMMU_CB13_TLBSTATUS,
8179        .ro = 0x1,
8180    },{ .name = "SMMU_CB13_PMEVCNTR0",  .decode.addr = A_SMMU_CB13_PMEVCNTR0,
8181    },{ .name = "SMMU_CB13_PMEVCNTR1",  .decode.addr = A_SMMU_CB13_PMEVCNTR1,
8182    },{ .name = "SMMU_CB13_PMEVCNTR2",  .decode.addr = A_SMMU_CB13_PMEVCNTR2,
8183    },{ .name = "SMMU_CB13_PMEVCNTR3",  .decode.addr = A_SMMU_CB13_PMEVCNTR3,
8184    },{ .name = "SMMU_CB13_PMEVTYPER0",  .decode.addr = A_SMMU_CB13_PMEVTYPER0,
8185    },{ .name = "SMMU_CB13_PMEVTYPER1",  .decode.addr = A_SMMU_CB13_PMEVTYPER1,
8186    },{ .name = "SMMU_CB13_PMEVTYPER2",  .decode.addr = A_SMMU_CB13_PMEVTYPER2,
8187    },{ .name = "SMMU_CB13_PMEVTYPER3",  .decode.addr = A_SMMU_CB13_PMEVTYPER3,
8188    },{ .name = "SMMU_CB13_PMCFGR",  .decode.addr = A_SMMU_CB13_PMCFGR,
8189        .reset = 0x11f03,
8190        .ro = 0xff09ffff,
8191    },{ .name = "SMMU_CB13_PMCR",  .decode.addr = A_SMMU_CB13_PMCR,
8192        .ro = 0xff000002,
8193    },{ .name = "SMMU_CB13_PMCEID",  .decode.addr = A_SMMU_CB13_PMCEID,
8194        .reset = 0x30303,
8195        .ro = 0x38383,
8196    },{ .name = "SMMU_CB13_PMCNTENSE",  .decode.addr = A_SMMU_CB13_PMCNTENSE,
8197    },{ .name = "SMMU_CB13_PMCNTENCLR",  .decode.addr = A_SMMU_CB13_PMCNTENCLR,
8198    },{ .name = "SMMU_CB13_PMCNTENSET",  .decode.addr = A_SMMU_CB13_PMCNTENSET,
8199    },{ .name = "SMMU_CB13_PMINTENCLR",  .decode.addr = A_SMMU_CB13_PMINTENCLR,
8200    },{ .name = "SMMU_CB13_PMOVSCLR",  .decode.addr = A_SMMU_CB13_PMOVSCLR,
8201    },{ .name = "SMMU_CB13_PMOVSSET",  .decode.addr = A_SMMU_CB13_PMOVSSET,
8202    },{ .name = "SMMU_CB13_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB13_PMAUTHSTATUS,
8203        .reset = 0x80,
8204        .ro = 0xff,
8205    },{ .name = "SMMU_CB14_SCTLR",  .decode.addr = A_SMMU_CB14_SCTLR,
8206        .reset = 0x100,
8207        .ro = 0x1000,
8208    },{ .name = "SMMU_CB14_ACTLR",  .decode.addr = A_SMMU_CB14_ACTLR,
8209        .reset = 0x3,
8210    },{ .name = "SMMU_CB14_RESUME",  .decode.addr = A_SMMU_CB14_RESUME,
8211    },{ .name = "SMMU_CB14_TCR2",  .decode.addr = A_SMMU_CB14_TCR2,
8212        .reset = 0x60,
8213        .ro = 0x60,
8214    },{ .name = "SMMU_CB14_TTBR0_LOW",  .decode.addr = A_SMMU_CB14_TTBR0_LOW,
8215        .ro = 0x4,
8216    },{ .name = "SMMU_CB14_TTBR0_HIGH",  .decode.addr = A_SMMU_CB14_TTBR0_HIGH,
8217    },{ .name = "SMMU_CB14_TTBR1_LOW",  .decode.addr = A_SMMU_CB14_TTBR1_LOW,
8218    },{ .name = "SMMU_CB14_TTBR1_HIGH",  .decode.addr = A_SMMU_CB14_TTBR1_HIGH,
8219    },{ .name = "SMMU_CB14_TCR_LPAE",  .decode.addr = A_SMMU_CB14_TCR_LPAE,
8220    },{ .name = "SMMU_CB14_CONTEXTIDR",  .decode.addr = A_SMMU_CB14_CONTEXTIDR,
8221    },{ .name = "SMMU_CB14_PRRR_MAIR0",  .decode.addr = A_SMMU_CB14_PRRR_MAIR0,
8222    },{ .name = "SMMU_CB14_NMRR_MAIR1",  .decode.addr = A_SMMU_CB14_NMRR_MAIR1,
8223    },{ .name = "SMMU_CB14_FSR",  .decode.addr = A_SMMU_CB14_FSR,
8224        .w1c = 0xffffffff,
8225        .post_write = smmu_fsr_pw,
8226    },{ .name = "SMMU_CB14_FSRRESTORE",  .decode.addr = A_SMMU_CB14_FSRRESTORE,
8227    },{ .name = "SMMU_CB14_FAR_LOW",  .decode.addr = A_SMMU_CB14_FAR_LOW,
8228    },{ .name = "SMMU_CB14_FAR_HIGH",  .decode.addr = A_SMMU_CB14_FAR_HIGH,
8229    },{ .name = "SMMU_CB14_FSYNR0",  .decode.addr = A_SMMU_CB14_FSYNR0,
8230        .ro = 0x200,
8231    },{ .name = "SMMU_CB14_IPAFAR_LOW",  .decode.addr = A_SMMU_CB14_IPAFAR_LOW,
8232        .ro = 0xfff,
8233    },{ .name = "SMMU_CB14_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB14_IPAFAR_HIGH,
8234    },{ .name = "SMMU_CB14_TLBIVA_LOW",  .decode.addr = A_SMMU_CB14_TLBIVA_LOW,
8235    },{ .name = "SMMU_CB14_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB14_TLBIVA_HIGH,
8236    },{ .name = "SMMU_CB14_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB14_TLBIVAA_LOW,
8237    },{ .name = "SMMU_CB14_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB14_TLBIVAA_HIGH,
8238    },{ .name = "SMMU_CB14_TLBIASID",  .decode.addr = A_SMMU_CB14_TLBIASID,
8239    },{ .name = "SMMU_CB14_TLBIALL",  .decode.addr = A_SMMU_CB14_TLBIALL,
8240    },{ .name = "SMMU_CB14_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB14_TLBIVAL_LOW,
8241    },{ .name = "SMMU_CB14_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB14_TLBIVAL_HIGH,
8242    },{ .name = "SMMU_CB14_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB14_TLBIVAAL_LOW,
8243    },{ .name = "SMMU_CB14_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB14_TLBIVAAL_HIGH,
8244    },{ .name = "SMMU_CB14_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB14_TLBIIPAS2_LOW,
8245    },{ .name = "SMMU_CB14_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB14_TLBIIPAS2_HIGH,
8246    },{ .name = "SMMU_CB14_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB14_TLBIIPAS2L_LOW,
8247    },{ .name = "SMMU_CB14_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB14_TLBIIPAS2L_HIGH,
8248    },{ .name = "SMMU_CB14_TLBSYNC",  .decode.addr = A_SMMU_CB14_TLBSYNC,
8249    },{ .name = "SMMU_CB14_TLBSTATUS",  .decode.addr = A_SMMU_CB14_TLBSTATUS,
8250        .ro = 0x1,
8251    },{ .name = "SMMU_CB14_PMEVCNTR0",  .decode.addr = A_SMMU_CB14_PMEVCNTR0,
8252    },{ .name = "SMMU_CB14_PMEVCNTR1",  .decode.addr = A_SMMU_CB14_PMEVCNTR1,
8253    },{ .name = "SMMU_CB14_PMEVCNTR2",  .decode.addr = A_SMMU_CB14_PMEVCNTR2,
8254    },{ .name = "SMMU_CB14_PMEVCNTR3",  .decode.addr = A_SMMU_CB14_PMEVCNTR3,
8255    },{ .name = "SMMU_CB14_PMEVTYPER0",  .decode.addr = A_SMMU_CB14_PMEVTYPER0,
8256    },{ .name = "SMMU_CB14_PMEVTYPER1",  .decode.addr = A_SMMU_CB14_PMEVTYPER1,
8257    },{ .name = "SMMU_CB14_PMEVTYPER2",  .decode.addr = A_SMMU_CB14_PMEVTYPER2,
8258    },{ .name = "SMMU_CB14_PMEVTYPER3",  .decode.addr = A_SMMU_CB14_PMEVTYPER3,
8259    },{ .name = "SMMU_CB14_PMCFGR",  .decode.addr = A_SMMU_CB14_PMCFGR,
8260        .reset = 0x11f03,
8261        .ro = 0xff09ffff,
8262    },{ .name = "SMMU_CB14_PMCR",  .decode.addr = A_SMMU_CB14_PMCR,
8263        .ro = 0xff000002,
8264    },{ .name = "SMMU_CB14_PMCEID",  .decode.addr = A_SMMU_CB14_PMCEID,
8265        .reset = 0x30303,
8266        .ro = 0x38383,
8267    },{ .name = "SMMU_CB14_PMCNTENSE",  .decode.addr = A_SMMU_CB14_PMCNTENSE,
8268    },{ .name = "SMMU_CB14_PMCNTENCLR",  .decode.addr = A_SMMU_CB14_PMCNTENCLR,
8269    },{ .name = "SMMU_CB14_PMCNTENSET",  .decode.addr = A_SMMU_CB14_PMCNTENSET,
8270    },{ .name = "SMMU_CB14_PMINTENCLR",  .decode.addr = A_SMMU_CB14_PMINTENCLR,
8271    },{ .name = "SMMU_CB14_PMOVSCLR",  .decode.addr = A_SMMU_CB14_PMOVSCLR,
8272    },{ .name = "SMMU_CB14_PMOVSSET",  .decode.addr = A_SMMU_CB14_PMOVSSET,
8273    },{ .name = "SMMU_CB14_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB14_PMAUTHSTATUS,
8274        .reset = 0x80,
8275        .ro = 0xff,
8276    },{ .name = "SMMU_CB15_SCTLR",  .decode.addr = A_SMMU_CB15_SCTLR,
8277        .reset = 0x100,
8278        .ro = 0x1000,
8279    },{ .name = "SMMU_CB15_ACTLR",  .decode.addr = A_SMMU_CB15_ACTLR,
8280        .reset = 0x3,
8281    },{ .name = "SMMU_CB15_RESUME",  .decode.addr = A_SMMU_CB15_RESUME,
8282    },{ .name = "SMMU_CB15_TCR2",  .decode.addr = A_SMMU_CB15_TCR2,
8283        .reset = 0x60,
8284        .ro = 0x60,
8285    },{ .name = "SMMU_CB15_TTBR0_LOW",  .decode.addr = A_SMMU_CB15_TTBR0_LOW,
8286        .ro = 0x4,
8287    },{ .name = "SMMU_CB15_TTBR0_HIGH",  .decode.addr = A_SMMU_CB15_TTBR0_HIGH,
8288    },{ .name = "SMMU_CB15_TTBR1_LOW",  .decode.addr = A_SMMU_CB15_TTBR1_LOW,
8289    },{ .name = "SMMU_CB15_TTBR1_HIGH",  .decode.addr = A_SMMU_CB15_TTBR1_HIGH,
8290    },{ .name = "SMMU_CB15_TCR_LPAE",  .decode.addr = A_SMMU_CB15_TCR_LPAE,
8291    },{ .name = "SMMU_CB15_CONTEXTIDR",  .decode.addr = A_SMMU_CB15_CONTEXTIDR,
8292    },{ .name = "SMMU_CB15_PRRR_MAIR0",  .decode.addr = A_SMMU_CB15_PRRR_MAIR0,
8293    },{ .name = "SMMU_CB15_NMRR_MAIR1",  .decode.addr = A_SMMU_CB15_NMRR_MAIR1,
8294    },{ .name = "SMMU_CB15_FSR",  .decode.addr = A_SMMU_CB15_FSR,
8295        .w1c = 0xffffffff,
8296        .post_write = smmu_fsr_pw,
8297    },{ .name = "SMMU_CB15_FSRRESTORE",  .decode.addr = A_SMMU_CB15_FSRRESTORE,
8298    },{ .name = "SMMU_CB15_FAR_LOW",  .decode.addr = A_SMMU_CB15_FAR_LOW,
8299    },{ .name = "SMMU_CB15_FAR_HIGH",  .decode.addr = A_SMMU_CB15_FAR_HIGH,
8300    },{ .name = "SMMU_CB15_FSYNR0",  .decode.addr = A_SMMU_CB15_FSYNR0,
8301        .ro = 0x200,
8302    },{ .name = "SMMU_CB15_IPAFAR_LOW",  .decode.addr = A_SMMU_CB15_IPAFAR_LOW,
8303        .ro = 0xfff,
8304    },{ .name = "SMMU_CB15_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB15_IPAFAR_HIGH,
8305    },{ .name = "SMMU_CB15_TLBIVA_LOW",  .decode.addr = A_SMMU_CB15_TLBIVA_LOW,
8306    },{ .name = "SMMU_CB15_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB15_TLBIVA_HIGH,
8307    },{ .name = "SMMU_CB15_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB15_TLBIVAA_LOW,
8308    },{ .name = "SMMU_CB15_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB15_TLBIVAA_HIGH,
8309    },{ .name = "SMMU_CB15_TLBIASID",  .decode.addr = A_SMMU_CB15_TLBIASID,
8310    },{ .name = "SMMU_CB15_TLBIALL",  .decode.addr = A_SMMU_CB15_TLBIALL,
8311    },{ .name = "SMMU_CB15_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB15_TLBIVAL_LOW,
8312    },{ .name = "SMMU_CB15_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB15_TLBIVAL_HIGH,
8313    },{ .name = "SMMU_CB15_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB15_TLBIVAAL_LOW,
8314    },{ .name = "SMMU_CB15_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB15_TLBIVAAL_HIGH,
8315    },{ .name = "SMMU_CB15_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB15_TLBIIPAS2_LOW,
8316    },{ .name = "SMMU_CB15_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB15_TLBIIPAS2_HIGH,
8317    },{ .name = "SMMU_CB15_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB15_TLBIIPAS2L_LOW,
8318    },{ .name = "SMMU_CB15_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB15_TLBIIPAS2L_HIGH,
8319    },{ .name = "SMMU_CB15_TLBSYNC",  .decode.addr = A_SMMU_CB15_TLBSYNC,
8320    },{ .name = "SMMU_CB15_TLBSTATUS",  .decode.addr = A_SMMU_CB15_TLBSTATUS,
8321        .ro = 0x1,
8322    },{ .name = "SMMU_CB15_PMEVCNTR0",  .decode.addr = A_SMMU_CB15_PMEVCNTR0,
8323    },{ .name = "SMMU_CB15_PMEVCNTR1",  .decode.addr = A_SMMU_CB15_PMEVCNTR1,
8324    },{ .name = "SMMU_CB15_PMEVCNTR2",  .decode.addr = A_SMMU_CB15_PMEVCNTR2,
8325    },{ .name = "SMMU_CB15_PMEVCNTR3",  .decode.addr = A_SMMU_CB15_PMEVCNTR3,
8326    },{ .name = "SMMU_CB15_PMEVTYPER0",  .decode.addr = A_SMMU_CB15_PMEVTYPER0,
8327    },{ .name = "SMMU_CB15_PMEVTYPER1",  .decode.addr = A_SMMU_CB15_PMEVTYPER1,
8328    },{ .name = "SMMU_CB15_PMEVTYPER2",  .decode.addr = A_SMMU_CB15_PMEVTYPER2,
8329    },{ .name = "SMMU_CB15_PMEVTYPER3",  .decode.addr = A_SMMU_CB15_PMEVTYPER3,
8330    },{ .name = "SMMU_CB15_PMCFGR",  .decode.addr = A_SMMU_CB15_PMCFGR,
8331        .reset = 0x11f03,
8332        .ro = 0xff09ffff,
8333    },{ .name = "SMMU_CB15_PMCR",  .decode.addr = A_SMMU_CB15_PMCR,
8334        .ro = 0xff000002,
8335    },{ .name = "SMMU_CB15_PMCEID",  .decode.addr = A_SMMU_CB15_PMCEID,
8336        .reset = 0x30303,
8337        .ro = 0x38383,
8338    },{ .name = "SMMU_CB15_PMCNTENSE",  .decode.addr = A_SMMU_CB15_PMCNTENSE,
8339    },{ .name = "SMMU_CB15_PMCNTENCLR",  .decode.addr = A_SMMU_CB15_PMCNTENCLR,
8340    },{ .name = "SMMU_CB15_PMCNTENSET",  .decode.addr = A_SMMU_CB15_PMCNTENSET,
8341    },{ .name = "SMMU_CB15_PMINTENCLR",  .decode.addr = A_SMMU_CB15_PMINTENCLR,
8342    },{ .name = "SMMU_CB15_PMOVSCLR",  .decode.addr = A_SMMU_CB15_PMOVSCLR,
8343    },{ .name = "SMMU_CB15_PMOVSSET",  .decode.addr = A_SMMU_CB15_PMOVSSET,
8344    },{ .name = "SMMU_CB15_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB15_PMAUTHSTATUS,
8345        .reset = 0x80,
8346        .ro = 0xff,
8347    }
8348};
8349
8350static void smmu500_reset(DeviceState *dev)
8351{
8352    SMMU *s = XILINX_SMMU500(dev);
8353    unsigned int i;
8354
8355    for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
8356        dep_register_reset(&s->regs_info[i]);
8357    }
8358}
8359
8360static uint64_t smmu500_read(void *opaque, hwaddr addr, unsigned size)
8361{
8362    SMMU *s = XILINX_SMMU500(opaque);
8363    DepRegisterInfo *r = &s->regs_info[addr / 4];
8364
8365    if (!r->data) {
8366        qemu_log("%s: Decode error: read from %" HWADDR_PRIx "\n",
8367                 object_get_canonical_path(OBJECT(s)),
8368                 addr);
8369        return 0;
8370    }
8371    return dep_register_read(r);
8372}
8373
8374static void smmu500_write(void *opaque, hwaddr addr, uint64_t value,
8375                      unsigned size)
8376{
8377    SMMU *s = XILINX_SMMU500(opaque);
8378    DepRegisterInfo *r = &s->regs_info[addr / 4];
8379
8380    if (!r->data) {
8381        qemu_log("%s: Decode error: write to %" HWADDR_PRIx "=%" PRIx64 "\n",
8382                 object_get_canonical_path(OBJECT(s)),
8383                 addr, value);
8384        return;
8385    }
8386    dep_register_write(r, value, ~0);
8387}
8388
8389
8390static MemoryRegionIOMMUOps smmu_iommu_ops = {
8391    .translate_attr = smmu_translate,
8392};
8393
8394static const MemoryRegionOps smmu500_ops = {
8395    .read = smmu500_read,
8396    .write = smmu500_write,
8397    .endianness = DEVICE_LITTLE_ENDIAN,
8398    .valid = {
8399        .min_access_size = 4,
8400        .max_access_size = 8,
8401    },
8402};
8403
8404static void smmu500_realize(DeviceState *dev, Error **errp)
8405{
8406    SMMU *s = XILINX_SMMU500(dev);
8407    const char *prefix = object_get_canonical_path(OBJECT(dev));
8408    unsigned int i;
8409
8410    for (i = 0; i < ARRAY_SIZE(smmu500_regs_info); ++i) {
8411        DepRegisterInfo *r = &s->regs_info[smmu500_regs_info[i].decode.addr/4];
8412
8413        *r = (DepRegisterInfo) {
8414            .data = (uint8_t *)&s->regs[
8415                    smmu500_regs_info[i].decode.addr/4],
8416            .data_size = sizeof(uint32_t),
8417            .access = &smmu500_regs_info[i],
8418            .debug = XILINX_SMMU500_ERR_DEBUG,
8419            .prefix = prefix,
8420            .opaque = s,
8421        };
8422    }
8423
8424    s->dma_as = s->dma_mr ? address_space_init_shareable(s->dma_mr, NULL)
8425                          : &address_space_memory;
8426
8427    assert(s->dma_as);
8428
8429    sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq.global);
8430    for (i = 0; i < 16; i++) {
8431        sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq.context[i]);
8432    }
8433}
8434
8435static void smmu500_init(Object *obj)
8436{
8437    SMMU *s = XILINX_SMMU500(obj);
8438    int i;
8439
8440    object_property_add_link(obj, "dma", TYPE_MEMORY_REGION,
8441                             (Object **)&s->dma_mr,
8442                             qdev_prop_allow_set_link_before_realize,
8443                             OBJ_PROP_LINK_UNREF_ON_RELEASE,
8444                             &error_abort);
8445
8446    for (i = 0; i < MAX_TBU; i++) {
8447        char *name = g_strdup_printf("mr-%d", i);
8448        object_property_add_link(obj, name, TYPE_MEMORY_REGION,
8449                                 (Object **)&s->tbu[i].mr,
8450                                 qdev_prop_allow_set_link_before_realize,
8451                                 OBJ_PROP_LINK_UNREF_ON_RELEASE,
8452                                 &error_abort);
8453        g_free(name);
8454        s->tbu[i].smmu = s;
8455    }
8456}
8457
8458static bool smmu_parse_reg(FDTGenericMMap *obj, FDTGenericRegPropInfo reg,
8459                           Error **errp)
8460{
8461    SMMU *s = XILINX_SMMU500(obj);
8462    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
8463    ObjectClass *klass = object_class_by_name(TYPE_XILINX_SMMU500);
8464    FDTGenericMMapClass *parent_fmc;
8465    unsigned int i;
8466
8467    parent_fmc = FDT_GENERIC_MMAP_CLASS(object_class_get_parent(klass));
8468    memory_region_init_io(&s->iomem, OBJECT(obj), &smmu500_ops, s,
8469                          TYPE_XILINX_SMMU500, R_MAX * 4);
8470    sysbus_init_mmio(sbd, &s->iomem);
8471
8472    for (i = 0; i < (reg.n - 1); i++) {
8473        char *name = g_strdup_printf("smmu-tbu%d", i);
8474
8475        assert(s->tbu[i].mr);
8476        s->tbu[i].as = address_space_init_shareable(s->tbu[i].mr, NULL);
8477        memory_region_init_iommu(&s->tbu[i].iommu, OBJECT(sbd), &smmu_iommu_ops,
8478                                 name, UINT64_MAX);
8479        sysbus_init_mmio(sbd, &s->tbu[i].iommu);
8480        g_free(name);
8481    }
8482
8483    return parent_fmc ? parent_fmc->parse_reg(obj, reg, errp) : false;
8484}
8485
8486static Property smmu_properties[] = {
8487    DEFINE_PROP_UINT32("pamax", SMMU, cfg.pamax, 48),
8488    DEFINE_PROP_END_OF_LIST(),
8489};
8490
8491static const VMStateDescription vmstate_smmu500 = {
8492    .name = TYPE_XILINX_SMMU500,
8493    .version_id = 1,
8494    .minimum_version_id = 1,
8495    .minimum_version_id_old = 1,
8496    .fields = (VMStateField[]) {
8497        VMSTATE_UINT32_ARRAY(regs, SMMU, R_MAX),
8498        VMSTATE_END_OF_LIST(),
8499    }
8500};
8501
8502static void smmu500_class_init(ObjectClass *klass, void *data)
8503{
8504    DeviceClass *dc = DEVICE_CLASS(klass);
8505    FDTGenericMMapClass *fmc = FDT_GENERIC_MMAP_CLASS(klass);
8506
8507    dc->reset = smmu500_reset;
8508    dc->realize = smmu500_realize;
8509    dc->vmsd = &vmstate_smmu500;
8510    dc->props = smmu_properties;
8511    fmc->parse_reg = smmu_parse_reg;
8512}
8513
8514static const TypeInfo smmu500_info = {
8515    .name          = TYPE_XILINX_SMMU500,
8516    .parent        = TYPE_SYS_BUS_DEVICE,
8517    .instance_size = sizeof(SMMU),
8518    .class_init    = smmu500_class_init,
8519    .instance_init = smmu500_init,
8520    .interfaces    = (InterfaceInfo[]) {
8521        { TYPE_FDT_GENERIC_MMAP },
8522        { },
8523    },
8524};
8525
8526static void smmu500_register_types(void)
8527{
8528    type_register_static(&smmu500_info);
8529}
8530
8531type_init(smmu500_register_types)
8532