qemu/target-mips/msa_helper.c
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   1/*
   2 * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
   3 *
   4 * Copyright (c) 2014 Imagination Technologies
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "cpu.h"
  22#include "exec/exec-all.h"
  23#include "exec/helper-proto.h"
  24
  25/* Data format min and max values */
  26#define DF_BITS(df) (1 << ((df) + 3))
  27
  28#define DF_MAX_INT(df)  (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
  29#define M_MAX_INT(m)    (int64_t)((1LL << ((m)         - 1)) - 1)
  30
  31#define DF_MIN_INT(df)  (int64_t)(-(1LL << (DF_BITS(df) - 1)))
  32#define M_MIN_INT(m)    (int64_t)(-(1LL << ((m)         - 1)))
  33
  34#define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
  35#define M_MAX_UINT(m)   (uint64_t)(-1ULL >> (64 - (m)))
  36
  37#define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df))
  38#define SIGNED(x, df)                                                   \
  39    ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)))
  40
  41/* Element-by-element access macros */
  42#define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
  43
  44static inline void msa_move_v(wr_t *pwd, wr_t *pws)
  45{
  46    uint32_t i;
  47
  48    for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
  49        pwd->d[i] = pws->d[i];
  50    }
  51}
  52
  53#define MSA_FN_IMM8(FUNC, DEST, OPERATION)                              \
  54void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws,   \
  55        uint32_t i8)                                                    \
  56{                                                                       \
  57    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
  58    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
  59    uint32_t i;                                                         \
  60    for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                        \
  61        DEST = OPERATION;                                               \
  62    }                                                                   \
  63}
  64
  65MSA_FN_IMM8(andi_b, pwd->b[i], pws->b[i] & i8)
  66MSA_FN_IMM8(ori_b, pwd->b[i], pws->b[i] | i8)
  67MSA_FN_IMM8(nori_b, pwd->b[i], ~(pws->b[i] | i8))
  68MSA_FN_IMM8(xori_b, pwd->b[i], pws->b[i] ^ i8)
  69
  70#define BIT_MOVE_IF_NOT_ZERO(dest, arg1, arg2, df) \
  71            UNSIGNED(((dest & (~arg2)) | (arg1 & arg2)), df)
  72MSA_FN_IMM8(bmnzi_b, pwd->b[i],
  73        BIT_MOVE_IF_NOT_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
  74
  75#define BIT_MOVE_IF_ZERO(dest, arg1, arg2, df) \
  76            UNSIGNED((dest & arg2) | (arg1 & (~arg2)), df)
  77MSA_FN_IMM8(bmzi_b, pwd->b[i],
  78        BIT_MOVE_IF_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
  79
  80#define BIT_SELECT(dest, arg1, arg2, df) \
  81            UNSIGNED((arg1 & (~dest)) | (arg2 & dest), df)
  82MSA_FN_IMM8(bseli_b, pwd->b[i],
  83        BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE))
  84
  85#undef MSA_FN_IMM8
  86
  87#define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03))
  88
  89void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
  90                       uint32_t ws, uint32_t imm)
  91{
  92    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
  93    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
  94    wr_t wx, *pwx = &wx;
  95    uint32_t i;
  96
  97    switch (df) {
  98    case DF_BYTE:
  99        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
 100            pwx->b[i] = pws->b[SHF_POS(i, imm)];
 101        }
 102        break;
 103    case DF_HALF:
 104        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
 105            pwx->h[i] = pws->h[SHF_POS(i, imm)];
 106        }
 107        break;
 108    case DF_WORD:
 109        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
 110            pwx->w[i] = pws->w[SHF_POS(i, imm)];
 111        }
 112        break;
 113    default:
 114        assert(0);
 115    }
 116    msa_move_v(pwd, pwx);
 117}
 118
 119#define MSA_FN_VECTOR(FUNC, DEST, OPERATION)                            \
 120void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws,   \
 121        uint32_t wt)                                                    \
 122{                                                                       \
 123    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 124    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 125    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);                          \
 126    uint32_t i;                                                         \
 127    for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                      \
 128        DEST = OPERATION;                                               \
 129    }                                                                   \
 130}
 131
 132MSA_FN_VECTOR(and_v, pwd->d[i], pws->d[i] & pwt->d[i])
 133MSA_FN_VECTOR(or_v, pwd->d[i], pws->d[i] | pwt->d[i])
 134MSA_FN_VECTOR(nor_v, pwd->d[i], ~(pws->d[i] | pwt->d[i]))
 135MSA_FN_VECTOR(xor_v, pwd->d[i], pws->d[i] ^ pwt->d[i])
 136MSA_FN_VECTOR(bmnz_v, pwd->d[i],
 137        BIT_MOVE_IF_NOT_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
 138MSA_FN_VECTOR(bmz_v, pwd->d[i],
 139        BIT_MOVE_IF_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
 140MSA_FN_VECTOR(bsel_v, pwd->d[i],
 141        BIT_SELECT(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
 142#undef BIT_MOVE_IF_NOT_ZERO
 143#undef BIT_MOVE_IF_ZERO
 144#undef BIT_SELECT
 145#undef MSA_FN_VECTOR
 146
 147static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)
 148{
 149    return arg1 + arg2;
 150}
 151
 152static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2)
 153{
 154    return arg1 - arg2;
 155}
 156
 157static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2)
 158{
 159    return arg1 == arg2 ? -1 : 0;
 160}
 161
 162static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 163{
 164    return arg1 <= arg2 ? -1 : 0;
 165}
 166
 167static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 168{
 169    uint64_t u_arg1 = UNSIGNED(arg1, df);
 170    uint64_t u_arg2 = UNSIGNED(arg2, df);
 171    return u_arg1 <= u_arg2 ? -1 : 0;
 172}
 173
 174static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 175{
 176    return arg1 < arg2 ? -1 : 0;
 177}
 178
 179static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 180{
 181    uint64_t u_arg1 = UNSIGNED(arg1, df);
 182    uint64_t u_arg2 = UNSIGNED(arg2, df);
 183    return u_arg1 < u_arg2 ? -1 : 0;
 184}
 185
 186static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 187{
 188    return arg1 > arg2 ? arg1 : arg2;
 189}
 190
 191static inline int64_t msa_max_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 192{
 193    uint64_t u_arg1 = UNSIGNED(arg1, df);
 194    uint64_t u_arg2 = UNSIGNED(arg2, df);
 195    return u_arg1 > u_arg2 ? arg1 : arg2;
 196}
 197
 198static inline int64_t msa_min_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 199{
 200    return arg1 < arg2 ? arg1 : arg2;
 201}
 202
 203static inline int64_t msa_min_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 204{
 205    uint64_t u_arg1 = UNSIGNED(arg1, df);
 206    uint64_t u_arg2 = UNSIGNED(arg2, df);
 207    return u_arg1 < u_arg2 ? arg1 : arg2;
 208}
 209
 210#define MSA_BINOP_IMM_DF(helper, func)                                  \
 211void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df,       \
 212                        uint32_t wd, uint32_t ws, int32_t u5)           \
 213{                                                                       \
 214    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 215    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 216    uint32_t i;                                                         \
 217                                                                        \
 218    switch (df) {                                                       \
 219    case DF_BYTE:                                                       \
 220        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
 221            pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5);         \
 222        }                                                               \
 223        break;                                                          \
 224    case DF_HALF:                                                       \
 225        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
 226            pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5);         \
 227        }                                                               \
 228        break;                                                          \
 229    case DF_WORD:                                                       \
 230        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
 231            pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5);         \
 232        }                                                               \
 233        break;                                                          \
 234    case DF_DOUBLE:                                                     \
 235        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
 236            pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5);         \
 237        }                                                               \
 238        break;                                                          \
 239    default:                                                            \
 240        assert(0);                                                      \
 241    }                                                                   \
 242}
 243
 244MSA_BINOP_IMM_DF(addvi, addv)
 245MSA_BINOP_IMM_DF(subvi, subv)
 246MSA_BINOP_IMM_DF(ceqi, ceq)
 247MSA_BINOP_IMM_DF(clei_s, cle_s)
 248MSA_BINOP_IMM_DF(clei_u, cle_u)
 249MSA_BINOP_IMM_DF(clti_s, clt_s)
 250MSA_BINOP_IMM_DF(clti_u, clt_u)
 251MSA_BINOP_IMM_DF(maxi_s, max_s)
 252MSA_BINOP_IMM_DF(maxi_u, max_u)
 253MSA_BINOP_IMM_DF(mini_s, min_s)
 254MSA_BINOP_IMM_DF(mini_u, min_u)
 255#undef MSA_BINOP_IMM_DF
 256
 257void helper_msa_ldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
 258                       int32_t s10)
 259{
 260    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
 261    uint32_t i;
 262
 263    switch (df) {
 264    case DF_BYTE:
 265        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
 266            pwd->b[i] = (int8_t)s10;
 267        }
 268        break;
 269    case DF_HALF:
 270        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
 271            pwd->h[i] = (int16_t)s10;
 272        }
 273        break;
 274    case DF_WORD:
 275        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
 276            pwd->w[i] = (int32_t)s10;
 277        }
 278        break;
 279    case DF_DOUBLE:
 280        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
 281            pwd->d[i] = (int64_t)s10;
 282        }
 283       break;
 284    default:
 285        assert(0);
 286    }
 287}
 288
 289/* Data format bit position and unsigned values */
 290#define BIT_POSITION(x, df) ((uint64_t)(x) % DF_BITS(df))
 291
 292static inline int64_t msa_sll_df(uint32_t df, int64_t arg1, int64_t arg2)
 293{
 294    int32_t b_arg2 = BIT_POSITION(arg2, df);
 295    return arg1 << b_arg2;
 296}
 297
 298static inline int64_t msa_sra_df(uint32_t df, int64_t arg1, int64_t arg2)
 299{
 300    int32_t b_arg2 = BIT_POSITION(arg2, df);
 301    return arg1 >> b_arg2;
 302}
 303
 304static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2)
 305{
 306    uint64_t u_arg1 = UNSIGNED(arg1, df);
 307    int32_t b_arg2 = BIT_POSITION(arg2, df);
 308    return u_arg1 >> b_arg2;
 309}
 310
 311static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
 312{
 313    int32_t b_arg2 = BIT_POSITION(arg2, df);
 314    return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
 315}
 316
 317static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
 318        int64_t arg2)
 319{
 320    int32_t b_arg2 = BIT_POSITION(arg2, df);
 321    return UNSIGNED(arg1 | (1LL << b_arg2), df);
 322}
 323
 324static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
 325{
 326    int32_t b_arg2 = BIT_POSITION(arg2, df);
 327    return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
 328}
 329
 330static inline int64_t msa_binsl_df(uint32_t df, int64_t dest, int64_t arg1,
 331                                   int64_t arg2)
 332{
 333    uint64_t u_arg1 = UNSIGNED(arg1, df);
 334    uint64_t u_dest = UNSIGNED(dest, df);
 335    int32_t sh_d = BIT_POSITION(arg2, df) + 1;
 336    int32_t sh_a = DF_BITS(df) - sh_d;
 337    if (sh_d == DF_BITS(df)) {
 338        return u_arg1;
 339    } else {
 340        return UNSIGNED(UNSIGNED(u_dest << sh_d, df) >> sh_d, df) |
 341               UNSIGNED(UNSIGNED(u_arg1 >> sh_a, df) << sh_a, df);
 342    }
 343}
 344
 345static inline int64_t msa_binsr_df(uint32_t df, int64_t dest, int64_t arg1,
 346                                   int64_t arg2)
 347{
 348    uint64_t u_arg1 = UNSIGNED(arg1, df);
 349    uint64_t u_dest = UNSIGNED(dest, df);
 350    int32_t sh_d = BIT_POSITION(arg2, df) + 1;
 351    int32_t sh_a = DF_BITS(df) - sh_d;
 352    if (sh_d == DF_BITS(df)) {
 353        return u_arg1;
 354    } else {
 355        return UNSIGNED(UNSIGNED(u_dest >> sh_d, df) << sh_d, df) |
 356               UNSIGNED(UNSIGNED(u_arg1 << sh_a, df) >> sh_a, df);
 357    }
 358}
 359
 360static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
 361{
 362    return arg < M_MIN_INT(m+1) ? M_MIN_INT(m+1) :
 363                                  arg > M_MAX_INT(m+1) ? M_MAX_INT(m+1) :
 364                                                         arg;
 365}
 366
 367static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m)
 368{
 369    uint64_t u_arg = UNSIGNED(arg, df);
 370    return  u_arg < M_MAX_UINT(m+1) ? u_arg :
 371                                      M_MAX_UINT(m+1);
 372}
 373
 374static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2)
 375{
 376    int32_t b_arg2 = BIT_POSITION(arg2, df);
 377    if (b_arg2 == 0) {
 378        return arg1;
 379    } else {
 380        int64_t r_bit = (arg1 >> (b_arg2 - 1)) & 1;
 381        return (arg1 >> b_arg2) + r_bit;
 382    }
 383}
 384
 385static inline int64_t msa_srlr_df(uint32_t df, int64_t arg1, int64_t arg2)
 386{
 387    uint64_t u_arg1 = UNSIGNED(arg1, df);
 388    int32_t b_arg2 = BIT_POSITION(arg2, df);
 389    if (b_arg2 == 0) {
 390        return u_arg1;
 391    } else {
 392        uint64_t r_bit = (u_arg1 >> (b_arg2 - 1)) & 1;
 393        return (u_arg1 >> b_arg2) + r_bit;
 394    }
 395}
 396
 397#define MSA_BINOP_IMMU_DF(helper, func)                                  \
 398void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
 399                       uint32_t ws, uint32_t u5)                        \
 400{                                                                       \
 401    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 402    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 403    uint32_t i;                                                         \
 404                                                                        \
 405    switch (df) {                                                       \
 406    case DF_BYTE:                                                       \
 407        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
 408            pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5);         \
 409        }                                                               \
 410        break;                                                          \
 411    case DF_HALF:                                                       \
 412        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
 413            pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5);         \
 414        }                                                               \
 415        break;                                                          \
 416    case DF_WORD:                                                       \
 417        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
 418            pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5);         \
 419        }                                                               \
 420        break;                                                          \
 421    case DF_DOUBLE:                                                     \
 422        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
 423            pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5);         \
 424        }                                                               \
 425        break;                                                          \
 426    default:                                                            \
 427        assert(0);                                                      \
 428    }                                                                   \
 429}
 430
 431MSA_BINOP_IMMU_DF(slli, sll)
 432MSA_BINOP_IMMU_DF(srai, sra)
 433MSA_BINOP_IMMU_DF(srli, srl)
 434MSA_BINOP_IMMU_DF(bclri, bclr)
 435MSA_BINOP_IMMU_DF(bseti, bset)
 436MSA_BINOP_IMMU_DF(bnegi, bneg)
 437MSA_BINOP_IMMU_DF(sat_s, sat_s)
 438MSA_BINOP_IMMU_DF(sat_u, sat_u)
 439MSA_BINOP_IMMU_DF(srari, srar)
 440MSA_BINOP_IMMU_DF(srlri, srlr)
 441#undef MSA_BINOP_IMMU_DF
 442
 443#define MSA_TEROP_IMMU_DF(helper, func)                                  \
 444void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df,       \
 445                                  uint32_t wd, uint32_t ws, uint32_t u5) \
 446{                                                                       \
 447    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 448    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 449    uint32_t i;                                                         \
 450                                                                        \
 451    switch (df) {                                                       \
 452    case DF_BYTE:                                                       \
 453        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
 454            pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i],   \
 455                                            u5);                        \
 456        }                                                               \
 457        break;                                                          \
 458    case DF_HALF:                                                       \
 459        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
 460            pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i],   \
 461                                            u5);                        \
 462        }                                                               \
 463        break;                                                          \
 464    case DF_WORD:                                                       \
 465        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
 466            pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i],   \
 467                                            u5);                        \
 468        }                                                               \
 469        break;                                                          \
 470    case DF_DOUBLE:                                                     \
 471        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
 472            pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i],   \
 473                                            u5);                        \
 474        }                                                               \
 475        break;                                                          \
 476    default:                                                            \
 477        assert(0);                                                      \
 478    }                                                                   \
 479}
 480
 481MSA_TEROP_IMMU_DF(binsli, binsl)
 482MSA_TEROP_IMMU_DF(binsri, binsr)
 483#undef MSA_TEROP_IMMU_DF
 484
 485static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2)
 486{
 487    uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
 488    uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
 489    return abs_arg1 > abs_arg2 ? arg1 : arg2;
 490}
 491
 492static inline int64_t msa_min_a_df(uint32_t df, int64_t arg1, int64_t arg2)
 493{
 494    uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
 495    uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
 496    return abs_arg1 < abs_arg2 ? arg1 : arg2;
 497}
 498
 499static inline int64_t msa_add_a_df(uint32_t df, int64_t arg1, int64_t arg2)
 500{
 501    uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
 502    uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
 503    return abs_arg1 + abs_arg2;
 504}
 505
 506static inline int64_t msa_adds_a_df(uint32_t df, int64_t arg1, int64_t arg2)
 507{
 508    uint64_t max_int = (uint64_t)DF_MAX_INT(df);
 509    uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
 510    uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
 511    if (abs_arg1 > max_int || abs_arg2 > max_int) {
 512        return (int64_t)max_int;
 513    } else {
 514        return (abs_arg1 < max_int - abs_arg2) ? abs_arg1 + abs_arg2 : max_int;
 515    }
 516}
 517
 518static inline int64_t msa_adds_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 519{
 520    int64_t max_int = DF_MAX_INT(df);
 521    int64_t min_int = DF_MIN_INT(df);
 522    if (arg1 < 0) {
 523        return (min_int - arg1 < arg2) ? arg1 + arg2 : min_int;
 524    } else {
 525        return (arg2 < max_int - arg1) ? arg1 + arg2 : max_int;
 526    }
 527}
 528
 529static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
 530{
 531    uint64_t max_uint = DF_MAX_UINT(df);
 532    uint64_t u_arg1 = UNSIGNED(arg1, df);
 533    uint64_t u_arg2 = UNSIGNED(arg2, df);
 534    return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
 535}
 536
 537static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 538{
 539    /* signed shift */
 540    return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
 541}
 542
 543static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
 544{
 545    uint64_t u_arg1 = UNSIGNED(arg1, df);
 546    uint64_t u_arg2 = UNSIGNED(arg2, df);
 547    /* unsigned shift */
 548    return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
 549}
 550
 551static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 552{
 553    /* signed shift */
 554    return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
 555}
 556
 557static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
 558{
 559    uint64_t u_arg1 = UNSIGNED(arg1, df);
 560    uint64_t u_arg2 = UNSIGNED(arg2, df);
 561    /* unsigned shift */
 562    return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
 563}
 564
 565static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 566{
 567    int64_t max_int = DF_MAX_INT(df);
 568    int64_t min_int = DF_MIN_INT(df);
 569    if (arg2 > 0) {
 570        return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
 571    } else {
 572        return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
 573    }
 574}
 575
 576static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 577{
 578    uint64_t u_arg1 = UNSIGNED(arg1, df);
 579    uint64_t u_arg2 = UNSIGNED(arg2, df);
 580    return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
 581}
 582
 583static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 584{
 585    uint64_t u_arg1 = UNSIGNED(arg1, df);
 586    uint64_t max_uint = DF_MAX_UINT(df);
 587    if (arg2 >= 0) {
 588        uint64_t u_arg2 = (uint64_t)arg2;
 589        return (u_arg1 > u_arg2) ?
 590            (int64_t)(u_arg1 - u_arg2) :
 591            0;
 592    } else {
 593        uint64_t u_arg2 = (uint64_t)(-arg2);
 594        return (u_arg1 < max_uint - u_arg2) ?
 595            (int64_t)(u_arg1 + u_arg2) :
 596            (int64_t)max_uint;
 597    }
 598}
 599
 600static inline int64_t msa_subsuu_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 601{
 602    uint64_t u_arg1 = UNSIGNED(arg1, df);
 603    uint64_t u_arg2 = UNSIGNED(arg2, df);
 604    int64_t max_int = DF_MAX_INT(df);
 605    int64_t min_int = DF_MIN_INT(df);
 606    if (u_arg1 > u_arg2) {
 607        return u_arg1 - u_arg2 < (uint64_t)max_int ?
 608            (int64_t)(u_arg1 - u_arg2) :
 609            max_int;
 610    } else {
 611        return u_arg2 - u_arg1 < (uint64_t)(-min_int) ?
 612            (int64_t)(u_arg1 - u_arg2) :
 613            min_int;
 614    }
 615}
 616
 617static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 618{
 619    /* signed compare */
 620    return (arg1 < arg2) ?
 621        (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
 622}
 623
 624static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
 625{
 626    uint64_t u_arg1 = UNSIGNED(arg1, df);
 627    uint64_t u_arg2 = UNSIGNED(arg2, df);
 628    /* unsigned compare */
 629    return (u_arg1 < u_arg2) ?
 630        (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
 631}
 632
 633static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2)
 634{
 635    return arg1 * arg2;
 636}
 637
 638static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 639{
 640    if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
 641        return DF_MIN_INT(df);
 642    }
 643    return arg2 ? arg1 / arg2 : 0;
 644}
 645
 646static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 647{
 648    uint64_t u_arg1 = UNSIGNED(arg1, df);
 649    uint64_t u_arg2 = UNSIGNED(arg2, df);
 650    return u_arg2 ? u_arg1 / u_arg2 : 0;
 651}
 652
 653static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 654{
 655    if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
 656        return 0;
 657    }
 658    return arg2 ? arg1 % arg2 : 0;
 659}
 660
 661static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 662{
 663    uint64_t u_arg1 = UNSIGNED(arg1, df);
 664    uint64_t u_arg2 = UNSIGNED(arg2, df);
 665    return u_arg2 ? u_arg1 % u_arg2 : 0;
 666}
 667
 668#define SIGNED_EVEN(a, df) \
 669        ((((int64_t)(a)) << (64 - DF_BITS(df)/2)) >> (64 - DF_BITS(df)/2))
 670
 671#define UNSIGNED_EVEN(a, df) \
 672        ((((uint64_t)(a)) << (64 - DF_BITS(df)/2)) >> (64 - DF_BITS(df)/2))
 673
 674#define SIGNED_ODD(a, df) \
 675        ((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)/2))
 676
 677#define UNSIGNED_ODD(a, df) \
 678        ((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)/2))
 679
 680#define SIGNED_EXTRACT(e, o, a, df)     \
 681    do {                                \
 682        e = SIGNED_EVEN(a, df);         \
 683        o = SIGNED_ODD(a, df);          \
 684    } while (0);
 685
 686#define UNSIGNED_EXTRACT(e, o, a, df)   \
 687    do {                                \
 688        e = UNSIGNED_EVEN(a, df);       \
 689        o = UNSIGNED_ODD(a, df);        \
 690    } while (0);
 691
 692static inline int64_t msa_dotp_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 693{
 694    int64_t even_arg1;
 695    int64_t even_arg2;
 696    int64_t odd_arg1;
 697    int64_t odd_arg2;
 698    SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 699    SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 700    return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
 701}
 702
 703static inline int64_t msa_dotp_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 704{
 705    int64_t even_arg1;
 706    int64_t even_arg2;
 707    int64_t odd_arg1;
 708    int64_t odd_arg2;
 709    UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 710    UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 711    return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
 712}
 713
 714#define CONCATENATE_AND_SLIDE(s, k)             \
 715    do {                                        \
 716        for (i = 0; i < s; i++) {               \
 717            v[i]     = pws->b[s * k + i];       \
 718            v[i + s] = pwd->b[s * k + i];       \
 719        }                                       \
 720        for (i = 0; i < s; i++) {               \
 721            pwd->b[s * k + i] = v[i + n];       \
 722        }                                       \
 723    } while (0)
 724
 725static inline void msa_sld_df(uint32_t df, wr_t *pwd,
 726                              wr_t *pws, target_ulong rt)
 727{
 728    uint32_t n = rt % DF_ELEMENTS(df);
 729    uint8_t v[64];
 730    uint32_t i, k;
 731
 732    switch (df) {
 733    case DF_BYTE:
 734        CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_BYTE), 0);
 735        break;
 736    case DF_HALF:
 737        for (k = 0; k < 2; k++) {
 738            CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_HALF), k);
 739        }
 740        break;
 741    case DF_WORD:
 742        for (k = 0; k < 4; k++) {
 743            CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_WORD), k);
 744        }
 745        break;
 746    case DF_DOUBLE:
 747        for (k = 0; k < 8; k++) {
 748            CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_DOUBLE), k);
 749        }
 750        break;
 751    default:
 752        assert(0);
 753    }
 754}
 755
 756static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 757{
 758    return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
 759}
 760
 761static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 762{
 763    return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
 764}
 765
 766static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
 767{
 768    return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
 769}
 770
 771static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
 772{
 773    return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
 774}
 775
 776static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2)
 777{
 778    int64_t q_min = DF_MIN_INT(df);
 779    int64_t q_max = DF_MAX_INT(df);
 780
 781    if (arg1 == q_min && arg2 == q_min) {
 782        return q_max;
 783    }
 784    return (arg1 * arg2) >> (DF_BITS(df) - 1);
 785}
 786
 787static inline int64_t msa_mulr_q_df(uint32_t df, int64_t arg1, int64_t arg2)
 788{
 789    int64_t q_min = DF_MIN_INT(df);
 790    int64_t q_max = DF_MAX_INT(df);
 791    int64_t r_bit = 1 << (DF_BITS(df) - 2);
 792
 793    if (arg1 == q_min && arg2 == q_min) {
 794        return q_max;
 795    }
 796    return (arg1 * arg2 + r_bit) >> (DF_BITS(df) - 1);
 797}
 798
 799#define MSA_BINOP_DF(func) \
 800void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df,         \
 801                                uint32_t wd, uint32_t ws, uint32_t wt)  \
 802{                                                                       \
 803    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
 804    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
 805    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);                          \
 806    uint32_t i;                                                         \
 807                                                                        \
 808    switch (df) {                                                       \
 809    case DF_BYTE:                                                       \
 810        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
 811            pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], pwt->b[i]);  \
 812        }                                                               \
 813        break;                                                          \
 814    case DF_HALF:                                                       \
 815        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
 816            pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], pwt->h[i]);  \
 817        }                                                               \
 818        break;                                                          \
 819    case DF_WORD:                                                       \
 820        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
 821            pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], pwt->w[i]);  \
 822        }                                                               \
 823        break;                                                          \
 824    case DF_DOUBLE:                                                     \
 825        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
 826            pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], pwt->d[i]);  \
 827        }                                                               \
 828        break;                                                          \
 829    default:                                                            \
 830        assert(0);                                                      \
 831    }                                                                   \
 832}
 833
 834MSA_BINOP_DF(sll)
 835MSA_BINOP_DF(sra)
 836MSA_BINOP_DF(srl)
 837MSA_BINOP_DF(bclr)
 838MSA_BINOP_DF(bset)
 839MSA_BINOP_DF(bneg)
 840MSA_BINOP_DF(addv)
 841MSA_BINOP_DF(subv)
 842MSA_BINOP_DF(max_s)
 843MSA_BINOP_DF(max_u)
 844MSA_BINOP_DF(min_s)
 845MSA_BINOP_DF(min_u)
 846MSA_BINOP_DF(max_a)
 847MSA_BINOP_DF(min_a)
 848MSA_BINOP_DF(ceq)
 849MSA_BINOP_DF(clt_s)
 850MSA_BINOP_DF(clt_u)
 851MSA_BINOP_DF(cle_s)
 852MSA_BINOP_DF(cle_u)
 853MSA_BINOP_DF(add_a)
 854MSA_BINOP_DF(adds_a)
 855MSA_BINOP_DF(adds_s)
 856MSA_BINOP_DF(adds_u)
 857MSA_BINOP_DF(ave_s)
 858MSA_BINOP_DF(ave_u)
 859MSA_BINOP_DF(aver_s)
 860MSA_BINOP_DF(aver_u)
 861MSA_BINOP_DF(subs_s)
 862MSA_BINOP_DF(subs_u)
 863MSA_BINOP_DF(subsus_u)
 864MSA_BINOP_DF(subsuu_s)
 865MSA_BINOP_DF(asub_s)
 866MSA_BINOP_DF(asub_u)
 867MSA_BINOP_DF(mulv)
 868MSA_BINOP_DF(div_s)
 869MSA_BINOP_DF(div_u)
 870MSA_BINOP_DF(mod_s)
 871MSA_BINOP_DF(mod_u)
 872MSA_BINOP_DF(dotp_s)
 873MSA_BINOP_DF(dotp_u)
 874MSA_BINOP_DF(srar)
 875MSA_BINOP_DF(srlr)
 876MSA_BINOP_DF(hadd_s)
 877MSA_BINOP_DF(hadd_u)
 878MSA_BINOP_DF(hsub_s)
 879MSA_BINOP_DF(hsub_u)
 880
 881MSA_BINOP_DF(mul_q)
 882MSA_BINOP_DF(mulr_q)
 883#undef MSA_BINOP_DF
 884
 885void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
 886                       uint32_t ws, uint32_t rt)
 887{
 888    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
 889    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
 890
 891    msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]);
 892}
 893
 894static inline int64_t msa_maddv_df(uint32_t df, int64_t dest, int64_t arg1,
 895                                   int64_t arg2)
 896{
 897    return dest + arg1 * arg2;
 898}
 899
 900static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
 901                                   int64_t arg2)
 902{
 903    return dest - arg1 * arg2;
 904}
 905
 906static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1,
 907                                     int64_t arg2)
 908{
 909    int64_t even_arg1;
 910    int64_t even_arg2;
 911    int64_t odd_arg1;
 912    int64_t odd_arg2;
 913    SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 914    SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 915    return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
 916}
 917
 918static inline int64_t msa_dpadd_u_df(uint32_t df, int64_t dest, int64_t arg1,
 919                                     int64_t arg2)
 920{
 921    int64_t even_arg1;
 922    int64_t even_arg2;
 923    int64_t odd_arg1;
 924    int64_t odd_arg2;
 925    UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 926    UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 927    return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
 928}
 929
 930static inline int64_t msa_dpsub_s_df(uint32_t df, int64_t dest, int64_t arg1,
 931                                     int64_t arg2)
 932{
 933    int64_t even_arg1;
 934    int64_t even_arg2;
 935    int64_t odd_arg1;
 936    int64_t odd_arg2;
 937    SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 938    SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 939    return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
 940}
 941
 942static inline int64_t msa_dpsub_u_df(uint32_t df, int64_t dest, int64_t arg1,
 943                                     int64_t arg2)
 944{
 945    int64_t even_arg1;
 946    int64_t even_arg2;
 947    int64_t odd_arg1;
 948    int64_t odd_arg2;
 949    UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
 950    UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
 951    return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
 952}
 953
 954static inline int64_t msa_madd_q_df(uint32_t df, int64_t dest, int64_t arg1,
 955                                    int64_t arg2)
 956{
 957    int64_t q_prod, q_ret;
 958
 959    int64_t q_max = DF_MAX_INT(df);
 960    int64_t q_min = DF_MIN_INT(df);
 961
 962    q_prod = arg1 * arg2;
 963    q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod) >> (DF_BITS(df) - 1);
 964
 965    return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
 966}
 967
 968static inline int64_t msa_msub_q_df(uint32_t df, int64_t dest, int64_t arg1,
 969                                    int64_t arg2)
 970{
 971    int64_t q_prod, q_ret;
 972
 973    int64_t q_max = DF_MAX_INT(df);
 974    int64_t q_min = DF_MIN_INT(df);
 975
 976    q_prod = arg1 * arg2;
 977    q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod) >> (DF_BITS(df) - 1);
 978
 979    return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
 980}
 981
 982static inline int64_t msa_maddr_q_df(uint32_t df, int64_t dest, int64_t arg1,
 983                                     int64_t arg2)
 984{
 985    int64_t q_prod, q_ret;
 986
 987    int64_t q_max = DF_MAX_INT(df);
 988    int64_t q_min = DF_MIN_INT(df);
 989    int64_t r_bit = 1 << (DF_BITS(df) - 2);
 990
 991    q_prod = arg1 * arg2;
 992    q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod + r_bit) >> (DF_BITS(df) - 1);
 993
 994    return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
 995}
 996
 997static inline int64_t msa_msubr_q_df(uint32_t df, int64_t dest, int64_t arg1,
 998                                     int64_t arg2)
 999{
1000    int64_t q_prod, q_ret;
1001
1002    int64_t q_max = DF_MAX_INT(df);
1003    int64_t q_min = DF_MIN_INT(df);
1004    int64_t r_bit = 1 << (DF_BITS(df) - 2);
1005
1006    q_prod = arg1 * arg2;
1007    q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod + r_bit) >> (DF_BITS(df) - 1);
1008
1009    return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
1010}
1011
1012#define MSA_TEROP_DF(func) \
1013void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd,   \
1014                          uint32_t ws, uint32_t wt)                     \
1015{                                                                       \
1016    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
1017    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
1018    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);                          \
1019    uint32_t i;                                                         \
1020                                                                        \
1021    switch (df) {                                                       \
1022    case DF_BYTE:                                                       \
1023        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
1024            pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i],   \
1025                                            pwt->b[i]);                 \
1026        }                                                               \
1027        break;                                                          \
1028    case DF_HALF:                                                       \
1029        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
1030            pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i],   \
1031                                            pwt->h[i]);                 \
1032        }                                                               \
1033        break;                                                          \
1034    case DF_WORD:                                                       \
1035        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
1036            pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i],   \
1037                                            pwt->w[i]);                 \
1038        }                                                               \
1039        break;                                                          \
1040    case DF_DOUBLE:                                                     \
1041        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
1042            pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i],   \
1043                                            pwt->d[i]);                 \
1044        }                                                               \
1045        break;                                                          \
1046    default:                                                            \
1047        assert(0);                                                      \
1048    }                                                                   \
1049}
1050
1051MSA_TEROP_DF(maddv)
1052MSA_TEROP_DF(msubv)
1053MSA_TEROP_DF(dpadd_s)
1054MSA_TEROP_DF(dpadd_u)
1055MSA_TEROP_DF(dpsub_s)
1056MSA_TEROP_DF(dpsub_u)
1057MSA_TEROP_DF(binsl)
1058MSA_TEROP_DF(binsr)
1059MSA_TEROP_DF(madd_q)
1060MSA_TEROP_DF(msub_q)
1061MSA_TEROP_DF(maddr_q)
1062MSA_TEROP_DF(msubr_q)
1063#undef MSA_TEROP_DF
1064
1065static inline void msa_splat_df(uint32_t df, wr_t *pwd,
1066                                wr_t *pws, target_ulong rt)
1067{
1068    uint32_t n = rt % DF_ELEMENTS(df);
1069    uint32_t i;
1070
1071    switch (df) {
1072    case DF_BYTE:
1073        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
1074            pwd->b[i] = pws->b[n];
1075        }
1076        break;
1077    case DF_HALF:
1078        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
1079            pwd->h[i] = pws->h[n];
1080        }
1081        break;
1082    case DF_WORD:
1083        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1084            pwd->w[i] = pws->w[n];
1085        }
1086        break;
1087    case DF_DOUBLE:
1088        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1089            pwd->d[i] = pws->d[n];
1090        }
1091       break;
1092    default:
1093        assert(0);
1094    }
1095}
1096
1097void helper_msa_splat_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1098                         uint32_t ws, uint32_t rt)
1099{
1100    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1101    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1102
1103    msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]);
1104}
1105
1106#define MSA_DO_B MSA_DO(b)
1107#define MSA_DO_H MSA_DO(h)
1108#define MSA_DO_W MSA_DO(w)
1109#define MSA_DO_D MSA_DO(d)
1110
1111#define MSA_LOOP_B MSA_LOOP(B)
1112#define MSA_LOOP_H MSA_LOOP(H)
1113#define MSA_LOOP_W MSA_LOOP(W)
1114#define MSA_LOOP_D MSA_LOOP(D)
1115
1116#define MSA_LOOP_COND_B MSA_LOOP_COND(DF_BYTE)
1117#define MSA_LOOP_COND_H MSA_LOOP_COND(DF_HALF)
1118#define MSA_LOOP_COND_W MSA_LOOP_COND(DF_WORD)
1119#define MSA_LOOP_COND_D MSA_LOOP_COND(DF_DOUBLE)
1120
1121#define MSA_LOOP(DF) \
1122        for (i = 0; i < (MSA_LOOP_COND_ ## DF) ; i++) { \
1123            MSA_DO_ ## DF \
1124        }
1125
1126#define MSA_FN_DF(FUNC)                                             \
1127void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \
1128        uint32_t ws, uint32_t wt)                                   \
1129{                                                                   \
1130    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                      \
1131    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                      \
1132    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);                      \
1133    wr_t wx, *pwx = &wx;                                            \
1134    uint32_t i;                                                     \
1135    switch (df) {                                                   \
1136    case DF_BYTE:                                                   \
1137        MSA_LOOP_B                                                  \
1138        break;                                                      \
1139    case DF_HALF:                                                   \
1140        MSA_LOOP_H                                                  \
1141        break;                                                      \
1142    case DF_WORD:                                                   \
1143        MSA_LOOP_W                                                  \
1144        break;                                                      \
1145    case DF_DOUBLE:                                                 \
1146        MSA_LOOP_D                                                  \
1147       break;                                                       \
1148    default:                                                        \
1149        assert(0);                                                  \
1150    }                                                               \
1151    msa_move_v(pwd, pwx);                                           \
1152}
1153
1154#define MSA_LOOP_COND(DF) \
1155            (DF_ELEMENTS(DF) / 2)
1156
1157#define Rb(pwr, i) (pwr->b[i])
1158#define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE)/2])
1159#define Rh(pwr, i) (pwr->h[i])
1160#define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF)/2])
1161#define Rw(pwr, i) (pwr->w[i])
1162#define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD)/2])
1163#define Rd(pwr, i) (pwr->d[i])
1164#define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE)/2])
1165
1166#define MSA_DO(DF)                      \
1167    do {                                \
1168        R##DF(pwx, i) = pwt->DF[2*i];   \
1169        L##DF(pwx, i) = pws->DF[2*i];   \
1170    } while (0);
1171MSA_FN_DF(pckev_df)
1172#undef MSA_DO
1173
1174#define MSA_DO(DF)                      \
1175    do {                                \
1176        R##DF(pwx, i) = pwt->DF[2*i+1]; \
1177        L##DF(pwx, i) = pws->DF[2*i+1]; \
1178    } while (0);
1179MSA_FN_DF(pckod_df)
1180#undef MSA_DO
1181
1182#define MSA_DO(DF)                      \
1183    do {                                \
1184        pwx->DF[2*i]   = L##DF(pwt, i); \
1185        pwx->DF[2*i+1] = L##DF(pws, i); \
1186    } while (0);
1187MSA_FN_DF(ilvl_df)
1188#undef MSA_DO
1189
1190#define MSA_DO(DF)                      \
1191    do {                                \
1192        pwx->DF[2*i]   = R##DF(pwt, i); \
1193        pwx->DF[2*i+1] = R##DF(pws, i); \
1194    } while (0);
1195MSA_FN_DF(ilvr_df)
1196#undef MSA_DO
1197
1198#define MSA_DO(DF)                      \
1199    do {                                \
1200        pwx->DF[2*i]   = pwt->DF[2*i];  \
1201        pwx->DF[2*i+1] = pws->DF[2*i];  \
1202    } while (0);
1203MSA_FN_DF(ilvev_df)
1204#undef MSA_DO
1205
1206#define MSA_DO(DF)                          \
1207    do {                                    \
1208        pwx->DF[2*i]   = pwt->DF[2*i+1];    \
1209        pwx->DF[2*i+1] = pws->DF[2*i+1];    \
1210    } while (0);
1211MSA_FN_DF(ilvod_df)
1212#undef MSA_DO
1213#undef MSA_LOOP_COND
1214
1215#define MSA_LOOP_COND(DF) \
1216            (DF_ELEMENTS(DF))
1217
1218#define MSA_DO(DF)                                                          \
1219    do {                                                                    \
1220        uint32_t n = DF_ELEMENTS(df);                                       \
1221        uint32_t k = (pwd->DF[i] & 0x3f) % (2 * n);                         \
1222        pwx->DF[i] =                                                        \
1223            (pwd->DF[i] & 0xc0) ? 0 : k < n ? pwt->DF[k] : pws->DF[k - n];  \
1224    } while (0);
1225MSA_FN_DF(vshf_df)
1226#undef MSA_DO
1227#undef MSA_LOOP_COND
1228#undef MSA_FN_DF
1229
1230void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1231                        uint32_t ws, uint32_t n)
1232{
1233    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1234    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1235
1236    msa_sld_df(df, pwd, pws, n);
1237}
1238
1239void helper_msa_splati_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1240                          uint32_t ws, uint32_t n)
1241{
1242    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1243    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1244
1245    msa_splat_df(df, pwd, pws, n);
1246}
1247
1248void helper_msa_copy_s_df(CPUMIPSState *env, uint32_t df, uint32_t rd,
1249                          uint32_t ws, uint32_t n)
1250{
1251    n %= DF_ELEMENTS(df);
1252
1253    switch (df) {
1254    case DF_BYTE:
1255        env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n];
1256        break;
1257    case DF_HALF:
1258        env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n];
1259        break;
1260    case DF_WORD:
1261        env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n];
1262        break;
1263#ifdef TARGET_MIPS64
1264    case DF_DOUBLE:
1265        env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n];
1266        break;
1267#endif
1268    default:
1269        assert(0);
1270    }
1271}
1272
1273void helper_msa_copy_u_df(CPUMIPSState *env, uint32_t df, uint32_t rd,
1274                          uint32_t ws, uint32_t n)
1275{
1276    n %= DF_ELEMENTS(df);
1277
1278    switch (df) {
1279    case DF_BYTE:
1280        env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n];
1281        break;
1282    case DF_HALF:
1283        env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n];
1284        break;
1285    case DF_WORD:
1286        env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];
1287        break;
1288#ifdef TARGET_MIPS64
1289    case DF_DOUBLE:
1290        env->active_tc.gpr[rd] = (uint64_t)env->active_fpu.fpr[ws].wr.d[n];
1291        break;
1292#endif
1293    default:
1294        assert(0);
1295    }
1296}
1297
1298void helper_msa_insert_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1299                          uint32_t rs_num, uint32_t n)
1300{
1301    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1302    target_ulong rs = env->active_tc.gpr[rs_num];
1303
1304    switch (df) {
1305    case DF_BYTE:
1306        pwd->b[n] = (int8_t)rs;
1307        break;
1308    case DF_HALF:
1309        pwd->h[n] = (int16_t)rs;
1310        break;
1311    case DF_WORD:
1312        pwd->w[n] = (int32_t)rs;
1313        break;
1314    case DF_DOUBLE:
1315        pwd->d[n] = (int64_t)rs;
1316        break;
1317    default:
1318        assert(0);
1319    }
1320}
1321
1322void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1323                         uint32_t ws, uint32_t n)
1324{
1325    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1326    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1327
1328    switch (df) {
1329    case DF_BYTE:
1330        pwd->b[n] = (int8_t)pws->b[0];
1331        break;
1332    case DF_HALF:
1333        pwd->h[n] = (int16_t)pws->h[0];
1334        break;
1335    case DF_WORD:
1336        pwd->w[n] = (int32_t)pws->w[0];
1337        break;
1338    case DF_DOUBLE:
1339        pwd->d[n] = (int64_t)pws->d[0];
1340        break;
1341    default:
1342        assert(0);
1343    }
1344}
1345
1346void helper_msa_ctcmsa(CPUMIPSState *env, target_ulong elm, uint32_t cd)
1347{
1348    switch (cd) {
1349    case 0:
1350        break;
1351    case 1:
1352        env->active_tc.msacsr = (int32_t)elm & MSACSR_MASK;
1353        restore_msa_fp_status(env);
1354        /* check exception */
1355        if ((GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)
1356            & GET_FP_CAUSE(env->active_tc.msacsr)) {
1357            do_raise_exception(env, EXCP_MSAFPE, GETPC());
1358        }
1359        break;
1360    }
1361}
1362
1363target_ulong helper_msa_cfcmsa(CPUMIPSState *env, uint32_t cs)
1364{
1365    switch (cs) {
1366    case 0:
1367        return env->msair;
1368    case 1:
1369        return env->active_tc.msacsr & MSACSR_MASK;
1370    }
1371    return 0;
1372}
1373
1374void helper_msa_move_v(CPUMIPSState *env, uint32_t wd, uint32_t ws)
1375{
1376    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1377    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1378
1379    msa_move_v(pwd, pws);
1380}
1381
1382static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
1383{
1384    uint64_t x;
1385
1386    x = UNSIGNED(arg, df);
1387
1388    x = (x & 0x5555555555555555ULL) + ((x >>  1) & 0x5555555555555555ULL);
1389    x = (x & 0x3333333333333333ULL) + ((x >>  2) & 0x3333333333333333ULL);
1390    x = (x & 0x0F0F0F0F0F0F0F0FULL) + ((x >>  4) & 0x0F0F0F0F0F0F0F0FULL);
1391    x = (x & 0x00FF00FF00FF00FFULL) + ((x >>  8) & 0x00FF00FF00FF00FFULL);
1392    x = (x & 0x0000FFFF0000FFFFULL) + ((x >> 16) & 0x0000FFFF0000FFFFULL);
1393    x = (x & 0x00000000FFFFFFFFULL) + ((x >> 32));
1394
1395    return x;
1396}
1397
1398static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
1399{
1400    uint64_t x, y;
1401    int n, c;
1402
1403    x = UNSIGNED(arg, df);
1404    n = DF_BITS(df);
1405    c = DF_BITS(df) / 2;
1406
1407    do {
1408        y = x >> c;
1409        if (y != 0) {
1410            n = n - c;
1411            x = y;
1412        }
1413        c = c >> 1;
1414    } while (c != 0);
1415
1416    return n - x;
1417}
1418
1419static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
1420{
1421    return msa_nlzc_df(df, UNSIGNED((~arg), df));
1422}
1423
1424void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
1425                        uint32_t rs)
1426{
1427    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1428    uint32_t i;
1429
1430    switch (df) {
1431    case DF_BYTE:
1432        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
1433            pwd->b[i] = (int8_t)env->active_tc.gpr[rs];
1434        }
1435        break;
1436    case DF_HALF:
1437        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
1438            pwd->h[i] = (int16_t)env->active_tc.gpr[rs];
1439        }
1440        break;
1441    case DF_WORD:
1442        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1443            pwd->w[i] = (int32_t)env->active_tc.gpr[rs];
1444        }
1445        break;
1446    case DF_DOUBLE:
1447        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1448            pwd->d[i] = (int64_t)env->active_tc.gpr[rs];
1449        }
1450       break;
1451    default:
1452        assert(0);
1453    }
1454}
1455
1456#define MSA_UNOP_DF(func) \
1457void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df,         \
1458                              uint32_t wd, uint32_t ws)                 \
1459{                                                                       \
1460    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);                          \
1461    wr_t *pws = &(env->active_fpu.fpr[ws].wr);                          \
1462    uint32_t i;                                                         \
1463                                                                        \
1464    switch (df) {                                                       \
1465    case DF_BYTE:                                                       \
1466        for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {                    \
1467            pwd->b[i] = msa_ ## func ## _df(df, pws->b[i]);             \
1468        }                                                               \
1469        break;                                                          \
1470    case DF_HALF:                                                       \
1471        for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {                    \
1472            pwd->h[i] = msa_ ## func ## _df(df, pws->h[i]);             \
1473        }                                                               \
1474        break;                                                          \
1475    case DF_WORD:                                                       \
1476        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {                    \
1477            pwd->w[i] = msa_ ## func ## _df(df, pws->w[i]);             \
1478        }                                                               \
1479        break;                                                          \
1480    case DF_DOUBLE:                                                     \
1481        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {                  \
1482            pwd->d[i] = msa_ ## func ## _df(df, pws->d[i]);             \
1483        }                                                               \
1484        break;                                                          \
1485    default:                                                            \
1486        assert(0);                                                      \
1487    }                                                                   \
1488}
1489
1490MSA_UNOP_DF(nlzc)
1491MSA_UNOP_DF(nloc)
1492MSA_UNOP_DF(pcnt)
1493#undef MSA_UNOP_DF
1494
1495#define FLOAT_ONE32 make_float32(0x3f8 << 20)
1496#define FLOAT_ONE64 make_float64(0x3ffULL << 52)
1497
1498#define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220)
1499        /* 0x7c20 */
1500#define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020)
1501        /* 0x7f800020 */
1502#define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL)
1503        /* 0x7ff0000000000020 */
1504
1505static inline void clear_msacsr_cause(CPUMIPSState *env)
1506{
1507    SET_FP_CAUSE(env->active_tc.msacsr, 0);
1508}
1509
1510static inline void check_msacsr_cause(CPUMIPSState *env, uintptr_t retaddr)
1511{
1512    if ((GET_FP_CAUSE(env->active_tc.msacsr) &
1513            (GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)) == 0) {
1514        UPDATE_FP_FLAGS(env->active_tc.msacsr,
1515                GET_FP_CAUSE(env->active_tc.msacsr));
1516    } else {
1517        do_raise_exception(env, EXCP_MSAFPE, retaddr);
1518    }
1519}
1520
1521/* Flush-to-zero use cases for update_msacsr() */
1522#define CLEAR_FS_UNDERFLOW 1
1523#define CLEAR_IS_INEXACT   2
1524#define RECIPROCAL_INEXACT 4
1525
1526static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
1527{
1528    int ieee_ex;
1529
1530    int c;
1531    int cause;
1532    int enable;
1533
1534    ieee_ex = get_float_exception_flags(&env->active_tc.msa_fp_status);
1535
1536    /* QEMU softfloat does not signal all underflow cases */
1537    if (denormal) {
1538        ieee_ex |= float_flag_underflow;
1539    }
1540
1541    c = ieee_ex_to_mips(ieee_ex);
1542    enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
1543
1544    /* Set Inexact (I) when flushing inputs to zero */
1545    if ((ieee_ex & float_flag_input_denormal) &&
1546            (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
1547        if (action & CLEAR_IS_INEXACT) {
1548            c &= ~FP_INEXACT;
1549        } else {
1550            c |=  FP_INEXACT;
1551        }
1552    }
1553
1554    /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
1555    if ((ieee_ex & float_flag_output_denormal) &&
1556            (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
1557        c |= FP_INEXACT;
1558        if (action & CLEAR_FS_UNDERFLOW) {
1559            c &= ~FP_UNDERFLOW;
1560        } else {
1561            c |=  FP_UNDERFLOW;
1562        }
1563    }
1564
1565    /* Set Inexact (I) when Overflow (O) is not enabled */
1566    if ((c & FP_OVERFLOW) != 0 && (enable & FP_OVERFLOW) == 0) {
1567        c |= FP_INEXACT;
1568    }
1569
1570    /* Clear Exact Underflow when Underflow (U) is not enabled */
1571    if ((c & FP_UNDERFLOW) != 0 && (enable & FP_UNDERFLOW) == 0 &&
1572            (c & FP_INEXACT) == 0) {
1573        c &= ~FP_UNDERFLOW;
1574    }
1575
1576    /* Reciprocal operations set only Inexact when valid and not
1577       divide by zero */
1578    if ((action & RECIPROCAL_INEXACT) &&
1579            (c & (FP_INVALID | FP_DIV0)) == 0) {
1580        c = FP_INEXACT;
1581    }
1582
1583    cause = c & enable;    /* all current enabled exceptions */
1584
1585    if (cause == 0) {
1586        /* No enabled exception, update the MSACSR Cause
1587         with all current exceptions */
1588        SET_FP_CAUSE(env->active_tc.msacsr,
1589                (GET_FP_CAUSE(env->active_tc.msacsr) | c));
1590    } else {
1591        /* Current exceptions are enabled */
1592        if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
1593            /* Exception(s) will trap, update MSACSR Cause
1594           with all enabled exceptions */
1595            SET_FP_CAUSE(env->active_tc.msacsr,
1596                    (GET_FP_CAUSE(env->active_tc.msacsr) | c));
1597        }
1598    }
1599
1600    return c;
1601}
1602
1603static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
1604{
1605    int enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
1606    return c & enable;
1607}
1608
1609static inline float16 float16_from_float32(int32_t a, flag ieee,
1610                                           float_status *status)
1611{
1612      float16 f_val;
1613
1614      f_val = float32_to_float16((float32)a, ieee, status);
1615      f_val = float16_maybe_silence_nan(f_val, status);
1616
1617      return a < 0 ? (f_val | (1 << 15)) : f_val;
1618}
1619
1620static inline float32 float32_from_float64(int64_t a, float_status *status)
1621{
1622      float32 f_val;
1623
1624      f_val = float64_to_float32((float64)a, status);
1625      f_val = float32_maybe_silence_nan(f_val, status);
1626
1627      return a < 0 ? (f_val | (1 << 31)) : f_val;
1628}
1629
1630static inline float32 float32_from_float16(int16_t a, flag ieee,
1631                                           float_status *status)
1632{
1633      float32 f_val;
1634
1635      f_val = float16_to_float32((float16)a, ieee, status);
1636      f_val = float32_maybe_silence_nan(f_val, status);
1637
1638      return a < 0 ? (f_val | (1 << 31)) : f_val;
1639}
1640
1641static inline float64 float64_from_float32(int32_t a, float_status *status)
1642{
1643      float64 f_val;
1644
1645      f_val = float32_to_float64((float64)a, status);
1646      f_val = float64_maybe_silence_nan(f_val, status);
1647
1648      return a < 0 ? (f_val | (1ULL << 63)) : f_val;
1649}
1650
1651static inline float32 float32_from_q16(int16_t a, float_status *status)
1652{
1653    float32 f_val;
1654
1655    /* conversion as integer and scaling */
1656    f_val = int32_to_float32(a, status);
1657    f_val = float32_scalbn(f_val, -15, status);
1658
1659    return f_val;
1660}
1661
1662static inline float64 float64_from_q32(int32_t a, float_status *status)
1663{
1664    float64 f_val;
1665
1666    /* conversion as integer and scaling */
1667    f_val = int32_to_float64(a, status);
1668    f_val = float64_scalbn(f_val, -31, status);
1669
1670    return f_val;
1671}
1672
1673static inline int16_t float32_to_q16(float32 a, float_status *status)
1674{
1675    int32_t q_val;
1676    int32_t q_min = 0xffff8000;
1677    int32_t q_max = 0x00007fff;
1678
1679    int ieee_ex;
1680
1681    if (float32_is_any_nan(a)) {
1682        float_raise(float_flag_invalid, status);
1683        return 0;
1684    }
1685
1686    /* scaling */
1687    a = float32_scalbn(a, 15, status);
1688
1689    ieee_ex = get_float_exception_flags(status);
1690    set_float_exception_flags(ieee_ex & (~float_flag_underflow)
1691                             , status);
1692
1693    if (ieee_ex & float_flag_overflow) {
1694        float_raise(float_flag_inexact, status);
1695        return (int32_t)a < 0 ? q_min : q_max;
1696    }
1697
1698    /* conversion to int */
1699    q_val = float32_to_int32(a, status);
1700
1701    ieee_ex = get_float_exception_flags(status);
1702    set_float_exception_flags(ieee_ex & (~float_flag_underflow)
1703                             , status);
1704
1705    if (ieee_ex & float_flag_invalid) {
1706        set_float_exception_flags(ieee_ex & (~float_flag_invalid)
1707                               , status);
1708        float_raise(float_flag_overflow | float_flag_inexact, status);
1709        return (int32_t)a < 0 ? q_min : q_max;
1710    }
1711
1712    if (q_val < q_min) {
1713        float_raise(float_flag_overflow | float_flag_inexact, status);
1714        return (int16_t)q_min;
1715    }
1716
1717    if (q_max < q_val) {
1718        float_raise(float_flag_overflow | float_flag_inexact, status);
1719        return (int16_t)q_max;
1720    }
1721
1722    return (int16_t)q_val;
1723}
1724
1725static inline int32_t float64_to_q32(float64 a, float_status *status)
1726{
1727    int64_t q_val;
1728    int64_t q_min = 0xffffffff80000000LL;
1729    int64_t q_max = 0x000000007fffffffLL;
1730
1731    int ieee_ex;
1732
1733    if (float64_is_any_nan(a)) {
1734        float_raise(float_flag_invalid, status);
1735        return 0;
1736    }
1737
1738    /* scaling */
1739    a = float64_scalbn(a, 31, status);
1740
1741    ieee_ex = get_float_exception_flags(status);
1742    set_float_exception_flags(ieee_ex & (~float_flag_underflow)
1743           , status);
1744
1745    if (ieee_ex & float_flag_overflow) {
1746        float_raise(float_flag_inexact, status);
1747        return (int64_t)a < 0 ? q_min : q_max;
1748    }
1749
1750    /* conversion to integer */
1751    q_val = float64_to_int64(a, status);
1752
1753    ieee_ex = get_float_exception_flags(status);
1754    set_float_exception_flags(ieee_ex & (~float_flag_underflow)
1755           , status);
1756
1757    if (ieee_ex & float_flag_invalid) {
1758        set_float_exception_flags(ieee_ex & (~float_flag_invalid)
1759               , status);
1760        float_raise(float_flag_overflow | float_flag_inexact, status);
1761        return (int64_t)a < 0 ? q_min : q_max;
1762    }
1763
1764    if (q_val < q_min) {
1765        float_raise(float_flag_overflow | float_flag_inexact, status);
1766        return (int32_t)q_min;
1767    }
1768
1769    if (q_max < q_val) {
1770        float_raise(float_flag_overflow | float_flag_inexact, status);
1771        return (int32_t)q_max;
1772    }
1773
1774    return (int32_t)q_val;
1775}
1776
1777#define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET)                   \
1778    do {                                                                    \
1779        float_status *status = &env->active_tc.msa_fp_status;               \
1780        int c;                                                              \
1781        int64_t cond;                                                       \
1782        set_float_exception_flags(0, status);                               \
1783        if (!QUIET) {                                                       \
1784            cond = float ## BITS ## _ ## OP(ARG1, ARG2, status);            \
1785        } else {                                                            \
1786            cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status);  \
1787        }                                                                   \
1788        DEST = cond ? M_MAX_UINT(BITS) : 0;                                 \
1789        c = update_msacsr(env, CLEAR_IS_INEXACT, 0);                        \
1790                                                                            \
1791        if (get_enabled_exceptions(env, c)) {                               \
1792            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
1793        }                                                                   \
1794    } while (0)
1795
1796#define MSA_FLOAT_AF(DEST, ARG1, ARG2, BITS, QUIET)                 \
1797    do {                                                            \
1798        MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET);          \
1799        if ((DEST & M_MAX_UINT(BITS)) == M_MAX_UINT(BITS)) {        \
1800            DEST = 0;                                               \
1801        }                                                           \
1802    } while (0)
1803
1804#define MSA_FLOAT_UEQ(DEST, ARG1, ARG2, BITS, QUIET)                \
1805    do {                                                            \
1806        MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET);   \
1807        if (DEST == 0) {                                            \
1808            MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET);      \
1809        }                                                           \
1810    } while (0)
1811
1812#define MSA_FLOAT_NE(DEST, ARG1, ARG2, BITS, QUIET)                 \
1813    do {                                                            \
1814        MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET);          \
1815        if (DEST == 0) {                                            \
1816            MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET);      \
1817        }                                                           \
1818    } while (0)
1819
1820#define MSA_FLOAT_UNE(DEST, ARG1, ARG2, BITS, QUIET)                \
1821    do {                                                            \
1822        MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET);   \
1823        if (DEST == 0) {                                            \
1824            MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET);      \
1825            if (DEST == 0) {                                        \
1826                MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET);  \
1827            }                                                       \
1828        }                                                           \
1829    } while (0)
1830
1831#define MSA_FLOAT_ULE(DEST, ARG1, ARG2, BITS, QUIET)                \
1832    do {                                                            \
1833        MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET);   \
1834        if (DEST == 0) {                                            \
1835            MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET);      \
1836        }                                                           \
1837    } while (0)
1838
1839#define MSA_FLOAT_ULT(DEST, ARG1, ARG2, BITS, QUIET)                \
1840    do {                                                            \
1841        MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET);   \
1842        if (DEST == 0) {                                            \
1843            MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET);      \
1844        }                                                           \
1845    } while (0)
1846
1847#define MSA_FLOAT_OR(DEST, ARG1, ARG2, BITS, QUIET)                 \
1848    do {                                                            \
1849        MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET);          \
1850        if (DEST == 0) {                                            \
1851            MSA_FLOAT_COND(DEST, le, ARG2, ARG1, BITS, QUIET);      \
1852        }                                                           \
1853    } while (0)
1854
1855static inline void compare_af(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1856                              wr_t *pwt, uint32_t df, int quiet,
1857                              uintptr_t retaddr)
1858{
1859    wr_t wx, *pwx = &wx;
1860    uint32_t i;
1861
1862    clear_msacsr_cause(env);
1863
1864    switch (df) {
1865    case DF_WORD:
1866        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1867            MSA_FLOAT_AF(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
1868        }
1869        break;
1870    case DF_DOUBLE:
1871        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1872            MSA_FLOAT_AF(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
1873        }
1874        break;
1875    default:
1876        assert(0);
1877    }
1878
1879    check_msacsr_cause(env, retaddr);
1880
1881    msa_move_v(pwd, pwx);
1882}
1883
1884static inline void compare_un(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1885                              wr_t *pwt, uint32_t df, int quiet,
1886                              uintptr_t retaddr)
1887{
1888    wr_t wx, *pwx = &wx;
1889    uint32_t i;
1890
1891    clear_msacsr_cause(env);
1892
1893    switch (df) {
1894    case DF_WORD:
1895        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1896            MSA_FLOAT_COND(pwx->w[i], unordered, pws->w[i], pwt->w[i], 32,
1897                    quiet);
1898        }
1899        break;
1900    case DF_DOUBLE:
1901        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1902            MSA_FLOAT_COND(pwx->d[i], unordered, pws->d[i], pwt->d[i], 64,
1903                    quiet);
1904        }
1905        break;
1906    default:
1907        assert(0);
1908    }
1909
1910    check_msacsr_cause(env, retaddr);
1911
1912    msa_move_v(pwd, pwx);
1913}
1914
1915static inline void compare_eq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1916                              wr_t *pwt, uint32_t df, int quiet,
1917                              uintptr_t retaddr)
1918{
1919    wr_t wx, *pwx = &wx;
1920    uint32_t i;
1921
1922    clear_msacsr_cause(env);
1923
1924    switch (df) {
1925    case DF_WORD:
1926        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1927            MSA_FLOAT_COND(pwx->w[i], eq, pws->w[i], pwt->w[i], 32, quiet);
1928        }
1929        break;
1930    case DF_DOUBLE:
1931        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1932            MSA_FLOAT_COND(pwx->d[i], eq, pws->d[i], pwt->d[i], 64, quiet);
1933        }
1934        break;
1935    default:
1936        assert(0);
1937    }
1938
1939    check_msacsr_cause(env, retaddr);
1940
1941    msa_move_v(pwd, pwx);
1942}
1943
1944static inline void compare_ueq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1945                               wr_t *pwt, uint32_t df, int quiet,
1946                               uintptr_t retaddr)
1947{
1948    wr_t wx, *pwx = &wx;
1949    uint32_t i;
1950
1951    clear_msacsr_cause(env);
1952
1953    switch (df) {
1954    case DF_WORD:
1955        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1956            MSA_FLOAT_UEQ(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
1957        }
1958        break;
1959    case DF_DOUBLE:
1960        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1961            MSA_FLOAT_UEQ(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
1962        }
1963        break;
1964    default:
1965        assert(0);
1966    }
1967
1968    check_msacsr_cause(env, retaddr);
1969
1970    msa_move_v(pwd, pwx);
1971}
1972
1973static inline void compare_lt(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
1974                              wr_t *pwt, uint32_t df, int quiet,
1975                              uintptr_t retaddr)
1976{
1977    wr_t wx, *pwx = &wx;
1978    uint32_t i;
1979
1980    clear_msacsr_cause(env);
1981
1982    switch (df) {
1983    case DF_WORD:
1984        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
1985            MSA_FLOAT_COND(pwx->w[i], lt, pws->w[i], pwt->w[i], 32, quiet);
1986        }
1987        break;
1988    case DF_DOUBLE:
1989        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
1990            MSA_FLOAT_COND(pwx->d[i], lt, pws->d[i], pwt->d[i], 64, quiet);
1991        }
1992        break;
1993    default:
1994        assert(0);
1995    }
1996
1997    check_msacsr_cause(env, retaddr);
1998
1999    msa_move_v(pwd, pwx);
2000}
2001
2002static inline void compare_ult(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2003                               wr_t *pwt, uint32_t df, int quiet,
2004                               uintptr_t retaddr)
2005{
2006    wr_t wx, *pwx = &wx;
2007    uint32_t i;
2008
2009    clear_msacsr_cause(env);
2010
2011    switch (df) {
2012    case DF_WORD:
2013        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2014            MSA_FLOAT_ULT(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2015        }
2016        break;
2017    case DF_DOUBLE:
2018        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2019            MSA_FLOAT_ULT(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2020        }
2021        break;
2022    default:
2023        assert(0);
2024    }
2025
2026    check_msacsr_cause(env, retaddr);
2027
2028    msa_move_v(pwd, pwx);
2029}
2030
2031static inline void compare_le(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2032                              wr_t *pwt, uint32_t df, int quiet,
2033                              uintptr_t retaddr)
2034{
2035    wr_t wx, *pwx = &wx;
2036    uint32_t i;
2037
2038    clear_msacsr_cause(env);
2039
2040    switch (df) {
2041    case DF_WORD:
2042        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2043            MSA_FLOAT_COND(pwx->w[i], le, pws->w[i], pwt->w[i], 32, quiet);
2044        }
2045        break;
2046    case DF_DOUBLE:
2047        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2048            MSA_FLOAT_COND(pwx->d[i], le, pws->d[i], pwt->d[i], 64, quiet);
2049        }
2050        break;
2051    default:
2052        assert(0);
2053    }
2054
2055    check_msacsr_cause(env, retaddr);
2056
2057    msa_move_v(pwd, pwx);
2058}
2059
2060static inline void compare_ule(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2061                               wr_t *pwt, uint32_t df, int quiet,
2062                               uintptr_t retaddr)
2063{
2064    wr_t wx, *pwx = &wx;
2065    uint32_t i;
2066
2067    clear_msacsr_cause(env);
2068
2069    switch (df) {
2070    case DF_WORD:
2071        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2072            MSA_FLOAT_ULE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2073        }
2074        break;
2075    case DF_DOUBLE:
2076        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2077            MSA_FLOAT_ULE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2078        }
2079        break;
2080    default:
2081        assert(0);
2082    }
2083
2084    check_msacsr_cause(env, retaddr);
2085
2086    msa_move_v(pwd, pwx);
2087}
2088
2089static inline void compare_or(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2090                              wr_t *pwt, uint32_t df, int quiet,
2091                              uintptr_t retaddr)
2092{
2093    wr_t wx, *pwx = &wx;
2094    uint32_t i;
2095
2096    clear_msacsr_cause(env);
2097
2098    switch (df) {
2099    case DF_WORD:
2100        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2101            MSA_FLOAT_OR(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2102        }
2103        break;
2104    case DF_DOUBLE:
2105        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2106            MSA_FLOAT_OR(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2107        }
2108        break;
2109    default:
2110        assert(0);
2111    }
2112
2113    check_msacsr_cause(env, retaddr);
2114
2115    msa_move_v(pwd, pwx);
2116}
2117
2118static inline void compare_une(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2119                               wr_t *pwt, uint32_t df, int quiet,
2120                               uintptr_t retaddr)
2121{
2122    wr_t wx, *pwx = &wx;
2123    uint32_t i;
2124
2125    clear_msacsr_cause(env);
2126
2127    switch (df) {
2128    case DF_WORD:
2129        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2130            MSA_FLOAT_UNE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2131        }
2132        break;
2133    case DF_DOUBLE:
2134        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2135            MSA_FLOAT_UNE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2136        }
2137        break;
2138    default:
2139        assert(0);
2140    }
2141
2142    check_msacsr_cause(env, retaddr);
2143
2144    msa_move_v(pwd, pwx);
2145}
2146
2147static inline void compare_ne(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
2148                              wr_t *pwt, uint32_t df, int quiet,
2149                              uintptr_t retaddr)
2150{
2151    wr_t wx, *pwx = &wx;
2152    uint32_t i;
2153
2154    clear_msacsr_cause(env);
2155
2156    switch (df) {
2157    case DF_WORD:
2158        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2159            MSA_FLOAT_NE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
2160        }
2161        break;
2162    case DF_DOUBLE:
2163        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2164            MSA_FLOAT_NE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
2165        }
2166        break;
2167    default:
2168        assert(0);
2169    }
2170
2171    check_msacsr_cause(env, retaddr);
2172
2173    msa_move_v(pwd, pwx);
2174}
2175
2176void helper_msa_fcaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2177                        uint32_t ws, uint32_t wt)
2178{
2179    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2180    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2181    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2182    compare_af(env, pwd, pws, pwt, df, 1, GETPC());
2183}
2184
2185void helper_msa_fcun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2186                        uint32_t ws, uint32_t wt)
2187{
2188    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2189    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2190    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2191    compare_un(env, pwd, pws, pwt, df, 1, GETPC());
2192}
2193
2194void helper_msa_fceq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2195                        uint32_t ws, uint32_t wt)
2196{
2197    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2198    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2199    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2200    compare_eq(env, pwd, pws, pwt, df, 1, GETPC());
2201}
2202
2203void helper_msa_fcueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2204                         uint32_t ws, uint32_t wt)
2205{
2206    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2207    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2208    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2209    compare_ueq(env, pwd, pws, pwt, df, 1, GETPC());
2210}
2211
2212void helper_msa_fclt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2213                        uint32_t ws, uint32_t wt)
2214{
2215    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2216    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2217    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2218    compare_lt(env, pwd, pws, pwt, df, 1, GETPC());
2219}
2220
2221void helper_msa_fcult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2222                         uint32_t ws, uint32_t wt)
2223{
2224    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2225    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2226    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2227    compare_ult(env, pwd, pws, pwt, df, 1, GETPC());
2228}
2229
2230void helper_msa_fcle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2231                        uint32_t ws, uint32_t wt)
2232{
2233    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2234    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2235    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2236    compare_le(env, pwd, pws, pwt, df, 1, GETPC());
2237}
2238
2239void helper_msa_fcule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2240                         uint32_t ws, uint32_t wt)
2241{
2242    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2243    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2244    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2245    compare_ule(env, pwd, pws, pwt, df, 1, GETPC());
2246}
2247
2248void helper_msa_fsaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2249                        uint32_t ws, uint32_t wt)
2250{
2251    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2252    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2253    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2254    compare_af(env, pwd, pws, pwt, df, 0, GETPC());
2255}
2256
2257void helper_msa_fsun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2258                        uint32_t ws, uint32_t wt)
2259{
2260    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2261    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2262    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2263    compare_un(env, pwd, pws, pwt, df, 0, GETPC());
2264}
2265
2266void helper_msa_fseq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2267                        uint32_t ws, uint32_t wt)
2268{
2269    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2270    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2271    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2272    compare_eq(env, pwd, pws, pwt, df, 0, GETPC());
2273}
2274
2275void helper_msa_fsueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2276                         uint32_t ws, uint32_t wt)
2277{
2278    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2279    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2280    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2281    compare_ueq(env, pwd, pws, pwt, df, 0, GETPC());
2282}
2283
2284void helper_msa_fslt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2285                        uint32_t ws, uint32_t wt)
2286{
2287    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2288    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2289    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2290    compare_lt(env, pwd, pws, pwt, df, 0, GETPC());
2291}
2292
2293void helper_msa_fsult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2294                         uint32_t ws, uint32_t wt)
2295{
2296    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2297    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2298    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2299    compare_ult(env, pwd, pws, pwt, df, 0, GETPC());
2300}
2301
2302void helper_msa_fsle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2303                        uint32_t ws, uint32_t wt)
2304{
2305    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2306    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2307    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2308    compare_le(env, pwd, pws, pwt, df, 0, GETPC());
2309}
2310
2311void helper_msa_fsule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2312                         uint32_t ws, uint32_t wt)
2313{
2314    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2315    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2316    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2317    compare_ule(env, pwd, pws, pwt, df, 0, GETPC());
2318}
2319
2320void helper_msa_fcor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2321                        uint32_t ws, uint32_t wt)
2322{
2323    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2324    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2325    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2326    compare_or(env, pwd, pws, pwt, df, 1, GETPC());
2327}
2328
2329void helper_msa_fcune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2330                         uint32_t ws, uint32_t wt)
2331{
2332    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2333    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2334    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2335    compare_une(env, pwd, pws, pwt, df, 1, GETPC());
2336}
2337
2338void helper_msa_fcne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2339                        uint32_t ws, uint32_t wt)
2340{
2341    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2342    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2343    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2344    compare_ne(env, pwd, pws, pwt, df, 1, GETPC());
2345}
2346
2347void helper_msa_fsor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2348                        uint32_t ws, uint32_t wt)
2349{
2350    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2351    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2352    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2353    compare_or(env, pwd, pws, pwt, df, 0, GETPC());
2354}
2355
2356void helper_msa_fsune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2357                         uint32_t ws, uint32_t wt)
2358{
2359    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2360    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2361    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2362    compare_une(env, pwd, pws, pwt, df, 0, GETPC());
2363}
2364
2365void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2366                        uint32_t ws, uint32_t wt)
2367{
2368    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2369    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2370    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2371    compare_ne(env, pwd, pws, pwt, df, 0, GETPC());
2372}
2373
2374#define float16_is_zero(ARG) 0
2375#define float16_is_zero_or_denormal(ARG) 0
2376
2377#define IS_DENORMAL(ARG, BITS)                      \
2378    (!float ## BITS ## _is_zero(ARG)                \
2379    && float ## BITS ## _is_zero_or_denormal(ARG))
2380
2381#define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS)                         \
2382    do {                                                                    \
2383        float_status *status = &env->active_tc.msa_fp_status;               \
2384        int c;                                                              \
2385                                                                            \
2386        set_float_exception_flags(0, status);                               \
2387        DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status);                \
2388        c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS));                 \
2389                                                                            \
2390        if (get_enabled_exceptions(env, c)) {                               \
2391            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2392        }                                                                   \
2393    } while (0)
2394
2395void helper_msa_fadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2396        uint32_t ws, uint32_t wt)
2397{
2398    wr_t wx, *pwx = &wx;
2399    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2400    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2401    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2402    uint32_t i;
2403
2404    clear_msacsr_cause(env);
2405
2406    switch (df) {
2407    case DF_WORD:
2408        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2409            MSA_FLOAT_BINOP(pwx->w[i], add, pws->w[i], pwt->w[i], 32);
2410        }
2411        break;
2412    case DF_DOUBLE:
2413        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2414            MSA_FLOAT_BINOP(pwx->d[i], add, pws->d[i], pwt->d[i], 64);
2415        }
2416        break;
2417    default:
2418        assert(0);
2419    }
2420
2421    check_msacsr_cause(env, GETPC());
2422    msa_move_v(pwd, pwx);
2423}
2424
2425void helper_msa_fsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2426        uint32_t ws, uint32_t wt)
2427{
2428    wr_t wx, *pwx = &wx;
2429    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2430    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2431    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2432    uint32_t i;
2433
2434    clear_msacsr_cause(env);
2435
2436    switch (df) {
2437    case DF_WORD:
2438        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2439            MSA_FLOAT_BINOP(pwx->w[i], sub, pws->w[i], pwt->w[i], 32);
2440        }
2441        break;
2442    case DF_DOUBLE:
2443        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2444            MSA_FLOAT_BINOP(pwx->d[i], sub, pws->d[i], pwt->d[i], 64);
2445        }
2446        break;
2447    default:
2448        assert(0);
2449    }
2450
2451    check_msacsr_cause(env, GETPC());
2452    msa_move_v(pwd, pwx);
2453}
2454
2455void helper_msa_fmul_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2456        uint32_t ws, uint32_t wt)
2457{
2458    wr_t wx, *pwx = &wx;
2459    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2460    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2461    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2462    uint32_t i;
2463
2464    clear_msacsr_cause(env);
2465
2466    switch (df) {
2467    case DF_WORD:
2468        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2469            MSA_FLOAT_BINOP(pwx->w[i], mul, pws->w[i], pwt->w[i], 32);
2470        }
2471        break;
2472    case DF_DOUBLE:
2473        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2474            MSA_FLOAT_BINOP(pwx->d[i], mul, pws->d[i], pwt->d[i], 64);
2475        }
2476        break;
2477    default:
2478        assert(0);
2479    }
2480
2481    check_msacsr_cause(env, GETPC());
2482
2483    msa_move_v(pwd, pwx);
2484}
2485
2486void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2487        uint32_t ws, uint32_t wt)
2488{
2489    wr_t wx, *pwx = &wx;
2490    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2491    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2492    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2493    uint32_t i;
2494
2495    clear_msacsr_cause(env);
2496
2497    switch (df) {
2498    case DF_WORD:
2499        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2500            MSA_FLOAT_BINOP(pwx->w[i], div, pws->w[i], pwt->w[i], 32);
2501        }
2502        break;
2503    case DF_DOUBLE:
2504        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2505            MSA_FLOAT_BINOP(pwx->d[i], div, pws->d[i], pwt->d[i], 64);
2506        }
2507        break;
2508    default:
2509        assert(0);
2510    }
2511
2512    check_msacsr_cause(env, GETPC());
2513
2514    msa_move_v(pwd, pwx);
2515}
2516
2517#define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS)              \
2518    do {                                                                    \
2519        float_status *status = &env->active_tc.msa_fp_status;               \
2520        int c;                                                              \
2521                                                                            \
2522        set_float_exception_flags(0, status);                               \
2523        DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status);  \
2524        c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS));                 \
2525                                                                            \
2526        if (get_enabled_exceptions(env, c)) {                               \
2527            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2528        }                                                                   \
2529    } while (0)
2530
2531void helper_msa_fmadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2532        uint32_t ws, uint32_t wt)
2533{
2534    wr_t wx, *pwx = &wx;
2535    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2536    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2537    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2538    uint32_t i;
2539
2540    clear_msacsr_cause(env);
2541
2542    switch (df) {
2543    case DF_WORD:
2544        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2545            MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
2546                           pws->w[i], pwt->w[i], 0, 32);
2547        }
2548        break;
2549    case DF_DOUBLE:
2550        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2551            MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
2552                           pws->d[i], pwt->d[i], 0, 64);
2553        }
2554        break;
2555    default:
2556        assert(0);
2557    }
2558
2559    check_msacsr_cause(env, GETPC());
2560
2561    msa_move_v(pwd, pwx);
2562}
2563
2564void helper_msa_fmsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2565        uint32_t ws, uint32_t wt)
2566{
2567    wr_t wx, *pwx = &wx;
2568    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2569    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2570    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2571    uint32_t i;
2572
2573    clear_msacsr_cause(env);
2574
2575    switch (df) {
2576    case DF_WORD:
2577        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2578            MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
2579                           pws->w[i], pwt->w[i],
2580                           float_muladd_negate_product, 32);
2581      }
2582      break;
2583    case DF_DOUBLE:
2584        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2585            MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
2586                           pws->d[i], pwt->d[i],
2587                           float_muladd_negate_product, 64);
2588        }
2589        break;
2590    default:
2591        assert(0);
2592    }
2593
2594    check_msacsr_cause(env, GETPC());
2595
2596    msa_move_v(pwd, pwx);
2597}
2598
2599void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2600        uint32_t ws, uint32_t wt)
2601{
2602    wr_t wx, *pwx = &wx;
2603    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2604    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2605    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2606    uint32_t i;
2607
2608    clear_msacsr_cause(env);
2609
2610    switch (df) {
2611    case DF_WORD:
2612        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2613            MSA_FLOAT_BINOP(pwx->w[i], scalbn, pws->w[i],
2614                            pwt->w[i] >  0x200 ?  0x200 :
2615                            pwt->w[i] < -0x200 ? -0x200 : pwt->w[i],
2616                            32);
2617        }
2618        break;
2619    case DF_DOUBLE:
2620        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2621            MSA_FLOAT_BINOP(pwx->d[i], scalbn, pws->d[i],
2622                            pwt->d[i] >  0x1000 ?  0x1000 :
2623                            pwt->d[i] < -0x1000 ? -0x1000 : pwt->d[i],
2624                            64);
2625        }
2626        break;
2627    default:
2628        assert(0);
2629    }
2630
2631    check_msacsr_cause(env, GETPC());
2632
2633    msa_move_v(pwd, pwx);
2634}
2635
2636#define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS)                                 \
2637    do {                                                                    \
2638        float_status *status = &env->active_tc.msa_fp_status;               \
2639        int c;                                                              \
2640                                                                            \
2641        set_float_exception_flags(0, status);                               \
2642        DEST = float ## BITS ## _ ## OP(ARG, status);                       \
2643        c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS));                 \
2644                                                                            \
2645        if (get_enabled_exceptions(env, c)) {                               \
2646            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2647        }                                                                   \
2648    } while (0)
2649
2650void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2651                         uint32_t ws, uint32_t wt)
2652{
2653    wr_t wx, *pwx = &wx;
2654    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2655    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2656    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2657    uint32_t i;
2658
2659    clear_msacsr_cause(env);
2660
2661    switch (df) {
2662    case DF_WORD:
2663        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2664            /* Half precision floats come in two formats: standard
2665               IEEE and "ARM" format.  The latter gains extra exponent
2666               range by omitting the NaN/Inf encodings.  */
2667            flag ieee = 1;
2668
2669            MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
2670            MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16);
2671        }
2672        break;
2673    case DF_DOUBLE:
2674        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2675            MSA_FLOAT_UNOP(Lw(pwx, i), from_float64, pws->d[i], 32);
2676            MSA_FLOAT_UNOP(Rw(pwx, i), from_float64, pwt->d[i], 32);
2677        }
2678        break;
2679    default:
2680        assert(0);
2681    }
2682
2683    check_msacsr_cause(env, GETPC());
2684    msa_move_v(pwd, pwx);
2685}
2686
2687#define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS)                       \
2688    do {                                                                    \
2689        float_status *status = &env->active_tc.msa_fp_status;               \
2690        int c;                                                              \
2691                                                                            \
2692        set_float_exception_flags(0, status);                               \
2693        DEST = float ## BITS ## _ ## OP(ARG, status);                       \
2694        c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0);                      \
2695                                                                            \
2696        if (get_enabled_exceptions(env, c)) {                               \
2697            DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c;           \
2698        }                                                                   \
2699    } while (0)
2700
2701void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2702                       uint32_t ws, uint32_t wt)
2703{
2704    wr_t wx, *pwx = &wx;
2705    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2706    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2707    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2708    uint32_t i;
2709
2710    clear_msacsr_cause(env);
2711
2712    switch (df) {
2713    case DF_WORD:
2714        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2715            MSA_FLOAT_UNOP_XD(Lh(pwx, i), to_q16, pws->w[i], 32, 16);
2716            MSA_FLOAT_UNOP_XD(Rh(pwx, i), to_q16, pwt->w[i], 32, 16);
2717        }
2718        break;
2719    case DF_DOUBLE:
2720        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2721            MSA_FLOAT_UNOP_XD(Lw(pwx, i), to_q32, pws->d[i], 64, 32);
2722            MSA_FLOAT_UNOP_XD(Rw(pwx, i), to_q32, pwt->d[i], 64, 32);
2723        }
2724        break;
2725    default:
2726        assert(0);
2727    }
2728
2729    check_msacsr_cause(env, GETPC());
2730
2731    msa_move_v(pwd, pwx);
2732}
2733
2734#define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS)      \
2735    !float ## BITS ## _is_any_nan(ARG1)                 \
2736    && float ## BITS ## _is_quiet_nan(ARG2, STATUS)
2737
2738#define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS)                         \
2739    do {                                                                    \
2740        float_status *status = &env->active_tc.msa_fp_status;               \
2741        int c;                                                              \
2742                                                                            \
2743        set_float_exception_flags(0, status);                               \
2744        DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status);                \
2745        c = update_msacsr(env, 0, 0);                                       \
2746                                                                            \
2747        if (get_enabled_exceptions(env, c)) {                               \
2748            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2749        }                                                                   \
2750    } while (0)
2751
2752#define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS)                    \
2753    do {                                                            \
2754        uint## BITS ##_t S = _S, T = _T;                            \
2755        uint## BITS ##_t as, at, xs, xt, xd;                        \
2756        if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) {                 \
2757            T = S;                                                  \
2758        }                                                           \
2759        else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) {            \
2760            S = T;                                                  \
2761        }                                                           \
2762        as = float## BITS ##_abs(S);                                \
2763        at = float## BITS ##_abs(T);                                \
2764        MSA_FLOAT_MAXOP(xs, F,  S,  T, BITS);                       \
2765        MSA_FLOAT_MAXOP(xt, G,  S,  T, BITS);                       \
2766        MSA_FLOAT_MAXOP(xd, F, as, at, BITS);                       \
2767        X = (as == at || xd == float## BITS ##_abs(xs)) ? xs : xt;  \
2768    } while (0)
2769
2770void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2771        uint32_t ws, uint32_t wt)
2772{
2773    float_status *status = &env->active_tc.msa_fp_status;
2774    wr_t wx, *pwx = &wx;
2775    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2776    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2777    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2778    uint32_t i;
2779
2780    clear_msacsr_cause(env);
2781
2782    switch (df) {
2783    case DF_WORD:
2784        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2785            if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32, status)) {
2786                MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pws->w[i], 32);
2787            } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32, status)) {
2788                MSA_FLOAT_MAXOP(pwx->w[i], min, pwt->w[i], pwt->w[i], 32);
2789            } else {
2790                MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pwt->w[i], 32);
2791            }
2792        }
2793        break;
2794    case DF_DOUBLE:
2795        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2796            if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64, status)) {
2797                MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pws->d[i], 64);
2798            } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64, status)) {
2799                MSA_FLOAT_MAXOP(pwx->d[i], min, pwt->d[i], pwt->d[i], 64);
2800            } else {
2801                MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pwt->d[i], 64);
2802            }
2803        }
2804        break;
2805    default:
2806        assert(0);
2807    }
2808
2809    check_msacsr_cause(env, GETPC());
2810
2811    msa_move_v(pwd, pwx);
2812}
2813
2814void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2815        uint32_t ws, uint32_t wt)
2816{
2817    float_status *status = &env->active_tc.msa_fp_status;
2818    wr_t wx, *pwx = &wx;
2819    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2820    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2821    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2822    uint32_t i;
2823
2824    clear_msacsr_cause(env);
2825
2826    switch (df) {
2827    case DF_WORD:
2828        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2829            FMAXMIN_A(min, max, pwx->w[i], pws->w[i], pwt->w[i], 32, status);
2830        }
2831        break;
2832    case DF_DOUBLE:
2833        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2834            FMAXMIN_A(min, max, pwx->d[i], pws->d[i], pwt->d[i], 64, status);
2835        }
2836        break;
2837    default:
2838        assert(0);
2839    }
2840
2841    check_msacsr_cause(env, GETPC());
2842
2843    msa_move_v(pwd, pwx);
2844}
2845
2846void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2847        uint32_t ws, uint32_t wt)
2848{
2849    float_status *status = &env->active_tc.msa_fp_status;
2850    wr_t wx, *pwx = &wx;
2851    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2852    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2853    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2854    uint32_t i;
2855
2856    clear_msacsr_cause(env);
2857
2858    switch (df) {
2859    case DF_WORD:
2860        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2861            if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32, status)) {
2862                MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pws->w[i], 32);
2863            } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32, status)) {
2864                MSA_FLOAT_MAXOP(pwx->w[i], max, pwt->w[i], pwt->w[i], 32);
2865            } else {
2866                MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pwt->w[i], 32);
2867            }
2868        }
2869        break;
2870    case DF_DOUBLE:
2871        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2872            if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64, status)) {
2873                MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pws->d[i], 64);
2874            } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64, status)) {
2875                MSA_FLOAT_MAXOP(pwx->d[i], max, pwt->d[i], pwt->d[i], 64);
2876            } else {
2877                MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pwt->d[i], 64);
2878            }
2879        }
2880        break;
2881    default:
2882        assert(0);
2883    }
2884
2885    check_msacsr_cause(env, GETPC());
2886
2887    msa_move_v(pwd, pwx);
2888}
2889
2890void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2891        uint32_t ws, uint32_t wt)
2892{
2893    float_status *status = &env->active_tc.msa_fp_status;
2894    wr_t wx, *pwx = &wx;
2895    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2896    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2897    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2898    uint32_t i;
2899
2900    clear_msacsr_cause(env);
2901
2902    switch (df) {
2903    case DF_WORD:
2904        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2905            FMAXMIN_A(max, min, pwx->w[i], pws->w[i], pwt->w[i], 32, status);
2906        }
2907        break;
2908    case DF_DOUBLE:
2909        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2910            FMAXMIN_A(max, min, pwx->d[i], pws->d[i], pwt->d[i], 64, status);
2911        }
2912        break;
2913    default:
2914        assert(0);
2915    }
2916
2917    check_msacsr_cause(env, GETPC());
2918
2919    msa_move_v(pwd, pwx);
2920}
2921
2922void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
2923        uint32_t wd, uint32_t ws)
2924{
2925    float_status* status = &env->active_tc.msa_fp_status;
2926
2927    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2928    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2929    if (df == DF_WORD) {
2930        pwd->w[0] = float_class_s(pws->w[0], status);
2931        pwd->w[1] = float_class_s(pws->w[1], status);
2932        pwd->w[2] = float_class_s(pws->w[2], status);
2933        pwd->w[3] = float_class_s(pws->w[3], status);
2934    } else {
2935        pwd->d[0] = float_class_d(pws->d[0], status);
2936        pwd->d[1] = float_class_d(pws->d[1], status);
2937    }
2938}
2939
2940#define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS)                                \
2941    do {                                                                    \
2942        float_status *status = &env->active_tc.msa_fp_status;               \
2943        int c;                                                              \
2944                                                                            \
2945        set_float_exception_flags(0, status);                               \
2946        DEST = float ## BITS ## _ ## OP(ARG, status);                       \
2947        c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0);                      \
2948                                                                            \
2949        if (get_enabled_exceptions(env, c)) {                               \
2950            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
2951        } else if (float ## BITS ## _is_any_nan(ARG)) {                     \
2952            DEST = 0;                                                       \
2953        }                                                                   \
2954    } while (0)
2955
2956void helper_msa_ftrunc_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2957                            uint32_t ws)
2958{
2959    wr_t wx, *pwx = &wx;
2960    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2961    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2962    uint32_t i;
2963
2964    clear_msacsr_cause(env);
2965
2966    switch (df) {
2967    case DF_WORD:
2968        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2969            MSA_FLOAT_UNOP0(pwx->w[i], to_int32_round_to_zero, pws->w[i], 32);
2970        }
2971        break;
2972    case DF_DOUBLE:
2973        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
2974            MSA_FLOAT_UNOP0(pwx->d[i], to_int64_round_to_zero, pws->d[i], 64);
2975        }
2976        break;
2977    default:
2978        assert(0);
2979    }
2980
2981    check_msacsr_cause(env, GETPC());
2982
2983    msa_move_v(pwd, pwx);
2984}
2985
2986void helper_msa_ftrunc_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
2987                            uint32_t ws)
2988{
2989    wr_t wx, *pwx = &wx;
2990    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2991    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2992    uint32_t i;
2993
2994    clear_msacsr_cause(env);
2995
2996    switch (df) {
2997    case DF_WORD:
2998        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
2999            MSA_FLOAT_UNOP0(pwx->w[i], to_uint32_round_to_zero, pws->w[i], 32);
3000        }
3001        break;
3002    case DF_DOUBLE:
3003        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3004            MSA_FLOAT_UNOP0(pwx->d[i], to_uint64_round_to_zero, pws->d[i], 64);
3005        }
3006        break;
3007    default:
3008        assert(0);
3009    }
3010
3011    check_msacsr_cause(env, GETPC());
3012
3013    msa_move_v(pwd, pwx);
3014}
3015
3016void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3017                         uint32_t ws)
3018{
3019    wr_t wx, *pwx = &wx;
3020    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3021    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3022    uint32_t i;
3023
3024    clear_msacsr_cause(env);
3025
3026    switch (df) {
3027    case DF_WORD:
3028        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3029            MSA_FLOAT_UNOP(pwx->w[i], sqrt, pws->w[i], 32);
3030        }
3031        break;
3032    case DF_DOUBLE:
3033        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3034            MSA_FLOAT_UNOP(pwx->d[i], sqrt, pws->d[i], 64);
3035        }
3036        break;
3037    default:
3038        assert(0);
3039    }
3040
3041    check_msacsr_cause(env, GETPC());
3042
3043    msa_move_v(pwd, pwx);
3044}
3045
3046#define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS)                               \
3047    do {                                                                    \
3048        float_status *status = &env->active_tc.msa_fp_status;               \
3049        int c;                                                              \
3050                                                                            \
3051        set_float_exception_flags(0, status);                               \
3052        DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status);   \
3053        c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) ||        \
3054                          float ## BITS ## _is_quiet_nan(DEST, status) ?    \
3055                          0 : RECIPROCAL_INEXACT,                           \
3056                          IS_DENORMAL(DEST, BITS));                         \
3057                                                                            \
3058        if (get_enabled_exceptions(env, c)) {                               \
3059            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
3060        }                                                                   \
3061    } while (0)
3062
3063void helper_msa_frsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3064                          uint32_t ws)
3065{
3066    wr_t wx, *pwx = &wx;
3067    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3068    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3069    uint32_t i;
3070
3071    clear_msacsr_cause(env);
3072
3073    switch (df) {
3074    case DF_WORD:
3075        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3076            MSA_FLOAT_RECIPROCAL(pwx->w[i], float32_sqrt(pws->w[i],
3077                    &env->active_tc.msa_fp_status), 32);
3078        }
3079        break;
3080    case DF_DOUBLE:
3081        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3082            MSA_FLOAT_RECIPROCAL(pwx->d[i], float64_sqrt(pws->d[i],
3083                    &env->active_tc.msa_fp_status), 64);
3084        }
3085        break;
3086    default:
3087        assert(0);
3088    }
3089
3090    check_msacsr_cause(env, GETPC());
3091
3092    msa_move_v(pwd, pwx);
3093}
3094
3095void helper_msa_frcp_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3096                        uint32_t ws)
3097{
3098    wr_t wx, *pwx = &wx;
3099    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3100    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3101    uint32_t i;
3102
3103    clear_msacsr_cause(env);
3104
3105    switch (df) {
3106    case DF_WORD:
3107        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3108            MSA_FLOAT_RECIPROCAL(pwx->w[i], pws->w[i], 32);
3109        }
3110        break;
3111    case DF_DOUBLE:
3112        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3113            MSA_FLOAT_RECIPROCAL(pwx->d[i], pws->d[i], 64);
3114        }
3115        break;
3116    default:
3117        assert(0);
3118    }
3119
3120    check_msacsr_cause(env, GETPC());
3121
3122    msa_move_v(pwd, pwx);
3123}
3124
3125void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3126                         uint32_t ws)
3127{
3128    wr_t wx, *pwx = &wx;
3129    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3130    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3131    uint32_t i;
3132
3133    clear_msacsr_cause(env);
3134
3135    switch (df) {
3136    case DF_WORD:
3137        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3138            MSA_FLOAT_UNOP(pwx->w[i], round_to_int, pws->w[i], 32);
3139        }
3140        break;
3141    case DF_DOUBLE:
3142        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3143            MSA_FLOAT_UNOP(pwx->d[i], round_to_int, pws->d[i], 64);
3144        }
3145        break;
3146    default:
3147        assert(0);
3148    }
3149
3150    check_msacsr_cause(env, GETPC());
3151
3152    msa_move_v(pwd, pwx);
3153}
3154
3155#define MSA_FLOAT_LOGB(DEST, ARG, BITS)                                     \
3156    do {                                                                    \
3157        float_status *status = &env->active_tc.msa_fp_status;               \
3158        int c;                                                              \
3159                                                                            \
3160        set_float_exception_flags(0, status);                               \
3161        set_float_rounding_mode(float_round_down, status);                  \
3162        DEST = float ## BITS ## _ ## log2(ARG, status);                     \
3163        DEST = float ## BITS ## _ ## round_to_int(DEST, status);            \
3164        set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr &            \
3165                                         MSACSR_RM_MASK) >> MSACSR_RM],     \
3166                                status);                                    \
3167                                                                            \
3168        set_float_exception_flags(get_float_exception_flags(status) &       \
3169                                  (~float_flag_inexact),                    \
3170                                  status);                                  \
3171                                                                            \
3172        c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS));                 \
3173                                                                            \
3174        if (get_enabled_exceptions(env, c)) {                               \
3175            DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c;            \
3176        }                                                                   \
3177    } while (0)
3178
3179void helper_msa_flog2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3180                         uint32_t ws)
3181{
3182    wr_t wx, *pwx = &wx;
3183    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3184    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3185    uint32_t i;
3186
3187    clear_msacsr_cause(env);
3188
3189    switch (df) {
3190    case DF_WORD:
3191        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3192            MSA_FLOAT_LOGB(pwx->w[i], pws->w[i], 32);
3193        }
3194        break;
3195    case DF_DOUBLE:
3196        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3197            MSA_FLOAT_LOGB(pwx->d[i], pws->d[i], 64);
3198        }
3199        break;
3200    default:
3201        assert(0);
3202    }
3203
3204    check_msacsr_cause(env, GETPC());
3205
3206    msa_move_v(pwd, pwx);
3207}
3208
3209void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3210                          uint32_t ws)
3211{
3212    wr_t wx, *pwx = &wx;
3213    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3214    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3215    uint32_t i;
3216
3217    clear_msacsr_cause(env);
3218
3219    switch (df) {
3220    case DF_WORD:
3221        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3222            /* Half precision floats come in two formats: standard
3223               IEEE and "ARM" format.  The latter gains extra exponent
3224               range by omitting the NaN/Inf encodings.  */
3225            flag ieee = 1;
3226
3227            MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
3228        }
3229        break;
3230    case DF_DOUBLE:
3231        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3232            MSA_FLOAT_UNOP(pwx->d[i], from_float32, Lw(pws, i), 64);
3233        }
3234        break;
3235    default:
3236        assert(0);
3237    }
3238
3239    check_msacsr_cause(env, GETPC());
3240    msa_move_v(pwd, pwx);
3241}
3242
3243void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3244                          uint32_t ws)
3245{
3246    wr_t wx, *pwx = &wx;
3247    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3248    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3249    uint32_t i;
3250
3251    clear_msacsr_cause(env);
3252
3253    switch (df) {
3254    case DF_WORD:
3255        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3256            /* Half precision floats come in two formats: standard
3257               IEEE and "ARM" format.  The latter gains extra exponent
3258               range by omitting the NaN/Inf encodings.  */
3259            flag ieee = 1;
3260
3261            MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);
3262        }
3263        break;
3264    case DF_DOUBLE:
3265        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3266            MSA_FLOAT_UNOP(pwx->d[i], from_float32, Rw(pws, i), 64);
3267        }
3268        break;
3269    default:
3270        assert(0);
3271    }
3272
3273    check_msacsr_cause(env, GETPC());
3274    msa_move_v(pwd, pwx);
3275}
3276
3277void helper_msa_ffql_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3278                        uint32_t ws)
3279{
3280    wr_t wx, *pwx = &wx;
3281    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3282    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3283    uint32_t i;
3284
3285    switch (df) {
3286    case DF_WORD:
3287        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3288            MSA_FLOAT_UNOP(pwx->w[i], from_q16, Lh(pws, i), 32);
3289        }
3290        break;
3291    case DF_DOUBLE:
3292        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3293            MSA_FLOAT_UNOP(pwx->d[i], from_q32, Lw(pws, i), 64);
3294        }
3295        break;
3296    default:
3297        assert(0);
3298    }
3299
3300    msa_move_v(pwd, pwx);
3301}
3302
3303void helper_msa_ffqr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3304                        uint32_t ws)
3305{
3306    wr_t wx, *pwx = &wx;
3307    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3308    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3309    uint32_t i;
3310
3311    switch (df) {
3312    case DF_WORD:
3313        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3314            MSA_FLOAT_UNOP(pwx->w[i], from_q16, Rh(pws, i), 32);
3315        }
3316        break;
3317    case DF_DOUBLE:
3318        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3319            MSA_FLOAT_UNOP(pwx->d[i], from_q32, Rw(pws, i), 64);
3320        }
3321        break;
3322    default:
3323        assert(0);
3324    }
3325
3326    msa_move_v(pwd, pwx);
3327}
3328
3329void helper_msa_ftint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3330                           uint32_t ws)
3331{
3332    wr_t wx, *pwx = &wx;
3333    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3334    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3335    uint32_t i;
3336
3337    clear_msacsr_cause(env);
3338
3339    switch (df) {
3340    case DF_WORD:
3341        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3342            MSA_FLOAT_UNOP0(pwx->w[i], to_int32, pws->w[i], 32);
3343        }
3344        break;
3345    case DF_DOUBLE:
3346        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3347            MSA_FLOAT_UNOP0(pwx->d[i], to_int64, pws->d[i], 64);
3348        }
3349        break;
3350    default:
3351        assert(0);
3352    }
3353
3354    check_msacsr_cause(env, GETPC());
3355
3356    msa_move_v(pwd, pwx);
3357}
3358
3359void helper_msa_ftint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3360                           uint32_t ws)
3361{
3362    wr_t wx, *pwx = &wx;
3363    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3364    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3365    uint32_t i;
3366
3367    clear_msacsr_cause(env);
3368
3369    switch (df) {
3370    case DF_WORD:
3371        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3372            MSA_FLOAT_UNOP0(pwx->w[i], to_uint32, pws->w[i], 32);
3373        }
3374        break;
3375    case DF_DOUBLE:
3376        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3377            MSA_FLOAT_UNOP0(pwx->d[i], to_uint64, pws->d[i], 64);
3378        }
3379        break;
3380    default:
3381        assert(0);
3382    }
3383
3384    check_msacsr_cause(env, GETPC());
3385
3386    msa_move_v(pwd, pwx);
3387}
3388
3389#define float32_from_int32 int32_to_float32
3390#define float32_from_uint32 uint32_to_float32
3391
3392#define float64_from_int64 int64_to_float64
3393#define float64_from_uint64 uint64_to_float64
3394
3395void helper_msa_ffint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3396                           uint32_t ws)
3397{
3398    wr_t wx, *pwx = &wx;
3399    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3400    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3401    uint32_t i;
3402
3403    clear_msacsr_cause(env);
3404
3405    switch (df) {
3406    case DF_WORD:
3407        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3408            MSA_FLOAT_UNOP(pwx->w[i], from_int32, pws->w[i], 32);
3409        }
3410        break;
3411    case DF_DOUBLE:
3412        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3413            MSA_FLOAT_UNOP(pwx->d[i], from_int64, pws->d[i], 64);
3414        }
3415        break;
3416    default:
3417        assert(0);
3418    }
3419
3420    check_msacsr_cause(env, GETPC());
3421
3422    msa_move_v(pwd, pwx);
3423}
3424
3425void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
3426                           uint32_t ws)
3427{
3428    wr_t wx, *pwx = &wx;
3429    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3430    wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3431    uint32_t i;
3432
3433    clear_msacsr_cause(env);
3434
3435    switch (df) {
3436    case DF_WORD:
3437        for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
3438            MSA_FLOAT_UNOP(pwx->w[i], from_uint32, pws->w[i], 32);
3439        }
3440        break;
3441    case DF_DOUBLE:
3442        for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
3443            MSA_FLOAT_UNOP(pwx->d[i], from_uint64, pws->d[i], 64);
3444        }
3445        break;
3446    default:
3447        assert(0);
3448    }
3449
3450    check_msacsr_cause(env, GETPC());
3451
3452    msa_move_v(pwd, pwx);
3453}
3454