1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26#ifndef ARM_TCG_TARGET_H
27#define ARM_TCG_TARGET_H
28
29#undef TCG_TARGET_STACK_GROWSUP
30#define TCG_TARGET_INSN_UNIT_SIZE 4
31#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
32
33typedef enum {
34 TCG_REG_R0 = 0,
35 TCG_REG_R1,
36 TCG_REG_R2,
37 TCG_REG_R3,
38 TCG_REG_R4,
39 TCG_REG_R5,
40 TCG_REG_R6,
41 TCG_REG_R7,
42 TCG_REG_R8,
43 TCG_REG_R9,
44 TCG_REG_R10,
45 TCG_REG_R11,
46 TCG_REG_R12,
47 TCG_REG_R13,
48 TCG_REG_R14,
49 TCG_REG_PC,
50} TCGReg;
51
52#define TCG_TARGET_NB_REGS 16
53
54#ifdef __ARM_ARCH_EXT_IDIV__
55#define use_idiv_instructions 1
56#else
57extern bool use_idiv_instructions;
58#endif
59
60
61
62#define TCG_REG_CALL_STACK TCG_REG_R13
63#define TCG_TARGET_STACK_ALIGN 8
64#define TCG_TARGET_CALL_ALIGN_ARGS 1
65#define TCG_TARGET_CALL_STACK_OFFSET 0
66
67
68#define TCG_TARGET_HAS_ext8s_i32 1
69#define TCG_TARGET_HAS_ext16s_i32 1
70#define TCG_TARGET_HAS_ext8u_i32 0
71#define TCG_TARGET_HAS_ext16u_i32 1
72#define TCG_TARGET_HAS_bswap16_i32 1
73#define TCG_TARGET_HAS_bswap32_i32 1
74#define TCG_TARGET_HAS_not_i32 1
75#define TCG_TARGET_HAS_neg_i32 1
76#define TCG_TARGET_HAS_rot_i32 1
77#define TCG_TARGET_HAS_andc_i32 1
78#define TCG_TARGET_HAS_orc_i32 0
79#define TCG_TARGET_HAS_eqv_i32 0
80#define TCG_TARGET_HAS_nand_i32 0
81#define TCG_TARGET_HAS_nor_i32 0
82#define TCG_TARGET_HAS_deposit_i32 1
83#define TCG_TARGET_HAS_movcond_i32 1
84#define TCG_TARGET_HAS_mulu2_i32 1
85#define TCG_TARGET_HAS_muls2_i32 1
86#define TCG_TARGET_HAS_muluh_i32 0
87#define TCG_TARGET_HAS_mulsh_i32 0
88#define TCG_TARGET_HAS_div_i32 use_idiv_instructions
89#define TCG_TARGET_HAS_rem_i32 0
90
91extern bool tcg_target_deposit_valid(int ofs, int len);
92#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid
93
94enum {
95 TCG_AREG0 = TCG_REG_R6,
96};
97
98static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
99{
100#if QEMU_GNUC_PREREQ(4, 1)
101 __builtin___clear_cache((char *) start, (char *) stop);
102#else
103 register uintptr_t _beg __asm("a1") = start;
104 register uintptr_t _end __asm("a2") = stop;
105 register uintptr_t _flg __asm("a3") = 0;
106 __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
107#endif
108}
109
110#endif
111