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13#ifndef LIBQOS_PCI_H
14#define LIBQOS_PCI_H
15
16#include "libqtest.h"
17
18#define QPCI_PIO_LIMIT 0x10000
19
20#define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn))
21
22typedef struct QPCIDevice QPCIDevice;
23typedef struct QPCIBus QPCIBus;
24typedef struct QPCIBar QPCIBar;
25
26struct QPCIBus {
27 uint8_t (*pio_readb)(QPCIBus *bus, uint32_t addr);
28 uint16_t (*pio_readw)(QPCIBus *bus, uint32_t addr);
29 uint32_t (*pio_readl)(QPCIBus *bus, uint32_t addr);
30 uint64_t (*pio_readq)(QPCIBus *bus, uint32_t addr);
31
32 void (*pio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value);
33 void (*pio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value);
34 void (*pio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value);
35 void (*pio_writeq)(QPCIBus *bus, uint32_t addr, uint64_t value);
36
37 void (*memread)(QPCIBus *bus, uint32_t addr, void *buf, size_t len);
38 void (*memwrite)(QPCIBus *bus, uint32_t addr, const void *buf, size_t len);
39
40 uint8_t (*config_readb)(QPCIBus *bus, int devfn, uint8_t offset);
41 uint16_t (*config_readw)(QPCIBus *bus, int devfn, uint8_t offset);
42 uint32_t (*config_readl)(QPCIBus *bus, int devfn, uint8_t offset);
43
44 void (*config_writeb)(QPCIBus *bus, int devfn,
45 uint8_t offset, uint8_t value);
46 void (*config_writew)(QPCIBus *bus, int devfn,
47 uint8_t offset, uint16_t value);
48 void (*config_writel)(QPCIBus *bus, int devfn,
49 uint8_t offset, uint32_t value);
50
51 uint16_t pio_alloc_ptr;
52 uint64_t mmio_alloc_ptr, mmio_limit;
53};
54
55struct QPCIBar {
56 uint64_t addr;
57};
58
59struct QPCIDevice
60{
61 QPCIBus *bus;
62 int devfn;
63 bool msix_enabled;
64 QPCIBar msix_table_bar, msix_pba_bar;
65 uint64_t msix_table_off, msix_pba_off;
66};
67
68void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id,
69 void (*func)(QPCIDevice *dev, int devfn, void *data),
70 void *data);
71QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn);
72
73void qpci_device_enable(QPCIDevice *dev);
74uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id);
75void qpci_msix_enable(QPCIDevice *dev);
76void qpci_msix_disable(QPCIDevice *dev);
77bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry);
78bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry);
79uint16_t qpci_msix_table_size(QPCIDevice *dev);
80
81uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset);
82uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset);
83uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset);
84
85void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value);
86void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value);
87void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value);
88
89uint8_t qpci_io_readb(QPCIDevice *dev, QPCIBar token, uint64_t off);
90uint16_t qpci_io_readw(QPCIDevice *dev, QPCIBar token, uint64_t off);
91uint32_t qpci_io_readl(QPCIDevice *dev, QPCIBar token, uint64_t off);
92uint64_t qpci_io_readq(QPCIDevice *dev, QPCIBar token, uint64_t off);
93
94void qpci_io_writeb(QPCIDevice *dev, QPCIBar token, uint64_t off,
95 uint8_t value);
96void qpci_io_writew(QPCIDevice *dev, QPCIBar token, uint64_t off,
97 uint16_t value);
98void qpci_io_writel(QPCIDevice *dev, QPCIBar token, uint64_t off,
99 uint32_t value);
100void qpci_io_writeq(QPCIDevice *dev, QPCIBar token, uint64_t off,
101 uint64_t value);
102
103void qpci_memread(QPCIDevice *bus, QPCIBar token, uint64_t off,
104 void *buf, size_t len);
105void qpci_memwrite(QPCIDevice *bus, QPCIBar token, uint64_t off,
106 const void *buf, size_t len);
107QPCIBar qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr);
108void qpci_iounmap(QPCIDevice *dev, QPCIBar addr);
109QPCIBar qpci_legacy_iomap(QPCIDevice *dev, uint16_t addr);
110
111void qpci_plug_device_test(const char *driver, const char *id,
112 uint8_t slot, const char *opts);
113void qpci_unplug_acpi_device_test(const char *id, uint8_t slot);
114#endif
115