LXR qemu/tests/m25p80-test.c

   1/*
   2 * QTest testcase for the M25P80 Flash (Using the Aspeed SPI
   3 * Controller)
   4 *
   5 * Copyright (C) 2016 IBM Corp.
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 */
  25
  26#include "qemu/osdep.h"
  27#include "qemu/bswap.h"
  28#include "libqtest.h"
  29
  30/*
  31 * ASPEED SPI Controller registers
  32 */
  33#define R_CONF              0x00
  34#define   CONF_ENABLE_W0       (1 << 16)
  35#define R_CE_CTRL           0x04
  36#define   CRTL_EXTENDED0       0  /* 32 bit addressing for SPI */
  37#define R_CTRL0             0x10
  38#define   CTRL_CE_STOP_ACTIVE  (1 << 2)
  39#define   CTRL_USERMODE        0x3
  40
  41#define ASPEED_FMC_BASE    0x1E620000
  42#define ASPEED_FLASH_BASE  0x20000000
  43
  44/*
  45 * Flash commands
  46 */
  47enum {
  48    JEDEC_READ = 0x9f,
  49    BULK_ERASE = 0xc7,
  50    READ = 0x03,
  51    PP = 0x02,
  52    WREN = 0x6,
  53    EN_4BYTE_ADDR = 0xB7,
  54    ERASE_SECTOR = 0xd8,
  55};
  56
  57#define FLASH_JEDEC         0x20ba19  /* n25q256a */
  58#define FLASH_SIZE          (32 * 1024 * 1024)
  59
  60#define PAGE_SIZE           256
  61
  62/*
  63 * Use an explicit bswap for the values read/wrote to the flash region
  64 * as they are BE and the Aspeed CPU is LE.
  65 */
  66static inline uint32_t make_be32(uint32_t data)
  67{
  68    return bswap32(data);
  69}
  70
  71static void spi_conf(uint32_t value)
  72{
  73    uint32_t conf = readl(ASPEED_FMC_BASE + R_CONF);
  74
  75    conf |= value;
  76    writel(ASPEED_FMC_BASE + R_CONF, conf);
  77}
  78
  79static void spi_ctrl_start_user(void)
  80{
  81    uint32_t ctrl = readl(ASPEED_FMC_BASE + R_CTRL0);
  82
  83    ctrl |= CTRL_USERMODE | CTRL_CE_STOP_ACTIVE;
  84    writel(ASPEED_FMC_BASE + R_CTRL0, ctrl);
  85
  86    ctrl &= ~CTRL_CE_STOP_ACTIVE;
  87    writel(ASPEED_FMC_BASE + R_CTRL0, ctrl);
  88}
  89
  90static void spi_ctrl_stop_user(void)
  91{
  92    uint32_t ctrl = readl(ASPEED_FMC_BASE + R_CTRL0);
  93
  94    ctrl |= CTRL_USERMODE | CTRL_CE_STOP_ACTIVE;
  95    writel(ASPEED_FMC_BASE + R_CTRL0, ctrl);
  96}
  97
  98static void test_read_jedec(void)
  99{
 100    uint32_t jedec = 0x0;
 101
 102    spi_conf(CONF_ENABLE_W0);
 103
 104    spi_ctrl_start_user();
 105    writeb(ASPEED_FLASH_BASE, JEDEC_READ);
 106    jedec |= readb(ASPEED_FLASH_BASE) << 16;
 107    jedec |= readb(ASPEED_FLASH_BASE) << 8;
 108    jedec |= readb(ASPEED_FLASH_BASE);
 109    spi_ctrl_stop_user();
 110
 111    g_assert_cmphex(jedec, ==, FLASH_JEDEC);
 112}
 113
 114static void read_page(uint32_t addr, uint32_t *page)
 115{
 116    int i;
 117
 118    spi_ctrl_start_user();
 119
 120    writeb(ASPEED_FLASH_BASE, EN_4BYTE_ADDR);
 121    writeb(ASPEED_FLASH_BASE, READ);
 122    writel(ASPEED_FLASH_BASE, make_be32(addr));
 123
 124    /* Continuous read are supported */
 125    for (i = 0; i < PAGE_SIZE / 4; i++) {
 126        page[i] = make_be32(readl(ASPEED_FLASH_BASE));
 127    }
 128    spi_ctrl_stop_user();
 129}
 130
 131static void test_erase_sector(void)
 132{
 133    uint32_t some_page_addr = 0x600 * PAGE_SIZE;
 134    uint32_t page[PAGE_SIZE / 4];
 135    int i;
 136
 137    spi_conf(CONF_ENABLE_W0);
 138
 139    spi_ctrl_start_user();
 140    writeb(ASPEED_FLASH_BASE, WREN);
 141    writeb(ASPEED_FLASH_BASE, EN_4BYTE_ADDR);
 142    writeb(ASPEED_FLASH_BASE, ERASE_SECTOR);
 143    writel(ASPEED_FLASH_BASE, make_be32(some_page_addr));
 144    spi_ctrl_stop_user();
 145
 146    /* Previous page should be full of zeroes as backend is not
 147     * initialized */
 148    read_page(some_page_addr - PAGE_SIZE, page);
 149    for (i = 0; i < PAGE_SIZE / 4; i++) {
 150        g_assert_cmphex(page[i], ==, 0x0);
 151    }
 152
 153    /* But this one was erased */
 154    read_page(some_page_addr, page);
 155    for (i = 0; i < PAGE_SIZE / 4; i++) {
 156        g_assert_cmphex(page[i], ==, 0xffffffff);
 157    }
 158}
 159
 160static void test_erase_all(void)
 161{
 162    uint32_t some_page_addr = 0x15000 * PAGE_SIZE;
 163    uint32_t page[PAGE_SIZE / 4];
 164    int i;
 165
 166    spi_conf(CONF_ENABLE_W0);
 167
 168    /* Check some random page. Should be full of zeroes as backend is
 169     * not initialized */
 170    read_page(some_page_addr, page);
 171    for (i = 0; i < PAGE_SIZE / 4; i++) {
 172        g_assert_cmphex(page[i], ==, 0x0);
 173    }
 174
 175    spi_ctrl_start_user();
 176    writeb(ASPEED_FLASH_BASE, WREN);
 177    writeb(ASPEED_FLASH_BASE, BULK_ERASE);
 178    spi_ctrl_stop_user();
 179
 180    /* Recheck that some random page */
 181    read_page(some_page_addr, page);
 182    for (i = 0; i < PAGE_SIZE / 4; i++) {
 183        g_assert_cmphex(page[i], ==, 0xffffffff);
 184    }
 185}
 186
 187static void test_write_page(void)
 188{
 189    uint32_t my_page_addr = 0x14000 * PAGE_SIZE; /* beyond 16MB */
 190    uint32_t some_page_addr = 0x15000 * PAGE_SIZE;
 191    uint32_t page[PAGE_SIZE / 4];
 192    int i;
 193
 194    spi_conf(CONF_ENABLE_W0);
 195
 196    spi_ctrl_start_user();
 197    writeb(ASPEED_FLASH_BASE, EN_4BYTE_ADDR);
 198    writeb(ASPEED_FLASH_BASE, PP);
 199    writel(ASPEED_FLASH_BASE, make_be32(my_page_addr));
 200
 201    /* Fill the page with its own addresses */
 202    for (i = 0; i < PAGE_SIZE / 4; i++) {
 203        writel(ASPEED_FLASH_BASE, make_be32(my_page_addr + i * 4));
 204    }
 205    spi_ctrl_stop_user();
 206
 207    /* Check what was written */
 208    read_page(my_page_addr, page);
 209    for (i = 0; i < PAGE_SIZE / 4; i++) {
 210        g_assert_cmphex(page[i], ==, my_page_addr + i * 4);
 211    }
 212
 213    /* Check some other page. It should be full of 0xff */
 214    read_page(some_page_addr, page);
 215    for (i = 0; i < PAGE_SIZE / 4; i++) {
 216        g_assert_cmphex(page[i], ==, 0xffffffff);
 217    }
 218}
 219
 220static char tmp_path[] = "/tmp/qtest.m25p80.XXXXXX";
 221
 222int main(int argc, char **argv)
 223{
 224    int ret;
 225    int fd;
 226    char *args;
 227
 228    g_test_init(&argc, &argv, NULL);
 229
 230    fd = mkstemp(tmp_path);
 231    g_assert(fd >= 0);
 232    ret = ftruncate(fd, FLASH_SIZE);
 233    g_assert(ret == 0);
 234    close(fd);
 235
 236    args = g_strdup_printf("-m 256 -machine palmetto-bmc "
 237                           "-drive file=%s,format=raw,if=mtd",
 238                           tmp_path);
 239    qtest_start(args);
 240
 241    qtest_add_func("/m25p80/read_jedec", test_read_jedec);
 242    qtest_add_func("/m25p80/erase_sector", test_erase_sector);
 243    qtest_add_func("/m25p80/erase_all",  test_erase_all);
 244    qtest_add_func("/m25p80/write_page", test_write_page);
 245
 246    ret = g_test_run();
 247
 248    qtest_quit(global_qtest);
 249    unlink(tmp_path);
 250    g_free(args);
 251    return ret;
 252}
 253