LXR qemu/hw/misc/arm-smmu.c

   1/*
   2 * QEMU model of the ARM SMMU-500
   3 *
   4 * Copyright (c) 2014 Xilinx Inc.
   5 *
   6 * Partially autogenerated by xregqemu.py 2014-08-25.
   7 * Written by Edgar E. Iglesias.
   8 *
   9 * Permission is hereby granted, free of charge, to any person obtaining a copy
  10 * of this software and associated documentation files (the "Software"), to deal
  11 * in the Software without restriction, including without limitation the rights
  12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13 * copies of the Software, and to permit persons to whom the Software is
  14 * furnished to do so, subject to the following conditions:
  15 *
  16 * The above copyright notice and this permission notice shall be included in
  17 * all copies or substantial portions of the Software.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  25 * THE SOFTWARE.
  26 */
  27
  28#include "qemu/osdep.h"
  29#include "hw/sysbus.h"
  30#include "hw/register-dep.h"
  31#include "qemu/bitops.h"
  32#include "qemu/log.h"
  33#include "qapi/error.h"
  34#include "sysemu/dma.h"
  35
  36#include "hw/fdt_generic_util.h"
  37
  38#ifndef XILINX_SMMU500_ERR_DEBUG
  39#define XILINX_SMMU500_ERR_DEBUG 0
  40#endif
  41
  42#define TYPE_XILINX_SMMU500 "arm.mmu-500"
  43#define TYPE_XILINX_SMMU500_IOMMU_MEMORY_REGION "arm.mmu-500-iommu-memory-region"
  44
  45#define XILINX_SMMU500(obj) \
  46     OBJECT_CHECK(SMMU, (obj), TYPE_XILINX_SMMU500)
  47
  48#define DEBUG_DEV_SMMU 0
  49#define DEBUG_DEV_SMMU_PTW 0
  50
  51#define D(...) do {             \
  52    if (DEBUG_DEV_SMMU) {       \
  53        qemu_log(__VA_ARGS__);  \
  54    }                           \
  55} while (0);
  56
  57#define D_PTW(...) do {         \
  58    if (DEBUG_DEV_SMMU_PTW) {   \
  59        qemu_log(__VA_ARGS__);  \
  60    }                           \
  61} while (0);
  62
  63DEP_REG32(SMMU_SCR0, 0x0)
  64    DEP_FIELD(SMMU_SCR0, NSCFG, 2, 28)
  65    DEP_FIELD(SMMU_SCR0, WACFG, 2, 26)
  66    DEP_FIELD(SMMU_SCR0, RACFG, 2, 24)
  67    DEP_FIELD(SMMU_SCR0, SHCFG, 2, 22)
  68    DEP_FIELD(SMMU_SCR0, SMCFCFG, 1, 21)
  69    DEP_FIELD(SMMU_SCR0, MTCFG, 1, 20)
  70    DEP_FIELD(SMMU_SCR0, MEMATTR, 4, 16)
  71    DEP_FIELD(SMMU_SCR0, BSU, 2, 14)
  72    DEP_FIELD(SMMU_SCR0, FB, 1, 13)
  73    DEP_FIELD(SMMU_SCR0, PTM, 1, 12)
  74    DEP_FIELD(SMMU_SCR0, USFCFG, 1, 10)
  75    DEP_FIELD(SMMU_SCR0, GSE, 1, 9)
  76    DEP_FIELD(SMMU_SCR0, STALLD, 1, 8)
  77    DEP_FIELD(SMMU_SCR0, TRANSIENTCFG, 2, 6)
  78    DEP_FIELD(SMMU_SCR0, GCFGFIE, 1, 5)
  79    DEP_FIELD(SMMU_SCR0, GCFGFRE, 1, 4)
  80    DEP_FIELD(SMMU_SCR0, GFIE, 1, 2)
  81    DEP_FIELD(SMMU_SCR0, GFRE, 1, 1)
  82    DEP_FIELD(SMMU_SCR0, CLIENTPD, 1, 0)
  83DEP_REG32(SMMU_SCR1, 0x4)
  84    DEP_FIELD(SMMU_SCR1, NSCAFRO, 1, 28)
  85    DEP_FIELD(SMMU_SCR1, SPMEN, 1, 27)
  86    DEP_FIELD(SMMU_SCR1, SIF, 1, 26)
  87    DEP_FIELD(SMMU_SCR1, GEFRO, 1, 25)
  88    DEP_FIELD(SMMU_SCR1, GASRAE, 1, 24)
  89    DEP_FIELD(SMMU_SCR1, NSNUMIRPTO, 8, 16)
  90    DEP_FIELD(SMMU_SCR1, NSNUMSMRGO, 6, 8)
  91    DEP_FIELD(SMMU_SCR1, NSNUMCBO, 5, 0)
  92DEP_REG32(SMMU_SACR, 0x10)
  93    DEP_FIELD(SMMU_SACR, NORMALIZE, 1, 27)
  94    DEP_FIELD(SMMU_SACR, CACHE_LOCK, 1, 26)
  95    DEP_FIELD(SMMU_SACR, PAGESIZE, 1, 16)
  96    DEP_FIELD(SMMU_SACR, S2CRB_TLBEN, 1, 10)
  97    DEP_FIELD(SMMU_SACR, MMUDISB_TLBEN, 1, 9)
  98    DEP_FIELD(SMMU_SACR, SMTNMB_TLBEN, 1, 8)
  99    DEP_FIELD(SMMU_SACR, S1WC2EN, 1, 2)
 100DEP_REG32(SMMU_SIDR0, 0x20)
 101    DEP_FIELD(SMMU_SIDR0, SES, 1, 31)
 102    DEP_FIELD(SMMU_SIDR0, S1TS, 1, 30)
 103    DEP_FIELD(SMMU_SIDR0, S2TS, 1, 29)
 104    DEP_FIELD(SMMU_SIDR0, NTS, 1, 28)
 105    DEP_FIELD(SMMU_SIDR0, SMS, 1, 27)
 106    DEP_FIELD(SMMU_SIDR0, ATOSNS, 1, 26)
 107    DEP_FIELD(SMMU_SIDR0, PTFS, 2, 24)
 108    DEP_FIELD(SMMU_SIDR0, NUMIRPT, 8, 16)
 109    DEP_FIELD(SMMU_SIDR0, CTTW, 1, 14)
 110    DEP_FIELD(SMMU_SIDR0, BTM, 1, 13)
 111    DEP_FIELD(SMMU_SIDR0, NUMSIDB, 4, 9)
 112    DEP_FIELD(SMMU_SIDR0, NUMSMRG, 8, 0)
 113DEP_REG32(SMMU_SIDR1, 0x24)
 114    DEP_FIELD(SMMU_SIDR1, PAGESIZE, 1, 31)
 115    DEP_FIELD(SMMU_SIDR1, NUMPAGENDXB, 3, 28)
 116    DEP_FIELD(SMMU_SIDR1, NUMS2CB, 8, 16)
 117    DEP_FIELD(SMMU_SIDR1, SMCD, 1, 15)
 118    DEP_FIELD(SMMU_SIDR1, SSDTP, 1, 12)
 119    DEP_FIELD(SMMU_SIDR1, NUMSSDNDXB, 4, 8)
 120    DEP_FIELD(SMMU_SIDR1, NUMCB, 8, 0)
 121DEP_REG32(SMMU_SIDR2, 0x28)
 122    DEP_FIELD(SMMU_SIDR2, PTFSV8_64KB, 1, 14)
 123    DEP_FIELD(SMMU_SIDR2, PTFSV8_16KB, 1, 13)
 124    DEP_FIELD(SMMU_SIDR2, TFSV8_4KB, 1, 12)
 125    DEP_FIELD(SMMU_SIDR2, UBS, 4, 8)
 126    DEP_FIELD(SMMU_SIDR2, OAS, 4, 4)
 127    DEP_FIELD(SMMU_SIDR2, IAS, 4, 0)
 128DEP_REG32(SMMU_SIDR7, 0x3c)
 129    DEP_FIELD(SMMU_SIDR7, MAJOR, 4, 4)
 130    DEP_FIELD(SMMU_SIDR7, MINOR, 4, 0)
 131DEP_REG32(SMMU_SGFAR_LOW, 0x40)
 132DEP_REG32(SMMU_SGFAR_HIGH, 0x44)
 133    DEP_FIELD(SMMU_SGFAR_HIGH, FADDR, 17, 0)
 134DEP_REG32(SMMU_SGFSR, 0x48)
 135    DEP_FIELD(SMMU_SGFSR, MULTI, 1, 31)
 136    DEP_FIELD(SMMU_SGFSR, UUT, 1, 8)
 137    DEP_FIELD(SMMU_SGFSR, PF, 1, 7)
 138    DEP_FIELD(SMMU_SGFSR, EF, 1, 6)
 139    DEP_FIELD(SMMU_SGFSR, CAF, 1, 5)
 140    DEP_FIELD(SMMU_SGFSR, UCIF, 1, 4)
 141    DEP_FIELD(SMMU_SGFSR, UCBF, 1, 3)
 142    DEP_FIELD(SMMU_SGFSR, SMCF, 1, 2)
 143    DEP_FIELD(SMMU_SGFSR, USF, 1, 1)
 144    DEP_FIELD(SMMU_SGFSR, ICF, 1, 0)
 145DEP_REG32(SMMU_SGFSRRESTORE, 0x4c)
 146    DEP_FIELD(SMMU_SGFSRRESTORE, MULTI, 1, 31)
 147    DEP_FIELD(SMMU_SGFSRRESTORE, UUT, 1, 8)
 148    DEP_FIELD(SMMU_SGFSRRESTORE, PF, 1, 7)
 149    DEP_FIELD(SMMU_SGFSRRESTORE, EF, 1, 6)
 150    DEP_FIELD(SMMU_SGFSRRESTORE, CAF, 1, 5)
 151    DEP_FIELD(SMMU_SGFSRRESTORE, UCIF, 1, 4)
 152    DEP_FIELD(SMMU_SGFSRRESTORE, UCBF, 1, 3)
 153    DEP_FIELD(SMMU_SGFSRRESTORE, SMCF, 1, 2)
 154    DEP_FIELD(SMMU_SGFSRRESTORE, USF, 1, 1)
 155    DEP_FIELD(SMMU_SGFSRRESTORE, ICF, 1, 0)
 156DEP_REG32(SMMU_SGFSYNR0, 0x50)
 157    DEP_FIELD(SMMU_SGFSYNR0, ATS, 1, 6)
 158    DEP_FIELD(SMMU_SGFSYNR0, NSATTR, 1, 5)
 159    DEP_FIELD(SMMU_SGFSYNR0, NSSTATE, 1, 4)
 160    DEP_FIELD(SMMU_SGFSYNR0, IND, 1, 3)
 161    DEP_FIELD(SMMU_SGFSYNR0, PNU, 1, 2)
 162    DEP_FIELD(SMMU_SGFSYNR0, WNR, 1, 1)
 163DEP_REG32(SMMU_SGFSYNR1, 0x54)
 164    DEP_FIELD(SMMU_SGFSYNR1, SSD_INDEX, 15, 16)
 165    DEP_FIELD(SMMU_SGFSYNR1, STREAMID, 15, 0)
 166DEP_REG32(SMMU_STLBIALL, 0x60)
 167DEP_REG32(SMMU_TLBIVMID, 0x64)
 168    DEP_FIELD(SMMU_TLBIVMID, VMID, 8, 0)
 169DEP_REG32(SMMU_TLBIALLNSNH, 0x68)
 170DEP_REG32(SMMU_STLBGSYNC, 0x70)
 171DEP_REG32(SMMU_STLBGSTATUS, 0x74)
 172    DEP_FIELD(SMMU_STLBGSTATUS, GSACTIVE, 1, 0)
 173DEP_REG32(SMMU_DBGRPTRTBU, 0x80)
 174    DEP_FIELD(SMMU_DBGRPTRTBU, TBU_ID, 3, 24)
 175    DEP_FIELD(SMMU_DBGRPTRTBU, TLB_POINTER, 12, 4)
 176    DEP_FIELD(SMMU_DBGRPTRTBU, TLB_ENTRY_POINTER, 4, 0)
 177DEP_REG32(SMMU_DBGRDATATBU, 0x84)
 178DEP_REG32(SMMU_DBGRPTRTCU, 0x88)
 179    DEP_FIELD(SMMU_DBGRPTRTCU, DATASRC, 2, 26)
 180    DEP_FIELD(SMMU_DBGRPTRTCU, WAY_RAM, 2, 24)
 181    DEP_FIELD(SMMU_DBGRPTRTCU, TLB_POINTER, 9, 4)
 182    DEP_FIELD(SMMU_DBGRPTRTCU, TLB_ENTRY_POINTER, 4, 0)
 183DEP_REG32(SMMU_DBGRDATATCU, 0x8c)
 184DEP_REG32(SMMU_STLBIVALM_LOW, 0xa0)
 185DEP_REG32(SMMU_STLBIVALM_HIGH, 0xa4)
 186    DEP_FIELD(SMMU_STLBIVALM_HIGH, ADDRESS, 5, 0)
 187DEP_REG32(SMMU_STLBIVAM_LOW, 0xa8)
 188DEP_REG32(SMMU_STLBIVAM_HIGH, 0xac)
 189    DEP_FIELD(SMMU_STLBIVAM_HIGH, ADDRESS, 5, 0)
 190DEP_REG32(SMMU_STLBIALLM, 0xbc)
 191DEP_REG32(SMMU_NSCR0, 0x400)
 192    DEP_FIELD(SMMU_NSCR0, WACFG, 2, 26)
 193    DEP_FIELD(SMMU_NSCR0, RACFG, 2, 24)
 194    DEP_FIELD(SMMU_NSCR0, SHCFG, 2, 22)
 195    DEP_FIELD(SMMU_NSCR0, SMCFCFG, 1, 21)
 196    DEP_FIELD(SMMU_NSCR0, MTCFG, 1, 20)
 197    DEP_FIELD(SMMU_NSCR0, MEMATTR, 4, 16)
 198    DEP_FIELD(SMMU_NSCR0, BSU, 2, 14)
 199    DEP_FIELD(SMMU_NSCR0, FB, 1, 13)
 200    DEP_FIELD(SMMU_NSCR0, PTM, 1, 12)
 201    DEP_FIELD(SMMU_NSCR0, VMIDPNE, 1, 11)
 202    DEP_FIELD(SMMU_NSCR0, USFCFG, 1, 10)
 203    DEP_FIELD(SMMU_NSCR0, GSE, 1, 9)
 204    DEP_FIELD(SMMU_NSCR0, STALLD, 1, 8)
 205    DEP_FIELD(SMMU_NSCR0, TRANSIENTCFG, 2, 6)
 206    DEP_FIELD(SMMU_NSCR0, GCFGFIE, 1, 5)
 207    DEP_FIELD(SMMU_NSCR0, GCFGFRE, 1, 4)
 208    DEP_FIELD(SMMU_NSCR0, GFIE, 1, 2)
 209    DEP_FIELD(SMMU_NSCR0, GFRE, 1, 1)
 210    DEP_FIELD(SMMU_NSCR0, CLIENTPD, 1, 0)
 211DEP_REG32(SMMU_NSACR, 0x410)
 212    DEP_FIELD(SMMU_NSACR, CACHE_LOCK, 1, 26)
 213    DEP_FIELD(SMMU_NSACR, DP4K_TBUDISB, 1, 25)
 214    DEP_FIELD(SMMU_NSACR, DP4K_TCUDISB, 1, 24)
 215    DEP_FIELD(SMMU_NSACR, S2CRB_TLBEN, 1, 10)
 216    DEP_FIELD(SMMU_NSACR, MMUDISB_TLBEN, 1, 9)
 217    DEP_FIELD(SMMU_NSACR, SMTNMB_TLBEN, 1, 8)
 218    DEP_FIELD(SMMU_NSACR, IPA2PA_CEN, 1, 4)
 219    DEP_FIELD(SMMU_NSACR, S2WC2EN, 1, 3)
 220    DEP_FIELD(SMMU_NSACR, S1WC2EN, 1, 2)
 221DEP_REG32(SMMU_NSGFAR_LOW, 0x440)
 222DEP_REG32(SMMU_NSGFAR_HIGH, 0x444)
 223    DEP_FIELD(SMMU_NSGFAR_HIGH, FADDR, 17, 0)
 224DEP_REG32(SMMU_NSGFSR, 0x448)
 225    DEP_FIELD(SMMU_NSGFSR, MULTI, 1, 31)
 226    DEP_FIELD(SMMU_NSGFSR, UUT, 1, 8)
 227    DEP_FIELD(SMMU_NSGFSR, EF, 1, 6)
 228    DEP_FIELD(SMMU_NSGFSR, CAF, 1, 5)
 229    DEP_FIELD(SMMU_NSGFSR, UCIF, 1, 4)
 230    DEP_FIELD(SMMU_NSGFSR, UCBF, 1, 3)
 231    DEP_FIELD(SMMU_NSGFSR, SMCF, 1, 2)
 232    DEP_FIELD(SMMU_NSGFSR, USF, 1, 1)
 233    DEP_FIELD(SMMU_NSGFSR, ICF, 1, 0)
 234DEP_REG32(SMMU_NSGFSRRESTORE, 0x44c)
 235    DEP_FIELD(SMMU_NSGFSRRESTORE, MULTI, 1, 31)
 236    DEP_FIELD(SMMU_NSGFSRRESTORE, UUT, 1, 8)
 237    DEP_FIELD(SMMU_NSGFSRRESTORE, EF, 1, 6)
 238    DEP_FIELD(SMMU_NSGFSRRESTORE, CAF, 1, 5)
 239    DEP_FIELD(SMMU_NSGFSRRESTORE, UCIF, 1, 4)
 240    DEP_FIELD(SMMU_NSGFSRRESTORE, UCBF, 1, 3)
 241    DEP_FIELD(SMMU_NSGFSRRESTORE, SMCF, 1, 2)
 242    DEP_FIELD(SMMU_NSGFSRRESTORE, USF, 1, 1)
 243    DEP_FIELD(SMMU_NSGFSRRESTORE, ICF, 1, 0)
 244DEP_REG32(SMMU_NSGFSYNR0, 0x450)
 245    DEP_FIELD(SMMU_NSGFSYNR0, ATS, 1, 6)
 246    DEP_FIELD(SMMU_NSGFSYNR0, IND, 1, 3)
 247    DEP_FIELD(SMMU_NSGFSYNR0, PNU, 1, 2)
 248    DEP_FIELD(SMMU_NSGFSYNR0, WNR, 1, 1)
 249    DEP_FIELD(SMMU_NSGFSYNR0, NESTED, 1, 0)
 250DEP_REG32(SMMU_NSGFSYNDR1, 0x454)
 251    DEP_FIELD(SMMU_NSGFSYNDR1, SSD_INDEX, 15, 16)
 252    DEP_FIELD(SMMU_NSGFSYNDR1, STREAMID, 15, 0)
 253DEP_REG32(SMMU_NSTLBGSYNC, 0x470)
 254DEP_REG32(SMMU_NSTLBGSTATUS, 0x474)
 255    DEP_FIELD(SMMU_NSTLBGSTATUS, GSACTIVE, 1, 0)
 256DEP_REG32(SMMU_SMR0, 0x800)
 257    DEP_FIELD(SMMU_SMR0, VALID, 1, 31)
 258    DEP_FIELD(SMMU_SMR0, MASK, 15, 16)
 259    DEP_FIELD(SMMU_SMR0, ID, 15, 0)
 260DEP_REG32(SMMU_SMR1, 0x804)
 261    DEP_FIELD(SMMU_SMR1, VALID, 1, 31)
 262    DEP_FIELD(SMMU_SMR1, MASK, 15, 16)
 263    DEP_FIELD(SMMU_SMR1, ID, 15, 0)
 264DEP_REG32(SMMU_SMR2, 0x808)
 265    DEP_FIELD(SMMU_SMR2, VALID, 1, 31)
 266    DEP_FIELD(SMMU_SMR2, MASK, 15, 16)
 267    DEP_FIELD(SMMU_SMR2, ID, 15, 0)
 268DEP_REG32(SMMU_SMR3, 0x80c)
 269    DEP_FIELD(SMMU_SMR3, VALID, 1, 31)
 270    DEP_FIELD(SMMU_SMR3, MASK, 15, 16)
 271    DEP_FIELD(SMMU_SMR3, ID, 15, 0)
 272DEP_REG32(SMMU_SMR4, 0x810)
 273    DEP_FIELD(SMMU_SMR4, VALID, 1, 31)
 274    DEP_FIELD(SMMU_SMR4, MASK, 15, 16)
 275    DEP_FIELD(SMMU_SMR4, ID, 15, 0)
 276DEP_REG32(SMMU_SMR5, 0x814)
 277    DEP_FIELD(SMMU_SMR5, VALID, 1, 31)
 278    DEP_FIELD(SMMU_SMR5, MASK, 15, 16)
 279    DEP_FIELD(SMMU_SMR5, ID, 15, 0)
 280DEP_REG32(SMMU_SMR6, 0x818)
 281    DEP_FIELD(SMMU_SMR6, VALID, 1, 31)
 282    DEP_FIELD(SMMU_SMR6, MASK, 15, 16)
 283    DEP_FIELD(SMMU_SMR6, ID, 15, 0)
 284DEP_REG32(SMMU_SMR7, 0x81c)
 285    DEP_FIELD(SMMU_SMR7, VALID, 1, 31)
 286    DEP_FIELD(SMMU_SMR7, MASK, 15, 16)
 287    DEP_FIELD(SMMU_SMR7, ID, 15, 0)
 288DEP_REG32(SMMU_SMR8, 0x820)
 289    DEP_FIELD(SMMU_SMR8, VALID, 1, 31)
 290    DEP_FIELD(SMMU_SMR8, MASK, 15, 16)
 291    DEP_FIELD(SMMU_SMR8, ID, 15, 0)
 292DEP_REG32(SMMU_SMR9, 0x824)
 293    DEP_FIELD(SMMU_SMR9, VALID, 1, 31)
 294    DEP_FIELD(SMMU_SMR9, MASK, 15, 16)
 295    DEP_FIELD(SMMU_SMR9, ID, 15, 0)
 296DEP_REG32(SMMU_SMR10, 0x828)
 297    DEP_FIELD(SMMU_SMR10, VALID, 1, 31)
 298    DEP_FIELD(SMMU_SMR10, MASK, 15, 16)
 299    DEP_FIELD(SMMU_SMR10, ID, 15, 0)
 300DEP_REG32(SMMU_SMR11, 0x82c)
 301    DEP_FIELD(SMMU_SMR11, VALID, 1, 31)
 302    DEP_FIELD(SMMU_SMR11, MASK, 15, 16)
 303    DEP_FIELD(SMMU_SMR11, ID, 15, 0)
 304DEP_REG32(SMMU_SMR12, 0x830)
 305    DEP_FIELD(SMMU_SMR12, VALID, 1, 31)
 306    DEP_FIELD(SMMU_SMR12, MASK, 15, 16)
 307    DEP_FIELD(SMMU_SMR12, ID, 15, 0)
 308DEP_REG32(SMMU_SMR13, 0x834)
 309    DEP_FIELD(SMMU_SMR13, VALID, 1, 31)
 310    DEP_FIELD(SMMU_SMR13, MASK, 15, 16)
 311    DEP_FIELD(SMMU_SMR13, ID, 15, 0)
 312DEP_REG32(SMMU_SMR14, 0x838)
 313    DEP_FIELD(SMMU_SMR14, VALID, 1, 31)
 314    DEP_FIELD(SMMU_SMR14, MASK, 15, 16)
 315    DEP_FIELD(SMMU_SMR14, ID, 15, 0)
 316DEP_REG32(SMMU_SMR15, 0x83c)
 317    DEP_FIELD(SMMU_SMR15, VALID, 1, 31)
 318    DEP_FIELD(SMMU_SMR15, MASK, 15, 16)
 319    DEP_FIELD(SMMU_SMR15, ID, 15, 0)
 320DEP_REG32(SMMU_SMR16, 0x840)
 321    DEP_FIELD(SMMU_SMR16, VALID, 1, 31)
 322    DEP_FIELD(SMMU_SMR16, MASK, 15, 16)
 323    DEP_FIELD(SMMU_SMR16, ID, 15, 0)
 324DEP_REG32(SMMU_SMR17, 0x844)
 325    DEP_FIELD(SMMU_SMR17, VALID, 1, 31)
 326    DEP_FIELD(SMMU_SMR17, MASK, 15, 16)
 327    DEP_FIELD(SMMU_SMR17, ID, 15, 0)
 328DEP_REG32(SMMU_SMR18, 0x848)
 329    DEP_FIELD(SMMU_SMR18, VALID, 1, 31)
 330    DEP_FIELD(SMMU_SMR18, MASK, 15, 16)
 331    DEP_FIELD(SMMU_SMR18, ID, 15, 0)
 332DEP_REG32(SMMU_SMR19, 0x84c)
 333    DEP_FIELD(SMMU_SMR19, VALID, 1, 31)
 334    DEP_FIELD(SMMU_SMR19, MASK, 15, 16)
 335    DEP_FIELD(SMMU_SMR19, ID, 15, 0)
 336DEP_REG32(SMMU_SMR20, 0x850)
 337    DEP_FIELD(SMMU_SMR20, VALID, 1, 31)
 338    DEP_FIELD(SMMU_SMR20, MASK, 15, 16)
 339    DEP_FIELD(SMMU_SMR20, ID, 15, 0)
 340DEP_REG32(SMMU_SMR21, 0x854)
 341    DEP_FIELD(SMMU_SMR21, VALID, 1, 31)
 342    DEP_FIELD(SMMU_SMR21, MASK, 15, 16)
 343    DEP_FIELD(SMMU_SMR21, ID, 15, 0)
 344DEP_REG32(SMMU_SMR22, 0x858)
 345    DEP_FIELD(SMMU_SMR22, VALID, 1, 31)
 346    DEP_FIELD(SMMU_SMR22, MASK, 15, 16)
 347    DEP_FIELD(SMMU_SMR22, ID, 15, 0)
 348DEP_REG32(SMMU_SMR23, 0x85c)
 349    DEP_FIELD(SMMU_SMR23, VALID, 1, 31)
 350    DEP_FIELD(SMMU_SMR23, MASK, 15, 16)
 351    DEP_FIELD(SMMU_SMR23, ID, 15, 0)
 352DEP_REG32(SMMU_SMR24, 0x860)
 353    DEP_FIELD(SMMU_SMR24, VALID, 1, 31)
 354    DEP_FIELD(SMMU_SMR24, MASK, 15, 16)
 355    DEP_FIELD(SMMU_SMR24, ID, 15, 0)
 356DEP_REG32(SMMU_SMR25, 0x864)
 357    DEP_FIELD(SMMU_SMR25, VALID, 1, 31)
 358    DEP_FIELD(SMMU_SMR25, MASK, 15, 16)
 359    DEP_FIELD(SMMU_SMR25, ID, 15, 0)
 360DEP_REG32(SMMU_SMR26, 0x868)
 361    DEP_FIELD(SMMU_SMR26, VALID, 1, 31)
 362    DEP_FIELD(SMMU_SMR26, MASK, 15, 16)
 363    DEP_FIELD(SMMU_SMR26, ID, 15, 0)
 364DEP_REG32(SMMU_SMR27, 0x86c)
 365    DEP_FIELD(SMMU_SMR27, VALID, 1, 31)
 366    DEP_FIELD(SMMU_SMR27, MASK, 15, 16)
 367    DEP_FIELD(SMMU_SMR27, ID, 15, 0)
 368DEP_REG32(SMMU_SMR28, 0x870)
 369    DEP_FIELD(SMMU_SMR28, VALID, 1, 31)
 370    DEP_FIELD(SMMU_SMR28, MASK, 15, 16)
 371    DEP_FIELD(SMMU_SMR28, ID, 15, 0)
 372DEP_REG32(SMMU_SMR29, 0x874)
 373    DEP_FIELD(SMMU_SMR29, VALID, 1, 31)
 374    DEP_FIELD(SMMU_SMR29, MASK, 15, 16)
 375    DEP_FIELD(SMMU_SMR29, ID, 15, 0)
 376DEP_REG32(SMMU_SMR30, 0x878)
 377    DEP_FIELD(SMMU_SMR30, VALID, 1, 31)
 378    DEP_FIELD(SMMU_SMR30, MASK, 15, 16)
 379    DEP_FIELD(SMMU_SMR30, ID, 15, 0)
 380DEP_REG32(SMMU_SMR31, 0x87c)
 381    DEP_FIELD(SMMU_SMR31, VALID, 1, 31)
 382    DEP_FIELD(SMMU_SMR31, MASK, 15, 16)
 383    DEP_FIELD(SMMU_SMR31, ID, 15, 0)
 384DEP_REG32(SMMU_SMR32, 0x880)
 385    DEP_FIELD(SMMU_SMR32, VALID, 1, 31)
 386    DEP_FIELD(SMMU_SMR32, MASK, 15, 16)
 387    DEP_FIELD(SMMU_SMR32, ID, 15, 0)
 388DEP_REG32(SMMU_SMR33, 0x884)
 389    DEP_FIELD(SMMU_SMR33, VALID, 1, 31)
 390    DEP_FIELD(SMMU_SMR33, MASK, 15, 16)
 391    DEP_FIELD(SMMU_SMR33, ID, 15, 0)
 392DEP_REG32(SMMU_SMR34, 0x888)
 393    DEP_FIELD(SMMU_SMR34, VALID, 1, 31)
 394    DEP_FIELD(SMMU_SMR34, MASK, 15, 16)
 395    DEP_FIELD(SMMU_SMR34, ID, 15, 0)
 396DEP_REG32(SMMU_SMR35, 0x88c)
 397    DEP_FIELD(SMMU_SMR35, VALID, 1, 31)
 398    DEP_FIELD(SMMU_SMR35, MASK, 15, 16)
 399    DEP_FIELD(SMMU_SMR35, ID, 15, 0)
 400DEP_REG32(SMMU_SMR36, 0x890)
 401    DEP_FIELD(SMMU_SMR36, VALID, 1, 31)
 402    DEP_FIELD(SMMU_SMR36, MASK, 15, 16)
 403    DEP_FIELD(SMMU_SMR36, ID, 15, 0)
 404DEP_REG32(SMMU_SMR37, 0x894)
 405    DEP_FIELD(SMMU_SMR37, VALID, 1, 31)
 406    DEP_FIELD(SMMU_SMR37, MASK, 15, 16)
 407    DEP_FIELD(SMMU_SMR37, ID, 15, 0)
 408DEP_REG32(SMMU_SMR38, 0x898)
 409    DEP_FIELD(SMMU_SMR38, VALID, 1, 31)
 410    DEP_FIELD(SMMU_SMR38, MASK, 15, 16)
 411    DEP_FIELD(SMMU_SMR38, ID, 15, 0)
 412DEP_REG32(SMMU_SMR39, 0x89c)
 413    DEP_FIELD(SMMU_SMR39, VALID, 1, 31)
 414    DEP_FIELD(SMMU_SMR39, MASK, 15, 16)
 415    DEP_FIELD(SMMU_SMR39, ID, 15, 0)
 416DEP_REG32(SMMU_SMR40, 0x8a0)
 417    DEP_FIELD(SMMU_SMR40, VALID, 1, 31)
 418    DEP_FIELD(SMMU_SMR40, MASK, 15, 16)
 419    DEP_FIELD(SMMU_SMR40, ID, 15, 0)
 420DEP_REG32(SMMU_SMR41, 0x8a4)
 421    DEP_FIELD(SMMU_SMR41, VALID, 1, 31)
 422    DEP_FIELD(SMMU_SMR41, MASK, 15, 16)
 423    DEP_FIELD(SMMU_SMR41, ID, 15, 0)
 424DEP_REG32(SMMU_SMR42, 0x8a8)
 425    DEP_FIELD(SMMU_SMR42, VALID, 1, 31)
 426    DEP_FIELD(SMMU_SMR42, MASK, 15, 16)
 427    DEP_FIELD(SMMU_SMR42, ID, 15, 0)
 428DEP_REG32(SMMU_SMR43, 0x8ac)
 429    DEP_FIELD(SMMU_SMR43, VALID, 1, 31)
 430    DEP_FIELD(SMMU_SMR43, MASK, 15, 16)
 431    DEP_FIELD(SMMU_SMR43, ID, 15, 0)
 432DEP_REG32(SMMU_SMR44, 0x8b0)
 433    DEP_FIELD(SMMU_SMR44, VALID, 1, 31)
 434    DEP_FIELD(SMMU_SMR44, MASK, 15, 16)
 435    DEP_FIELD(SMMU_SMR44, ID, 15, 0)
 436DEP_REG32(SMMU_SMR45, 0x8b4)
 437    DEP_FIELD(SMMU_SMR45, VALID, 1, 31)
 438    DEP_FIELD(SMMU_SMR45, MASK, 15, 16)
 439    DEP_FIELD(SMMU_SMR45, ID, 15, 0)
 440DEP_REG32(SMMU_SMR46, 0x8b8)
 441    DEP_FIELD(SMMU_SMR46, VALID, 1, 31)
 442    DEP_FIELD(SMMU_SMR46, MASK, 15, 16)
 443    DEP_FIELD(SMMU_SMR46, ID, 15, 0)
 444DEP_REG32(SMMU_SMR47, 0x8bc)
 445    DEP_FIELD(SMMU_SMR47, VALID, 1, 31)
 446    DEP_FIELD(SMMU_SMR47, MASK, 15, 16)
 447    DEP_FIELD(SMMU_SMR47, ID, 15, 0)
 448DEP_REG32(SMMU_S2CR0, 0xc00)
 449    DEP_FIELD(SMMU_S2CR0, TRANSIENTCFG, 2, 28)
 450    DEP_FIELD(SMMU_S2CR0, INSTCFG_1, 1, 27)
 451    DEP_FIELD(SMMU_S2CR0, INSTCFG_0_FB, 1, 26)
 452    DEP_FIELD(SMMU_S2CR0, PRIVCFG_BSU, 2, 24)
 453    DEP_FIELD(SMMU_S2CR0, WACFG, 2, 22)
 454    DEP_FIELD(SMMU_S2CR0, RACFG, 2, 20)
 455    DEP_FIELD(SMMU_S2CR0, NSCFG, 2, 18)
 456    DEP_FIELD(SMMU_S2CR0, TYPE, 2, 16)
 457    DEP_FIELD(SMMU_S2CR0, MEM_ATTR, 4, 12)
 458    DEP_FIELD(SMMU_S2CR0, MTCFG, 1, 11)
 459    DEP_FIELD(SMMU_S2CR0, SHCFG, 2, 8)
 460    DEP_FIELD(SMMU_S2CR0, CBNDX_VMID, 8, 0)
 461DEP_REG32(SMMU_S2CR1, 0xc04)
 462    DEP_FIELD(SMMU_S2CR1, TRANSIENTCFG, 2, 28)
 463    DEP_FIELD(SMMU_S2CR1, INSTCFG_1, 1, 27)
 464    DEP_FIELD(SMMU_S2CR1, INSTCFG_0_FB, 1, 26)
 465    DEP_FIELD(SMMU_S2CR1, PRIVCFG_BSU, 2, 24)
 466    DEP_FIELD(SMMU_S2CR1, WACFG, 2, 22)
 467    DEP_FIELD(SMMU_S2CR1, RACFG, 2, 20)
 468    DEP_FIELD(SMMU_S2CR1, NSCFG, 2, 18)
 469    DEP_FIELD(SMMU_S2CR1, TYPE, 2, 16)
 470    DEP_FIELD(SMMU_S2CR1, MEM_ATTR, 4, 12)
 471    DEP_FIELD(SMMU_S2CR1, MTCFG, 1, 11)
 472    DEP_FIELD(SMMU_S2CR1, SHCFG, 2, 8)
 473    DEP_FIELD(SMMU_S2CR1, CBNDX_VMID, 8, 0)
 474DEP_REG32(SMMU_S2CR2, 0xc08)
 475    DEP_FIELD(SMMU_S2CR2, TRANSIENTCFG, 2, 28)
 476    DEP_FIELD(SMMU_S2CR2, INSTCFG_1, 1, 27)
 477    DEP_FIELD(SMMU_S2CR2, INSTCFG_0_FB, 1, 26)
 478    DEP_FIELD(SMMU_S2CR2, PRIVCFG_BSU, 2, 24)
 479    DEP_FIELD(SMMU_S2CR2, WACFG, 2, 22)
 480    DEP_FIELD(SMMU_S2CR2, RACFG, 2, 20)
 481    DEP_FIELD(SMMU_S2CR2, NSCFG, 2, 18)
 482    DEP_FIELD(SMMU_S2CR2, TYPE, 2, 16)
 483    DEP_FIELD(SMMU_S2CR2, MEM_ATTR, 4, 12)
 484    DEP_FIELD(SMMU_S2CR2, MTCFG, 1, 11)
 485    DEP_FIELD(SMMU_S2CR2, SHCFG, 2, 8)
 486    DEP_FIELD(SMMU_S2CR2, CBNDX_VMID, 8, 0)
 487DEP_REG32(SMMU_S2CR3, 0xc0c)
 488    DEP_FIELD(SMMU_S2CR3, TRANSIENTCFG, 2, 28)
 489    DEP_FIELD(SMMU_S2CR3, INSTCFG_1, 1, 27)
 490    DEP_FIELD(SMMU_S2CR3, INSTCFG_0_FB, 1, 26)
 491    DEP_FIELD(SMMU_S2CR3, PRIVCFG_BSU, 2, 24)
 492    DEP_FIELD(SMMU_S2CR3, WACFG, 2, 22)
 493    DEP_FIELD(SMMU_S2CR3, RACFG, 2, 20)
 494    DEP_FIELD(SMMU_S2CR3, NSCFG, 2, 18)
 495    DEP_FIELD(SMMU_S2CR3, TYPE, 2, 16)
 496    DEP_FIELD(SMMU_S2CR3, MEM_ATTR, 4, 12)
 497    DEP_FIELD(SMMU_S2CR3, MTCFG, 1, 11)
 498    DEP_FIELD(SMMU_S2CR3, SHCFG, 2, 8)
 499    DEP_FIELD(SMMU_S2CR3, CBNDX_VMID, 8, 0)
 500DEP_REG32(SMMU_S2CR4, 0xc10)
 501    DEP_FIELD(SMMU_S2CR4, TRANSIENTCFG, 2, 28)
 502    DEP_FIELD(SMMU_S2CR4, INSTCFG_1, 1, 27)
 503    DEP_FIELD(SMMU_S2CR4, INSTCFG_0_FB, 1, 26)
 504    DEP_FIELD(SMMU_S2CR4, PRIVCFG_BSU, 2, 24)
 505    DEP_FIELD(SMMU_S2CR4, WACFG, 2, 22)
 506    DEP_FIELD(SMMU_S2CR4, RACFG, 2, 20)
 507    DEP_FIELD(SMMU_S2CR4, NSCFG, 2, 18)
 508    DEP_FIELD(SMMU_S2CR4, TYPE, 2, 16)
 509    DEP_FIELD(SMMU_S2CR4, MEM_ATTR, 4, 12)
 510    DEP_FIELD(SMMU_S2CR4, MTCFG, 1, 11)
 511    DEP_FIELD(SMMU_S2CR4, SHCFG, 2, 8)
 512    DEP_FIELD(SMMU_S2CR4, CBNDX_VMID, 8, 0)
 513DEP_REG32(SMMU_S2CR5, 0xc14)
 514    DEP_FIELD(SMMU_S2CR5, TRANSIENTCFG, 2, 28)
 515    DEP_FIELD(SMMU_S2CR5, INSTCFG_1, 1, 27)
 516    DEP_FIELD(SMMU_S2CR5, INSTCFG_0_FB, 1, 26)
 517    DEP_FIELD(SMMU_S2CR5, PRIVCFG_BSU, 2, 24)
 518    DEP_FIELD(SMMU_S2CR5, WACFG, 2, 22)
 519    DEP_FIELD(SMMU_S2CR5, RACFG, 2, 20)
 520    DEP_FIELD(SMMU_S2CR5, NSCFG, 2, 18)
 521    DEP_FIELD(SMMU_S2CR5, TYPE, 2, 16)
 522    DEP_FIELD(SMMU_S2CR5, MEM_ATTR, 4, 12)
 523    DEP_FIELD(SMMU_S2CR5, MTCFG, 1, 11)
 524    DEP_FIELD(SMMU_S2CR5, SHCFG, 2, 8)
 525    DEP_FIELD(SMMU_S2CR5, CBNDX_VMID, 8, 0)
 526DEP_REG32(SMMU_S2CR6, 0xc18)
 527    DEP_FIELD(SMMU_S2CR6, TRANSIENTCFG, 2, 28)
 528    DEP_FIELD(SMMU_S2CR6, INSTCFG_1, 1, 27)
 529    DEP_FIELD(SMMU_S2CR6, INSTCFG_0_FB, 1, 26)
 530    DEP_FIELD(SMMU_S2CR6, PRIVCFG_BSU, 2, 24)
 531    DEP_FIELD(SMMU_S2CR6, WACFG, 2, 22)
 532    DEP_FIELD(SMMU_S2CR6, RACFG, 2, 20)
 533    DEP_FIELD(SMMU_S2CR6, NSCFG, 2, 18)
 534    DEP_FIELD(SMMU_S2CR6, TYPE, 2, 16)
 535    DEP_FIELD(SMMU_S2CR6, MEM_ATTR, 4, 12)
 536    DEP_FIELD(SMMU_S2CR6, MTCFG, 1, 11)
 537    DEP_FIELD(SMMU_S2CR6, SHCFG, 2, 8)
 538    DEP_FIELD(SMMU_S2CR6, CBNDX_VMID, 8, 0)
 539DEP_REG32(SMMU_S2CR7, 0xc1c)
 540    DEP_FIELD(SMMU_S2CR7, TRANSIENTCFG, 2, 28)
 541    DEP_FIELD(SMMU_S2CR7, INSTCFG_1, 1, 27)
 542    DEP_FIELD(SMMU_S2CR7, INSTCFG_0_FB, 1, 26)
 543    DEP_FIELD(SMMU_S2CR7, PRIVCFG_BSU, 2, 24)
 544    DEP_FIELD(SMMU_S2CR7, WACFG, 2, 22)
 545    DEP_FIELD(SMMU_S2CR7, RACFG, 2, 20)
 546    DEP_FIELD(SMMU_S2CR7, NSCFG, 2, 18)
 547    DEP_FIELD(SMMU_S2CR7, TYPE, 2, 16)
 548    DEP_FIELD(SMMU_S2CR7, MEM_ATTR, 4, 12)
 549    DEP_FIELD(SMMU_S2CR7, MTCFG, 1, 11)
 550    DEP_FIELD(SMMU_S2CR7, SHCFG, 2, 8)
 551    DEP_FIELD(SMMU_S2CR7, CBNDX_VMID, 8, 0)
 552DEP_REG32(SMMU_S2CR8, 0xc20)
 553    DEP_FIELD(SMMU_S2CR8, TRANSIENTCFG, 2, 28)
 554    DEP_FIELD(SMMU_S2CR8, INSTCFG_1, 1, 27)
 555    DEP_FIELD(SMMU_S2CR8, INSTCFG_0_FB, 1, 26)
 556    DEP_FIELD(SMMU_S2CR8, PRIVCFG_BSU, 2, 24)
 557    DEP_FIELD(SMMU_S2CR8, WACFG, 2, 22)
 558    DEP_FIELD(SMMU_S2CR8, RACFG, 2, 20)
 559    DEP_FIELD(SMMU_S2CR8, NSCFG, 2, 18)
 560    DEP_FIELD(SMMU_S2CR8, TYPE, 2, 16)
 561    DEP_FIELD(SMMU_S2CR8, MEM_ATTR, 4, 12)
 562    DEP_FIELD(SMMU_S2CR8, MTCFG, 1, 11)
 563    DEP_FIELD(SMMU_S2CR8, SHCFG, 2, 8)
 564    DEP_FIELD(SMMU_S2CR8, CBNDX_VMID, 8, 0)
 565DEP_REG32(SMMU_S2CR9, 0xc24)
 566    DEP_FIELD(SMMU_S2CR9, TRANSIENTCFG, 2, 28)
 567    DEP_FIELD(SMMU_S2CR9, INSTCFG_1, 1, 27)
 568    DEP_FIELD(SMMU_S2CR9, INSTCFG_0_FB, 1, 26)
 569    DEP_FIELD(SMMU_S2CR9, PRIVCFG_BSU, 2, 24)
 570    DEP_FIELD(SMMU_S2CR9, WACFG, 2, 22)
 571    DEP_FIELD(SMMU_S2CR9, RACFG, 2, 20)
 572    DEP_FIELD(SMMU_S2CR9, NSCFG, 2, 18)
 573    DEP_FIELD(SMMU_S2CR9, TYPE, 2, 16)
 574    DEP_FIELD(SMMU_S2CR9, MEM_ATTR, 4, 12)
 575    DEP_FIELD(SMMU_S2CR9, MTCFG, 1, 11)
 576    DEP_FIELD(SMMU_S2CR9, SHCFG, 2, 8)
 577    DEP_FIELD(SMMU_S2CR9, CBNDX_VMID, 8, 0)
 578DEP_REG32(SMMU_S2CR10, 0xc28)
 579    DEP_FIELD(SMMU_S2CR10, TRANSIENTCFG, 2, 28)
 580    DEP_FIELD(SMMU_S2CR10, INSTCFG_1, 1, 27)
 581    DEP_FIELD(SMMU_S2CR10, INSTCFG_0_FB, 1, 26)
 582    DEP_FIELD(SMMU_S2CR10, PRIVCFG_BSU, 2, 24)
 583    DEP_FIELD(SMMU_S2CR10, WACFG, 2, 22)
 584    DEP_FIELD(SMMU_S2CR10, RACFG, 2, 20)
 585    DEP_FIELD(SMMU_S2CR10, NSCFG, 2, 18)
 586    DEP_FIELD(SMMU_S2CR10, TYPE, 2, 16)
 587    DEP_FIELD(SMMU_S2CR10, MEM_ATTR, 4, 12)
 588    DEP_FIELD(SMMU_S2CR10, MTCFG, 1, 11)
 589    DEP_FIELD(SMMU_S2CR10, SHCFG, 2, 8)
 590    DEP_FIELD(SMMU_S2CR10, CBNDX_VMID, 8, 0)
 591DEP_REG32(SMMU_S2CR11, 0xc2c)
 592    DEP_FIELD(SMMU_S2CR11, TRANSIENTCFG, 2, 28)
 593    DEP_FIELD(SMMU_S2CR11, INSTCFG_1, 1, 27)
 594    DEP_FIELD(SMMU_S2CR11, INSTCFG_0_FB, 1, 26)
 595    DEP_FIELD(SMMU_S2CR11, PRIVCFG_BSU, 2, 24)
 596    DEP_FIELD(SMMU_S2CR11, WACFG, 2, 22)
 597    DEP_FIELD(SMMU_S2CR11, RACFG, 2, 20)
 598    DEP_FIELD(SMMU_S2CR11, NSCFG, 2, 18)
 599    DEP_FIELD(SMMU_S2CR11, TYPE, 2, 16)
 600    DEP_FIELD(SMMU_S2CR11, MEM_ATTR, 4, 12)
 601    DEP_FIELD(SMMU_S2CR11, MTCFG, 1, 11)
 602    DEP_FIELD(SMMU_S2CR11, SHCFG, 2, 8)
 603    DEP_FIELD(SMMU_S2CR11, CBNDX_VMID, 8, 0)
 604DEP_REG32(SMMU_S2CR12, 0xc30)
 605    DEP_FIELD(SMMU_S2CR12, TRANSIENTCFG, 2, 28)
 606    DEP_FIELD(SMMU_S2CR12, INSTCFG_1, 1, 27)
 607    DEP_FIELD(SMMU_S2CR12, INSTCFG_0_FB, 1, 26)
 608    DEP_FIELD(SMMU_S2CR12, PRIVCFG_BSU, 2, 24)
 609    DEP_FIELD(SMMU_S2CR12, WACFG, 2, 22)
 610    DEP_FIELD(SMMU_S2CR12, RACFG, 2, 20)
 611    DEP_FIELD(SMMU_S2CR12, NSCFG, 2, 18)
 612    DEP_FIELD(SMMU_S2CR12, TYPE, 2, 16)
 613    DEP_FIELD(SMMU_S2CR12, MEM_ATTR, 4, 12)
 614    DEP_FIELD(SMMU_S2CR12, MTCFG, 1, 11)
 615    DEP_FIELD(SMMU_S2CR12, SHCFG, 2, 8)
 616    DEP_FIELD(SMMU_S2CR12, CBNDX_VMID, 8, 0)
 617DEP_REG32(SMMU_S2CR13, 0xc34)
 618    DEP_FIELD(SMMU_S2CR13, TRANSIENTCFG, 2, 28)
 619    DEP_FIELD(SMMU_S2CR13, INSTCFG_1, 1, 27)
 620    DEP_FIELD(SMMU_S2CR13, INSTCFG_0_FB, 1, 26)
 621    DEP_FIELD(SMMU_S2CR13, PRIVCFG_BSU, 2, 24)
 622    DEP_FIELD(SMMU_S2CR13, WACFG, 2, 22)
 623    DEP_FIELD(SMMU_S2CR13, RACFG, 2, 20)
 624    DEP_FIELD(SMMU_S2CR13, NSCFG, 2, 18)
 625    DEP_FIELD(SMMU_S2CR13, TYPE, 2, 16)
 626    DEP_FIELD(SMMU_S2CR13, MEM_ATTR, 4, 12)
 627    DEP_FIELD(SMMU_S2CR13, MTCFG, 1, 11)
 628    DEP_FIELD(SMMU_S2CR13, SHCFG, 2, 8)
 629    DEP_FIELD(SMMU_S2CR13, CBNDX_VMID, 8, 0)
 630DEP_REG32(SMMU_S2CR14, 0xc38)
 631    DEP_FIELD(SMMU_S2CR14, TRANSIENTCFG, 2, 28)
 632    DEP_FIELD(SMMU_S2CR14, INSTCFG_1, 1, 27)
 633    DEP_FIELD(SMMU_S2CR14, INSTCFG_0_FB, 1, 26)
 634    DEP_FIELD(SMMU_S2CR14, PRIVCFG_BSU, 2, 24)
 635    DEP_FIELD(SMMU_S2CR14, WACFG, 2, 22)
 636    DEP_FIELD(SMMU_S2CR14, RACFG, 2, 20)
 637    DEP_FIELD(SMMU_S2CR14, NSCFG, 2, 18)
 638    DEP_FIELD(SMMU_S2CR14, TYPE, 2, 16)
 639    DEP_FIELD(SMMU_S2CR14, MEM_ATTR, 4, 12)
 640    DEP_FIELD(SMMU_S2CR14, MTCFG, 1, 11)
 641    DEP_FIELD(SMMU_S2CR14, SHCFG, 2, 8)
 642    DEP_FIELD(SMMU_S2CR14, CBNDX_VMID, 8, 0)
 643DEP_REG32(SMMU_S2CR15, 0xc3c)
 644    DEP_FIELD(SMMU_S2CR15, TRANSIENTCFG, 2, 28)
 645    DEP_FIELD(SMMU_S2CR15, INSTCFG_1, 1, 27)
 646    DEP_FIELD(SMMU_S2CR15, INSTCFG_0_FB, 1, 26)
 647    DEP_FIELD(SMMU_S2CR15, PRIVCFG_BSU, 2, 24)
 648    DEP_FIELD(SMMU_S2CR15, WACFG, 2, 22)
 649    DEP_FIELD(SMMU_S2CR15, RACFG, 2, 20)
 650    DEP_FIELD(SMMU_S2CR15, NSCFG, 2, 18)
 651    DEP_FIELD(SMMU_S2CR15, TYPE, 2, 16)
 652    DEP_FIELD(SMMU_S2CR15, MEM_ATTR, 4, 12)
 653    DEP_FIELD(SMMU_S2CR15, MTCFG, 1, 11)
 654    DEP_FIELD(SMMU_S2CR15, SHCFG, 2, 8)
 655    DEP_FIELD(SMMU_S2CR15, CBNDX_VMID, 8, 0)
 656DEP_REG32(SMMU_S2CR16, 0xc40)
 657    DEP_FIELD(SMMU_S2CR16, TRANSIENTCFG, 2, 28)
 658    DEP_FIELD(SMMU_S2CR16, INSTCFG_1, 1, 27)
 659    DEP_FIELD(SMMU_S2CR16, INSTCFG_0_FB, 1, 26)
 660    DEP_FIELD(SMMU_S2CR16, PRIVCFG_BSU, 2, 24)
 661    DEP_FIELD(SMMU_S2CR16, WACFG, 2, 22)
 662    DEP_FIELD(SMMU_S2CR16, RACFG, 2, 20)
 663    DEP_FIELD(SMMU_S2CR16, NSCFG, 2, 18)
 664    DEP_FIELD(SMMU_S2CR16, TYPE, 2, 16)
 665    DEP_FIELD(SMMU_S2CR16, MEM_ATTR, 4, 12)
 666    DEP_FIELD(SMMU_S2CR16, MTCFG, 1, 11)
 667    DEP_FIELD(SMMU_S2CR16, SHCFG, 2, 8)
 668    DEP_FIELD(SMMU_S2CR16, CBNDX_VMID, 8, 0)
 669DEP_REG32(SMMU_S2CR17, 0xc44)
 670    DEP_FIELD(SMMU_S2CR17, TRANSIENTCFG, 2, 28)
 671    DEP_FIELD(SMMU_S2CR17, INSTCFG_1, 1, 27)
 672    DEP_FIELD(SMMU_S2CR17, INSTCFG_0_FB, 1, 26)
 673    DEP_FIELD(SMMU_S2CR17, PRIVCFG_BSU, 2, 24)
 674    DEP_FIELD(SMMU_S2CR17, WACFG, 2, 22)
 675    DEP_FIELD(SMMU_S2CR17, RACFG, 2, 20)
 676    DEP_FIELD(SMMU_S2CR17, NSCFG, 2, 18)
 677    DEP_FIELD(SMMU_S2CR17, TYPE, 2, 16)
 678    DEP_FIELD(SMMU_S2CR17, MEM_ATTR, 4, 12)
 679    DEP_FIELD(SMMU_S2CR17, MTCFG, 1, 11)
 680    DEP_FIELD(SMMU_S2CR17, SHCFG, 2, 8)
 681    DEP_FIELD(SMMU_S2CR17, CBNDX_VMID, 8, 0)
 682DEP_REG32(SMMU_S2CR18, 0xc48)
 683    DEP_FIELD(SMMU_S2CR18, TRANSIENTCFG, 2, 28)
 684    DEP_FIELD(SMMU_S2CR18, INSTCFG_1, 1, 27)
 685    DEP_FIELD(SMMU_S2CR18, INSTCFG_0_FB, 1, 26)
 686    DEP_FIELD(SMMU_S2CR18, PRIVCFG_BSU, 2, 24)
 687    DEP_FIELD(SMMU_S2CR18, WACFG, 2, 22)
 688    DEP_FIELD(SMMU_S2CR18, RACFG, 2, 20)
 689    DEP_FIELD(SMMU_S2CR18, NSCFG, 2, 18)
 690    DEP_FIELD(SMMU_S2CR18, TYPE, 2, 16)
 691    DEP_FIELD(SMMU_S2CR18, MEM_ATTR, 4, 12)
 692    DEP_FIELD(SMMU_S2CR18, MTCFG, 1, 11)
 693    DEP_FIELD(SMMU_S2CR18, SHCFG, 2, 8)
 694    DEP_FIELD(SMMU_S2CR18, CBNDX_VMID, 8, 0)
 695DEP_REG32(SMMU_S2CR19, 0xc4c)
 696    DEP_FIELD(SMMU_S2CR19, TRANSIENTCFG, 2, 28)
 697    DEP_FIELD(SMMU_S2CR19, INSTCFG_1, 1, 27)
 698    DEP_FIELD(SMMU_S2CR19, INSTCFG_0_FB, 1, 26)
 699    DEP_FIELD(SMMU_S2CR19, PRIVCFG_BSU, 2, 24)
 700    DEP_FIELD(SMMU_S2CR19, WACFG, 2, 22)
 701    DEP_FIELD(SMMU_S2CR19, RACFG, 2, 20)
 702    DEP_FIELD(SMMU_S2CR19, NSCFG, 2, 18)
 703    DEP_FIELD(SMMU_S2CR19, TYPE, 2, 16)
 704    DEP_FIELD(SMMU_S2CR19, MEM_ATTR, 4, 12)
 705    DEP_FIELD(SMMU_S2CR19, MTCFG, 1, 11)
 706    DEP_FIELD(SMMU_S2CR19, SHCFG, 2, 8)
 707    DEP_FIELD(SMMU_S2CR19, CBNDX_VMID, 8, 0)
 708DEP_REG32(SMMU_S2CR20, 0xc50)
 709    DEP_FIELD(SMMU_S2CR20, TRANSIENTCFG, 2, 28)
 710    DEP_FIELD(SMMU_S2CR20, INSTCFG_1, 1, 27)
 711    DEP_FIELD(SMMU_S2CR20, INSTCFG_0_FB, 1, 26)
 712    DEP_FIELD(SMMU_S2CR20, PRIVCFG_BSU, 2, 24)
 713    DEP_FIELD(SMMU_S2CR20, WACFG, 2, 22)
 714    DEP_FIELD(SMMU_S2CR20, RACFG, 2, 20)
 715    DEP_FIELD(SMMU_S2CR20, NSCFG, 2, 18)
 716    DEP_FIELD(SMMU_S2CR20, TYPE, 2, 16)
 717    DEP_FIELD(SMMU_S2CR20, MEM_ATTR, 4, 12)
 718    DEP_FIELD(SMMU_S2CR20, MTCFG, 1, 11)
 719    DEP_FIELD(SMMU_S2CR20, SHCFG, 2, 8)
 720    DEP_FIELD(SMMU_S2CR20, CBNDX_VMID, 8, 0)
 721DEP_REG32(SMMU_S2CR21, 0xc54)
 722    DEP_FIELD(SMMU_S2CR21, TRANSIENTCFG, 2, 28)
 723    DEP_FIELD(SMMU_S2CR21, INSTCFG_1, 1, 27)
 724    DEP_FIELD(SMMU_S2CR21, INSTCFG_0_FB, 1, 26)
 725    DEP_FIELD(SMMU_S2CR21, PRIVCFG_BSU, 2, 24)
 726    DEP_FIELD(SMMU_S2CR21, WACFG, 2, 22)
 727    DEP_FIELD(SMMU_S2CR21, RACFG, 2, 20)
 728    DEP_FIELD(SMMU_S2CR21, NSCFG, 2, 18)
 729    DEP_FIELD(SMMU_S2CR21, TYPE, 2, 16)
 730    DEP_FIELD(SMMU_S2CR21, MEM_ATTR, 4, 12)
 731    DEP_FIELD(SMMU_S2CR21, MTCFG, 1, 11)
 732    DEP_FIELD(SMMU_S2CR21, SHCFG, 2, 8)
 733    DEP_FIELD(SMMU_S2CR21, CBNDX_VMID, 8, 0)
 734DEP_REG32(SMMU_S2CR22, 0xc58)
 735    DEP_FIELD(SMMU_S2CR22, TRANSIENTCFG, 2, 28)
 736    DEP_FIELD(SMMU_S2CR22, INSTCFG_1, 1, 27)
 737    DEP_FIELD(SMMU_S2CR22, INSTCFG_0_FB, 1, 26)
 738    DEP_FIELD(SMMU_S2CR22, PRIVCFG_BSU, 2, 24)
 739    DEP_FIELD(SMMU_S2CR22, WACFG, 2, 22)
 740    DEP_FIELD(SMMU_S2CR22, RACFG, 2, 20)
 741    DEP_FIELD(SMMU_S2CR22, NSCFG, 2, 18)
 742    DEP_FIELD(SMMU_S2CR22, TYPE, 2, 16)
 743    DEP_FIELD(SMMU_S2CR22, MEM_ATTR, 4, 12)
 744    DEP_FIELD(SMMU_S2CR22, MTCFG, 1, 11)
 745    DEP_FIELD(SMMU_S2CR22, SHCFG, 2, 8)
 746    DEP_FIELD(SMMU_S2CR22, CBNDX_VMID, 8, 0)
 747DEP_REG32(SMMU_S2CR23, 0xc5c)
 748    DEP_FIELD(SMMU_S2CR23, TRANSIENTCFG, 2, 28)
 749    DEP_FIELD(SMMU_S2CR23, INSTCFG_1, 1, 27)
 750    DEP_FIELD(SMMU_S2CR23, INSTCFG_0_FB, 1, 26)
 751    DEP_FIELD(SMMU_S2CR23, PRIVCFG_BSU, 2, 24)
 752    DEP_FIELD(SMMU_S2CR23, WACFG, 2, 22)
 753    DEP_FIELD(SMMU_S2CR23, RACFG, 2, 20)
 754    DEP_FIELD(SMMU_S2CR23, NSCFG, 2, 18)
 755    DEP_FIELD(SMMU_S2CR23, TYPE, 2, 16)
 756    DEP_FIELD(SMMU_S2CR23, MEM_ATTR, 4, 12)
 757    DEP_FIELD(SMMU_S2CR23, MTCFG, 1, 11)
 758    DEP_FIELD(SMMU_S2CR23, SHCFG, 2, 8)
 759    DEP_FIELD(SMMU_S2CR23, CBNDX_VMID, 8, 0)
 760DEP_REG32(SMMU_S2CR24, 0xc60)
 761    DEP_FIELD(SMMU_S2CR24, TRANSIENTCFG, 2, 28)
 762    DEP_FIELD(SMMU_S2CR24, INSTCFG_1, 1, 27)
 763    DEP_FIELD(SMMU_S2CR24, INSTCFG_0_FB, 1, 26)
 764    DEP_FIELD(SMMU_S2CR24, PRIVCFG_BSU, 2, 24)
 765    DEP_FIELD(SMMU_S2CR24, WACFG, 2, 22)
 766    DEP_FIELD(SMMU_S2CR24, RACFG, 2, 20)
 767    DEP_FIELD(SMMU_S2CR24, NSCFG, 2, 18)
 768    DEP_FIELD(SMMU_S2CR24, TYPE, 2, 16)
 769    DEP_FIELD(SMMU_S2CR24, MEM_ATTR, 4, 12)
 770    DEP_FIELD(SMMU_S2CR24, MTCFG, 1, 11)
 771    DEP_FIELD(SMMU_S2CR24, SHCFG, 2, 8)
 772    DEP_FIELD(SMMU_S2CR24, CBNDX_VMID, 8, 0)
 773DEP_REG32(SMMU_S2CR25, 0xc64)
 774    DEP_FIELD(SMMU_S2CR25, TRANSIENTCFG, 2, 28)
 775    DEP_FIELD(SMMU_S2CR25, INSTCFG_1, 1, 27)
 776    DEP_FIELD(SMMU_S2CR25, INSTCFG_0_FB, 1, 26)
 777    DEP_FIELD(SMMU_S2CR25, PRIVCFG_BSU, 2, 24)
 778    DEP_FIELD(SMMU_S2CR25, WACFG, 2, 22)
 779    DEP_FIELD(SMMU_S2CR25, RACFG, 2, 20)
 780    DEP_FIELD(SMMU_S2CR25, NSCFG, 2, 18)
 781    DEP_FIELD(SMMU_S2CR25, TYPE, 2, 16)
 782    DEP_FIELD(SMMU_S2CR25, MEM_ATTR, 4, 12)
 783    DEP_FIELD(SMMU_S2CR25, MTCFG, 1, 11)
 784    DEP_FIELD(SMMU_S2CR25, SHCFG, 2, 8)
 785    DEP_FIELD(SMMU_S2CR25, CBNDX_VMID, 8, 0)
 786DEP_REG32(SMMU_S2CR26, 0xc68)
 787    DEP_FIELD(SMMU_S2CR26, TRANSIENTCFG, 2, 28)
 788    DEP_FIELD(SMMU_S2CR26, INSTCFG_1, 1, 27)
 789    DEP_FIELD(SMMU_S2CR26, INSTCFG_0_FB, 1, 26)
 790    DEP_FIELD(SMMU_S2CR26, PRIVCFG_BSU, 2, 24)
 791    DEP_FIELD(SMMU_S2CR26, WACFG, 2, 22)
 792    DEP_FIELD(SMMU_S2CR26, RACFG, 2, 20)
 793    DEP_FIELD(SMMU_S2CR26, NSCFG, 2, 18)
 794    DEP_FIELD(SMMU_S2CR26, TYPE, 2, 16)
 795    DEP_FIELD(SMMU_S2CR26, MEM_ATTR, 4, 12)
 796    DEP_FIELD(SMMU_S2CR26, MTCFG, 1, 11)
 797    DEP_FIELD(SMMU_S2CR26, SHCFG, 2, 8)
 798    DEP_FIELD(SMMU_S2CR26, CBNDX_VMID, 8, 0)
 799DEP_REG32(SMMU_S2CR27, 0xc6c)
 800    DEP_FIELD(SMMU_S2CR27, TRANSIENTCFG, 2, 28)
 801    DEP_FIELD(SMMU_S2CR27, INSTCFG_1, 1, 27)
 802    DEP_FIELD(SMMU_S2CR27, INSTCFG_0_FB, 1, 26)
 803    DEP_FIELD(SMMU_S2CR27, PRIVCFG_BSU, 2, 24)
 804    DEP_FIELD(SMMU_S2CR27, WACFG, 2, 22)
 805    DEP_FIELD(SMMU_S2CR27, RACFG, 2, 20)
 806    DEP_FIELD(SMMU_S2CR27, NSCFG, 2, 18)
 807    DEP_FIELD(SMMU_S2CR27, TYPE, 2, 16)
 808    DEP_FIELD(SMMU_S2CR27, MEM_ATTR, 4, 12)
 809    DEP_FIELD(SMMU_S2CR27, MTCFG, 1, 11)
 810    DEP_FIELD(SMMU_S2CR27, SHCFG, 2, 8)
 811    DEP_FIELD(SMMU_S2CR27, CBNDX_VMID, 8, 0)
 812DEP_REG32(SMMU_S2CR28, 0xc70)
 813    DEP_FIELD(SMMU_S2CR28, TRANSIENTCFG, 2, 28)
 814    DEP_FIELD(SMMU_S2CR28, INSTCFG_1, 1, 27)
 815    DEP_FIELD(SMMU_S2CR28, INSTCFG_0_FB, 1, 26)
 816    DEP_FIELD(SMMU_S2CR28, PRIVCFG_BSU, 2, 24)
 817    DEP_FIELD(SMMU_S2CR28, WACFG, 2, 22)
 818    DEP_FIELD(SMMU_S2CR28, RACFG, 2, 20)
 819    DEP_FIELD(SMMU_S2CR28, NSCFG, 2, 18)
 820    DEP_FIELD(SMMU_S2CR28, TYPE, 2, 16)
 821    DEP_FIELD(SMMU_S2CR28, MEM_ATTR, 4, 12)
 822    DEP_FIELD(SMMU_S2CR28, MTCFG, 1, 11)
 823    DEP_FIELD(SMMU_S2CR28, SHCFG, 2, 8)
 824    DEP_FIELD(SMMU_S2CR28, CBNDX_VMID, 8, 0)
 825DEP_REG32(SMMU_S2CR29, 0xc74)
 826    DEP_FIELD(SMMU_S2CR29, TRANSIENTCFG, 2, 28)
 827    DEP_FIELD(SMMU_S2CR29, INSTCFG_1, 1, 27)
 828    DEP_FIELD(SMMU_S2CR29, INSTCFG_0_FB, 1, 26)
 829    DEP_FIELD(SMMU_S2CR29, PRIVCFG_BSU, 2, 24)
 830    DEP_FIELD(SMMU_S2CR29, WACFG, 2, 22)
 831    DEP_FIELD(SMMU_S2CR29, RACFG, 2, 20)
 832    DEP_FIELD(SMMU_S2CR29, NSCFG, 2, 18)
 833    DEP_FIELD(SMMU_S2CR29, TYPE, 2, 16)
 834    DEP_FIELD(SMMU_S2CR29, MEM_ATTR, 4, 12)
 835    DEP_FIELD(SMMU_S2CR29, MTCFG, 1, 11)
 836    DEP_FIELD(SMMU_S2CR29, SHCFG, 2, 8)
 837    DEP_FIELD(SMMU_S2CR29, CBNDX_VMID, 8, 0)
 838DEP_REG32(SMMU_S2CR30, 0xc78)
 839    DEP_FIELD(SMMU_S2CR30, TRANSIENTCFG, 2, 28)
 840    DEP_FIELD(SMMU_S2CR30, INSTCFG_1, 1, 27)
 841    DEP_FIELD(SMMU_S2CR30, INSTCFG_0_FB, 1, 26)
 842    DEP_FIELD(SMMU_S2CR30, PRIVCFG_BSU, 2, 24)
 843    DEP_FIELD(SMMU_S2CR30, WACFG, 2, 22)
 844    DEP_FIELD(SMMU_S2CR30, RACFG, 2, 20)
 845    DEP_FIELD(SMMU_S2CR30, NSCFG, 2, 18)
 846    DEP_FIELD(SMMU_S2CR30, TYPE, 2, 16)
 847    DEP_FIELD(SMMU_S2CR30, MEM_ATTR, 4, 12)
 848    DEP_FIELD(SMMU_S2CR30, MTCFG, 1, 11)
 849    DEP_FIELD(SMMU_S2CR30, SHCFG, 2, 8)
 850    DEP_FIELD(SMMU_S2CR30, CBNDX_VMID, 8, 0)
 851DEP_REG32(SMMU_S2CR31, 0xc7c)
 852    DEP_FIELD(SMMU_S2CR31, TRANSIENTCFG, 2, 28)
 853    DEP_FIELD(SMMU_S2CR31, INSTCFG_1, 1, 27)
 854    DEP_FIELD(SMMU_S2CR31, INSTCFG_0_FB, 1, 26)
 855    DEP_FIELD(SMMU_S2CR31, PRIVCFG_BSU, 2, 24)
 856    DEP_FIELD(SMMU_S2CR31, WACFG, 2, 22)
 857    DEP_FIELD(SMMU_S2CR31, RACFG, 2, 20)
 858    DEP_FIELD(SMMU_S2CR31, NSCFG, 2, 18)
 859    DEP_FIELD(SMMU_S2CR31, TYPE, 2, 16)
 860    DEP_FIELD(SMMU_S2CR31, MEM_ATTR, 4, 12)
 861    DEP_FIELD(SMMU_S2CR31, MTCFG, 1, 11)
 862    DEP_FIELD(SMMU_S2CR31, SHCFG, 2, 8)
 863    DEP_FIELD(SMMU_S2CR31, CBNDX_VMID, 8, 0)
 864DEP_REG32(SMMU_S2CR32, 0xc80)
 865    DEP_FIELD(SMMU_S2CR32, TRANSIENTCFG, 2, 28)
 866    DEP_FIELD(SMMU_S2CR32, INSTCFG_1, 1, 27)
 867    DEP_FIELD(SMMU_S2CR32, INSTCFG_0_FB, 1, 26)
 868    DEP_FIELD(SMMU_S2CR32, PRIVCFG_BSU, 2, 24)
 869    DEP_FIELD(SMMU_S2CR32, WACFG, 2, 22)
 870    DEP_FIELD(SMMU_S2CR32, RACFG, 2, 20)
 871    DEP_FIELD(SMMU_S2CR32, NSCFG, 2, 18)
 872    DEP_FIELD(SMMU_S2CR32, TYPE, 2, 16)
 873    DEP_FIELD(SMMU_S2CR32, MEM_ATTR, 4, 12)
 874    DEP_FIELD(SMMU_S2CR32, MTCFG, 1, 11)
 875    DEP_FIELD(SMMU_S2CR32, SHCFG, 2, 8)
 876    DEP_FIELD(SMMU_S2CR32, CBNDX_VMID, 8, 0)
 877DEP_REG32(SMMU_S2CR33, 0xc84)
 878    DEP_FIELD(SMMU_S2CR33, TRANSIENTCFG, 2, 28)
 879    DEP_FIELD(SMMU_S2CR33, INSTCFG_1, 1, 27)
 880    DEP_FIELD(SMMU_S2CR33, INSTCFG_0_FB, 1, 26)
 881    DEP_FIELD(SMMU_S2CR33, PRIVCFG_BSU, 2, 24)
 882    DEP_FIELD(SMMU_S2CR33, WACFG, 2, 22)
 883    DEP_FIELD(SMMU_S2CR33, RACFG, 2, 20)
 884    DEP_FIELD(SMMU_S2CR33, NSCFG, 2, 18)
 885    DEP_FIELD(SMMU_S2CR33, TYPE, 2, 16)
 886    DEP_FIELD(SMMU_S2CR33, MEM_ATTR, 4, 12)
 887    DEP_FIELD(SMMU_S2CR33, MTCFG, 1, 11)
 888    DEP_FIELD(SMMU_S2CR33, SHCFG, 2, 8)
 889    DEP_FIELD(SMMU_S2CR33, CBNDX_VMID, 8, 0)
 890DEP_REG32(SMMU_S2CR34, 0xc88)
 891    DEP_FIELD(SMMU_S2CR34, TRANSIENTCFG, 2, 28)
 892    DEP_FIELD(SMMU_S2CR34, INSTCFG_1, 1, 27)
 893    DEP_FIELD(SMMU_S2CR34, INSTCFG_0_FB, 1, 26)
 894    DEP_FIELD(SMMU_S2CR34, PRIVCFG_BSU, 2, 24)
 895    DEP_FIELD(SMMU_S2CR34, WACFG, 2, 22)
 896    DEP_FIELD(SMMU_S2CR34, RACFG, 2, 20)
 897    DEP_FIELD(SMMU_S2CR34, NSCFG, 2, 18)
 898    DEP_FIELD(SMMU_S2CR34, TYPE, 2, 16)
 899    DEP_FIELD(SMMU_S2CR34, MEM_ATTR, 4, 12)
 900    DEP_FIELD(SMMU_S2CR34, MTCFG, 1, 11)
 901    DEP_FIELD(SMMU_S2CR34, SHCFG, 2, 8)
 902    DEP_FIELD(SMMU_S2CR34, CBNDX_VMID, 8, 0)
 903DEP_REG32(SMMU_S2CR35, 0xc8c)
 904    DEP_FIELD(SMMU_S2CR35, TRANSIENTCFG, 2, 28)
 905    DEP_FIELD(SMMU_S2CR35, INSTCFG_1, 1, 27)
 906    DEP_FIELD(SMMU_S2CR35, INSTCFG_0_FB, 1, 26)
 907    DEP_FIELD(SMMU_S2CR35, PRIVCFG_BSU, 2, 24)
 908    DEP_FIELD(SMMU_S2CR35, WACFG, 2, 22)
 909    DEP_FIELD(SMMU_S2CR35, RACFG, 2, 20)
 910    DEP_FIELD(SMMU_S2CR35, NSCFG, 2, 18)
 911    DEP_FIELD(SMMU_S2CR35, TYPE, 2, 16)
 912    DEP_FIELD(SMMU_S2CR35, MEM_ATTR, 4, 12)
 913    DEP_FIELD(SMMU_S2CR35, MTCFG, 1, 11)
 914    DEP_FIELD(SMMU_S2CR35, SHCFG, 2, 8)
 915    DEP_FIELD(SMMU_S2CR35, CBNDX_VMID, 8, 0)
 916DEP_REG32(SMMU_S2CR36, 0xc90)
 917    DEP_FIELD(SMMU_S2CR36, TRANSIENTCFG, 2, 28)
 918    DEP_FIELD(SMMU_S2CR36, INSTCFG_1, 1, 27)
 919    DEP_FIELD(SMMU_S2CR36, INSTCFG_0_FB, 1, 26)
 920    DEP_FIELD(SMMU_S2CR36, PRIVCFG_BSU, 2, 24)
 921    DEP_FIELD(SMMU_S2CR36, WACFG, 2, 22)
 922    DEP_FIELD(SMMU_S2CR36, RACFG, 2, 20)
 923    DEP_FIELD(SMMU_S2CR36, NSCFG, 2, 18)
 924    DEP_FIELD(SMMU_S2CR36, TYPE, 2, 16)
 925    DEP_FIELD(SMMU_S2CR36, MEM_ATTR, 4, 12)
 926    DEP_FIELD(SMMU_S2CR36, MTCFG, 1, 11)
 927    DEP_FIELD(SMMU_S2CR36, SHCFG, 2, 8)
 928    DEP_FIELD(SMMU_S2CR36, CBNDX_VMID, 8, 0)
 929DEP_REG32(SMMU_S2CR37, 0xc94)
 930    DEP_FIELD(SMMU_S2CR37, TRANSIENTCFG, 2, 28)
 931    DEP_FIELD(SMMU_S2CR37, INSTCFG_1, 1, 27)
 932    DEP_FIELD(SMMU_S2CR37, INSTCFG_0_FB, 1, 26)
 933    DEP_FIELD(SMMU_S2CR37, PRIVCFG_BSU, 2, 24)
 934    DEP_FIELD(SMMU_S2CR37, WACFG, 2, 22)
 935    DEP_FIELD(SMMU_S2CR37, RACFG, 2, 20)
 936    DEP_FIELD(SMMU_S2CR37, NSCFG, 2, 18)
 937    DEP_FIELD(SMMU_S2CR37, TYPE, 2, 16)
 938    DEP_FIELD(SMMU_S2CR37, MEM_ATTR, 4, 12)
 939    DEP_FIELD(SMMU_S2CR37, MTCFG, 1, 11)
 940    DEP_FIELD(SMMU_S2CR37, SHCFG, 2, 8)
 941    DEP_FIELD(SMMU_S2CR37, CBNDX_VMID, 8, 0)
 942DEP_REG32(SMMU_S2CR38, 0xc98)
 943    DEP_FIELD(SMMU_S2CR38, TRANSIENTCFG, 2, 28)
 944    DEP_FIELD(SMMU_S2CR38, INSTCFG_1, 1, 27)
 945    DEP_FIELD(SMMU_S2CR38, INSTCFG_0_FB, 1, 26)
 946    DEP_FIELD(SMMU_S2CR38, PRIVCFG_BSU, 2, 24)
 947    DEP_FIELD(SMMU_S2CR38, WACFG, 2, 22)
 948    DEP_FIELD(SMMU_S2CR38, RACFG, 2, 20)
 949    DEP_FIELD(SMMU_S2CR38, NSCFG, 2, 18)
 950    DEP_FIELD(SMMU_S2CR38, TYPE, 2, 16)
 951    DEP_FIELD(SMMU_S2CR38, MEM_ATTR, 4, 12)
 952    DEP_FIELD(SMMU_S2CR38, MTCFG, 1, 11)
 953    DEP_FIELD(SMMU_S2CR38, SHCFG, 2, 8)
 954    DEP_FIELD(SMMU_S2CR38, CBNDX_VMID, 8, 0)
 955DEP_REG32(SMMU_S2CR39, 0xc9c)
 956    DEP_FIELD(SMMU_S2CR39, TRANSIENTCFG, 2, 28)
 957    DEP_FIELD(SMMU_S2CR39, INSTCFG_1, 1, 27)
 958    DEP_FIELD(SMMU_S2CR39, INSTCFG_0_FB, 1, 26)
 959    DEP_FIELD(SMMU_S2CR39, PRIVCFG_BSU, 2, 24)
 960    DEP_FIELD(SMMU_S2CR39, WACFG, 2, 22)
 961    DEP_FIELD(SMMU_S2CR39, RACFG, 2, 20)
 962    DEP_FIELD(SMMU_S2CR39, NSCFG, 2, 18)
 963    DEP_FIELD(SMMU_S2CR39, TYPE, 2, 16)
 964    DEP_FIELD(SMMU_S2CR39, MEM_ATTR, 4, 12)
 965    DEP_FIELD(SMMU_S2CR39, MTCFG, 1, 11)
 966    DEP_FIELD(SMMU_S2CR39, SHCFG, 2, 8)
 967    DEP_FIELD(SMMU_S2CR39, CBNDX_VMID, 8, 0)
 968DEP_REG32(SMMU_S2CR40, 0xca0)
 969    DEP_FIELD(SMMU_S2CR40, TRANSIENTCFG, 2, 28)
 970    DEP_FIELD(SMMU_S2CR40, INSTCFG_1, 1, 27)
 971    DEP_FIELD(SMMU_S2CR40, INSTCFG_0_FB, 1, 26)
 972    DEP_FIELD(SMMU_S2CR40, PRIVCFG_BSU, 2, 24)
 973    DEP_FIELD(SMMU_S2CR40, WACFG, 2, 22)
 974    DEP_FIELD(SMMU_S2CR40, RACFG, 2, 20)
 975    DEP_FIELD(SMMU_S2CR40, NSCFG, 2, 18)
 976    DEP_FIELD(SMMU_S2CR40, TYPE, 2, 16)
 977    DEP_FIELD(SMMU_S2CR40, MEM_ATTR, 4, 12)
 978    DEP_FIELD(SMMU_S2CR40, MTCFG, 1, 11)
 979    DEP_FIELD(SMMU_S2CR40, SHCFG, 2, 8)
 980    DEP_FIELD(SMMU_S2CR40, CBNDX_VMID, 8, 0)
 981DEP_REG32(SMMU_S2CR41, 0xca4)
 982    DEP_FIELD(SMMU_S2CR41, TRANSIENTCFG, 2, 28)
 983    DEP_FIELD(SMMU_S2CR41, INSTCFG_1, 1, 27)
 984    DEP_FIELD(SMMU_S2CR41, INSTCFG_0_FB, 1, 26)
 985    DEP_FIELD(SMMU_S2CR41, PRIVCFG_BSU, 2, 24)
 986    DEP_FIELD(SMMU_S2CR41, WACFG, 2, 22)
 987    DEP_FIELD(SMMU_S2CR41, RACFG, 2, 20)
 988    DEP_FIELD(SMMU_S2CR41, NSCFG, 2, 18)
 989    DEP_FIELD(SMMU_S2CR41, TYPE, 2, 16)
 990    DEP_FIELD(SMMU_S2CR41, MEM_ATTR, 4, 12)
 991    DEP_FIELD(SMMU_S2CR41, MTCFG, 1, 11)
 992    DEP_FIELD(SMMU_S2CR41, SHCFG, 2, 8)
 993    DEP_FIELD(SMMU_S2CR41, CBNDX_VMID, 8, 0)
 994DEP_REG32(SMMU_S2CR42, 0xca8)
 995    DEP_FIELD(SMMU_S2CR42, TRANSIENTCFG, 2, 28)
 996    DEP_FIELD(SMMU_S2CR42, INSTCFG_1, 1, 27)
 997    DEP_FIELD(SMMU_S2CR42, INSTCFG_0_FB, 1, 26)
 998    DEP_FIELD(SMMU_S2CR42, PRIVCFG_BSU, 2, 24)
 999    DEP_FIELD(SMMU_S2CR42, WACFG, 2, 22)
1000    DEP_FIELD(SMMU_S2CR42, RACFG, 2, 20)

1001    DEP_FIELD(SMMU_S2CR42, NSCFG, 2, 18)
1002    DEP_FIELD(SMMU_S2CR42, TYPE, 2, 16)
1003    DEP_FIELD(SMMU_S2CR42, MEM_ATTR, 4, 12)
1004    DEP_FIELD(SMMU_S2CR42, MTCFG, 1, 11)
1005    DEP_FIELD(SMMU_S2CR42, SHCFG, 2, 8)
1006    DEP_FIELD(SMMU_S2CR42, CBNDX_VMID, 8, 0)
1007DEP_REG32(SMMU_S2CR43, 0xcac)
1008    DEP_FIELD(SMMU_S2CR43, TRANSIENTCFG, 2, 28)
1009    DEP_FIELD(SMMU_S2CR43, INSTCFG_1, 1, 27)
1010    DEP_FIELD(SMMU_S2CR43, INSTCFG_0_FB, 1, 26)
1011    DEP_FIELD(SMMU_S2CR43, PRIVCFG_BSU, 2, 24)
1012    DEP_FIELD(SMMU_S2CR43, WACFG, 2, 22)
1013    DEP_FIELD(SMMU_S2CR43, RACFG, 2, 20)
1014    DEP_FIELD(SMMU_S2CR43, NSCFG, 2, 18)
1015    DEP_FIELD(SMMU_S2CR43, TYPE, 2, 16)
1016    DEP_FIELD(SMMU_S2CR43, MEM_ATTR, 4, 12)
1017    DEP_FIELD(SMMU_S2CR43, MTCFG, 1, 11)
1018    DEP_FIELD(SMMU_S2CR43, SHCFG, 2, 8)
1019    DEP_FIELD(SMMU_S2CR43, CBNDX_VMID, 8, 0)
1020DEP_REG32(SMMU_S2CR44, 0xcb0)
1021    DEP_FIELD(SMMU_S2CR44, TRANSIENTCFG, 2, 28)
1022    DEP_FIELD(SMMU_S2CR44, INSTCFG_1, 1, 27)
1023    DEP_FIELD(SMMU_S2CR44, INSTCFG_0_FB, 1, 26)
1024    DEP_FIELD(SMMU_S2CR44, PRIVCFG_BSU, 2, 24)
1025    DEP_FIELD(SMMU_S2CR44, WACFG, 2, 22)
1026    DEP_FIELD(SMMU_S2CR44, RACFG, 2, 20)
1027    DEP_FIELD(SMMU_S2CR44, NSCFG, 2, 18)
1028    DEP_FIELD(SMMU_S2CR44, TYPE, 2, 16)
1029    DEP_FIELD(SMMU_S2CR44, MEM_ATTR, 4, 12)
1030    DEP_FIELD(SMMU_S2CR44, MTCFG, 1, 11)
1031    DEP_FIELD(SMMU_S2CR44, SHCFG, 2, 8)
1032    DEP_FIELD(SMMU_S2CR44, CBNDX_VMID, 8, 0)
1033DEP_REG32(SMMU_S2CR45, 0xcb4)
1034    DEP_FIELD(SMMU_S2CR45, TRANSIENTCFG, 2, 28)
1035    DEP_FIELD(SMMU_S2CR45, INSTCFG_1, 1, 27)
1036    DEP_FIELD(SMMU_S2CR45, INSTCFG_0_FB, 1, 26)
1037    DEP_FIELD(SMMU_S2CR45, PRIVCFG_BSU, 2, 24)
1038    DEP_FIELD(SMMU_S2CR45, WACFG, 2, 22)
1039    DEP_FIELD(SMMU_S2CR45, RACFG, 2, 20)
1040    DEP_FIELD(SMMU_S2CR45, NSCFG, 2, 18)
1041    DEP_FIELD(SMMU_S2CR45, TYPE, 2, 16)
1042    DEP_FIELD(SMMU_S2CR45, MEM_ATTR, 4, 12)
1043    DEP_FIELD(SMMU_S2CR45, MTCFG, 1, 11)
1044    DEP_FIELD(SMMU_S2CR45, SHCFG, 2, 8)
1045    DEP_FIELD(SMMU_S2CR45, CBNDX_VMID, 8, 0)
1046DEP_REG32(SMMU_S2CR46, 0xcb8)
1047    DEP_FIELD(SMMU_S2CR46, TRANSIENTCFG, 2, 28)
1048    DEP_FIELD(SMMU_S2CR46, INSTCFG_1, 1, 27)
1049    DEP_FIELD(SMMU_S2CR46, INSTCFG_0_FB, 1, 26)
1050    DEP_FIELD(SMMU_S2CR46, PRIVCFG_BSU, 2, 24)
1051    DEP_FIELD(SMMU_S2CR46, WACFG, 2, 22)
1052    DEP_FIELD(SMMU_S2CR46, RACFG, 2, 20)
1053    DEP_FIELD(SMMU_S2CR46, NSCFG, 2, 18)
1054    DEP_FIELD(SMMU_S2CR46, TYPE, 2, 16)
1055    DEP_FIELD(SMMU_S2CR46, MEM_ATTR, 4, 12)
1056    DEP_FIELD(SMMU_S2CR46, MTCFG, 1, 11)
1057    DEP_FIELD(SMMU_S2CR46, SHCFG, 2, 8)
1058    DEP_FIELD(SMMU_S2CR46, CBNDX_VMID, 8, 0)
1059DEP_REG32(SMMU_S2CR47, 0xcbc)
1060    DEP_FIELD(SMMU_S2CR47, TRANSIENTCFG, 2, 28)
1061    DEP_FIELD(SMMU_S2CR47, INSTCFG_1, 1, 27)
1062    DEP_FIELD(SMMU_S2CR47, INSTCFG_0_FB, 1, 26)
1063    DEP_FIELD(SMMU_S2CR47, PRIVCFG_BSU, 2, 24)
1064    DEP_FIELD(SMMU_S2CR47, WACFG, 2, 22)
1065    DEP_FIELD(SMMU_S2CR47, RACFG, 2, 20)
1066    DEP_FIELD(SMMU_S2CR47, NSCFG, 2, 18)
1067    DEP_FIELD(SMMU_S2CR47, TYPE, 2, 16)
1068    DEP_FIELD(SMMU_S2CR47, MEM_ATTR, 4, 12)
1069    DEP_FIELD(SMMU_S2CR47, MTCFG, 1, 11)
1070    DEP_FIELD(SMMU_S2CR47, SHCFG, 2, 8)
1071    DEP_FIELD(SMMU_S2CR47, CBNDX_VMID, 8, 0)
1072DEP_REG32(SMMU_PIDR4, 0xfd0)
1073    DEP_FIELD(SMMU_PIDR4, FOURKB_COUNT, 4, 4)
1074    DEP_FIELD(SMMU_PIDR4, JEP106_CONTINUATION_CODE, 4, 0)
1075DEP_REG32(SMMU_PIDR5, 0xfd4)
1076DEP_REG32(SMMU_PIDR6, 0xfd8)
1077DEP_REG32(SMMU_PIDR7, 0xfdc)
1078DEP_REG32(SMMU_PIDR0, 0xfe0)
1079    DEP_FIELD(SMMU_PIDR0, PARTNUMBER0, 8, 0)
1080DEP_REG32(SMMU_PIDR1, 0xfe4)
1081    DEP_FIELD(SMMU_PIDR1, JEP106_IDENTITY_CODE, 4, 4)
1082    DEP_FIELD(SMMU_PIDR1, PARTNUMBER1, 4, 0)
1083DEP_REG32(SMMU_PIDR2, 0xfe8)
1084    DEP_FIELD(SMMU_PIDR2, ARCHITECTURE_REVISION, 4, 4)
1085    DEP_FIELD(SMMU_PIDR2, JEDEC, 1, 3)
1086    DEP_FIELD(SMMU_PIDR2, JEP106_IDENTITY_CODE, 3, 0)
1087DEP_REG32(SMMU_PIDR3, 0xfec)
1088    DEP_FIELD(SMMU_PIDR3, REVAND, 4, 4)
1089    DEP_FIELD(SMMU_PIDR3, CUSTOMER_MODIFIED, 4, 0)
1090DEP_REG32(SMMU_CIDR0, 0xff0)
1091    DEP_FIELD(SMMU_CIDR0, PREAMBLE, 8, 0)
1092DEP_REG32(SMMU_CIDR1, 0xff4)
1093    DEP_FIELD(SMMU_CIDR1, PREAMBLE, 8, 0)
1094DEP_REG32(SMMU_CIDR2, 0xff8)
1095    DEP_FIELD(SMMU_CIDR2, PREAMBLE, 8, 0)
1096DEP_REG32(SMMU_CIDR3, 0xffc)
1097    DEP_FIELD(SMMU_CIDR3, PREAMBLE, 8, 0)
1098DEP_REG32(SMMU_CBAR0, 0x1000)
1099    DEP_FIELD(SMMU_CBAR0, IRPTNDX, 8, 24)
1100    DEP_FIELD(SMMU_CBAR0, WACFG, 2, 22)
1101    DEP_FIELD(SMMU_CBAR0, RACFG, 2, 20)
1102    DEP_FIELD(SMMU_CBAR0, BSU, 2, 18)
1103    DEP_FIELD(SMMU_CBAR0, TYPE, 2, 16)
1104    DEP_FIELD(SMMU_CBAR0, MEMATTR_CBNDX_7_4, 4, 12)
1105    DEP_FIELD(SMMU_CBAR0, FB_CBNDX_3, 1, 11)
1106    DEP_FIELD(SMMU_CBAR0, HYPC_CBNDX_2, 1, 10)
1107    DEP_FIELD(SMMU_CBAR0, BPSHCFG_CBNDX_1_0, 2, 8)
1108    DEP_FIELD(SMMU_CBAR0, VMID, 8, 0)
1109DEP_REG32(SMMU_CBAR1, 0x1004)
1110    DEP_FIELD(SMMU_CBAR1, IRPTNDX, 8, 24)
1111    DEP_FIELD(SMMU_CBAR1, WACFG, 2, 22)
1112    DEP_FIELD(SMMU_CBAR1, RACFG, 2, 20)
1113    DEP_FIELD(SMMU_CBAR1, BSU, 2, 18)
1114    DEP_FIELD(SMMU_CBAR1, TYPE, 2, 16)
1115    DEP_FIELD(SMMU_CBAR1, MEMATTR_CBNDX_7_4, 4, 12)
1116    DEP_FIELD(SMMU_CBAR1, FB_CBNDX_3, 1, 11)
1117    DEP_FIELD(SMMU_CBAR1, HYPC_CBNDX_2, 1, 10)
1118    DEP_FIELD(SMMU_CBAR1, BPSHCFG_CBNDX_1_0, 2, 8)
1119    DEP_FIELD(SMMU_CBAR1, VMID, 8, 0)
1120DEP_REG32(SMMU_CBAR2, 0x1008)
1121    DEP_FIELD(SMMU_CBAR2, IRPTNDX, 8, 24)
1122    DEP_FIELD(SMMU_CBAR2, WACFG, 2, 22)
1123    DEP_FIELD(SMMU_CBAR2, RACFG, 2, 20)
1124    DEP_FIELD(SMMU_CBAR2, BSU, 2, 18)
1125    DEP_FIELD(SMMU_CBAR2, TYPE, 2, 16)
1126    DEP_FIELD(SMMU_CBAR2, MEMATTR_CBNDX_7_4, 4, 12)
1127    DEP_FIELD(SMMU_CBAR2, FB_CBNDX_3, 1, 11)
1128    DEP_FIELD(SMMU_CBAR2, HYPC_CBNDX_2, 1, 10)
1129    DEP_FIELD(SMMU_CBAR2, BPSHCFG_CBNDX_1_0, 2, 8)
1130    DEP_FIELD(SMMU_CBAR2, VMID, 8, 0)
1131DEP_REG32(SMMU_CBAR3, 0x100c)
1132    DEP_FIELD(SMMU_CBAR3, IRPTNDX, 8, 24)
1133    DEP_FIELD(SMMU_CBAR3, WACFG, 2, 22)
1134    DEP_FIELD(SMMU_CBAR3, RACFG, 2, 20)
1135    DEP_FIELD(SMMU_CBAR3, BSU, 2, 18)
1136    DEP_FIELD(SMMU_CBAR3, TYPE, 2, 16)
1137    DEP_FIELD(SMMU_CBAR3, MEMATTR_CBNDX_7_4, 4, 12)
1138    DEP_FIELD(SMMU_CBAR3, FB_CBNDX_3, 1, 11)
1139    DEP_FIELD(SMMU_CBAR3, HYPC_CBNDX_2, 1, 10)
1140    DEP_FIELD(SMMU_CBAR3, BPSHCFG_CBNDX_1_0, 2, 8)
1141    DEP_FIELD(SMMU_CBAR3, VMID, 8, 0)
1142DEP_REG32(SMMU_CBAR4, 0x1010)
1143    DEP_FIELD(SMMU_CBAR4, IRPTNDX, 8, 24)
1144    DEP_FIELD(SMMU_CBAR4, WACFG, 2, 22)
1145    DEP_FIELD(SMMU_CBAR4, RACFG, 2, 20)
1146    DEP_FIELD(SMMU_CBAR4, BSU, 2, 18)
1147    DEP_FIELD(SMMU_CBAR4, TYPE, 2, 16)
1148    DEP_FIELD(SMMU_CBAR4, MEMATTR_CBNDX_7_4, 4, 12)
1149    DEP_FIELD(SMMU_CBAR4, FB_CBNDX_3, 1, 11)
1150    DEP_FIELD(SMMU_CBAR4, HYPC_CBNDX_2, 1, 10)
1151    DEP_FIELD(SMMU_CBAR4, BPSHCFG_CBNDX_1_0, 2, 8)
1152    DEP_FIELD(SMMU_CBAR4, VMID, 8, 0)
1153DEP_REG32(SMMU_CBAR5, 0x1014)
1154    DEP_FIELD(SMMU_CBAR5, IRPTNDX, 8, 24)
1155    DEP_FIELD(SMMU_CBAR5, WACFG, 2, 22)
1156    DEP_FIELD(SMMU_CBAR5, RACFG, 2, 20)
1157    DEP_FIELD(SMMU_CBAR5, BSU, 2, 18)
1158    DEP_FIELD(SMMU_CBAR5, TYPE, 2, 16)
1159    DEP_FIELD(SMMU_CBAR5, MEMATTR_CBNDX_7_4, 4, 12)
1160    DEP_FIELD(SMMU_CBAR5, FB_CBNDX_3, 1, 11)
1161    DEP_FIELD(SMMU_CBAR5, HYPC_CBNDX_2, 1, 10)
1162    DEP_FIELD(SMMU_CBAR5, BPSHCFG_CBNDX_1_0, 2, 8)
1163    DEP_FIELD(SMMU_CBAR5, VMID, 8, 0)
1164DEP_REG32(SMMU_CBAR6, 0x1018)
1165    DEP_FIELD(SMMU_CBAR6, IRPTNDX, 8, 24)
1166    DEP_FIELD(SMMU_CBAR6, WACFG, 2, 22)
1167    DEP_FIELD(SMMU_CBAR6, RACFG, 2, 20)
1168    DEP_FIELD(SMMU_CBAR6, BSU, 2, 18)
1169    DEP_FIELD(SMMU_CBAR6, TYPE, 2, 16)
1170    DEP_FIELD(SMMU_CBAR6, MEMATTR_CBNDX_7_4, 4, 12)
1171    DEP_FIELD(SMMU_CBAR6, FB_CBNDX_3, 1, 11)
1172    DEP_FIELD(SMMU_CBAR6, HYPC_CBNDX_2, 1, 10)
1173    DEP_FIELD(SMMU_CBAR6, BPSHCFG_CBNDX_1_0, 2, 8)
1174    DEP_FIELD(SMMU_CBAR6, VMID, 8, 0)
1175DEP_REG32(SMMU_CBAR7, 0x101c)
1176    DEP_FIELD(SMMU_CBAR7, IRPTNDX, 8, 24)
1177    DEP_FIELD(SMMU_CBAR7, WACFG, 2, 22)
1178    DEP_FIELD(SMMU_CBAR7, RACFG, 2, 20)
1179    DEP_FIELD(SMMU_CBAR7, BSU, 2, 18)
1180    DEP_FIELD(SMMU_CBAR7, TYPE, 2, 16)
1181    DEP_FIELD(SMMU_CBAR7, MEMATTR_CBNDX_7_4, 4, 12)
1182    DEP_FIELD(SMMU_CBAR7, FB_CBNDX_3, 1, 11)
1183    DEP_FIELD(SMMU_CBAR7, HYPC_CBNDX_2, 1, 10)
1184    DEP_FIELD(SMMU_CBAR7, BPSHCFG_CBNDX_1_0, 2, 8)
1185    DEP_FIELD(SMMU_CBAR7, VMID, 8, 0)
1186DEP_REG32(SMMU_CBAR8, 0x1020)
1187    DEP_FIELD(SMMU_CBAR8, IRPTNDX, 8, 24)
1188    DEP_FIELD(SMMU_CBAR8, WACFG, 2, 22)
1189    DEP_FIELD(SMMU_CBAR8, RACFG, 2, 20)
1190    DEP_FIELD(SMMU_CBAR8, BSU, 2, 18)
1191    DEP_FIELD(SMMU_CBAR8, TYPE, 2, 16)
1192    DEP_FIELD(SMMU_CBAR8, MEMATTR_CBNDX_7_4, 4, 12)
1193    DEP_FIELD(SMMU_CBAR8, FB_CBNDX_3, 1, 11)
1194    DEP_FIELD(SMMU_CBAR8, HYPC_CBNDX_2, 1, 10)
1195    DEP_FIELD(SMMU_CBAR8, BPSHCFG_CBNDX_1_0, 2, 8)
1196    DEP_FIELD(SMMU_CBAR8, VMID, 8, 0)
1197DEP_REG32(SMMU_CBAR9, 0x1024)
1198    DEP_FIELD(SMMU_CBAR9, IRPTNDX, 8, 24)
1199    DEP_FIELD(SMMU_CBAR9, WACFG, 2, 22)
1200    DEP_FIELD(SMMU_CBAR9, RACFG, 2, 20)
1201    DEP_FIELD(SMMU_CBAR9, BSU, 2, 18)
1202    DEP_FIELD(SMMU_CBAR9, TYPE, 2, 16)
1203    DEP_FIELD(SMMU_CBAR9, MEMATTR_CBNDX_7_4, 4, 12)
1204    DEP_FIELD(SMMU_CBAR9, FB_CBNDX_3, 1, 11)
1205    DEP_FIELD(SMMU_CBAR9, HYPC_CBNDX_2, 1, 10)
1206    DEP_FIELD(SMMU_CBAR9, BPSHCFG_CBNDX_1_0, 2, 8)
1207    DEP_FIELD(SMMU_CBAR9, VMID, 8, 0)
1208DEP_REG32(SMMU_CBAR10, 0x1028)
1209    DEP_FIELD(SMMU_CBAR10, IRPTNDX, 8, 24)
1210    DEP_FIELD(SMMU_CBAR10, WACFG, 2, 22)
1211    DEP_FIELD(SMMU_CBAR10, RACFG, 2, 20)
1212    DEP_FIELD(SMMU_CBAR10, BSU, 2, 18)
1213    DEP_FIELD(SMMU_CBAR10, TYPE, 2, 16)
1214    DEP_FIELD(SMMU_CBAR10, MEMATTR_CBNDX_7_4, 4, 12)
1215    DEP_FIELD(SMMU_CBAR10, FB_CBNDX_3, 1, 11)
1216    DEP_FIELD(SMMU_CBAR10, HYPC_CBNDX_2, 1, 10)
1217    DEP_FIELD(SMMU_CBAR10, BPSHCFG_CBNDX_1_0, 2, 8)
1218    DEP_FIELD(SMMU_CBAR10, VMID, 8, 0)
1219DEP_REG32(SMMU_CBAR11, 0x102c)
1220    DEP_FIELD(SMMU_CBAR11, IRPTNDX, 8, 24)
1221    DEP_FIELD(SMMU_CBAR11, WACFG, 2, 22)
1222    DEP_FIELD(SMMU_CBAR11, RACFG, 2, 20)
1223    DEP_FIELD(SMMU_CBAR11, BSU, 2, 18)
1224    DEP_FIELD(SMMU_CBAR11, TYPE, 2, 16)
1225    DEP_FIELD(SMMU_CBAR11, MEMATTR_CBNDX_7_4, 4, 12)
1226    DEP_FIELD(SMMU_CBAR11, FB_CBNDX_3, 1, 11)
1227    DEP_FIELD(SMMU_CBAR11, HYPC_CBNDX_2, 1, 10)
1228    DEP_FIELD(SMMU_CBAR11, BPSHCFG_CBNDX_1_0, 2, 8)
1229    DEP_FIELD(SMMU_CBAR11, VMID, 8, 0)
1230DEP_REG32(SMMU_CBAR12, 0x1030)
1231    DEP_FIELD(SMMU_CBAR12, IRPTNDX, 8, 24)
1232    DEP_FIELD(SMMU_CBAR12, WACFG, 2, 22)
1233    DEP_FIELD(SMMU_CBAR12, RACFG, 2, 20)
1234    DEP_FIELD(SMMU_CBAR12, BSU, 2, 18)
1235    DEP_FIELD(SMMU_CBAR12, TYPE, 2, 16)
1236    DEP_FIELD(SMMU_CBAR12, MEMATTR_CBNDX_7_4, 4, 12)
1237    DEP_FIELD(SMMU_CBAR12, FB_CBNDX_3, 1, 11)
1238    DEP_FIELD(SMMU_CBAR12, HYPC_CBNDX_2, 1, 10)
1239    DEP_FIELD(SMMU_CBAR12, BPSHCFG_CBNDX_1_0, 2, 8)
1240    DEP_FIELD(SMMU_CBAR12, VMID, 8, 0)
1241DEP_REG32(SMMU_CBAR13, 0x1034)
1242    DEP_FIELD(SMMU_CBAR13, IRPTNDX, 8, 24)
1243    DEP_FIELD(SMMU_CBAR13, WACFG, 2, 22)
1244    DEP_FIELD(SMMU_CBAR13, RACFG, 2, 20)
1245    DEP_FIELD(SMMU_CBAR13, BSU, 2, 18)
1246    DEP_FIELD(SMMU_CBAR13, TYPE, 2, 16)
1247    DEP_FIELD(SMMU_CBAR13, MEMATTR_CBNDX_7_4, 4, 12)
1248    DEP_FIELD(SMMU_CBAR13, FB_CBNDX_3, 1, 11)
1249    DEP_FIELD(SMMU_CBAR13, HYPC_CBNDX_2, 1, 10)
1250    DEP_FIELD(SMMU_CBAR13, BPSHCFG_CBNDX_1_0, 2, 8)
1251    DEP_FIELD(SMMU_CBAR13, VMID, 8, 0)
1252DEP_REG32(SMMU_CBAR14, 0x1038)
1253    DEP_FIELD(SMMU_CBAR14, IRPTNDX, 8, 24)
1254    DEP_FIELD(SMMU_CBAR14, WACFG, 2, 22)
1255    DEP_FIELD(SMMU_CBAR14, RACFG, 2, 20)
1256    DEP_FIELD(SMMU_CBAR14, BSU, 2, 18)
1257    DEP_FIELD(SMMU_CBAR14, TYPE, 2, 16)
1258    DEP_FIELD(SMMU_CBAR14, MEMATTR_CBNDX_7_4, 4, 12)
1259    DEP_FIELD(SMMU_CBAR14, FB_CBNDX_3, 1, 11)
1260    DEP_FIELD(SMMU_CBAR14, HYPC_CBNDX_2, 1, 10)
1261    DEP_FIELD(SMMU_CBAR14, BPSHCFG_CBNDX_1_0, 2, 8)
1262    DEP_FIELD(SMMU_CBAR14, VMID, 8, 0)
1263DEP_REG32(SMMU_CBAR15, 0x103c)
1264    DEP_FIELD(SMMU_CBAR15, IRPTNDX, 8, 24)
1265    DEP_FIELD(SMMU_CBAR15, WACFG, 2, 22)
1266    DEP_FIELD(SMMU_CBAR15, RACFG, 2, 20)
1267    DEP_FIELD(SMMU_CBAR15, BSU, 2, 18)
1268    DEP_FIELD(SMMU_CBAR15, TYPE, 2, 16)
1269    DEP_FIELD(SMMU_CBAR15, MEMATTR_CBNDX_7_4, 4, 12)
1270    DEP_FIELD(SMMU_CBAR15, FB_CBNDX_3, 1, 11)
1271    DEP_FIELD(SMMU_CBAR15, HYPC_CBNDX_2, 1, 10)
1272    DEP_FIELD(SMMU_CBAR15, BPSHCFG_CBNDX_1_0, 2, 8)
1273    DEP_FIELD(SMMU_CBAR15, VMID, 8, 0)
1274DEP_REG32(SMMU_CBFRSYNRA0, 0x1400)
1275    DEP_FIELD(SMMU_CBFRSYNRA0, SSD_INDEX, 15, 16)
1276    DEP_FIELD(SMMU_CBFRSYNRA0, STREAMID, 15, 0)
1277DEP_REG32(SMMU_CBFRSYNRA1, 0x1404)
1278    DEP_FIELD(SMMU_CBFRSYNRA1, SSD_INDEX, 15, 16)
1279    DEP_FIELD(SMMU_CBFRSYNRA1, STREAMID, 15, 0)
1280DEP_REG32(SMMU_CBFRSYNRA2, 0x1408)
1281    DEP_FIELD(SMMU_CBFRSYNRA2, SSD_INDEX, 15, 16)
1282    DEP_FIELD(SMMU_CBFRSYNRA2, STREAMID, 15, 0)
1283DEP_REG32(SMMU_CBFRSYNRA3, 0x140c)
1284    DEP_FIELD(SMMU_CBFRSYNRA3, SSD_INDEX, 15, 16)
1285    DEP_FIELD(SMMU_CBFRSYNRA3, STREAMID, 15, 0)
1286DEP_REG32(SMMU_CBFRSYNRA4, 0x1410)
1287    DEP_FIELD(SMMU_CBFRSYNRA4, SSD_INDEX, 15, 16)
1288    DEP_FIELD(SMMU_CBFRSYNRA4, STREAMID, 15, 0)
1289DEP_REG32(SMMU_CBFRSYNRA5, 0x1414)
1290    DEP_FIELD(SMMU_CBFRSYNRA5, SSD_INDEX, 15, 16)
1291    DEP_FIELD(SMMU_CBFRSYNRA5, STREAMID, 15, 0)
1292DEP_REG32(SMMU_CBFRSYNRA6, 0x1418)
1293    DEP_FIELD(SMMU_CBFRSYNRA6, SSD_INDEX, 15, 16)
1294    DEP_FIELD(SMMU_CBFRSYNRA6, STREAMID, 15, 0)
1295DEP_REG32(SMMU_CBFRSYNRA7, 0x141c)
1296    DEP_FIELD(SMMU_CBFRSYNRA7, SSD_INDEX, 15, 16)
1297    DEP_FIELD(SMMU_CBFRSYNRA7, STREAMID, 15, 0)
1298DEP_REG32(SMMU_CBFRSYNRA8, 0x1420)
1299    DEP_FIELD(SMMU_CBFRSYNRA8, SSD_INDEX, 15, 16)
1300    DEP_FIELD(SMMU_CBFRSYNRA8, STREAMID, 15, 0)
1301DEP_REG32(SMMU_CBFRSYNRA9, 0x1424)
1302    DEP_FIELD(SMMU_CBFRSYNRA9, SSD_INDEX, 15, 16)
1303    DEP_FIELD(SMMU_CBFRSYNRA9, STREAMID, 15, 0)
1304DEP_REG32(SMMU_CBFRSYNRA10, 0x1428)
1305    DEP_FIELD(SMMU_CBFRSYNRA10, SSD_INDEX, 15, 16)
1306    DEP_FIELD(SMMU_CBFRSYNRA10, STREAMID, 15, 0)
1307DEP_REG32(SMMU_CBFRSYNRA11, 0x142c)
1308    DEP_FIELD(SMMU_CBFRSYNRA11, SSD_INDEX, 15, 16)
1309    DEP_FIELD(SMMU_CBFRSYNRA11, STREAMID, 15, 0)
1310DEP_REG32(SMMU_CBFRSYNRA12, 0x1430)
1311    DEP_FIELD(SMMU_CBFRSYNRA12, SSD_INDEX, 15, 16)
1312    DEP_FIELD(SMMU_CBFRSYNRA12, STREAMID, 15, 0)
1313DEP_REG32(SMMU_CBFRSYNRA13, 0x1434)
1314    DEP_FIELD(SMMU_CBFRSYNRA13, SSD_INDEX, 15, 16)
1315    DEP_FIELD(SMMU_CBFRSYNRA13, STREAMID, 15, 0)
1316DEP_REG32(SMMU_CBFRSYNRA14, 0x1438)
1317    DEP_FIELD(SMMU_CBFRSYNRA14, SSD_INDEX, 15, 16)
1318    DEP_FIELD(SMMU_CBFRSYNRA14, STREAMID, 15, 0)
1319DEP_REG32(SMMU_CBFRSYNRA15, 0x143c)
1320    DEP_FIELD(SMMU_CBFRSYNRA15, SSD_INDEX, 15, 16)
1321    DEP_FIELD(SMMU_CBFRSYNRA15, STREAMID, 15, 0)
1322DEP_REG32(SMMU_CBA2R0, 0x1800)
1323    DEP_FIELD(SMMU_CBA2R0, MONC, 1, 1)
1324    DEP_FIELD(SMMU_CBA2R0, VA64, 1, 0)
1325DEP_REG32(SMMU_CBA2R1, 0x1804)
1326    DEP_FIELD(SMMU_CBA2R1, MONC, 1, 1)
1327    DEP_FIELD(SMMU_CBA2R1, VA64, 1, 0)
1328DEP_REG32(SMMU_CBA2R2, 0x1808)
1329    DEP_FIELD(SMMU_CBA2R2, MONC, 1, 1)
1330    DEP_FIELD(SMMU_CBA2R2, VA64, 1, 0)
1331DEP_REG32(SMMU_CBA2R3, 0x180c)
1332    DEP_FIELD(SMMU_CBA2R3, MONC, 1, 1)
1333    DEP_FIELD(SMMU_CBA2R3, VA64, 1, 0)
1334DEP_REG32(SMMU_CBA2R4, 0x1810)
1335    DEP_FIELD(SMMU_CBA2R4, MONC, 1, 1)
1336    DEP_FIELD(SMMU_CBA2R4, VA64, 1, 0)
1337DEP_REG32(SMMU_CBA2R5, 0x1814)
1338    DEP_FIELD(SMMU_CBA2R5, MONC, 1, 1)
1339    DEP_FIELD(SMMU_CBA2R5, VA64, 1, 0)
1340DEP_REG32(SMMU_CBA2R6, 0x1818)
1341    DEP_FIELD(SMMU_CBA2R6, MONC, 1, 1)
1342    DEP_FIELD(SMMU_CBA2R6, VA64, 1, 0)
1343DEP_REG32(SMMU_CBA2R7, 0x181c)
1344    DEP_FIELD(SMMU_CBA2R7, MONC, 1, 1)
1345    DEP_FIELD(SMMU_CBA2R7, VA64, 1, 0)
1346DEP_REG32(SMMU_CBA2R8, 0x1820)
1347    DEP_FIELD(SMMU_CBA2R8, MONC, 1, 1)
1348    DEP_FIELD(SMMU_CBA2R8, VA64, 1, 0)
1349DEP_REG32(SMMU_CBA2R9, 0x1824)
1350    DEP_FIELD(SMMU_CBA2R9, MONC, 1, 1)
1351    DEP_FIELD(SMMU_CBA2R9, VA64, 1, 0)
1352DEP_REG32(SMMU_CBA2R10, 0x1828)
1353    DEP_FIELD(SMMU_CBA2R10, MONC, 1, 1)
1354    DEP_FIELD(SMMU_CBA2R10, VA64, 1, 0)
1355DEP_REG32(SMMU_CBA2R11, 0x182c)
1356    DEP_FIELD(SMMU_CBA2R11, MONC, 1, 1)
1357    DEP_FIELD(SMMU_CBA2R11, VA64, 1, 0)
1358DEP_REG32(SMMU_CBA2R12, 0x1830)
1359    DEP_FIELD(SMMU_CBA2R12, MONC, 1, 1)
1360    DEP_FIELD(SMMU_CBA2R12, VA64, 1, 0)
1361DEP_REG32(SMMU_CBA2R13, 0x1834)
1362    DEP_FIELD(SMMU_CBA2R13, MONC, 1, 1)
1363    DEP_FIELD(SMMU_CBA2R13, VA64, 1, 0)
1364DEP_REG32(SMMU_CBA2R14, 0x1838)
1365    DEP_FIELD(SMMU_CBA2R14, MONC, 1, 1)
1366    DEP_FIELD(SMMU_CBA2R14, VA64, 1, 0)
1367DEP_REG32(SMMU_CBA2R15, 0x183c)
1368    DEP_FIELD(SMMU_CBA2R15, MONC, 1, 1)
1369    DEP_FIELD(SMMU_CBA2R15, VA64, 1, 0)
1370DEP_REG32(SMMU_ITCTRL, 0x2000)
1371    DEP_FIELD(SMMU_ITCTRL, TBU_INDEX, 3, 4)
1372    DEP_FIELD(SMMU_ITCTRL, MODULE, 1, 3)
1373    DEP_FIELD(SMMU_ITCTRL, RAM_DATA, 1, 2)
1374    DEP_FIELD(SMMU_ITCTRL, RAM_MODE, 1, 1)
1375    DEP_FIELD(SMMU_ITCTRL, INTGMODE, 1, 0)
1376DEP_REG32(SMMU_ITIP, 0x2004)
1377    DEP_FIELD(SMMU_ITIP, SPINDEN, 1, 0)
1378DEP_REG32(SMMU_ITOP_GLBL, 0x2008)
1379    DEP_FIELD(SMMU_ITOP_GLBL, TCU_RAM_DATA, 4, 16)
1380    DEP_FIELD(SMMU_ITOP_GLBL, GLBLSF1, 1, 9)
1381    DEP_FIELD(SMMU_ITOP_GLBL, GLBLNSF1, 1, 1)
1382DEP_REG32(SMMU_ITOP_PERF_INDEX, 0x200c)
1383    DEP_FIELD(SMMU_ITOP_PERF_INDEX, WAY_IPA2PA_PF, 2, 30)
1384    DEP_FIELD(SMMU_ITOP_PERF_INDEX, IPA2PA_PF_INDEX, 7, 16)
1385    DEP_FIELD(SMMU_ITOP_PERF_INDEX, WAY_MTLB_WC, 2, 14)
1386    DEP_FIELD(SMMU_ITOP_PERF_INDEX, MTLB_WC_INDEX, 12, 0)
1387DEP_REG32(SMMU_ITOP_CXT0TO31_RAM0, 0x2010)
1388DEP_REG32(SMMU_TBUQOS0, 0x2100)
1389    DEP_FIELD(SMMU_TBUQOS0, QOSTBU5, 4, 20)
1390    DEP_FIELD(SMMU_TBUQOS0, QOSTBU4, 4, 16)
1391    DEP_FIELD(SMMU_TBUQOS0, QOSTBU3, 4, 12)
1392    DEP_FIELD(SMMU_TBUQOS0, QOSTBU2, 4, 8)
1393    DEP_FIELD(SMMU_TBUQOS0, QOSTBU1, 4, 4)
1394    DEP_FIELD(SMMU_TBUQOS0, QOSTBU0, 4, 0)
1395DEP_REG32(SMMU_PER, 0x2200)
1396    DEP_FIELD(SMMU_PER, PER_TCU, 8, 8)
1397    DEP_FIELD(SMMU_PER, PER_TBU, 8, 0)
1398DEP_REG32(SMMU_TBU_PWR_STATUS, 0x2204)
1399DEP_REG32(PMEVCNTR0, 0x3000)
1400DEP_REG32(PMEVCNTR1, 0x3004)
1401DEP_REG32(PMEVCNTR2, 0x3008)
1402DEP_REG32(PMEVCNTR3, 0x300c)
1403DEP_REG32(PMEVCNTR4, 0x3010)
1404DEP_REG32(PMEVCNTR5, 0x3014)
1405DEP_REG32(PMEVCNTR6, 0x3018)
1406DEP_REG32(PMEVCNTR7, 0x301c)
1407DEP_REG32(PMEVCNTR8, 0x3020)
1408DEP_REG32(PMEVCNTR9, 0x3024)
1409DEP_REG32(PMEVCNTR10, 0x3028)
1410DEP_REG32(PMEVCNTR11, 0x302c)
1411DEP_REG32(PMEVCNTR12, 0x3030)
1412DEP_REG32(PMEVCNTR13, 0x3034)
1413DEP_REG32(PMEVCNTR14, 0x3038)
1414DEP_REG32(PMEVCNTR15, 0x303c)
1415DEP_REG32(PMEVCNTR16, 0x3040)
1416DEP_REG32(PMEVCNTR17, 0x3044)
1417DEP_REG32(PMEVCNTR18, 0x3048)
1418DEP_REG32(PMEVCNTR19, 0x304c)
1419DEP_REG32(PMEVCNTR20, 0x3050)
1420DEP_REG32(PMEVCNTR21, 0x3054)
1421DEP_REG32(PMEVCNTR22, 0x3058)
1422DEP_REG32(PMEVCNTR23, 0x305c)
1423DEP_REG32(PMEVTYPER0, 0x3400)
1424    DEP_FIELD(PMEVTYPER0, P, 1, 31)
1425    DEP_FIELD(PMEVTYPER0, U, 1, 30)
1426    DEP_FIELD(PMEVTYPER0, NSP, 1, 29)
1427    DEP_FIELD(PMEVTYPER0, NSU, 1, 28)
1428    DEP_FIELD(PMEVTYPER0, EVENT, 5, 0)
1429DEP_REG32(PMEVTYPER1, 0x3404)
1430    DEP_FIELD(PMEVTYPER1, P, 1, 31)
1431    DEP_FIELD(PMEVTYPER1, U, 1, 30)
1432    DEP_FIELD(PMEVTYPER1, NSP, 1, 29)
1433    DEP_FIELD(PMEVTYPER1, NSU, 1, 28)
1434    DEP_FIELD(PMEVTYPER1, EVENT, 5, 0)
1435DEP_REG32(PMEVTYPER2, 0x3408)
1436    DEP_FIELD(PMEVTYPER2, P, 1, 31)
1437    DEP_FIELD(PMEVTYPER2, U, 1, 30)
1438    DEP_FIELD(PMEVTYPER2, NSP, 1, 29)
1439    DEP_FIELD(PMEVTYPER2, NSU, 1, 28)
1440    DEP_FIELD(PMEVTYPER2, EVENT, 5, 0)
1441DEP_REG32(PMEVTYPER3, 0x340c)
1442    DEP_FIELD(PMEVTYPER3, P, 1, 31)
1443    DEP_FIELD(PMEVTYPER3, U, 1, 30)
1444    DEP_FIELD(PMEVTYPER3, NSP, 1, 29)
1445    DEP_FIELD(PMEVTYPER3, NSU, 1, 28)
1446    DEP_FIELD(PMEVTYPER3, EVENT, 5, 0)
1447DEP_REG32(PMEVTYPER4, 0x3410)
1448    DEP_FIELD(PMEVTYPER4, P, 1, 31)
1449    DEP_FIELD(PMEVTYPER4, U, 1, 30)
1450    DEP_FIELD(PMEVTYPER4, NSP, 1, 29)
1451    DEP_FIELD(PMEVTYPER4, NSU, 1, 28)
1452    DEP_FIELD(PMEVTYPER4, EVENT, 5, 0)
1453DEP_REG32(PMEVTYPER5, 0x3414)
1454    DEP_FIELD(PMEVTYPER5, P, 1, 31)
1455    DEP_FIELD(PMEVTYPER5, U, 1, 30)
1456    DEP_FIELD(PMEVTYPER5, NSP, 1, 29)
1457    DEP_FIELD(PMEVTYPER5, NSU, 1, 28)
1458    DEP_FIELD(PMEVTYPER5, EVENT, 5, 0)
1459DEP_REG32(PMEVTYPER6, 0x3418)
1460    DEP_FIELD(PMEVTYPER6, P, 1, 31)
1461    DEP_FIELD(PMEVTYPER6, U, 1, 30)
1462    DEP_FIELD(PMEVTYPER6, NSP, 1, 29)
1463    DEP_FIELD(PMEVTYPER6, NSU, 1, 28)
1464    DEP_FIELD(PMEVTYPER6, EVENT, 5, 0)
1465DEP_REG32(PMEVTYPER7, 0x341c)
1466    DEP_FIELD(PMEVTYPER7, P, 1, 31)
1467    DEP_FIELD(PMEVTYPER7, U, 1, 30)
1468    DEP_FIELD(PMEVTYPER7, NSP, 1, 29)
1469    DEP_FIELD(PMEVTYPER7, NSU, 1, 28)
1470    DEP_FIELD(PMEVTYPER7, EVENT, 5, 0)
1471DEP_REG32(PMEVTYPER8, 0x3420)
1472    DEP_FIELD(PMEVTYPER8, P, 1, 31)
1473    DEP_FIELD(PMEVTYPER8, U, 1, 30)
1474    DEP_FIELD(PMEVTYPER8, NSP, 1, 29)
1475    DEP_FIELD(PMEVTYPER8, NSU, 1, 28)
1476    DEP_FIELD(PMEVTYPER8, EVENT, 5, 0)
1477DEP_REG32(PMEVTYPER9, 0x3424)
1478    DEP_FIELD(PMEVTYPER9, P, 1, 31)
1479    DEP_FIELD(PMEVTYPER9, U, 1, 30)
1480    DEP_FIELD(PMEVTYPER9, NSP, 1, 29)
1481    DEP_FIELD(PMEVTYPER9, NSU, 1, 28)
1482    DEP_FIELD(PMEVTYPER9, EVENT, 5, 0)
1483DEP_REG32(PMEVTYPER10, 0x3428)
1484    DEP_FIELD(PMEVTYPER10, P, 1, 31)
1485    DEP_FIELD(PMEVTYPER10, U, 1, 30)
1486    DEP_FIELD(PMEVTYPER10, NSP, 1, 29)
1487    DEP_FIELD(PMEVTYPER10, NSU, 1, 28)
1488    DEP_FIELD(PMEVTYPER10, EVENT, 5, 0)
1489DEP_REG32(PMEVTYPER11, 0x342c)
1490    DEP_FIELD(PMEVTYPER11, P, 1, 31)
1491    DEP_FIELD(PMEVTYPER11, U, 1, 30)
1492    DEP_FIELD(PMEVTYPER11, NSP, 1, 29)
1493    DEP_FIELD(PMEVTYPER11, NSU, 1, 28)
1494    DEP_FIELD(PMEVTYPER11, EVENT, 5, 0)
1495DEP_REG32(PMEVTYPER12, 0x3430)
1496    DEP_FIELD(PMEVTYPER12, P, 1, 31)
1497    DEP_FIELD(PMEVTYPER12, U, 1, 30)
1498    DEP_FIELD(PMEVTYPER12, NSP, 1, 29)
1499    DEP_FIELD(PMEVTYPER12, NSU, 1, 28)
1500    DEP_FIELD(PMEVTYPER12, EVENT, 5, 0)
1501DEP_REG32(PMEVTYPER13, 0x3434)
1502    DEP_FIELD(PMEVTYPER13, P, 1, 31)
1503    DEP_FIELD(PMEVTYPER13, U, 1, 30)
1504    DEP_FIELD(PMEVTYPER13, NSP, 1, 29)
1505    DEP_FIELD(PMEVTYPER13, NSU, 1, 28)
1506    DEP_FIELD(PMEVTYPER13, EVENT, 5, 0)
1507DEP_REG32(PMEVTYPER14, 0x3438)
1508    DEP_FIELD(PMEVTYPER14, P, 1, 31)
1509    DEP_FIELD(PMEVTYPER14, U, 1, 30)
1510    DEP_FIELD(PMEVTYPER14, NSP, 1, 29)
1511    DEP_FIELD(PMEVTYPER14, NSU, 1, 28)
1512    DEP_FIELD(PMEVTYPER14, EVENT, 5, 0)
1513DEP_REG32(PMEVTYPER15, 0x343c)
1514    DEP_FIELD(PMEVTYPER15, P, 1, 31)
1515    DEP_FIELD(PMEVTYPER15, U, 1, 30)
1516    DEP_FIELD(PMEVTYPER15, NSP, 1, 29)
1517    DEP_FIELD(PMEVTYPER15, NSU, 1, 28)
1518    DEP_FIELD(PMEVTYPER15, EVENT, 5, 0)
1519DEP_REG32(PMEVTYPER16, 0x3440)
1520    DEP_FIELD(PMEVTYPER16, P, 1, 31)
1521    DEP_FIELD(PMEVTYPER16, U, 1, 30)
1522    DEP_FIELD(PMEVTYPER16, NSP, 1, 29)
1523    DEP_FIELD(PMEVTYPER16, NSU, 1, 28)
1524    DEP_FIELD(PMEVTYPER16, EVENT, 5, 0)
1525DEP_REG32(PMEVTYPER17, 0x3444)
1526    DEP_FIELD(PMEVTYPER17, P, 1, 31)
1527    DEP_FIELD(PMEVTYPER17, U, 1, 30)
1528    DEP_FIELD(PMEVTYPER17, NSP, 1, 29)
1529    DEP_FIELD(PMEVTYPER17, NSU, 1, 28)
1530    DEP_FIELD(PMEVTYPER17, EVENT, 5, 0)
1531DEP_REG32(PMEVTYPER18, 0x3448)
1532    DEP_FIELD(PMEVTYPER18, P, 1, 31)
1533    DEP_FIELD(PMEVTYPER18, U, 1, 30)
1534    DEP_FIELD(PMEVTYPER18, NSP, 1, 29)
1535    DEP_FIELD(PMEVTYPER18, NSU, 1, 28)
1536    DEP_FIELD(PMEVTYPER18, EVENT, 5, 0)
1537DEP_REG32(PMEVTYPER19, 0x344c)
1538    DEP_FIELD(PMEVTYPER19, P, 1, 31)
1539    DEP_FIELD(PMEVTYPER19, U, 1, 30)
1540    DEP_FIELD(PMEVTYPER19, NSP, 1, 29)
1541    DEP_FIELD(PMEVTYPER19, NSU, 1, 28)
1542    DEP_FIELD(PMEVTYPER19, EVENT, 5, 0)
1543DEP_REG32(PMEVTYPER20, 0x3450)
1544    DEP_FIELD(PMEVTYPER20, P, 1, 31)
1545    DEP_FIELD(PMEVTYPER20, U, 1, 30)
1546    DEP_FIELD(PMEVTYPER20, NSP, 1, 29)
1547    DEP_FIELD(PMEVTYPER20, NSU, 1, 28)
1548    DEP_FIELD(PMEVTYPER20, EVENT, 5, 0)
1549DEP_REG32(PMEVTYPER21, 0x3454)
1550    DEP_FIELD(PMEVTYPER21, P, 1, 31)
1551    DEP_FIELD(PMEVTYPER21, U, 1, 30)
1552    DEP_FIELD(PMEVTYPER21, NSP, 1, 29)
1553    DEP_FIELD(PMEVTYPER21, NSU, 1, 28)
1554    DEP_FIELD(PMEVTYPER21, EVENT, 5, 0)
1555DEP_REG32(PMEVTYPER22, 0x3458)
1556    DEP_FIELD(PMEVTYPER22, P, 1, 31)
1557    DEP_FIELD(PMEVTYPER22, U, 1, 30)
1558    DEP_FIELD(PMEVTYPER22, NSP, 1, 29)
1559    DEP_FIELD(PMEVTYPER22, NSU, 1, 28)
1560    DEP_FIELD(PMEVTYPER22, EVENT, 5, 0)
1561DEP_REG32(PMEVTYPER23, 0x345c)
1562    DEP_FIELD(PMEVTYPER23, P, 1, 31)
1563    DEP_FIELD(PMEVTYPER23, U, 1, 30)
1564    DEP_FIELD(PMEVTYPER23, NSP, 1, 29)
1565    DEP_FIELD(PMEVTYPER23, NSU, 1, 28)
1566    DEP_FIELD(PMEVTYPER23, EVENT, 5, 0)
1567DEP_REG32(PMCGCR0, 0x3800)
1568    DEP_FIELD(PMCGCR0, CGNC, 4, 24)
1569    DEP_FIELD(PMCGCR0, SIDG, 7, 16)
1570    DEP_FIELD(PMCGCR0, X, 1, 12)
1571    DEP_FIELD(PMCGCR0, E, 1, 11)
1572    DEP_FIELD(PMCGCR0, CBAEN, 1, 10)
1573    DEP_FIELD(PMCGCR0, TCEFCFG, 2, 8)
1574    DEP_FIELD(PMCGCR0, NDX, 4, 0)
1575DEP_REG32(PMCGCR1, 0x3804)
1576    DEP_FIELD(PMCGCR1, CGNC, 4, 24)
1577    DEP_FIELD(PMCGCR1, SIDG, 7, 16)
1578    DEP_FIELD(PMCGCR1, X, 1, 12)
1579    DEP_FIELD(PMCGCR1, E, 1, 11)
1580    DEP_FIELD(PMCGCR1, CBAEN, 1, 10)
1581    DEP_FIELD(PMCGCR1, TCEFCFG, 2, 8)
1582    DEP_FIELD(PMCGCR1, NDX, 4, 0)
1583DEP_REG32(PMCGCR2, 0x3808)
1584    DEP_FIELD(PMCGCR2, CGNC, 4, 24)
1585    DEP_FIELD(PMCGCR2, SIDG, 7, 16)
1586    DEP_FIELD(PMCGCR2, X, 1, 12)
1587    DEP_FIELD(PMCGCR2, E, 1, 11)
1588    DEP_FIELD(PMCGCR2, CBAEN, 1, 10)
1589    DEP_FIELD(PMCGCR2, TCEFCFG, 2, 8)
1590    DEP_FIELD(PMCGCR2, NDX, 4, 0)
1591DEP_REG32(PMCGCR3, 0x380c)
1592    DEP_FIELD(PMCGCR3, CGNC, 4, 24)
1593    DEP_FIELD(PMCGCR3, SIDG, 7, 16)
1594    DEP_FIELD(PMCGCR3, X, 1, 12)
1595    DEP_FIELD(PMCGCR3, E, 1, 11)
1596    DEP_FIELD(PMCGCR3, CBAEN, 1, 10)
1597    DEP_FIELD(PMCGCR3, TCEFCFG, 2, 8)
1598    DEP_FIELD(PMCGCR3, NDX, 4, 0)
1599DEP_REG32(PMCGCR4, 0x3810)
1600    DEP_FIELD(PMCGCR4, CGNC, 4, 24)
1601    DEP_FIELD(PMCGCR4, SIDG, 7, 16)
1602    DEP_FIELD(PMCGCR4, X, 1, 12)
1603    DEP_FIELD(PMCGCR4, E, 1, 11)
1604    DEP_FIELD(PMCGCR4, CBAEN, 1, 10)
1605    DEP_FIELD(PMCGCR4, TCEFCFG, 2, 8)
1606    DEP_FIELD(PMCGCR4, NDX, 4, 0)
1607DEP_REG32(PMCGCR5, 0x3814)
1608    DEP_FIELD(PMCGCR5, CGNC, 4, 24)
1609    DEP_FIELD(PMCGCR5, SIDG, 7, 16)
1610    DEP_FIELD(PMCGCR5, X, 1, 12)
1611    DEP_FIELD(PMCGCR5, E, 1, 11)
1612    DEP_FIELD(PMCGCR5, CBAEN, 1, 10)
1613    DEP_FIELD(PMCGCR5, TCEFCFG, 2, 8)
1614    DEP_FIELD(PMCGCR5, NDX, 4, 0)
1615DEP_REG32(PMCGSMR0, 0x3a00)
1616    DEP_FIELD(PMCGSMR0, MASK, 10, 16)
1617    DEP_FIELD(PMCGSMR0, ID, 10, 0)
1618DEP_REG32(PMCGSMR1, 0x3a04)
1619    DEP_FIELD(PMCGSMR1, MASK, 10, 16)
1620    DEP_FIELD(PMCGSMR1, ID, 10, 0)
1621DEP_REG32(PMCGSMR2, 0x3a08)
1622    DEP_FIELD(PMCGSMR2, MASK, 10, 16)
1623    DEP_FIELD(PMCGSMR2, ID, 10, 0)
1624DEP_REG32(PMCGSMR3, 0x3a0c)
1625    DEP_FIELD(PMCGSMR3, MASK, 10, 16)
1626    DEP_FIELD(PMCGSMR3, ID, 10, 0)
1627DEP_REG32(PMCGSMR4, 0x3a10)
1628    DEP_FIELD(PMCGSMR4, MASK, 10, 16)
1629    DEP_FIELD(PMCGSMR4, ID, 10, 0)
1630DEP_REG32(PMCGSMR5, 0x3a14)
1631    DEP_FIELD(PMCGSMR5, MASK, 10, 16)
1632    DEP_FIELD(PMCGSMR5, ID, 10, 0)
1633DEP_REG32(PMCNTENSET, 0x3c00)
1634    DEP_FIELD(PMCNTENSET, P23, 1, 23)
1635    DEP_FIELD(PMCNTENSET, P22, 1, 22)
1636    DEP_FIELD(PMCNTENSET, P21, 1, 21)
1637    DEP_FIELD(PMCNTENSET, P20, 1, 20)
1638    DEP_FIELD(PMCNTENSET, P19, 1, 19)
1639    DEP_FIELD(PMCNTENSET, P18, 1, 18)
1640    DEP_FIELD(PMCNTENSET, P17, 1, 17)
1641    DEP_FIELD(PMCNTENSET, P16, 1, 16)
1642    DEP_FIELD(PMCNTENSET, P15, 1, 15)
1643    DEP_FIELD(PMCNTENSET, P14, 1, 14)
1644    DEP_FIELD(PMCNTENSET, P13, 1, 13)
1645    DEP_FIELD(PMCNTENSET, P12, 1, 12)
1646    DEP_FIELD(PMCNTENSET, P11, 1, 11)
1647    DEP_FIELD(PMCNTENSET, P10, 1, 10)
1648    DEP_FIELD(PMCNTENSET, P9, 1, 9)
1649    DEP_FIELD(PMCNTENSET, P8, 1, 8)
1650    DEP_FIELD(PMCNTENSET, P7, 1, 7)
1651    DEP_FIELD(PMCNTENSET, P6, 1, 6)
1652    DEP_FIELD(PMCNTENSET, P5, 1, 5)
1653    DEP_FIELD(PMCNTENSET, P4, 1, 4)
1654    DEP_FIELD(PMCNTENSET, P3, 1, 3)
1655    DEP_FIELD(PMCNTENSET, P2, 1, 2)
1656    DEP_FIELD(PMCNTENSET, P1, 1, 1)
1657    DEP_FIELD(PMCNTENSET, P0, 1, 0)
1658DEP_REG32(PMCNTENCLR, 0x3c20)
1659    DEP_FIELD(PMCNTENCLR, P23, 1, 23)
1660    DEP_FIELD(PMCNTENCLR, P22, 1, 22)
1661    DEP_FIELD(PMCNTENCLR, P21, 1, 21)
1662    DEP_FIELD(PMCNTENCLR, P20, 1, 20)
1663    DEP_FIELD(PMCNTENCLR, P19, 1, 19)
1664    DEP_FIELD(PMCNTENCLR, P18, 1, 18)
1665    DEP_FIELD(PMCNTENCLR, P17, 1, 17)
1666    DEP_FIELD(PMCNTENCLR, P16, 1, 16)
1667    DEP_FIELD(PMCNTENCLR, P15, 1, 15)
1668    DEP_FIELD(PMCNTENCLR, P14, 1, 14)
1669    DEP_FIELD(PMCNTENCLR, P13, 1, 13)
1670    DEP_FIELD(PMCNTENCLR, P12, 1, 12)
1671    DEP_FIELD(PMCNTENCLR, P11, 1, 11)
1672    DEP_FIELD(PMCNTENCLR, P10, 1, 10)
1673    DEP_FIELD(PMCNTENCLR, P9, 1, 9)
1674    DEP_FIELD(PMCNTENCLR, P8, 1, 8)
1675    DEP_FIELD(PMCNTENCLR, P7, 1, 7)
1676    DEP_FIELD(PMCNTENCLR, P6, 1, 6)
1677    DEP_FIELD(PMCNTENCLR, P5, 1, 5)
1678    DEP_FIELD(PMCNTENCLR, P4, 1, 4)
1679    DEP_FIELD(PMCNTENCLR, P3, 1, 3)
1680    DEP_FIELD(PMCNTENCLR, P2, 1, 2)
1681    DEP_FIELD(PMCNTENCLR, P1, 1, 1)
1682    DEP_FIELD(PMCNTENCLR, P0, 1, 0)
1683DEP_REG32(PMINTENSET, 0x3c40)
1684    DEP_FIELD(PMINTENSET, P23, 1, 23)
1685    DEP_FIELD(PMINTENSET, P22, 1, 22)
1686    DEP_FIELD(PMINTENSET, P21, 1, 21)
1687    DEP_FIELD(PMINTENSET, P20, 1, 20)
1688    DEP_FIELD(PMINTENSET, P19, 1, 19)
1689    DEP_FIELD(PMINTENSET, P18, 1, 18)
1690    DEP_FIELD(PMINTENSET, P17, 1, 17)
1691    DEP_FIELD(PMINTENSET, P16, 1, 16)
1692    DEP_FIELD(PMINTENSET, P15, 1, 15)
1693    DEP_FIELD(PMINTENSET, P14, 1, 14)
1694    DEP_FIELD(PMINTENSET, P13, 1, 13)
1695    DEP_FIELD(PMINTENSET, P12, 1, 12)
1696    DEP_FIELD(PMINTENSET, P11, 1, 11)
1697    DEP_FIELD(PMINTENSET, P10, 1, 10)
1698    DEP_FIELD(PMINTENSET, P9, 1, 9)
1699    DEP_FIELD(PMINTENSET, P8, 1, 8)
1700    DEP_FIELD(PMINTENSET, P7, 1, 7)
1701    DEP_FIELD(PMINTENSET, P6, 1, 6)
1702    DEP_FIELD(PMINTENSET, P5, 1, 5)
1703    DEP_FIELD(PMINTENSET, P4, 1, 4)
1704    DEP_FIELD(PMINTENSET, P3, 1, 3)
1705    DEP_FIELD(PMINTENSET, P2, 1, 2)
1706    DEP_FIELD(PMINTENSET, P1, 1, 1)
1707    DEP_FIELD(PMINTENSET, P0, 1, 0)
1708DEP_REG32(PMINTENCLR, 0x3c60)
1709    DEP_FIELD(PMINTENCLR, P23, 1, 23)
1710    DEP_FIELD(PMINTENCLR, P22, 1, 22)
1711    DEP_FIELD(PMINTENCLR, P21, 1, 21)
1712    DEP_FIELD(PMINTENCLR, P20, 1, 20)
1713    DEP_FIELD(PMINTENCLR, P19, 1, 19)
1714    DEP_FIELD(PMINTENCLR, P18, 1, 18)
1715    DEP_FIELD(PMINTENCLR, P17, 1, 17)
1716    DEP_FIELD(PMINTENCLR, P16, 1, 16)
1717    DEP_FIELD(PMINTENCLR, P15, 1, 15)
1718    DEP_FIELD(PMINTENCLR, P14, 1, 14)
1719    DEP_FIELD(PMINTENCLR, P13, 1, 13)
1720    DEP_FIELD(PMINTENCLR, P12, 1, 12)
1721    DEP_FIELD(PMINTENCLR, P11, 1, 11)
1722    DEP_FIELD(PMINTENCLR, P10, 1, 10)
1723    DEP_FIELD(PMINTENCLR, P9, 1, 9)
1724    DEP_FIELD(PMINTENCLR, P8, 1, 8)
1725    DEP_FIELD(PMINTENCLR, P7, 1, 7)
1726    DEP_FIELD(PMINTENCLR, P6, 1, 6)
1727    DEP_FIELD(PMINTENCLR, P5, 1, 5)
1728    DEP_FIELD(PMINTENCLR, P4, 1, 4)
1729    DEP_FIELD(PMINTENCLR, P3, 1, 3)
1730    DEP_FIELD(PMINTENCLR, P2, 1, 2)
1731    DEP_FIELD(PMINTENCLR, P1, 1, 1)
1732    DEP_FIELD(PMINTENCLR, P0, 1, 0)
1733DEP_REG32(PMOVSCLR, 0x3c80)
1734    DEP_FIELD(PMOVSCLR, P23, 1, 23)
1735    DEP_FIELD(PMOVSCLR, P22, 1, 22)
1736    DEP_FIELD(PMOVSCLR, P21, 1, 21)
1737    DEP_FIELD(PMOVSCLR, P20, 1, 20)
1738    DEP_FIELD(PMOVSCLR, P19, 1, 19)
1739    DEP_FIELD(PMOVSCLR, P18, 1, 18)
1740    DEP_FIELD(PMOVSCLR, P17, 1, 17)
1741    DEP_FIELD(PMOVSCLR, P16, 1, 16)
1742    DEP_FIELD(PMOVSCLR, P15, 1, 15)
1743    DEP_FIELD(PMOVSCLR, P14, 1, 14)
1744    DEP_FIELD(PMOVSCLR, P13, 1, 13)
1745    DEP_FIELD(PMOVSCLR, P12, 1, 12)
1746    DEP_FIELD(PMOVSCLR, P11, 1, 11)
1747    DEP_FIELD(PMOVSCLR, P10, 1, 10)
1748    DEP_FIELD(PMOVSCLR, P9, 1, 9)
1749    DEP_FIELD(PMOVSCLR, P8, 1, 8)
1750    DEP_FIELD(PMOVSCLR, P7, 1, 7)
1751    DEP_FIELD(PMOVSCLR, P6, 1, 6)
1752    DEP_FIELD(PMOVSCLR, P5, 1, 5)
1753    DEP_FIELD(PMOVSCLR, P4, 1, 4)
1754    DEP_FIELD(PMOVSCLR, P3, 1, 3)
1755    DEP_FIELD(PMOVSCLR, P2, 1, 2)
1756    DEP_FIELD(PMOVSCLR, P1, 1, 1)
1757    DEP_FIELD(PMOVSCLR, P0, 1, 0)
1758DEP_REG32(PMOVSSET, 0x3cc0)
1759    DEP_FIELD(PMOVSSET, P23, 1, 23)
1760    DEP_FIELD(PMOVSSET, P22, 1, 22)
1761    DEP_FIELD(PMOVSSET, P21, 1, 21)
1762    DEP_FIELD(PMOVSSET, P20, 1, 20)
1763    DEP_FIELD(PMOVSSET, P19, 1, 19)
1764    DEP_FIELD(PMOVSSET, P18, 1, 18)
1765    DEP_FIELD(PMOVSSET, P17, 1, 17)
1766    DEP_FIELD(PMOVSSET, P16, 1, 16)
1767    DEP_FIELD(PMOVSSET, P15, 1, 15)
1768    DEP_FIELD(PMOVSSET, P14, 1, 14)
1769    DEP_FIELD(PMOVSSET, P13, 1, 13)
1770    DEP_FIELD(PMOVSSET, P12, 1, 12)
1771    DEP_FIELD(PMOVSSET, P11, 1, 11)
1772    DEP_FIELD(PMOVSSET, P10, 1, 10)
1773    DEP_FIELD(PMOVSSET, P9, 1, 9)
1774    DEP_FIELD(PMOVSSET, P8, 1, 8)
1775    DEP_FIELD(PMOVSSET, P7, 1, 7)
1776    DEP_FIELD(PMOVSSET, P6, 1, 6)
1777    DEP_FIELD(PMOVSSET, P5, 1, 5)
1778    DEP_FIELD(PMOVSSET, P4, 1, 4)
1779    DEP_FIELD(PMOVSSET, P3, 1, 3)
1780    DEP_FIELD(PMOVSSET, P2, 1, 2)
1781    DEP_FIELD(PMOVSSET, P1, 1, 1)
1782    DEP_FIELD(PMOVSSET, P0, 1, 0)
1783DEP_REG32(PMCFGR, 0x3e00)
1784    DEP_FIELD(PMCFGR, NCG, 8, 24)
1785    DEP_FIELD(PMCFGR, UEN, 1, 19)
1786    DEP_FIELD(PMCFGR, EX, 1, 16)
1787    DEP_FIELD(PMCFGR, CCD, 1, 15)
1788    DEP_FIELD(PMCFGR, CC, 1, 14)
1789    DEP_FIELD(PMCFGR, SIZE, 6, 8)
1790    DEP_FIELD(PMCFGR, N, 8, 0)
1791DEP_REG32(PMCR, 0x3e04)
1792    DEP_FIELD(PMCR, IMP, 8, 24)
1793    DEP_FIELD(PMCR, X, 1, 4)
1794    DEP_FIELD(PMCR, P, 1, 1)
1795    DEP_FIELD(PMCR, E, 1, 0)
1796DEP_REG32(PMCEID0, 0x3e20)
1797    DEP_FIELD(PMCEID0, EVENT0X12, 1, 17)
1798    DEP_FIELD(PMCEID0, EVENT0X11, 1, 16)
1799    DEP_FIELD(PMCEID0, EVENT0X10, 1, 15)
1800    DEP_FIELD(PMCEID0, EVENT0X0A, 1, 9)
1801    DEP_FIELD(PMCEID0, EVENT0X09, 1, 8)
1802    DEP_FIELD(PMCEID0, EVENT0X08, 1, 7)
1803    DEP_FIELD(PMCEID0, EVENT0X01, 1, 1)
1804    DEP_FIELD(PMCEID0, EVENT0X00, 1, 0)
1805DEP_REG32(PMAUTHSTATUS, 0x3fb8)
1806    DEP_FIELD(PMAUTHSTATUS, SNI, 1, 7)
1807    DEP_FIELD(PMAUTHSTATUS, SNE, 1, 6)
1808    DEP_FIELD(PMAUTHSTATUS, SI, 1, 5)
1809    DEP_FIELD(PMAUTHSTATUS, SE, 1, 4)
1810    DEP_FIELD(PMAUTHSTATUS, NSNI, 1, 3)
1811    DEP_FIELD(PMAUTHSTATUS, NSNE, 1, 2)
1812    DEP_FIELD(PMAUTHSTATUS, NSI, 1, 1)
1813    DEP_FIELD(PMAUTHSTATUS, NSE, 1, 0)
1814DEP_REG32(PMDEVTYPE, 0x3fcc)
1815    DEP_FIELD(PMDEVTYPE, T, 4, 4)
1816    DEP_FIELD(PMDEVTYPE, C, 4, 0)
1817DEP_REG32(SMMU_CB0_SCTLR, 0x10000)
1818    DEP_FIELD(SMMU_CB0_SCTLR, NSCFG, 2, 28)
1819    DEP_FIELD(SMMU_CB0_SCTLR, WACFG, 2, 26)
1820    DEP_FIELD(SMMU_CB0_SCTLR, RACFG, 2, 24)
1821    DEP_FIELD(SMMU_CB0_SCTLR, SHCFG, 2, 22)
1822    DEP_FIELD(SMMU_CB0_SCTLR, FB, 1, 21)
1823    DEP_FIELD(SMMU_CB0_SCTLR, MTCFG, 1, 20)
1824    DEP_FIELD(SMMU_CB0_SCTLR, MEMATTR, 4, 16)
1825    DEP_FIELD(SMMU_CB0_SCTLR, TRANSIENTCFG, 2, 14)
1826    DEP_FIELD(SMMU_CB0_SCTLR, PTW, 1, 13)
1827    DEP_FIELD(SMMU_CB0_SCTLR, ASIDPNE, 1, 12)
1828    DEP_FIELD(SMMU_CB0_SCTLR, UWXN, 1, 10)
1829    DEP_FIELD(SMMU_CB0_SCTLR, WXN, 1, 9)
1830    DEP_FIELD(SMMU_CB0_SCTLR, HUPCF, 1, 8)
1831    DEP_FIELD(SMMU_CB0_SCTLR, CFCFG, 1, 7)
1832    DEP_FIELD(SMMU_CB0_SCTLR, CFIE, 1, 6)
1833    DEP_FIELD(SMMU_CB0_SCTLR, CFRE, 1, 5)
1834    DEP_FIELD(SMMU_CB0_SCTLR, E, 1, 4)
1835    DEP_FIELD(SMMU_CB0_SCTLR, AFFD, 1, 3)
1836    DEP_FIELD(SMMU_CB0_SCTLR, AFE, 1, 2)
1837    DEP_FIELD(SMMU_CB0_SCTLR, TRE, 1, 1)
1838    DEP_FIELD(SMMU_CB0_SCTLR, M, 1, 0)
1839DEP_REG32(SMMU_CB0_ACTLR, 0x10004)
1840    DEP_FIELD(SMMU_CB0_ACTLR, CPRE, 1, 1)
1841    DEP_FIELD(SMMU_CB0_ACTLR, CMTLB, 1, 0)
1842DEP_REG32(SMMU_CB0_RESUME, 0x10008)
1843    DEP_FIELD(SMMU_CB0_RESUME, TNR, 1, 0)
1844DEP_REG32(SMMU_CB0_TCR2, 0x10010)
1845    DEP_FIELD(SMMU_CB0_TCR2, NSCFG1, 1, 30)
1846    DEP_FIELD(SMMU_CB0_TCR2, SEP, 3, 15)
1847    DEP_FIELD(SMMU_CB0_TCR2, NSCFG0, 1, 14)
1848    DEP_FIELD(SMMU_CB0_TCR2, TBI1, 1, 6)
1849    DEP_FIELD(SMMU_CB0_TCR2, TBI0, 1, 5)
1850    DEP_FIELD(SMMU_CB0_TCR2, AS, 1, 4)
1851    DEP_FIELD(SMMU_CB0_TCR2, PASIZE, 3, 0)
1852DEP_REG32(SMMU_CB0_TTBR0_LOW, 0x10020)
1853    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_31_7, 25, 7)
1854    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
1855    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
1856    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
1857    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_2, 1, 2)
1858    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_1_S, 1, 1)
1859    DEP_FIELD(SMMU_CB0_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
1860DEP_REG32(SMMU_CB0_TTBR0_HIGH, 0x10024)
1861    DEP_FIELD(SMMU_CB0_TTBR0_HIGH, ASID, 16, 16)
1862    DEP_FIELD(SMMU_CB0_TTBR0_HIGH, ADDRESS, 16, 0)
1863DEP_REG32(SMMU_CB0_TTBR1_LOW, 0x10028)
1864    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_31_7, 25, 7)
1865    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
1866    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
1867    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
1868    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_2, 1, 2)
1869    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_1_S, 1, 1)
1870    DEP_FIELD(SMMU_CB0_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
1871DEP_REG32(SMMU_CB0_TTBR1_HIGH, 0x1002c)
1872    DEP_FIELD(SMMU_CB0_TTBR1_HIGH, ASID, 16, 16)
1873    DEP_FIELD(SMMU_CB0_TTBR1_HIGH, ADDRESS, 16, 0)
1874DEP_REG32(SMMU_CB0_TCR_LPAE, 0x10030)
1875    DEP_FIELD(SMMU_CB0_TCR_LPAE, EAE, 1, 31)
1876    DEP_FIELD(SMMU_CB0_TCR_LPAE, NSCFG1_TG1, 1, 30)
1877    DEP_FIELD(SMMU_CB0_TCR_LPAE, SH1, 2, 28)
1878    DEP_FIELD(SMMU_CB0_TCR_LPAE, ORGN1, 2, 26)
1879    DEP_FIELD(SMMU_CB0_TCR_LPAE, IRGN1, 2, 24)
1880    DEP_FIELD(SMMU_CB0_TCR_LPAE, EPD1, 1, 23)
1881    DEP_FIELD(SMMU_CB0_TCR_LPAE, A1, 1, 22)
1882    DEP_FIELD(SMMU_CB0_TCR_LPAE, T1SZ_5_3, 3, 19)
1883    DEP_FIELD(SMMU_CB0_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
1884    DEP_FIELD(SMMU_CB0_TCR_LPAE, NSCFG0_TG0, 1, 14)
1885    DEP_FIELD(SMMU_CB0_TCR_LPAE, SH0, 2, 12)
1886    DEP_FIELD(SMMU_CB0_TCR_LPAE, ORGN0, 2, 10)
1887    DEP_FIELD(SMMU_CB0_TCR_LPAE, IRGN0, 2, 8)
1888    DEP_FIELD(SMMU_CB0_TCR_LPAE, SL0_1_EPD0, 1, 7)
1889    DEP_FIELD(SMMU_CB0_TCR_LPAE, SL0_0, 1, 6)
1890    DEP_FIELD(SMMU_CB0_TCR_LPAE, PD1_T0SZ_5, 1, 5)
1891    DEP_FIELD(SMMU_CB0_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
1892    DEP_FIELD(SMMU_CB0_TCR_LPAE, T0SZ_3_0, 4, 0)
1893DEP_REG32(SMMU_CB0_CONTEXTIDR, 0x10034)
1894    DEP_FIELD(SMMU_CB0_CONTEXTIDR, PROCID, 24, 8)
1895    DEP_FIELD(SMMU_CB0_CONTEXTIDR, ASID, 8, 0)
1896DEP_REG32(SMMU_CB0_PRRR_MAIR0, 0x10038)
1897    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS7, 1, 31)
1898    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS6, 1, 30)
1899    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS5, 1, 29)
1900    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS4, 1, 28)
1901    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS3, 1, 27)
1902    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS2, 1, 26)
1903    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS1, 1, 25)
1904    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NOS0, 1, 24)
1905    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NS1, 1, 19)
1906    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, NS0, 1, 18)
1907    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, DS1, 1, 17)
1908    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, DS0, 1, 16)
1909    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR7, 2, 14)
1910    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR6, 2, 12)
1911    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR5, 2, 10)
1912    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR4, 2, 8)
1913    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR3, 2, 6)
1914    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR2, 2, 4)
1915    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR1, 2, 2)
1916    DEP_FIELD(SMMU_CB0_PRRR_MAIR0, TR0, 2, 0)
1917DEP_REG32(SMMU_CB0_NMRR_MAIR1, 0x1003c)
1918    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR7, 2, 30)
1919    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR6, 2, 28)
1920    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR5, 2, 26)
1921    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR4, 2, 24)
1922    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR3, 2, 22)
1923    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR2, 2, 20)
1924    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR1, 2, 18)
1925    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, OR0, 2, 16)
1926    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR7, 2, 14)
1927    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR6, 2, 12)
1928    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR5, 2, 10)
1929    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR4, 2, 8)
1930    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR3, 2, 6)
1931    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR2, 2, 4)
1932    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR1, 2, 2)
1933    DEP_FIELD(SMMU_CB0_NMRR_MAIR1, IR0, 2, 0)
1934DEP_REG32(SMMU_CB0_FSR, 0x10058)
1935    DEP_FIELD(SMMU_CB0_FSR, MULTI, 1, 31)
1936    DEP_FIELD(SMMU_CB0_FSR, SS, 1, 30)
1937    DEP_FIELD(SMMU_CB0_FSR, FORMAT, 2, 9)
1938    DEP_FIELD(SMMU_CB0_FSR, UUT, 1, 8)
1939    DEP_FIELD(SMMU_CB0_FSR, ASF, 1, 7)
1940    DEP_FIELD(SMMU_CB0_FSR, TLBLKF, 1, 6)
1941    DEP_FIELD(SMMU_CB0_FSR, TLBMCF, 1, 5)
1942    DEP_FIELD(SMMU_CB0_FSR, EF, 1, 4)
1943    DEP_FIELD(SMMU_CB0_FSR, PF, 1, 3)
1944    DEP_FIELD(SMMU_CB0_FSR, AFF, 1, 2)
1945    DEP_FIELD(SMMU_CB0_FSR, TF, 1, 1)
1946DEP_REG32(SMMU_CB0_FSRRESTORE, 0x1005c)
1947DEP_REG32(SMMU_CB0_FAR_LOW, 0x10060)
1948DEP_REG32(SMMU_CB0_FAR_HIGH, 0x10064)
1949    DEP_FIELD(SMMU_CB0_FAR_HIGH, BITS, 17, 0)
1950DEP_REG32(SMMU_CB0_FSYNR0, 0x10068)
1951    DEP_FIELD(SMMU_CB0_FSYNR0, S1CBNDX, 4, 16)
1952    DEP_FIELD(SMMU_CB0_FSYNR0, AFR, 1, 11)
1953    DEP_FIELD(SMMU_CB0_FSYNR0, PTWF, 1, 10)
1954    DEP_FIELD(SMMU_CB0_FSYNR0, ATOF, 1, 9)
1955    DEP_FIELD(SMMU_CB0_FSYNR0, NSATTR, 1, 8)
1956    DEP_FIELD(SMMU_CB0_FSYNR0, IND, 1, 6)
1957    DEP_FIELD(SMMU_CB0_FSYNR0, PNU, 1, 5)
1958    DEP_FIELD(SMMU_CB0_FSYNR0, WNR, 1, 4)
1959    DEP_FIELD(SMMU_CB0_FSYNR0, PLVL, 2, 0)
1960DEP_REG32(SMMU_CB0_IPAFAR_LOW, 0x10070)
1961    DEP_FIELD(SMMU_CB0_IPAFAR_LOW, IPAFAR_L, 20, 12)
1962    DEP_FIELD(SMMU_CB0_IPAFAR_LOW, FAR_RO, 12, 0)
1963DEP_REG32(SMMU_CB0_IPAFAR_HIGH, 0x10074)
1964    DEP_FIELD(SMMU_CB0_IPAFAR_HIGH, BITS, 16, 0)
1965DEP_REG32(SMMU_CB0_TLBIVA_LOW, 0x10600)
1966DEP_REG32(SMMU_CB0_TLBIVA_HIGH, 0x10604)
1967    DEP_FIELD(SMMU_CB0_TLBIVA_HIGH, ASID, 16, 16)
1968    DEP_FIELD(SMMU_CB0_TLBIVA_HIGH, ADDRESS, 5, 0)
1969DEP_REG32(SMMU_CB0_TLBIVAA_LOW, 0x10608)
1970DEP_REG32(SMMU_CB0_TLBIVAA_HIGH, 0x1060c)
1971    DEP_FIELD(SMMU_CB0_TLBIVAA_HIGH, ASID, 16, 16)
1972    DEP_FIELD(SMMU_CB0_TLBIVAA_HIGH, ADDRESS, 5, 0)
1973DEP_REG32(SMMU_CB0_TLBIASID, 0x10610)
1974    DEP_FIELD(SMMU_CB0_TLBIASID, ASID, 16, 0)
1975DEP_REG32(SMMU_CB0_TLBIALL, 0x10618)
1976DEP_REG32(SMMU_CB0_TLBIVAL_LOW, 0x10620)
1977DEP_REG32(SMMU_CB0_TLBIVAL_HIGH, 0x10624)
1978    DEP_FIELD(SMMU_CB0_TLBIVAL_HIGH, ASID, 16, 16)
1979    DEP_FIELD(SMMU_CB0_TLBIVAL_HIGH, ADDRESS, 5, 0)
1980DEP_REG32(SMMU_CB0_TLBIVAAL_LOW, 0x10628)
1981DEP_REG32(SMMU_CB0_TLBIVAAL_HIGH, 0x1062c)
1982    DEP_FIELD(SMMU_CB0_TLBIVAAL_HIGH, ASID, 16, 16)
1983    DEP_FIELD(SMMU_CB0_TLBIVAAL_HIGH, ADDRESS, 5, 0)
1984DEP_REG32(SMMU_CB0_TLBIIPAS2_LOW, 0x10630)
1985DEP_REG32(SMMU_CB0_TLBIIPAS2_HIGH, 0x10634)
1986    DEP_FIELD(SMMU_CB0_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
1987DEP_REG32(SMMU_CB0_TLBIIPAS2L_LOW, 0x10638)
1988DEP_REG32(SMMU_CB0_TLBIIPAS2L_HIGH, 0x1063c)
1989    DEP_FIELD(SMMU_CB0_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
1990DEP_REG32(SMMU_CB0_TLBSYNC, 0x107f0)
1991DEP_REG32(SMMU_CB0_TLBSTATUS, 0x107f4)
1992    DEP_FIELD(SMMU_CB0_TLBSTATUS, SACTIVE, 1, 0)
1993DEP_REG32(SMMU_CB0_PMEVCNTR0, 0x10e00)
1994DEP_REG32(SMMU_CB0_PMEVCNTR1, 0x10e04)
1995DEP_REG32(SMMU_CB0_PMEVCNTR2, 0x10e08)
1996DEP_REG32(SMMU_CB0_PMEVCNTR3, 0x10e0c)
1997DEP_REG32(SMMU_CB0_PMEVTYPER0, 0x10e80)
1998    DEP_FIELD(SMMU_CB0_PMEVTYPER0, P, 1, 31)
1999    DEP_FIELD(SMMU_CB0_PMEVTYPER0, U, 1, 30)
2000    DEP_FIELD(SMMU_CB0_PMEVTYPER0, NSP, 1, 29)

2001    DEP_FIELD(SMMU_CB0_PMEVTYPER0, NSU, 1, 28)
2002    DEP_FIELD(SMMU_CB0_PMEVTYPER0, EVENT, 5, 0)
2003DEP_REG32(SMMU_CB0_PMEVTYPER1, 0x10e84)
2004    DEP_FIELD(SMMU_CB0_PMEVTYPER1, P, 1, 31)
2005    DEP_FIELD(SMMU_CB0_PMEVTYPER1, U, 1, 30)
2006    DEP_FIELD(SMMU_CB0_PMEVTYPER1, NSP, 1, 29)
2007    DEP_FIELD(SMMU_CB0_PMEVTYPER1, NSU, 1, 28)
2008    DEP_FIELD(SMMU_CB0_PMEVTYPER1, EVENT, 5, 0)
2009DEP_REG32(SMMU_CB0_PMEVTYPER2, 0x10e88)
2010    DEP_FIELD(SMMU_CB0_PMEVTYPER2, P, 1, 31)
2011    DEP_FIELD(SMMU_CB0_PMEVTYPER2, U, 1, 30)
2012    DEP_FIELD(SMMU_CB0_PMEVTYPER2, NSP, 1, 29)
2013    DEP_FIELD(SMMU_CB0_PMEVTYPER2, NSU, 1, 28)
2014    DEP_FIELD(SMMU_CB0_PMEVTYPER2, EVENT, 5, 0)
2015DEP_REG32(SMMU_CB0_PMEVTYPER3, 0x10e8c)
2016    DEP_FIELD(SMMU_CB0_PMEVTYPER3, P, 1, 31)
2017    DEP_FIELD(SMMU_CB0_PMEVTYPER3, U, 1, 30)
2018    DEP_FIELD(SMMU_CB0_PMEVTYPER3, NSP, 1, 29)
2019    DEP_FIELD(SMMU_CB0_PMEVTYPER3, NSU, 1, 28)
2020    DEP_FIELD(SMMU_CB0_PMEVTYPER3, EVENT, 5, 0)
2021DEP_REG32(SMMU_CB0_PMCFGR, 0x10f00)
2022    DEP_FIELD(SMMU_CB0_PMCFGR, NCG, 8, 24)
2023    DEP_FIELD(SMMU_CB0_PMCFGR, UEN, 1, 19)
2024    DEP_FIELD(SMMU_CB0_PMCFGR, EX, 1, 16)
2025    DEP_FIELD(SMMU_CB0_PMCFGR, CCD, 1, 15)
2026    DEP_FIELD(SMMU_CB0_PMCFGR, CC, 1, 14)
2027    DEP_FIELD(SMMU_CB0_PMCFGR, SIZE, 6, 8)
2028    DEP_FIELD(SMMU_CB0_PMCFGR, N, 8, 0)
2029DEP_REG32(SMMU_CB0_PMCR, 0x10f04)
2030    DEP_FIELD(SMMU_CB0_PMCR, IMP, 8, 24)
2031    DEP_FIELD(SMMU_CB0_PMCR, X, 1, 4)
2032    DEP_FIELD(SMMU_CB0_PMCR, P, 1, 1)
2033    DEP_FIELD(SMMU_CB0_PMCR, E, 1, 0)
2034DEP_REG32(SMMU_CB0_PMCEID, 0x10f20)
2035    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X12, 1, 17)
2036    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X11, 1, 16)
2037    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X10, 1, 15)
2038    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X0A, 1, 9)
2039    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X09, 1, 8)
2040    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X08, 1, 7)
2041    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X01, 1, 1)
2042    DEP_FIELD(SMMU_CB0_PMCEID, EVENT0X00, 1, 0)
2043DEP_REG32(SMMU_CB0_PMCNTENSE, 0x10f40)
2044    DEP_FIELD(SMMU_CB0_PMCNTENSE, P3, 1, 3)
2045    DEP_FIELD(SMMU_CB0_PMCNTENSE, P2, 1, 2)
2046    DEP_FIELD(SMMU_CB0_PMCNTENSE, P1, 1, 1)
2047    DEP_FIELD(SMMU_CB0_PMCNTENSE, P0, 1, 0)
2048DEP_REG32(SMMU_CB0_PMCNTENCLR, 0x10f44)
2049    DEP_FIELD(SMMU_CB0_PMCNTENCLR, P3, 1, 3)
2050    DEP_FIELD(SMMU_CB0_PMCNTENCLR, P2, 1, 2)
2051    DEP_FIELD(SMMU_CB0_PMCNTENCLR, P1, 1, 1)
2052    DEP_FIELD(SMMU_CB0_PMCNTENCLR, P0, 1, 0)
2053DEP_REG32(SMMU_CB0_PMCNTENSET, 0x10f48)
2054    DEP_FIELD(SMMU_CB0_PMCNTENSET, P3, 1, 3)
2055    DEP_FIELD(SMMU_CB0_PMCNTENSET, P2, 1, 2)
2056    DEP_FIELD(SMMU_CB0_PMCNTENSET, P1, 1, 1)
2057    DEP_FIELD(SMMU_CB0_PMCNTENSET, P0, 1, 0)
2058DEP_REG32(SMMU_CB0_PMINTENCLR, 0x10f4c)
2059    DEP_FIELD(SMMU_CB0_PMINTENCLR, P3, 1, 3)
2060    DEP_FIELD(SMMU_CB0_PMINTENCLR, P2, 1, 2)
2061    DEP_FIELD(SMMU_CB0_PMINTENCLR, P1, 1, 1)
2062    DEP_FIELD(SMMU_CB0_PMINTENCLR, P0, 1, 0)
2063DEP_REG32(SMMU_CB0_PMOVSCLR, 0x10f50)
2064    DEP_FIELD(SMMU_CB0_PMOVSCLR, P3, 1, 3)
2065    DEP_FIELD(SMMU_CB0_PMOVSCLR, P2, 1, 2)
2066    DEP_FIELD(SMMU_CB0_PMOVSCLR, P1, 1, 1)
2067    DEP_FIELD(SMMU_CB0_PMOVSCLR, P0, 1, 0)
2068DEP_REG32(SMMU_CB0_PMOVSSET, 0x10f58)
2069    DEP_FIELD(SMMU_CB0_PMOVSSET, P3, 1, 3)
2070    DEP_FIELD(SMMU_CB0_PMOVSSET, P2, 1, 2)
2071    DEP_FIELD(SMMU_CB0_PMOVSSET, P1, 1, 1)
2072    DEP_FIELD(SMMU_CB0_PMOVSSET, P0, 1, 0)
2073DEP_REG32(SMMU_CB0_PMAUTHSTATUS, 0x10fb8)
2074    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, SNI, 1, 7)
2075    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, SNE, 1, 6)
2076    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, SI, 1, 5)
2077    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, SE, 1, 4)
2078    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, NSNI, 1, 3)
2079    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, NSNE, 1, 2)
2080    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, NSI, 1, 1)
2081    DEP_FIELD(SMMU_CB0_PMAUTHSTATUS, NSE, 1, 0)
2082DEP_REG32(SMMU_CB1_SCTLR, 0x11000)
2083    DEP_FIELD(SMMU_CB1_SCTLR, NSCFG, 2, 28)
2084    DEP_FIELD(SMMU_CB1_SCTLR, WACFG, 2, 26)
2085    DEP_FIELD(SMMU_CB1_SCTLR, RACFG, 2, 24)
2086    DEP_FIELD(SMMU_CB1_SCTLR, SHCFG, 2, 22)
2087    DEP_FIELD(SMMU_CB1_SCTLR, FB, 1, 21)
2088    DEP_FIELD(SMMU_CB1_SCTLR, MTCFG, 1, 20)
2089    DEP_FIELD(SMMU_CB1_SCTLR, MEMATTR, 4, 16)
2090    DEP_FIELD(SMMU_CB1_SCTLR, TRANSIENTCFG, 2, 14)
2091    DEP_FIELD(SMMU_CB1_SCTLR, PTW, 1, 13)
2092    DEP_FIELD(SMMU_CB1_SCTLR, ASIDPNE, 1, 12)
2093    DEP_FIELD(SMMU_CB1_SCTLR, UWXN, 1, 10)
2094    DEP_FIELD(SMMU_CB1_SCTLR, WXN, 1, 9)
2095    DEP_FIELD(SMMU_CB1_SCTLR, HUPCF, 1, 8)
2096    DEP_FIELD(SMMU_CB1_SCTLR, CFCFG, 1, 7)
2097    DEP_FIELD(SMMU_CB1_SCTLR, CFIE, 1, 6)
2098    DEP_FIELD(SMMU_CB1_SCTLR, CFRE, 1, 5)
2099    DEP_FIELD(SMMU_CB1_SCTLR, E, 1, 4)
2100    DEP_FIELD(SMMU_CB1_SCTLR, AFFD, 1, 3)
2101    DEP_FIELD(SMMU_CB1_SCTLR, AFE, 1, 2)
2102    DEP_FIELD(SMMU_CB1_SCTLR, TRE, 1, 1)
2103    DEP_FIELD(SMMU_CB1_SCTLR, M, 1, 0)
2104DEP_REG32(SMMU_CB1_ACTLR, 0x11004)
2105    DEP_FIELD(SMMU_CB1_ACTLR, CPRE, 1, 1)
2106    DEP_FIELD(SMMU_CB1_ACTLR, CMTLB, 1, 0)
2107DEP_REG32(SMMU_CB1_RESUME, 0x11008)
2108    DEP_FIELD(SMMU_CB1_RESUME, TNR, 1, 0)
2109DEP_REG32(SMMU_CB1_TCR2, 0x11010)
2110    DEP_FIELD(SMMU_CB1_TCR2, NSCFG1, 1, 30)
2111    DEP_FIELD(SMMU_CB1_TCR2, SEP, 3, 15)
2112    DEP_FIELD(SMMU_CB1_TCR2, NSCFG0, 1, 14)
2113    DEP_FIELD(SMMU_CB1_TCR2, TBI1, 1, 6)
2114    DEP_FIELD(SMMU_CB1_TCR2, TBI0, 1, 5)
2115    DEP_FIELD(SMMU_CB1_TCR2, AS, 1, 4)
2116    DEP_FIELD(SMMU_CB1_TCR2, PASIZE, 3, 0)
2117DEP_REG32(SMMU_CB1_TTBR0_LOW, 0x11020)
2118    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_31_7, 25, 7)
2119    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
2120    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
2121    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
2122    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_2, 1, 2)
2123    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_1_S, 1, 1)
2124    DEP_FIELD(SMMU_CB1_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
2125DEP_REG32(SMMU_CB1_TTBR0_HIGH, 0x11024)
2126    DEP_FIELD(SMMU_CB1_TTBR0_HIGH, ASID, 16, 16)
2127    DEP_FIELD(SMMU_CB1_TTBR0_HIGH, ADDRESS, 16, 0)
2128DEP_REG32(SMMU_CB1_TTBR1_LOW, 0x11028)
2129    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_31_7, 25, 7)
2130    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
2131    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
2132    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
2133    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_2, 1, 2)
2134    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_1_S, 1, 1)
2135    DEP_FIELD(SMMU_CB1_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
2136DEP_REG32(SMMU_CB1_TTBR1_HIGH, 0x1102c)
2137    DEP_FIELD(SMMU_CB1_TTBR1_HIGH, ASID, 16, 16)
2138    DEP_FIELD(SMMU_CB1_TTBR1_HIGH, ADDRESS, 16, 0)
2139DEP_REG32(SMMU_CB1_TCR_LPAE, 0x11030)
2140    DEP_FIELD(SMMU_CB1_TCR_LPAE, EAE, 1, 31)
2141    DEP_FIELD(SMMU_CB1_TCR_LPAE, NSCFG1_TG1, 1, 30)
2142    DEP_FIELD(SMMU_CB1_TCR_LPAE, SH1, 2, 28)
2143    DEP_FIELD(SMMU_CB1_TCR_LPAE, ORGN1, 2, 26)
2144    DEP_FIELD(SMMU_CB1_TCR_LPAE, IRGN1, 2, 24)
2145    DEP_FIELD(SMMU_CB1_TCR_LPAE, EPD1, 1, 23)
2146    DEP_FIELD(SMMU_CB1_TCR_LPAE, A1, 1, 22)
2147    DEP_FIELD(SMMU_CB1_TCR_LPAE, T1SZ_5_3, 3, 19)
2148    DEP_FIELD(SMMU_CB1_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
2149    DEP_FIELD(SMMU_CB1_TCR_LPAE, NSCFG0_TG0, 1, 14)
2150    DEP_FIELD(SMMU_CB1_TCR_LPAE, SH0, 2, 12)
2151    DEP_FIELD(SMMU_CB1_TCR_LPAE, ORGN0, 2, 10)
2152    DEP_FIELD(SMMU_CB1_TCR_LPAE, IRGN0, 2, 8)
2153    DEP_FIELD(SMMU_CB1_TCR_LPAE, SL0_1_EPD0, 1, 7)
2154    DEP_FIELD(SMMU_CB1_TCR_LPAE, SL0_0, 1, 6)
2155    DEP_FIELD(SMMU_CB1_TCR_LPAE, PD1_T0SZ_5, 1, 5)
2156    DEP_FIELD(SMMU_CB1_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
2157    DEP_FIELD(SMMU_CB1_TCR_LPAE, T0SZ_3_0, 4, 0)
2158DEP_REG32(SMMU_CB1_CONTEXTIDR, 0x11034)
2159    DEP_FIELD(SMMU_CB1_CONTEXTIDR, PROCID, 24, 8)
2160    DEP_FIELD(SMMU_CB1_CONTEXTIDR, ASID, 8, 0)
2161DEP_REG32(SMMU_CB1_PRRR_MAIR0, 0x11038)
2162    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS7, 1, 31)
2163    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS6, 1, 30)
2164    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS5, 1, 29)
2165    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS4, 1, 28)
2166    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS3, 1, 27)
2167    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS2, 1, 26)
2168    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS1, 1, 25)
2169    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NOS0, 1, 24)
2170    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NS1, 1, 19)
2171    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, NS0, 1, 18)
2172    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, DS1, 1, 17)
2173    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, DS0, 1, 16)
2174    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR7, 2, 14)
2175    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR6, 2, 12)
2176    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR5, 2, 10)
2177    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR4, 2, 8)
2178    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR3, 2, 6)
2179    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR2, 2, 4)
2180    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR1, 2, 2)
2181    DEP_FIELD(SMMU_CB1_PRRR_MAIR0, TR0, 2, 0)
2182DEP_REG32(SMMU_CB1_NMRR_MAIR1, 0x1103c)
2183    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR7, 2, 30)
2184    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR6, 2, 28)
2185    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR5, 2, 26)
2186    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR4, 2, 24)
2187    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR3, 2, 22)
2188    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR2, 2, 20)
2189    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR1, 2, 18)
2190    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, OR0, 2, 16)
2191    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR7, 2, 14)
2192    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR6, 2, 12)
2193    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR5, 2, 10)
2194    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR4, 2, 8)
2195    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR3, 2, 6)
2196    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR2, 2, 4)
2197    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR1, 2, 2)
2198    DEP_FIELD(SMMU_CB1_NMRR_MAIR1, IR0, 2, 0)
2199DEP_REG32(SMMU_CB1_FSR, 0x11058)
2200    DEP_FIELD(SMMU_CB1_FSR, MULTI, 1, 31)
2201    DEP_FIELD(SMMU_CB1_FSR, SS, 1, 30)
2202    DEP_FIELD(SMMU_CB1_FSR, FORMAT, 2, 9)
2203    DEP_FIELD(SMMU_CB1_FSR, UUT, 1, 8)
2204    DEP_FIELD(SMMU_CB1_FSR, ASF, 1, 7)
2205    DEP_FIELD(SMMU_CB1_FSR, TLBLKF, 1, 6)
2206    DEP_FIELD(SMMU_CB1_FSR, TLBMCF, 1, 5)
2207    DEP_FIELD(SMMU_CB1_FSR, EF, 1, 4)
2208    DEP_FIELD(SMMU_CB1_FSR, PF, 1, 3)
2209    DEP_FIELD(SMMU_CB1_FSR, AFF, 1, 2)
2210    DEP_FIELD(SMMU_CB1_FSR, TF, 1, 1)
2211DEP_REG32(SMMU_CB1_FSRRESTORE, 0x1105c)
2212DEP_REG32(SMMU_CB1_FAR_LOW, 0x11060)
2213DEP_REG32(SMMU_CB1_FAR_HIGH, 0x11064)
2214    DEP_FIELD(SMMU_CB1_FAR_HIGH, BITS, 17, 0)
2215DEP_REG32(SMMU_CB1_FSYNR0, 0x11068)
2216    DEP_FIELD(SMMU_CB1_FSYNR0, S1CBNDX, 4, 16)
2217    DEP_FIELD(SMMU_CB1_FSYNR0, AFR, 1, 11)
2218    DEP_FIELD(SMMU_CB1_FSYNR0, PTWF, 1, 10)
2219    DEP_FIELD(SMMU_CB1_FSYNR0, ATOF, 1, 9)
2220    DEP_FIELD(SMMU_CB1_FSYNR0, NSATTR, 1, 8)
2221    DEP_FIELD(SMMU_CB1_FSYNR0, IND, 1, 6)
2222    DEP_FIELD(SMMU_CB1_FSYNR0, PNU, 1, 5)
2223    DEP_FIELD(SMMU_CB1_FSYNR0, WNR, 1, 4)
2224    DEP_FIELD(SMMU_CB1_FSYNR0, PLVL, 2, 0)
2225DEP_REG32(SMMU_CB1_IPAFAR_LOW, 0x11070)
2226    DEP_FIELD(SMMU_CB1_IPAFAR_LOW, IPAFAR_L, 20, 12)
2227    DEP_FIELD(SMMU_CB1_IPAFAR_LOW, FAR_RO, 12, 0)
2228DEP_REG32(SMMU_CB1_IPAFAR_HIGH, 0x11074)
2229    DEP_FIELD(SMMU_CB1_IPAFAR_HIGH, BITS, 16, 0)
2230DEP_REG32(SMMU_CB1_TLBIVA_LOW, 0x11600)
2231DEP_REG32(SMMU_CB1_TLBIVA_HIGH, 0x11604)
2232    DEP_FIELD(SMMU_CB1_TLBIVA_HIGH, ASID, 16, 16)
2233    DEP_FIELD(SMMU_CB1_TLBIVA_HIGH, ADDRESS, 5, 0)
2234DEP_REG32(SMMU_CB1_TLBIVAA_LOW, 0x11608)
2235DEP_REG32(SMMU_CB1_TLBIVAA_HIGH, 0x1160c)
2236    DEP_FIELD(SMMU_CB1_TLBIVAA_HIGH, ASID, 16, 16)
2237    DEP_FIELD(SMMU_CB1_TLBIVAA_HIGH, ADDRESS, 5, 0)
2238DEP_REG32(SMMU_CB1_TLBIASID, 0x11610)
2239    DEP_FIELD(SMMU_CB1_TLBIASID, ASID, 16, 0)
2240DEP_REG32(SMMU_CB1_TLBIALL, 0x11618)
2241DEP_REG32(SMMU_CB1_TLBIVAL_LOW, 0x11620)
2242DEP_REG32(SMMU_CB1_TLBIVAL_HIGH, 0x11624)
2243    DEP_FIELD(SMMU_CB1_TLBIVAL_HIGH, ASID, 16, 16)
2244    DEP_FIELD(SMMU_CB1_TLBIVAL_HIGH, ADDRESS, 5, 0)
2245DEP_REG32(SMMU_CB1_TLBIVAAL_LOW, 0x11628)
2246DEP_REG32(SMMU_CB1_TLBIVAAL_HIGH, 0x1162c)
2247    DEP_FIELD(SMMU_CB1_TLBIVAAL_HIGH, ASID, 16, 16)
2248    DEP_FIELD(SMMU_CB1_TLBIVAAL_HIGH, ADDRESS, 5, 0)
2249DEP_REG32(SMMU_CB1_TLBIIPAS2_LOW, 0x11630)
2250DEP_REG32(SMMU_CB1_TLBIIPAS2_HIGH, 0x11634)
2251    DEP_FIELD(SMMU_CB1_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
2252DEP_REG32(SMMU_CB1_TLBIIPAS2L_LOW, 0x11638)
2253DEP_REG32(SMMU_CB1_TLBIIPAS2L_HIGH, 0x1163c)
2254    DEP_FIELD(SMMU_CB1_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
2255DEP_REG32(SMMU_CB1_TLBSYNC, 0x117f0)
2256DEP_REG32(SMMU_CB1_TLBSTATUS, 0x117f4)
2257    DEP_FIELD(SMMU_CB1_TLBSTATUS, SACTIVE, 1, 0)
2258DEP_REG32(SMMU_CB1_PMEVCNTR0, 0x11e00)
2259DEP_REG32(SMMU_CB1_PMEVCNTR1, 0x11e04)
2260DEP_REG32(SMMU_CB1_PMEVCNTR2, 0x11e08)
2261DEP_REG32(SMMU_CB1_PMEVCNTR3, 0x11e0c)
2262DEP_REG32(SMMU_CB1_PMEVTYPER0, 0x11e80)
2263    DEP_FIELD(SMMU_CB1_PMEVTYPER0, P, 1, 31)
2264    DEP_FIELD(SMMU_CB1_PMEVTYPER0, U, 1, 30)
2265    DEP_FIELD(SMMU_CB1_PMEVTYPER0, NSP, 1, 29)
2266    DEP_FIELD(SMMU_CB1_PMEVTYPER0, NSU, 1, 28)
2267    DEP_FIELD(SMMU_CB1_PMEVTYPER0, EVENT, 5, 0)
2268DEP_REG32(SMMU_CB1_PMEVTYPER1, 0x11e84)
2269    DEP_FIELD(SMMU_CB1_PMEVTYPER1, P, 1, 31)
2270    DEP_FIELD(SMMU_CB1_PMEVTYPER1, U, 1, 30)
2271    DEP_FIELD(SMMU_CB1_PMEVTYPER1, NSP, 1, 29)
2272    DEP_FIELD(SMMU_CB1_PMEVTYPER1, NSU, 1, 28)
2273    DEP_FIELD(SMMU_CB1_PMEVTYPER1, EVENT, 5, 0)
2274DEP_REG32(SMMU_CB1_PMEVTYPER2, 0x11e88)
2275    DEP_FIELD(SMMU_CB1_PMEVTYPER2, P, 1, 31)
2276    DEP_FIELD(SMMU_CB1_PMEVTYPER2, U, 1, 30)
2277    DEP_FIELD(SMMU_CB1_PMEVTYPER2, NSP, 1, 29)
2278    DEP_FIELD(SMMU_CB1_PMEVTYPER2, NSU, 1, 28)
2279    DEP_FIELD(SMMU_CB1_PMEVTYPER2, EVENT, 5, 0)
2280DEP_REG32(SMMU_CB1_PMEVTYPER3, 0x11e8c)
2281    DEP_FIELD(SMMU_CB1_PMEVTYPER3, P, 1, 31)
2282    DEP_FIELD(SMMU_CB1_PMEVTYPER3, U, 1, 30)
2283    DEP_FIELD(SMMU_CB1_PMEVTYPER3, NSP, 1, 29)
2284    DEP_FIELD(SMMU_CB1_PMEVTYPER3, NSU, 1, 28)
2285    DEP_FIELD(SMMU_CB1_PMEVTYPER3, EVENT, 5, 0)
2286DEP_REG32(SMMU_CB1_PMCFGR, 0x11f00)
2287    DEP_FIELD(SMMU_CB1_PMCFGR, NCG, 8, 24)
2288    DEP_FIELD(SMMU_CB1_PMCFGR, UEN, 1, 19)
2289    DEP_FIELD(SMMU_CB1_PMCFGR, EX, 1, 16)
2290    DEP_FIELD(SMMU_CB1_PMCFGR, CCD, 1, 15)
2291    DEP_FIELD(SMMU_CB1_PMCFGR, CC, 1, 14)
2292    DEP_FIELD(SMMU_CB1_PMCFGR, SIZE, 6, 8)
2293    DEP_FIELD(SMMU_CB1_PMCFGR, N, 8, 0)
2294DEP_REG32(SMMU_CB1_PMCR, 0x11f04)
2295    DEP_FIELD(SMMU_CB1_PMCR, IMP, 8, 24)
2296    DEP_FIELD(SMMU_CB1_PMCR, X, 1, 4)
2297    DEP_FIELD(SMMU_CB1_PMCR, P, 1, 1)
2298    DEP_FIELD(SMMU_CB1_PMCR, E, 1, 0)
2299DEP_REG32(SMMU_CB1_PMCEID, 0x11f20)
2300    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X12, 1, 17)
2301    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X11, 1, 16)
2302    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X10, 1, 15)
2303    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X0A, 1, 9)
2304    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X09, 1, 8)
2305    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X08, 1, 7)
2306    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X01, 1, 1)
2307    DEP_FIELD(SMMU_CB1_PMCEID, EVENT0X00, 1, 0)
2308DEP_REG32(SMMU_CB1_PMCNTENSE, 0x11f40)
2309    DEP_FIELD(SMMU_CB1_PMCNTENSE, P3, 1, 3)
2310    DEP_FIELD(SMMU_CB1_PMCNTENSE, P2, 1, 2)
2311    DEP_FIELD(SMMU_CB1_PMCNTENSE, P1, 1, 1)
2312    DEP_FIELD(SMMU_CB1_PMCNTENSE, P0, 1, 0)
2313DEP_REG32(SMMU_CB1_PMCNTENCLR, 0x11f44)
2314    DEP_FIELD(SMMU_CB1_PMCNTENCLR, P3, 1, 3)
2315    DEP_FIELD(SMMU_CB1_PMCNTENCLR, P2, 1, 2)
2316    DEP_FIELD(SMMU_CB1_PMCNTENCLR, P1, 1, 1)
2317    DEP_FIELD(SMMU_CB1_PMCNTENCLR, P0, 1, 0)
2318DEP_REG32(SMMU_CB1_PMCNTENSET, 0x11f48)
2319    DEP_FIELD(SMMU_CB1_PMCNTENSET, P3, 1, 3)
2320    DEP_FIELD(SMMU_CB1_PMCNTENSET, P2, 1, 2)
2321    DEP_FIELD(SMMU_CB1_PMCNTENSET, P1, 1, 1)
2322    DEP_FIELD(SMMU_CB1_PMCNTENSET, P0, 1, 0)
2323DEP_REG32(SMMU_CB1_PMINTENCLR, 0x11f4c)
2324    DEP_FIELD(SMMU_CB1_PMINTENCLR, P3, 1, 3)
2325    DEP_FIELD(SMMU_CB1_PMINTENCLR, P2, 1, 2)
2326    DEP_FIELD(SMMU_CB1_PMINTENCLR, P1, 1, 1)
2327    DEP_FIELD(SMMU_CB1_PMINTENCLR, P0, 1, 0)
2328DEP_REG32(SMMU_CB1_PMOVSCLR, 0x11f50)
2329    DEP_FIELD(SMMU_CB1_PMOVSCLR, P3, 1, 3)
2330    DEP_FIELD(SMMU_CB1_PMOVSCLR, P2, 1, 2)
2331    DEP_FIELD(SMMU_CB1_PMOVSCLR, P1, 1, 1)
2332    DEP_FIELD(SMMU_CB1_PMOVSCLR, P0, 1, 0)
2333DEP_REG32(SMMU_CB1_PMOVSSET, 0x11f58)
2334    DEP_FIELD(SMMU_CB1_PMOVSSET, P3, 1, 3)
2335    DEP_FIELD(SMMU_CB1_PMOVSSET, P2, 1, 2)
2336    DEP_FIELD(SMMU_CB1_PMOVSSET, P1, 1, 1)
2337    DEP_FIELD(SMMU_CB1_PMOVSSET, P0, 1, 0)
2338DEP_REG32(SMMU_CB1_PMAUTHSTATUS, 0x11fb8)
2339    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, SNI, 1, 7)
2340    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, SNE, 1, 6)
2341    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, SI, 1, 5)
2342    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, SE, 1, 4)
2343    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, NSNI, 1, 3)
2344    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, NSNE, 1, 2)
2345    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, NSI, 1, 1)
2346    DEP_FIELD(SMMU_CB1_PMAUTHSTATUS, NSE, 1, 0)
2347DEP_REG32(SMMU_CB2_SCTLR, 0x12000)
2348    DEP_FIELD(SMMU_CB2_SCTLR, NSCFG, 2, 28)
2349    DEP_FIELD(SMMU_CB2_SCTLR, WACFG, 2, 26)
2350    DEP_FIELD(SMMU_CB2_SCTLR, RACFG, 2, 24)
2351    DEP_FIELD(SMMU_CB2_SCTLR, SHCFG, 2, 22)
2352    DEP_FIELD(SMMU_CB2_SCTLR, FB, 1, 21)
2353    DEP_FIELD(SMMU_CB2_SCTLR, MTCFG, 1, 20)
2354    DEP_FIELD(SMMU_CB2_SCTLR, MEMATTR, 4, 16)
2355    DEP_FIELD(SMMU_CB2_SCTLR, TRANSIENTCFG, 2, 14)
2356    DEP_FIELD(SMMU_CB2_SCTLR, PTW, 1, 13)
2357    DEP_FIELD(SMMU_CB2_SCTLR, ASIDPNE, 1, 12)
2358    DEP_FIELD(SMMU_CB2_SCTLR, UWXN, 1, 10)
2359    DEP_FIELD(SMMU_CB2_SCTLR, WXN, 1, 9)
2360    DEP_FIELD(SMMU_CB2_SCTLR, HUPCF, 1, 8)
2361    DEP_FIELD(SMMU_CB2_SCTLR, CFCFG, 1, 7)
2362    DEP_FIELD(SMMU_CB2_SCTLR, CFIE, 1, 6)
2363    DEP_FIELD(SMMU_CB2_SCTLR, CFRE, 1, 5)
2364    DEP_FIELD(SMMU_CB2_SCTLR, E, 1, 4)
2365    DEP_FIELD(SMMU_CB2_SCTLR, AFFD, 1, 3)
2366    DEP_FIELD(SMMU_CB2_SCTLR, AFE, 1, 2)
2367    DEP_FIELD(SMMU_CB2_SCTLR, TRE, 1, 1)
2368    DEP_FIELD(SMMU_CB2_SCTLR, M, 1, 0)
2369DEP_REG32(SMMU_CB2_ACTLR, 0x12004)
2370    DEP_FIELD(SMMU_CB2_ACTLR, CPRE, 1, 1)
2371    DEP_FIELD(SMMU_CB2_ACTLR, CMTLB, 1, 0)
2372DEP_REG32(SMMU_CB2_RESUME, 0x12008)
2373    DEP_FIELD(SMMU_CB2_RESUME, TNR, 1, 0)
2374DEP_REG32(SMMU_CB2_TCR2, 0x12010)
2375    DEP_FIELD(SMMU_CB2_TCR2, NSCFG1, 1, 30)
2376    DEP_FIELD(SMMU_CB2_TCR2, SEP, 3, 15)
2377    DEP_FIELD(SMMU_CB2_TCR2, NSCFG0, 1, 14)
2378    DEP_FIELD(SMMU_CB2_TCR2, TBI1, 1, 6)
2379    DEP_FIELD(SMMU_CB2_TCR2, TBI0, 1, 5)
2380    DEP_FIELD(SMMU_CB2_TCR2, AS, 1, 4)
2381    DEP_FIELD(SMMU_CB2_TCR2, PASIZE, 3, 0)
2382DEP_REG32(SMMU_CB2_TTBR0_LOW, 0x12020)
2383    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_31_7, 25, 7)
2384    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
2385    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
2386    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
2387    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_2, 1, 2)
2388    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_1_S, 1, 1)
2389    DEP_FIELD(SMMU_CB2_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
2390DEP_REG32(SMMU_CB2_TTBR0_HIGH, 0x12024)
2391    DEP_FIELD(SMMU_CB2_TTBR0_HIGH, ASID, 16, 16)
2392    DEP_FIELD(SMMU_CB2_TTBR0_HIGH, ADDRESS, 16, 0)
2393DEP_REG32(SMMU_CB2_TTBR1_LOW, 0x12028)
2394    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_31_7, 25, 7)
2395    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
2396    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
2397    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
2398    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_2, 1, 2)
2399    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_1_S, 1, 1)
2400    DEP_FIELD(SMMU_CB2_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
2401DEP_REG32(SMMU_CB2_TTBR1_HIGH, 0x1202c)
2402    DEP_FIELD(SMMU_CB2_TTBR1_HIGH, ASID, 16, 16)
2403    DEP_FIELD(SMMU_CB2_TTBR1_HIGH, ADDRESS, 16, 0)
2404DEP_REG32(SMMU_CB2_TCR_LPAE, 0x12030)
2405    DEP_FIELD(SMMU_CB2_TCR_LPAE, EAE, 1, 31)
2406    DEP_FIELD(SMMU_CB2_TCR_LPAE, NSCFG1_TG1, 1, 30)
2407    DEP_FIELD(SMMU_CB2_TCR_LPAE, SH1, 2, 28)
2408    DEP_FIELD(SMMU_CB2_TCR_LPAE, ORGN1, 2, 26)
2409    DEP_FIELD(SMMU_CB2_TCR_LPAE, IRGN1, 2, 24)
2410    DEP_FIELD(SMMU_CB2_TCR_LPAE, EPD1, 1, 23)
2411    DEP_FIELD(SMMU_CB2_TCR_LPAE, A1, 1, 22)
2412    DEP_FIELD(SMMU_CB2_TCR_LPAE, T1SZ_5_3, 3, 19)
2413    DEP_FIELD(SMMU_CB2_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
2414    DEP_FIELD(SMMU_CB2_TCR_LPAE, NSCFG0_TG0, 1, 14)
2415    DEP_FIELD(SMMU_CB2_TCR_LPAE, SH0, 2, 12)
2416    DEP_FIELD(SMMU_CB2_TCR_LPAE, ORGN0, 2, 10)
2417    DEP_FIELD(SMMU_CB2_TCR_LPAE, IRGN0, 2, 8)
2418    DEP_FIELD(SMMU_CB2_TCR_LPAE, SL0_1_EPD0, 1, 7)
2419    DEP_FIELD(SMMU_CB2_TCR_LPAE, SL0_0, 1, 6)
2420    DEP_FIELD(SMMU_CB2_TCR_LPAE, PD1_T0SZ_5, 1, 5)
2421    DEP_FIELD(SMMU_CB2_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
2422    DEP_FIELD(SMMU_CB2_TCR_LPAE, T0SZ_3_0, 4, 0)
2423DEP_REG32(SMMU_CB2_CONTEXTIDR, 0x12034)
2424    DEP_FIELD(SMMU_CB2_CONTEXTIDR, PROCID, 24, 8)
2425    DEP_FIELD(SMMU_CB2_CONTEXTIDR, ASID, 8, 0)
2426DEP_REG32(SMMU_CB2_PRRR_MAIR0, 0x12038)
2427    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS7, 1, 31)
2428    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS6, 1, 30)
2429    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS5, 1, 29)
2430    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS4, 1, 28)
2431    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS3, 1, 27)
2432    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS2, 1, 26)
2433    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS1, 1, 25)
2434    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NOS0, 1, 24)
2435    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NS1, 1, 19)
2436    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, NS0, 1, 18)
2437    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, DS1, 1, 17)
2438    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, DS0, 1, 16)
2439    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR7, 2, 14)
2440    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR6, 2, 12)
2441    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR5, 2, 10)
2442    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR4, 2, 8)
2443    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR3, 2, 6)
2444    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR2, 2, 4)
2445    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR1, 2, 2)
2446    DEP_FIELD(SMMU_CB2_PRRR_MAIR0, TR0, 2, 0)
2447DEP_REG32(SMMU_CB2_NMRR_MAIR1, 0x1203c)
2448    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR7, 2, 30)
2449    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR6, 2, 28)
2450    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR5, 2, 26)
2451    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR4, 2, 24)
2452    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR3, 2, 22)
2453    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR2, 2, 20)
2454    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR1, 2, 18)
2455    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, OR0, 2, 16)
2456    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR7, 2, 14)
2457    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR6, 2, 12)
2458    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR5, 2, 10)
2459    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR4, 2, 8)
2460    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR3, 2, 6)
2461    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR2, 2, 4)
2462    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR1, 2, 2)
2463    DEP_FIELD(SMMU_CB2_NMRR_MAIR1, IR0, 2, 0)
2464DEP_REG32(SMMU_CB2_FSR, 0x12058)
2465    DEP_FIELD(SMMU_CB2_FSR, MULTI, 1, 31)
2466    DEP_FIELD(SMMU_CB2_FSR, SS, 1, 30)
2467    DEP_FIELD(SMMU_CB2_FSR, FORMAT, 2, 9)
2468    DEP_FIELD(SMMU_CB2_FSR, UUT, 1, 8)
2469    DEP_FIELD(SMMU_CB2_FSR, ASF, 1, 7)
2470    DEP_FIELD(SMMU_CB2_FSR, TLBLKF, 1, 6)
2471    DEP_FIELD(SMMU_CB2_FSR, TLBMCF, 1, 5)
2472    DEP_FIELD(SMMU_CB2_FSR, EF, 1, 4)
2473    DEP_FIELD(SMMU_CB2_FSR, PF, 1, 3)
2474    DEP_FIELD(SMMU_CB2_FSR, AFF, 1, 2)
2475    DEP_FIELD(SMMU_CB2_FSR, TF, 1, 1)
2476DEP_REG32(SMMU_CB2_FSRRESTORE, 0x1205c)
2477DEP_REG32(SMMU_CB2_FAR_LOW, 0x12060)
2478DEP_REG32(SMMU_CB2_FAR_HIGH, 0x12064)
2479    DEP_FIELD(SMMU_CB2_FAR_HIGH, BITS, 17, 0)
2480DEP_REG32(SMMU_CB2_FSYNR0, 0x12068)
2481    DEP_FIELD(SMMU_CB2_FSYNR0, S1CBNDX, 4, 16)
2482    DEP_FIELD(SMMU_CB2_FSYNR0, AFR, 1, 11)
2483    DEP_FIELD(SMMU_CB2_FSYNR0, PTWF, 1, 10)
2484    DEP_FIELD(SMMU_CB2_FSYNR0, ATOF, 1, 9)
2485    DEP_FIELD(SMMU_CB2_FSYNR0, NSATTR, 1, 8)
2486    DEP_FIELD(SMMU_CB2_FSYNR0, IND, 1, 6)
2487    DEP_FIELD(SMMU_CB2_FSYNR0, PNU, 1, 5)
2488    DEP_FIELD(SMMU_CB2_FSYNR0, WNR, 1, 4)
2489    DEP_FIELD(SMMU_CB2_FSYNR0, PLVL, 2, 0)
2490DEP_REG32(SMMU_CB2_IPAFAR_LOW, 0x12070)
2491    DEP_FIELD(SMMU_CB2_IPAFAR_LOW, IPAFAR_L, 20, 12)
2492    DEP_FIELD(SMMU_CB2_IPAFAR_LOW, FAR_RO, 12, 0)
2493DEP_REG32(SMMU_CB2_IPAFAR_HIGH, 0x12074)
2494    DEP_FIELD(SMMU_CB2_IPAFAR_HIGH, BITS, 16, 0)
2495DEP_REG32(SMMU_CB2_TLBIVA_LOW, 0x12600)
2496DEP_REG32(SMMU_CB2_TLBIVA_HIGH, 0x12604)
2497    DEP_FIELD(SMMU_CB2_TLBIVA_HIGH, ASID, 16, 16)
2498    DEP_FIELD(SMMU_CB2_TLBIVA_HIGH, ADDRESS, 5, 0)
2499DEP_REG32(SMMU_CB2_TLBIVAA_LOW, 0x12608)
2500DEP_REG32(SMMU_CB2_TLBIVAA_HIGH, 0x1260c)
2501    DEP_FIELD(SMMU_CB2_TLBIVAA_HIGH, ASID, 16, 16)
2502    DEP_FIELD(SMMU_CB2_TLBIVAA_HIGH, ADDRESS, 5, 0)
2503DEP_REG32(SMMU_CB2_TLBIASID, 0x12610)
2504    DEP_FIELD(SMMU_CB2_TLBIASID, ASID, 16, 0)
2505DEP_REG32(SMMU_CB2_TLBIALL, 0x12618)
2506DEP_REG32(SMMU_CB2_TLBIVAL_LOW, 0x12620)
2507DEP_REG32(SMMU_CB2_TLBIVAL_HIGH, 0x12624)
2508    DEP_FIELD(SMMU_CB2_TLBIVAL_HIGH, ASID, 16, 16)
2509    DEP_FIELD(SMMU_CB2_TLBIVAL_HIGH, ADDRESS, 5, 0)
2510DEP_REG32(SMMU_CB2_TLBIVAAL_LOW, 0x12628)
2511DEP_REG32(SMMU_CB2_TLBIVAAL_HIGH, 0x1262c)
2512    DEP_FIELD(SMMU_CB2_TLBIVAAL_HIGH, ASID, 16, 16)
2513    DEP_FIELD(SMMU_CB2_TLBIVAAL_HIGH, ADDRESS, 5, 0)
2514DEP_REG32(SMMU_CB2_TLBIIPAS2_LOW, 0x12630)
2515DEP_REG32(SMMU_CB2_TLBIIPAS2_HIGH, 0x12634)
2516    DEP_FIELD(SMMU_CB2_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
2517DEP_REG32(SMMU_CB2_TLBIIPAS2L_LOW, 0x12638)
2518DEP_REG32(SMMU_CB2_TLBIIPAS2L_HIGH, 0x1263c)
2519    DEP_FIELD(SMMU_CB2_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
2520DEP_REG32(SMMU_CB2_TLBSYNC, 0x127f0)
2521DEP_REG32(SMMU_CB2_TLBSTATUS, 0x127f4)
2522    DEP_FIELD(SMMU_CB2_TLBSTATUS, SACTIVE, 1, 0)
2523DEP_REG32(SMMU_CB2_PMEVCNTR0, 0x12e00)
2524DEP_REG32(SMMU_CB2_PMEVCNTR1, 0x12e04)
2525DEP_REG32(SMMU_CB2_PMEVCNTR2, 0x12e08)
2526DEP_REG32(SMMU_CB2_PMEVCNTR3, 0x12e0c)
2527DEP_REG32(SMMU_CB2_PMEVTYPER0, 0x12e80)
2528    DEP_FIELD(SMMU_CB2_PMEVTYPER0, P, 1, 31)
2529    DEP_FIELD(SMMU_CB2_PMEVTYPER0, U, 1, 30)
2530    DEP_FIELD(SMMU_CB2_PMEVTYPER0, NSP, 1, 29)
2531    DEP_FIELD(SMMU_CB2_PMEVTYPER0, NSU, 1, 28)
2532    DEP_FIELD(SMMU_CB2_PMEVTYPER0, EVENT, 5, 0)
2533DEP_REG32(SMMU_CB2_PMEVTYPER1, 0x12e84)
2534    DEP_FIELD(SMMU_CB2_PMEVTYPER1, P, 1, 31)
2535    DEP_FIELD(SMMU_CB2_PMEVTYPER1, U, 1, 30)
2536    DEP_FIELD(SMMU_CB2_PMEVTYPER1, NSP, 1, 29)
2537    DEP_FIELD(SMMU_CB2_PMEVTYPER1, NSU, 1, 28)
2538    DEP_FIELD(SMMU_CB2_PMEVTYPER1, EVENT, 5, 0)
2539DEP_REG32(SMMU_CB2_PMEVTYPER2, 0x12e88)
2540    DEP_FIELD(SMMU_CB2_PMEVTYPER2, P, 1, 31)
2541    DEP_FIELD(SMMU_CB2_PMEVTYPER2, U, 1, 30)
2542    DEP_FIELD(SMMU_CB2_PMEVTYPER2, NSP, 1, 29)
2543    DEP_FIELD(SMMU_CB2_PMEVTYPER2, NSU, 1, 28)
2544    DEP_FIELD(SMMU_CB2_PMEVTYPER2, EVENT, 5, 0)
2545DEP_REG32(SMMU_CB2_PMEVTYPER3, 0x12e8c)
2546    DEP_FIELD(SMMU_CB2_PMEVTYPER3, P, 1, 31)
2547    DEP_FIELD(SMMU_CB2_PMEVTYPER3, U, 1, 30)
2548    DEP_FIELD(SMMU_CB2_PMEVTYPER3, NSP, 1, 29)
2549    DEP_FIELD(SMMU_CB2_PMEVTYPER3, NSU, 1, 28)
2550    DEP_FIELD(SMMU_CB2_PMEVTYPER3, EVENT, 5, 0)
2551DEP_REG32(SMMU_CB2_PMCFGR, 0x12f00)
2552    DEP_FIELD(SMMU_CB2_PMCFGR, NCG, 8, 24)
2553    DEP_FIELD(SMMU_CB2_PMCFGR, UEN, 1, 19)
2554    DEP_FIELD(SMMU_CB2_PMCFGR, EX, 1, 16)
2555    DEP_FIELD(SMMU_CB2_PMCFGR, CCD, 1, 15)
2556    DEP_FIELD(SMMU_CB2_PMCFGR, CC, 1, 14)
2557    DEP_FIELD(SMMU_CB2_PMCFGR, SIZE, 6, 8)
2558    DEP_FIELD(SMMU_CB2_PMCFGR, N, 8, 0)
2559DEP_REG32(SMMU_CB2_PMCR, 0x12f04)
2560    DEP_FIELD(SMMU_CB2_PMCR, IMP, 8, 24)
2561    DEP_FIELD(SMMU_CB2_PMCR, X, 1, 4)
2562    DEP_FIELD(SMMU_CB2_PMCR, P, 1, 1)
2563    DEP_FIELD(SMMU_CB2_PMCR, E, 1, 0)
2564DEP_REG32(SMMU_CB2_PMCEID, 0x12f20)
2565    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X12, 1, 17)
2566    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X11, 1, 16)
2567    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X10, 1, 15)
2568    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X0A, 1, 9)
2569    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X09, 1, 8)
2570    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X08, 1, 7)
2571    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X01, 1, 1)
2572    DEP_FIELD(SMMU_CB2_PMCEID, EVENT0X00, 1, 0)
2573DEP_REG32(SMMU_CB2_PMCNTENSE, 0x12f40)
2574    DEP_FIELD(SMMU_CB2_PMCNTENSE, P3, 1, 3)
2575    DEP_FIELD(SMMU_CB2_PMCNTENSE, P2, 1, 2)
2576    DEP_FIELD(SMMU_CB2_PMCNTENSE, P1, 1, 1)
2577    DEP_FIELD(SMMU_CB2_PMCNTENSE, P0, 1, 0)
2578DEP_REG32(SMMU_CB2_PMCNTENCLR, 0x12f44)
2579    DEP_FIELD(SMMU_CB2_PMCNTENCLR, P3, 1, 3)
2580    DEP_FIELD(SMMU_CB2_PMCNTENCLR, P2, 1, 2)
2581    DEP_FIELD(SMMU_CB2_PMCNTENCLR, P1, 1, 1)
2582    DEP_FIELD(SMMU_CB2_PMCNTENCLR, P0, 1, 0)
2583DEP_REG32(SMMU_CB2_PMCNTENSET, 0x12f48)
2584    DEP_FIELD(SMMU_CB2_PMCNTENSET, P3, 1, 3)
2585    DEP_FIELD(SMMU_CB2_PMCNTENSET, P2, 1, 2)
2586    DEP_FIELD(SMMU_CB2_PMCNTENSET, P1, 1, 1)
2587    DEP_FIELD(SMMU_CB2_PMCNTENSET, P0, 1, 0)
2588DEP_REG32(SMMU_CB2_PMINTENCLR, 0x12f4c)
2589    DEP_FIELD(SMMU_CB2_PMINTENCLR, P3, 1, 3)
2590    DEP_FIELD(SMMU_CB2_PMINTENCLR, P2, 1, 2)
2591    DEP_FIELD(SMMU_CB2_PMINTENCLR, P1, 1, 1)
2592    DEP_FIELD(SMMU_CB2_PMINTENCLR, P0, 1, 0)
2593DEP_REG32(SMMU_CB2_PMOVSCLR, 0x12f50)
2594    DEP_FIELD(SMMU_CB2_PMOVSCLR, P3, 1, 3)
2595    DEP_FIELD(SMMU_CB2_PMOVSCLR, P2, 1, 2)
2596    DEP_FIELD(SMMU_CB2_PMOVSCLR, P1, 1, 1)
2597    DEP_FIELD(SMMU_CB2_PMOVSCLR, P0, 1, 0)
2598DEP_REG32(SMMU_CB2_PMOVSSET, 0x12f58)
2599    DEP_FIELD(SMMU_CB2_PMOVSSET, P3, 1, 3)
2600    DEP_FIELD(SMMU_CB2_PMOVSSET, P2, 1, 2)
2601    DEP_FIELD(SMMU_CB2_PMOVSSET, P1, 1, 1)
2602    DEP_FIELD(SMMU_CB2_PMOVSSET, P0, 1, 0)
2603DEP_REG32(SMMU_CB2_PMAUTHSTATUS, 0x12fb8)
2604    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, SNI, 1, 7)
2605    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, SNE, 1, 6)
2606    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, SI, 1, 5)
2607    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, SE, 1, 4)
2608    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, NSNI, 1, 3)
2609    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, NSNE, 1, 2)
2610    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, NSI, 1, 1)
2611    DEP_FIELD(SMMU_CB2_PMAUTHSTATUS, NSE, 1, 0)
2612DEP_REG32(SMMU_CB3_SCTLR, 0x13000)
2613    DEP_FIELD(SMMU_CB3_SCTLR, NSCFG, 2, 28)
2614    DEP_FIELD(SMMU_CB3_SCTLR, WACFG, 2, 26)
2615    DEP_FIELD(SMMU_CB3_SCTLR, RACFG, 2, 24)
2616    DEP_FIELD(SMMU_CB3_SCTLR, SHCFG, 2, 22)
2617    DEP_FIELD(SMMU_CB3_SCTLR, FB, 1, 21)
2618    DEP_FIELD(SMMU_CB3_SCTLR, MTCFG, 1, 20)
2619    DEP_FIELD(SMMU_CB3_SCTLR, MEMATTR, 4, 16)
2620    DEP_FIELD(SMMU_CB3_SCTLR, TRANSIENTCFG, 2, 14)
2621    DEP_FIELD(SMMU_CB3_SCTLR, PTW, 1, 13)
2622    DEP_FIELD(SMMU_CB3_SCTLR, ASIDPNE, 1, 12)
2623    DEP_FIELD(SMMU_CB3_SCTLR, UWXN, 1, 10)
2624    DEP_FIELD(SMMU_CB3_SCTLR, WXN, 1, 9)
2625    DEP_FIELD(SMMU_CB3_SCTLR, HUPCF, 1, 8)
2626    DEP_FIELD(SMMU_CB3_SCTLR, CFCFG, 1, 7)
2627    DEP_FIELD(SMMU_CB3_SCTLR, CFIE, 1, 6)
2628    DEP_FIELD(SMMU_CB3_SCTLR, CFRE, 1, 5)
2629    DEP_FIELD(SMMU_CB3_SCTLR, E, 1, 4)
2630    DEP_FIELD(SMMU_CB3_SCTLR, AFFD, 1, 3)
2631    DEP_FIELD(SMMU_CB3_SCTLR, AFE, 1, 2)
2632    DEP_FIELD(SMMU_CB3_SCTLR, TRE, 1, 1)
2633    DEP_FIELD(SMMU_CB3_SCTLR, M, 1, 0)
2634DEP_REG32(SMMU_CB3_ACTLR, 0x13004)
2635    DEP_FIELD(SMMU_CB3_ACTLR, CPRE, 1, 1)
2636    DEP_FIELD(SMMU_CB3_ACTLR, CMTLB, 1, 0)
2637DEP_REG32(SMMU_CB3_RESUME, 0x13008)
2638    DEP_FIELD(SMMU_CB3_RESUME, TNR, 1, 0)
2639DEP_REG32(SMMU_CB3_TCR2, 0x13010)
2640    DEP_FIELD(SMMU_CB3_TCR2, NSCFG1, 1, 30)
2641    DEP_FIELD(SMMU_CB3_TCR2, SEP, 3, 15)
2642    DEP_FIELD(SMMU_CB3_TCR2, NSCFG0, 1, 14)
2643    DEP_FIELD(SMMU_CB3_TCR2, TBI1, 1, 6)
2644    DEP_FIELD(SMMU_CB3_TCR2, TBI0, 1, 5)
2645    DEP_FIELD(SMMU_CB3_TCR2, AS, 1, 4)
2646    DEP_FIELD(SMMU_CB3_TCR2, PASIZE, 3, 0)
2647DEP_REG32(SMMU_CB3_TTBR0_LOW, 0x13020)
2648    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_31_7, 25, 7)
2649    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
2650    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
2651    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
2652    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_2, 1, 2)
2653    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_1_S, 1, 1)
2654    DEP_FIELD(SMMU_CB3_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
2655DEP_REG32(SMMU_CB3_TTBR0_HIGH, 0x13024)
2656    DEP_FIELD(SMMU_CB3_TTBR0_HIGH, ASID, 16, 16)
2657    DEP_FIELD(SMMU_CB3_TTBR0_HIGH, ADDRESS, 16, 0)
2658DEP_REG32(SMMU_CB3_TTBR1_LOW, 0x13028)
2659    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_31_7, 25, 7)
2660    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
2661    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
2662    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
2663    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_2, 1, 2)
2664    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_1_S, 1, 1)
2665    DEP_FIELD(SMMU_CB3_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
2666DEP_REG32(SMMU_CB3_TTBR1_HIGH, 0x1302c)
2667    DEP_FIELD(SMMU_CB3_TTBR1_HIGH, ASID, 16, 16)
2668    DEP_FIELD(SMMU_CB3_TTBR1_HIGH, ADDRESS, 16, 0)
2669DEP_REG32(SMMU_CB3_TCR_LPAE, 0x13030)
2670    DEP_FIELD(SMMU_CB3_TCR_LPAE, EAE, 1, 31)
2671    DEP_FIELD(SMMU_CB3_TCR_LPAE, NSCFG1_TG1, 1, 30)
2672    DEP_FIELD(SMMU_CB3_TCR_LPAE, SH1, 2, 28)
2673    DEP_FIELD(SMMU_CB3_TCR_LPAE, ORGN1, 2, 26)
2674    DEP_FIELD(SMMU_CB3_TCR_LPAE, IRGN1, 2, 24)
2675    DEP_FIELD(SMMU_CB3_TCR_LPAE, EPD1, 1, 23)
2676    DEP_FIELD(SMMU_CB3_TCR_LPAE, A1, 1, 22)
2677    DEP_FIELD(SMMU_CB3_TCR_LPAE, T1SZ_5_3, 3, 19)
2678    DEP_FIELD(SMMU_CB3_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
2679    DEP_FIELD(SMMU_CB3_TCR_LPAE, NSCFG0_TG0, 1, 14)
2680    DEP_FIELD(SMMU_CB3_TCR_LPAE, SH0, 2, 12)
2681    DEP_FIELD(SMMU_CB3_TCR_LPAE, ORGN0, 2, 10)
2682    DEP_FIELD(SMMU_CB3_TCR_LPAE, IRGN0, 2, 8)
2683    DEP_FIELD(SMMU_CB3_TCR_LPAE, SL0_1_EPD0, 1, 7)
2684    DEP_FIELD(SMMU_CB3_TCR_LPAE, SL0_0, 1, 6)
2685    DEP_FIELD(SMMU_CB3_TCR_LPAE, PD1_T0SZ_5, 1, 5)
2686    DEP_FIELD(SMMU_CB3_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
2687    DEP_FIELD(SMMU_CB3_TCR_LPAE, T0SZ_3_0, 4, 0)
2688DEP_REG32(SMMU_CB3_CONTEXTIDR, 0x13034)
2689    DEP_FIELD(SMMU_CB3_CONTEXTIDR, PROCID, 24, 8)
2690    DEP_FIELD(SMMU_CB3_CONTEXTIDR, ASID, 8, 0)
2691DEP_REG32(SMMU_CB3_PRRR_MAIR0, 0x13038)
2692    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS7, 1, 31)
2693    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS6, 1, 30)
2694    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS5, 1, 29)
2695    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS4, 1, 28)
2696    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS3, 1, 27)
2697    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS2, 1, 26)
2698    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS1, 1, 25)
2699    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NOS0, 1, 24)
2700    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NS1, 1, 19)
2701    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, NS0, 1, 18)
2702    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, DS1, 1, 17)
2703    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, DS0, 1, 16)
2704    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR7, 2, 14)
2705    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR6, 2, 12)
2706    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR5, 2, 10)
2707    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR4, 2, 8)
2708    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR3, 2, 6)
2709    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR2, 2, 4)
2710    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR1, 2, 2)
2711    DEP_FIELD(SMMU_CB3_PRRR_MAIR0, TR0, 2, 0)
2712DEP_REG32(SMMU_CB3_NMRR_MAIR1, 0x1303c)
2713    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR7, 2, 30)
2714    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR6, 2, 28)
2715    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR5, 2, 26)
2716    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR4, 2, 24)
2717    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR3, 2, 22)
2718    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR2, 2, 20)
2719    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR1, 2, 18)
2720    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, OR0, 2, 16)
2721    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR7, 2, 14)
2722    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR6, 2, 12)
2723    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR5, 2, 10)
2724    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR4, 2, 8)
2725    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR3, 2, 6)
2726    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR2, 2, 4)
2727    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR1, 2, 2)
2728    DEP_FIELD(SMMU_CB3_NMRR_MAIR1, IR0, 2, 0)
2729DEP_REG32(SMMU_CB3_FSR, 0x13058)
2730    DEP_FIELD(SMMU_CB3_FSR, MULTI, 1, 31)
2731    DEP_FIELD(SMMU_CB3_FSR, SS, 1, 30)
2732    DEP_FIELD(SMMU_CB3_FSR, FORMAT, 2, 9)
2733    DEP_FIELD(SMMU_CB3_FSR, UUT, 1, 8)
2734    DEP_FIELD(SMMU_CB3_FSR, ASF, 1, 7)
2735    DEP_FIELD(SMMU_CB3_FSR, TLBLKF, 1, 6)
2736    DEP_FIELD(SMMU_CB3_FSR, TLBMCF, 1, 5)
2737    DEP_FIELD(SMMU_CB3_FSR, EF, 1, 4)
2738    DEP_FIELD(SMMU_CB3_FSR, PF, 1, 3)
2739    DEP_FIELD(SMMU_CB3_FSR, AFF, 1, 2)
2740    DEP_FIELD(SMMU_CB3_FSR, TF, 1, 1)
2741DEP_REG32(SMMU_CB3_FSRRESTORE, 0x1305c)
2742DEP_REG32(SMMU_CB3_FAR_LOW, 0x13060)
2743DEP_REG32(SMMU_CB3_FAR_HIGH, 0x13064)
2744    DEP_FIELD(SMMU_CB3_FAR_HIGH, BITS, 17, 0)
2745DEP_REG32(SMMU_CB3_FSYNR0, 0x13068)
2746    DEP_FIELD(SMMU_CB3_FSYNR0, S1CBNDX, 4, 16)
2747    DEP_FIELD(SMMU_CB3_FSYNR0, AFR, 1, 11)
2748    DEP_FIELD(SMMU_CB3_FSYNR0, PTWF, 1, 10)
2749    DEP_FIELD(SMMU_CB3_FSYNR0, ATOF, 1, 9)
2750    DEP_FIELD(SMMU_CB3_FSYNR0, NSATTR, 1, 8)
2751    DEP_FIELD(SMMU_CB3_FSYNR0, IND, 1, 6)
2752    DEP_FIELD(SMMU_CB3_FSYNR0, PNU, 1, 5)
2753    DEP_FIELD(SMMU_CB3_FSYNR0, WNR, 1, 4)
2754    DEP_FIELD(SMMU_CB3_FSYNR0, PLVL, 2, 0)
2755DEP_REG32(SMMU_CB3_IPAFAR_LOW, 0x13070)
2756    DEP_FIELD(SMMU_CB3_IPAFAR_LOW, IPAFAR_L, 20, 12)
2757    DEP_FIELD(SMMU_CB3_IPAFAR_LOW, FAR_RO, 12, 0)
2758DEP_REG32(SMMU_CB3_IPAFAR_HIGH, 0x13074)
2759    DEP_FIELD(SMMU_CB3_IPAFAR_HIGH, BITS, 16, 0)
2760DEP_REG32(SMMU_CB3_TLBIVA_LOW, 0x13600)
2761DEP_REG32(SMMU_CB3_TLBIVA_HIGH, 0x13604)
2762    DEP_FIELD(SMMU_CB3_TLBIVA_HIGH, ASID, 16, 16)
2763    DEP_FIELD(SMMU_CB3_TLBIVA_HIGH, ADDRESS, 5, 0)
2764DEP_REG32(SMMU_CB3_TLBIVAA_LOW, 0x13608)
2765DEP_REG32(SMMU_CB3_TLBIVAA_HIGH, 0x1360c)
2766    DEP_FIELD(SMMU_CB3_TLBIVAA_HIGH, ASID, 16, 16)
2767    DEP_FIELD(SMMU_CB3_TLBIVAA_HIGH, ADDRESS, 5, 0)
2768DEP_REG32(SMMU_CB3_TLBIASID, 0x13610)
2769    DEP_FIELD(SMMU_CB3_TLBIASID, ASID, 16, 0)
2770DEP_REG32(SMMU_CB3_TLBIALL, 0x13618)
2771DEP_REG32(SMMU_CB3_TLBIVAL_LOW, 0x13620)
2772DEP_REG32(SMMU_CB3_TLBIVAL_HIGH, 0x13624)
2773    DEP_FIELD(SMMU_CB3_TLBIVAL_HIGH, ASID, 16, 16)
2774    DEP_FIELD(SMMU_CB3_TLBIVAL_HIGH, ADDRESS, 5, 0)
2775DEP_REG32(SMMU_CB3_TLBIVAAL_LOW, 0x13628)
2776DEP_REG32(SMMU_CB3_TLBIVAAL_HIGH, 0x1362c)
2777    DEP_FIELD(SMMU_CB3_TLBIVAAL_HIGH, ASID, 16, 16)
2778    DEP_FIELD(SMMU_CB3_TLBIVAAL_HIGH, ADDRESS, 5, 0)
2779DEP_REG32(SMMU_CB3_TLBIIPAS2_LOW, 0x13630)
2780DEP_REG32(SMMU_CB3_TLBIIPAS2_HIGH, 0x13634)
2781    DEP_FIELD(SMMU_CB3_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
2782DEP_REG32(SMMU_CB3_TLBIIPAS2L_LOW, 0x13638)
2783DEP_REG32(SMMU_CB3_TLBIIPAS2L_HIGH, 0x1363c)
2784    DEP_FIELD(SMMU_CB3_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
2785DEP_REG32(SMMU_CB3_TLBSYNC, 0x137f0)
2786DEP_REG32(SMMU_CB3_TLBSTATUS, 0x137f4)
2787    DEP_FIELD(SMMU_CB3_TLBSTATUS, SACTIVE, 1, 0)
2788DEP_REG32(SMMU_CB3_PMEVCNTR0, 0x13e00)
2789DEP_REG32(SMMU_CB3_PMEVCNTR1, 0x13e04)
2790DEP_REG32(SMMU_CB3_PMEVCNTR2, 0x13e08)
2791DEP_REG32(SMMU_CB3_PMEVCNTR3, 0x13e0c)
2792DEP_REG32(SMMU_CB3_PMEVTYPER0, 0x13e80)
2793    DEP_FIELD(SMMU_CB3_PMEVTYPER0, P, 1, 31)
2794    DEP_FIELD(SMMU_CB3_PMEVTYPER0, U, 1, 30)
2795    DEP_FIELD(SMMU_CB3_PMEVTYPER0, NSP, 1, 29)
2796    DEP_FIELD(SMMU_CB3_PMEVTYPER0, NSU, 1, 28)
2797    DEP_FIELD(SMMU_CB3_PMEVTYPER0, EVENT, 5, 0)
2798DEP_REG32(SMMU_CB3_PMEVTYPER1, 0x13e84)
2799    DEP_FIELD(SMMU_CB3_PMEVTYPER1, P, 1, 31)
2800    DEP_FIELD(SMMU_CB3_PMEVTYPER1, U, 1, 30)
2801    DEP_FIELD(SMMU_CB3_PMEVTYPER1, NSP, 1, 29)
2802    DEP_FIELD(SMMU_CB3_PMEVTYPER1, NSU, 1, 28)
2803    DEP_FIELD(SMMU_CB3_PMEVTYPER1, EVENT, 5, 0)
2804DEP_REG32(SMMU_CB3_PMEVTYPER2, 0x13e88)
2805    DEP_FIELD(SMMU_CB3_PMEVTYPER2, P, 1, 31)
2806    DEP_FIELD(SMMU_CB3_PMEVTYPER2, U, 1, 30)
2807    DEP_FIELD(SMMU_CB3_PMEVTYPER2, NSP, 1, 29)
2808    DEP_FIELD(SMMU_CB3_PMEVTYPER2, NSU, 1, 28)
2809    DEP_FIELD(SMMU_CB3_PMEVTYPER2, EVENT, 5, 0)
2810DEP_REG32(SMMU_CB3_PMEVTYPER3, 0x13e8c)
2811    DEP_FIELD(SMMU_CB3_PMEVTYPER3, P, 1, 31)
2812    DEP_FIELD(SMMU_CB3_PMEVTYPER3, U, 1, 30)
2813    DEP_FIELD(SMMU_CB3_PMEVTYPER3, NSP, 1, 29)
2814    DEP_FIELD(SMMU_CB3_PMEVTYPER3, NSU, 1, 28)
2815    DEP_FIELD(SMMU_CB3_PMEVTYPER3, EVENT, 5, 0)
2816DEP_REG32(SMMU_CB3_PMCFGR, 0x13f00)
2817    DEP_FIELD(SMMU_CB3_PMCFGR, NCG, 8, 24)
2818    DEP_FIELD(SMMU_CB3_PMCFGR, UEN, 1, 19)
2819    DEP_FIELD(SMMU_CB3_PMCFGR, EX, 1, 16)
2820    DEP_FIELD(SMMU_CB3_PMCFGR, CCD, 1, 15)
2821    DEP_FIELD(SMMU_CB3_PMCFGR, CC, 1, 14)
2822    DEP_FIELD(SMMU_CB3_PMCFGR, SIZE, 6, 8)
2823    DEP_FIELD(SMMU_CB3_PMCFGR, N, 8, 0)
2824DEP_REG32(SMMU_CB3_PMCR, 0x13f04)
2825    DEP_FIELD(SMMU_CB3_PMCR, IMP, 8, 24)
2826    DEP_FIELD(SMMU_CB3_PMCR, X, 1, 4)
2827    DEP_FIELD(SMMU_CB3_PMCR, P, 1, 1)
2828    DEP_FIELD(SMMU_CB3_PMCR, E, 1, 0)
2829DEP_REG32(SMMU_CB3_PMCEID, 0x13f20)
2830    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X12, 1, 17)
2831    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X11, 1, 16)
2832    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X10, 1, 15)
2833    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X0A, 1, 9)
2834    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X09, 1, 8)
2835    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X08, 1, 7)
2836    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X01, 1, 1)
2837    DEP_FIELD(SMMU_CB3_PMCEID, EVENT0X00, 1, 0)
2838DEP_REG32(SMMU_CB3_PMCNTENSE, 0x13f40)
2839    DEP_FIELD(SMMU_CB3_PMCNTENSE, P3, 1, 3)
2840    DEP_FIELD(SMMU_CB3_PMCNTENSE, P2, 1, 2)
2841    DEP_FIELD(SMMU_CB3_PMCNTENSE, P1, 1, 1)
2842    DEP_FIELD(SMMU_CB3_PMCNTENSE, P0, 1, 0)
2843DEP_REG32(SMMU_CB3_PMCNTENCLR, 0x13f44)
2844    DEP_FIELD(SMMU_CB3_PMCNTENCLR, P3, 1, 3)
2845    DEP_FIELD(SMMU_CB3_PMCNTENCLR, P2, 1, 2)
2846    DEP_FIELD(SMMU_CB3_PMCNTENCLR, P1, 1, 1)
2847    DEP_FIELD(SMMU_CB3_PMCNTENCLR, P0, 1, 0)
2848DEP_REG32(SMMU_CB3_PMCNTENSET, 0x13f48)
2849    DEP_FIELD(SMMU_CB3_PMCNTENSET, P3, 1, 3)
2850    DEP_FIELD(SMMU_CB3_PMCNTENSET, P2, 1, 2)
2851    DEP_FIELD(SMMU_CB3_PMCNTENSET, P1, 1, 1)
2852    DEP_FIELD(SMMU_CB3_PMCNTENSET, P0, 1, 0)
2853DEP_REG32(SMMU_CB3_PMINTENCLR, 0x13f4c)
2854    DEP_FIELD(SMMU_CB3_PMINTENCLR, P3, 1, 3)
2855    DEP_FIELD(SMMU_CB3_PMINTENCLR, P2, 1, 2)
2856    DEP_FIELD(SMMU_CB3_PMINTENCLR, P1, 1, 1)
2857    DEP_FIELD(SMMU_CB3_PMINTENCLR, P0, 1, 0)
2858DEP_REG32(SMMU_CB3_PMOVSCLR, 0x13f50)
2859    DEP_FIELD(SMMU_CB3_PMOVSCLR, P3, 1, 3)
2860    DEP_FIELD(SMMU_CB3_PMOVSCLR, P2, 1, 2)
2861    DEP_FIELD(SMMU_CB3_PMOVSCLR, P1, 1, 1)
2862    DEP_FIELD(SMMU_CB3_PMOVSCLR, P0, 1, 0)
2863DEP_REG32(SMMU_CB3_PMOVSSET, 0x13f58)
2864    DEP_FIELD(SMMU_CB3_PMOVSSET, P3, 1, 3)
2865    DEP_FIELD(SMMU_CB3_PMOVSSET, P2, 1, 2)
2866    DEP_FIELD(SMMU_CB3_PMOVSSET, P1, 1, 1)
2867    DEP_FIELD(SMMU_CB3_PMOVSSET, P0, 1, 0)
2868DEP_REG32(SMMU_CB3_PMAUTHSTATUS, 0x13fb8)
2869    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, SNI, 1, 7)
2870    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, SNE, 1, 6)
2871    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, SI, 1, 5)
2872    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, SE, 1, 4)
2873    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, NSNI, 1, 3)
2874    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, NSNE, 1, 2)
2875    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, NSI, 1, 1)
2876    DEP_FIELD(SMMU_CB3_PMAUTHSTATUS, NSE, 1, 0)
2877DEP_REG32(SMMU_CB4_SCTLR, 0x14000)
2878    DEP_FIELD(SMMU_CB4_SCTLR, NSCFG, 2, 28)
2879    DEP_FIELD(SMMU_CB4_SCTLR, WACFG, 2, 26)
2880    DEP_FIELD(SMMU_CB4_SCTLR, RACFG, 2, 24)
2881    DEP_FIELD(SMMU_CB4_SCTLR, SHCFG, 2, 22)
2882    DEP_FIELD(SMMU_CB4_SCTLR, FB, 1, 21)
2883    DEP_FIELD(SMMU_CB4_SCTLR, MTCFG, 1, 20)
2884    DEP_FIELD(SMMU_CB4_SCTLR, MEMATTR, 4, 16)
2885    DEP_FIELD(SMMU_CB4_SCTLR, TRANSIENTCFG, 2, 14)
2886    DEP_FIELD(SMMU_CB4_SCTLR, PTW, 1, 13)
2887    DEP_FIELD(SMMU_CB4_SCTLR, ASIDPNE, 1, 12)
2888    DEP_FIELD(SMMU_CB4_SCTLR, UWXN, 1, 10)
2889    DEP_FIELD(SMMU_CB4_SCTLR, WXN, 1, 9)
2890    DEP_FIELD(SMMU_CB4_SCTLR, HUPCF, 1, 8)
2891    DEP_FIELD(SMMU_CB4_SCTLR, CFCFG, 1, 7)
2892    DEP_FIELD(SMMU_CB4_SCTLR, CFIE, 1, 6)
2893    DEP_FIELD(SMMU_CB4_SCTLR, CFRE, 1, 5)
2894    DEP_FIELD(SMMU_CB4_SCTLR, E, 1, 4)
2895    DEP_FIELD(SMMU_CB4_SCTLR, AFFD, 1, 3)
2896    DEP_FIELD(SMMU_CB4_SCTLR, AFE, 1, 2)
2897    DEP_FIELD(SMMU_CB4_SCTLR, TRE, 1, 1)
2898    DEP_FIELD(SMMU_CB4_SCTLR, M, 1, 0)
2899DEP_REG32(SMMU_CB4_ACTLR, 0x14004)
2900    DEP_FIELD(SMMU_CB4_ACTLR, CPRE, 1, 1)
2901    DEP_FIELD(SMMU_CB4_ACTLR, CMTLB, 1, 0)
2902DEP_REG32(SMMU_CB4_RESUME, 0x14008)
2903    DEP_FIELD(SMMU_CB4_RESUME, TNR, 1, 0)
2904DEP_REG32(SMMU_CB4_TCR2, 0x14010)
2905    DEP_FIELD(SMMU_CB4_TCR2, NSCFG1, 1, 30)
2906    DEP_FIELD(SMMU_CB4_TCR2, SEP, 3, 15)
2907    DEP_FIELD(SMMU_CB4_TCR2, NSCFG0, 1, 14)
2908    DEP_FIELD(SMMU_CB4_TCR2, TBI1, 1, 6)
2909    DEP_FIELD(SMMU_CB4_TCR2, TBI0, 1, 5)
2910    DEP_FIELD(SMMU_CB4_TCR2, AS, 1, 4)
2911    DEP_FIELD(SMMU_CB4_TCR2, PASIZE, 3, 0)
2912DEP_REG32(SMMU_CB4_TTBR0_LOW, 0x14020)
2913    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_31_7, 25, 7)
2914    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
2915    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
2916    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
2917    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_2, 1, 2)
2918    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_1_S, 1, 1)
2919    DEP_FIELD(SMMU_CB4_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
2920DEP_REG32(SMMU_CB4_TTBR0_HIGH, 0x14024)
2921    DEP_FIELD(SMMU_CB4_TTBR0_HIGH, ASID, 16, 16)
2922    DEP_FIELD(SMMU_CB4_TTBR0_HIGH, ADDRESS, 16, 0)
2923DEP_REG32(SMMU_CB4_TTBR1_LOW, 0x14028)
2924    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_31_7, 25, 7)
2925    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
2926    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
2927    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
2928    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_2, 1, 2)
2929    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_1_S, 1, 1)
2930    DEP_FIELD(SMMU_CB4_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
2931DEP_REG32(SMMU_CB4_TTBR1_HIGH, 0x1402c)
2932    DEP_FIELD(SMMU_CB4_TTBR1_HIGH, ASID, 16, 16)
2933    DEP_FIELD(SMMU_CB4_TTBR1_HIGH, ADDRESS, 16, 0)
2934DEP_REG32(SMMU_CB4_TCR_LPAE, 0x14030)
2935    DEP_FIELD(SMMU_CB4_TCR_LPAE, EAE, 1, 31)
2936    DEP_FIELD(SMMU_CB4_TCR_LPAE, NSCFG1_TG1, 1, 30)
2937    DEP_FIELD(SMMU_CB4_TCR_LPAE, SH1, 2, 28)
2938    DEP_FIELD(SMMU_CB4_TCR_LPAE, ORGN1, 2, 26)
2939    DEP_FIELD(SMMU_CB4_TCR_LPAE, IRGN1, 2, 24)
2940    DEP_FIELD(SMMU_CB4_TCR_LPAE, EPD1, 1, 23)
2941    DEP_FIELD(SMMU_CB4_TCR_LPAE, A1, 1, 22)
2942    DEP_FIELD(SMMU_CB4_TCR_LPAE, T1SZ_5_3, 3, 19)
2943    DEP_FIELD(SMMU_CB4_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
2944    DEP_FIELD(SMMU_CB4_TCR_LPAE, NSCFG0_TG0, 1, 14)
2945    DEP_FIELD(SMMU_CB4_TCR_LPAE, SH0, 2, 12)
2946    DEP_FIELD(SMMU_CB4_TCR_LPAE, ORGN0, 2, 10)
2947    DEP_FIELD(SMMU_CB4_TCR_LPAE, IRGN0, 2, 8)
2948    DEP_FIELD(SMMU_CB4_TCR_LPAE, SL0_1_EPD0, 1, 7)
2949    DEP_FIELD(SMMU_CB4_TCR_LPAE, SL0_0, 1, 6)
2950    DEP_FIELD(SMMU_CB4_TCR_LPAE, PD1_T0SZ_5, 1, 5)
2951    DEP_FIELD(SMMU_CB4_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
2952    DEP_FIELD(SMMU_CB4_TCR_LPAE, T0SZ_3_0, 4, 0)
2953DEP_REG32(SMMU_CB4_CONTEXTIDR, 0x14034)
2954    DEP_FIELD(SMMU_CB4_CONTEXTIDR, PROCID, 24, 8)
2955    DEP_FIELD(SMMU_CB4_CONTEXTIDR, ASID, 8, 0)
2956DEP_REG32(SMMU_CB4_PRRR_MAIR0, 0x14038)
2957    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS7, 1, 31)
2958    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS6, 1, 30)
2959    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS5, 1, 29)
2960    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS4, 1, 28)
2961    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS3, 1, 27)
2962    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS2, 1, 26)
2963    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS1, 1, 25)
2964    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NOS0, 1, 24)
2965    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NS1, 1, 19)
2966    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, NS0, 1, 18)
2967    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, DS1, 1, 17)
2968    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, DS0, 1, 16)
2969    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR7, 2, 14)
2970    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR6, 2, 12)
2971    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR5, 2, 10)
2972    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR4, 2, 8)
2973    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR3, 2, 6)
2974    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR2, 2, 4)
2975    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR1, 2, 2)
2976    DEP_FIELD(SMMU_CB4_PRRR_MAIR0, TR0, 2, 0)
2977DEP_REG32(SMMU_CB4_NMRR_MAIR1, 0x1403c)
2978    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR7, 2, 30)
2979    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR6, 2, 28)
2980    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR5, 2, 26)
2981    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR4, 2, 24)
2982    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR3, 2, 22)
2983    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR2, 2, 20)
2984    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR1, 2, 18)
2985    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, OR0, 2, 16)
2986    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR7, 2, 14)
2987    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR6, 2, 12)
2988    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR5, 2, 10)
2989    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR4, 2, 8)
2990    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR3, 2, 6)
2991    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR2, 2, 4)
2992    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR1, 2, 2)
2993    DEP_FIELD(SMMU_CB4_NMRR_MAIR1, IR0, 2, 0)
2994DEP_REG32(SMMU_CB4_FSR, 0x14058)
2995    DEP_FIELD(SMMU_CB4_FSR, MULTI, 1, 31)
2996    DEP_FIELD(SMMU_CB4_FSR, SS, 1, 30)
2997    DEP_FIELD(SMMU_CB4_FSR, FORMAT, 2, 9)
2998    DEP_FIELD(SMMU_CB4_FSR, UUT, 1, 8)
2999    DEP_FIELD(SMMU_CB4_FSR, ASF, 1, 7)
3000    DEP_FIELD(SMMU_CB4_FSR, TLBLKF, 1, 6)

3001    DEP_FIELD(SMMU_CB4_FSR, TLBMCF, 1, 5)
3002    DEP_FIELD(SMMU_CB4_FSR, EF, 1, 4)
3003    DEP_FIELD(SMMU_CB4_FSR, PF, 1, 3)
3004    DEP_FIELD(SMMU_CB4_FSR, AFF, 1, 2)
3005    DEP_FIELD(SMMU_CB4_FSR, TF, 1, 1)
3006DEP_REG32(SMMU_CB4_FSRRESTORE, 0x1405c)
3007DEP_REG32(SMMU_CB4_FAR_LOW, 0x14060)
3008DEP_REG32(SMMU_CB4_FAR_HIGH, 0x14064)
3009    DEP_FIELD(SMMU_CB4_FAR_HIGH, BITS, 17, 0)
3010DEP_REG32(SMMU_CB4_FSYNR0, 0x14068)
3011    DEP_FIELD(SMMU_CB4_FSYNR0, S1CBNDX, 4, 16)
3012    DEP_FIELD(SMMU_CB4_FSYNR0, AFR, 1, 11)
3013    DEP_FIELD(SMMU_CB4_FSYNR0, PTWF, 1, 10)
3014    DEP_FIELD(SMMU_CB4_FSYNR0, ATOF, 1, 9)
3015    DEP_FIELD(SMMU_CB4_FSYNR0, NSATTR, 1, 8)
3016    DEP_FIELD(SMMU_CB4_FSYNR0, IND, 1, 6)
3017    DEP_FIELD(SMMU_CB4_FSYNR0, PNU, 1, 5)
3018    DEP_FIELD(SMMU_CB4_FSYNR0, WNR, 1, 4)
3019    DEP_FIELD(SMMU_CB4_FSYNR0, PLVL, 2, 0)
3020DEP_REG32(SMMU_CB4_IPAFAR_LOW, 0x14070)
3021    DEP_FIELD(SMMU_CB4_IPAFAR_LOW, IPAFAR_L, 20, 12)
3022    DEP_FIELD(SMMU_CB4_IPAFAR_LOW, FAR_RO, 12, 0)
3023DEP_REG32(SMMU_CB4_IPAFAR_HIGH, 0x14074)
3024    DEP_FIELD(SMMU_CB4_IPAFAR_HIGH, BITS, 16, 0)
3025DEP_REG32(SMMU_CB4_TLBIVA_LOW, 0x14600)
3026DEP_REG32(SMMU_CB4_TLBIVA_HIGH, 0x14604)
3027    DEP_FIELD(SMMU_CB4_TLBIVA_HIGH, ASID, 16, 16)
3028    DEP_FIELD(SMMU_CB4_TLBIVA_HIGH, ADDRESS, 5, 0)
3029DEP_REG32(SMMU_CB4_TLBIVAA_LOW, 0x14608)
3030DEP_REG32(SMMU_CB4_TLBIVAA_HIGH, 0x1460c)
3031    DEP_FIELD(SMMU_CB4_TLBIVAA_HIGH, ASID, 16, 16)
3032    DEP_FIELD(SMMU_CB4_TLBIVAA_HIGH, ADDRESS, 5, 0)
3033DEP_REG32(SMMU_CB4_TLBIASID, 0x14610)
3034    DEP_FIELD(SMMU_CB4_TLBIASID, ASID, 16, 0)
3035DEP_REG32(SMMU_CB4_TLBIALL, 0x14618)
3036DEP_REG32(SMMU_CB4_TLBIVAL_LOW, 0x14620)
3037DEP_REG32(SMMU_CB4_TLBIVAL_HIGH, 0x14624)
3038    DEP_FIELD(SMMU_CB4_TLBIVAL_HIGH, ASID, 16, 16)
3039    DEP_FIELD(SMMU_CB4_TLBIVAL_HIGH, ADDRESS, 5, 0)
3040DEP_REG32(SMMU_CB4_TLBIVAAL_LOW, 0x14628)
3041DEP_REG32(SMMU_CB4_TLBIVAAL_HIGH, 0x1462c)
3042    DEP_FIELD(SMMU_CB4_TLBIVAAL_HIGH, ASID, 16, 16)
3043    DEP_FIELD(SMMU_CB4_TLBIVAAL_HIGH, ADDRESS, 5, 0)
3044DEP_REG32(SMMU_CB4_TLBIIPAS2_LOW, 0x14630)
3045DEP_REG32(SMMU_CB4_TLBIIPAS2_HIGH, 0x14634)
3046    DEP_FIELD(SMMU_CB4_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
3047DEP_REG32(SMMU_CB4_TLBIIPAS2L_LOW, 0x14638)
3048DEP_REG32(SMMU_CB4_TLBIIPAS2L_HIGH, 0x1463c)
3049    DEP_FIELD(SMMU_CB4_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
3050DEP_REG32(SMMU_CB4_TLBSYNC, 0x147f0)
3051DEP_REG32(SMMU_CB4_TLBSTATUS, 0x147f4)
3052    DEP_FIELD(SMMU_CB4_TLBSTATUS, SACTIVE, 1, 0)
3053DEP_REG32(SMMU_CB4_PMEVCNTR0, 0x14e00)
3054DEP_REG32(SMMU_CB4_PMEVCNTR1, 0x14e04)
3055DEP_REG32(SMMU_CB4_PMEVCNTR2, 0x14e08)
3056DEP_REG32(SMMU_CB4_PMEVCNTR3, 0x14e0c)
3057DEP_REG32(SMMU_CB4_PMEVTYPER0, 0x14e80)
3058    DEP_FIELD(SMMU_CB4_PMEVTYPER0, P, 1, 31)
3059    DEP_FIELD(SMMU_CB4_PMEVTYPER0, U, 1, 30)
3060    DEP_FIELD(SMMU_CB4_PMEVTYPER0, NSP, 1, 29)
3061    DEP_FIELD(SMMU_CB4_PMEVTYPER0, NSU, 1, 28)
3062    DEP_FIELD(SMMU_CB4_PMEVTYPER0, EVENT, 5, 0)
3063DEP_REG32(SMMU_CB4_PMEVTYPER1, 0x14e84)
3064    DEP_FIELD(SMMU_CB4_PMEVTYPER1, P, 1, 31)
3065    DEP_FIELD(SMMU_CB4_PMEVTYPER1, U, 1, 30)
3066    DEP_FIELD(SMMU_CB4_PMEVTYPER1, NSP, 1, 29)
3067    DEP_FIELD(SMMU_CB4_PMEVTYPER1, NSU, 1, 28)
3068    DEP_FIELD(SMMU_CB4_PMEVTYPER1, EVENT, 5, 0)
3069DEP_REG32(SMMU_CB4_PMEVTYPER2, 0x14e88)
3070    DEP_FIELD(SMMU_CB4_PMEVTYPER2, P, 1, 31)
3071    DEP_FIELD(SMMU_CB4_PMEVTYPER2, U, 1, 30)
3072    DEP_FIELD(SMMU_CB4_PMEVTYPER2, NSP, 1, 29)
3073    DEP_FIELD(SMMU_CB4_PMEVTYPER2, NSU, 1, 28)
3074    DEP_FIELD(SMMU_CB4_PMEVTYPER2, EVENT, 5, 0)
3075DEP_REG32(SMMU_CB4_PMEVTYPER3, 0x14e8c)
3076    DEP_FIELD(SMMU_CB4_PMEVTYPER3, P, 1, 31)
3077    DEP_FIELD(SMMU_CB4_PMEVTYPER3, U, 1, 30)
3078    DEP_FIELD(SMMU_CB4_PMEVTYPER3, NSP, 1, 29)
3079    DEP_FIELD(SMMU_CB4_PMEVTYPER3, NSU, 1, 28)
3080    DEP_FIELD(SMMU_CB4_PMEVTYPER3, EVENT, 5, 0)
3081DEP_REG32(SMMU_CB4_PMCFGR, 0x14f00)
3082    DEP_FIELD(SMMU_CB4_PMCFGR, NCG, 8, 24)
3083    DEP_FIELD(SMMU_CB4_PMCFGR, UEN, 1, 19)
3084    DEP_FIELD(SMMU_CB4_PMCFGR, EX, 1, 16)
3085    DEP_FIELD(SMMU_CB4_PMCFGR, CCD, 1, 15)
3086    DEP_FIELD(SMMU_CB4_PMCFGR, CC, 1, 14)
3087    DEP_FIELD(SMMU_CB4_PMCFGR, SIZE, 6, 8)
3088    DEP_FIELD(SMMU_CB4_PMCFGR, N, 8, 0)
3089DEP_REG32(SMMU_CB4_PMCR, 0x14f04)
3090    DEP_FIELD(SMMU_CB4_PMCR, IMP, 8, 24)
3091    DEP_FIELD(SMMU_CB4_PMCR, X, 1, 4)
3092    DEP_FIELD(SMMU_CB4_PMCR, P, 1, 1)
3093    DEP_FIELD(SMMU_CB4_PMCR, E, 1, 0)
3094DEP_REG32(SMMU_CB4_PMCEID, 0x14f20)
3095    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X12, 1, 17)
3096    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X11, 1, 16)
3097    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X10, 1, 15)
3098    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X0A, 1, 9)
3099    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X09, 1, 8)
3100    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X08, 1, 7)
3101    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X01, 1, 1)
3102    DEP_FIELD(SMMU_CB4_PMCEID, EVENT0X00, 1, 0)
3103DEP_REG32(SMMU_CB4_PMCNTENSE, 0x14f40)
3104    DEP_FIELD(SMMU_CB4_PMCNTENSE, P3, 1, 3)
3105    DEP_FIELD(SMMU_CB4_PMCNTENSE, P2, 1, 2)
3106    DEP_FIELD(SMMU_CB4_PMCNTENSE, P1, 1, 1)
3107    DEP_FIELD(SMMU_CB4_PMCNTENSE, P0, 1, 0)
3108DEP_REG32(SMMU_CB4_PMCNTENCLR, 0x14f44)
3109    DEP_FIELD(SMMU_CB4_PMCNTENCLR, P3, 1, 3)
3110    DEP_FIELD(SMMU_CB4_PMCNTENCLR, P2, 1, 2)
3111    DEP_FIELD(SMMU_CB4_PMCNTENCLR, P1, 1, 1)
3112    DEP_FIELD(SMMU_CB4_PMCNTENCLR, P0, 1, 0)
3113DEP_REG32(SMMU_CB4_PMCNTENSET, 0x14f48)
3114    DEP_FIELD(SMMU_CB4_PMCNTENSET, P3, 1, 3)
3115    DEP_FIELD(SMMU_CB4_PMCNTENSET, P2, 1, 2)
3116    DEP_FIELD(SMMU_CB4_PMCNTENSET, P1, 1, 1)
3117    DEP_FIELD(SMMU_CB4_PMCNTENSET, P0, 1, 0)
3118DEP_REG32(SMMU_CB4_PMINTENCLR, 0x14f4c)
3119    DEP_FIELD(SMMU_CB4_PMINTENCLR, P3, 1, 3)
3120    DEP_FIELD(SMMU_CB4_PMINTENCLR, P2, 1, 2)
3121    DEP_FIELD(SMMU_CB4_PMINTENCLR, P1, 1, 1)
3122    DEP_FIELD(SMMU_CB4_PMINTENCLR, P0, 1, 0)
3123DEP_REG32(SMMU_CB4_PMOVSCLR, 0x14f50)
3124    DEP_FIELD(SMMU_CB4_PMOVSCLR, P3, 1, 3)
3125    DEP_FIELD(SMMU_CB4_PMOVSCLR, P2, 1, 2)
3126    DEP_FIELD(SMMU_CB4_PMOVSCLR, P1, 1, 1)
3127    DEP_FIELD(SMMU_CB4_PMOVSCLR, P0, 1, 0)
3128DEP_REG32(SMMU_CB4_PMOVSSET, 0x14f58)
3129    DEP_FIELD(SMMU_CB4_PMOVSSET, P3, 1, 3)
3130    DEP_FIELD(SMMU_CB4_PMOVSSET, P2, 1, 2)
3131    DEP_FIELD(SMMU_CB4_PMOVSSET, P1, 1, 1)
3132    DEP_FIELD(SMMU_CB4_PMOVSSET, P0, 1, 0)
3133DEP_REG32(SMMU_CB4_PMAUTHSTATUS, 0x14fb8)
3134    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, SNI, 1, 7)
3135    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, SNE, 1, 6)
3136    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, SI, 1, 5)
3137    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, SE, 1, 4)
3138    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, NSNI, 1, 3)
3139    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, NSNE, 1, 2)
3140    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, NSI, 1, 1)
3141    DEP_FIELD(SMMU_CB4_PMAUTHSTATUS, NSE, 1, 0)
3142DEP_REG32(SMMU_CB5_SCTLR, 0x15000)
3143    DEP_FIELD(SMMU_CB5_SCTLR, NSCFG, 2, 28)
3144    DEP_FIELD(SMMU_CB5_SCTLR, WACFG, 2, 26)
3145    DEP_FIELD(SMMU_CB5_SCTLR, RACFG, 2, 24)
3146    DEP_FIELD(SMMU_CB5_SCTLR, SHCFG, 2, 22)
3147    DEP_FIELD(SMMU_CB5_SCTLR, FB, 1, 21)
3148    DEP_FIELD(SMMU_CB5_SCTLR, MTCFG, 1, 20)
3149    DEP_FIELD(SMMU_CB5_SCTLR, MEMATTR, 4, 16)
3150    DEP_FIELD(SMMU_CB5_SCTLR, TRANSIENTCFG, 2, 14)
3151    DEP_FIELD(SMMU_CB5_SCTLR, PTW, 1, 13)
3152    DEP_FIELD(SMMU_CB5_SCTLR, ASIDPNE, 1, 12)
3153    DEP_FIELD(SMMU_CB5_SCTLR, UWXN, 1, 10)
3154    DEP_FIELD(SMMU_CB5_SCTLR, WXN, 1, 9)
3155    DEP_FIELD(SMMU_CB5_SCTLR, HUPCF, 1, 8)
3156    DEP_FIELD(SMMU_CB5_SCTLR, CFCFG, 1, 7)
3157    DEP_FIELD(SMMU_CB5_SCTLR, CFIE, 1, 6)
3158    DEP_FIELD(SMMU_CB5_SCTLR, CFRE, 1, 5)
3159    DEP_FIELD(SMMU_CB5_SCTLR, E, 1, 4)
3160    DEP_FIELD(SMMU_CB5_SCTLR, AFFD, 1, 3)
3161    DEP_FIELD(SMMU_CB5_SCTLR, AFE, 1, 2)
3162    DEP_FIELD(SMMU_CB5_SCTLR, TRE, 1, 1)
3163    DEP_FIELD(SMMU_CB5_SCTLR, M, 1, 0)
3164DEP_REG32(SMMU_CB5_ACTLR, 0x15004)
3165    DEP_FIELD(SMMU_CB5_ACTLR, CPRE, 1, 1)
3166    DEP_FIELD(SMMU_CB5_ACTLR, CMTLB, 1, 0)
3167DEP_REG32(SMMU_CB5_RESUME, 0x15008)
3168    DEP_FIELD(SMMU_CB5_RESUME, TNR, 1, 0)
3169DEP_REG32(SMMU_CB5_TCR2, 0x15010)
3170    DEP_FIELD(SMMU_CB5_TCR2, NSCFG1, 1, 30)
3171    DEP_FIELD(SMMU_CB5_TCR2, SEP, 3, 15)
3172    DEP_FIELD(SMMU_CB5_TCR2, NSCFG0, 1, 14)
3173    DEP_FIELD(SMMU_CB5_TCR2, TBI1, 1, 6)
3174    DEP_FIELD(SMMU_CB5_TCR2, TBI0, 1, 5)
3175    DEP_FIELD(SMMU_CB5_TCR2, AS, 1, 4)
3176    DEP_FIELD(SMMU_CB5_TCR2, PASIZE, 3, 0)
3177DEP_REG32(SMMU_CB5_TTBR0_LOW, 0x15020)
3178    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_31_7, 25, 7)
3179    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
3180    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
3181    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
3182    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_2, 1, 2)
3183    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_1_S, 1, 1)
3184    DEP_FIELD(SMMU_CB5_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
3185DEP_REG32(SMMU_CB5_TTBR0_HIGH, 0x15024)
3186    DEP_FIELD(SMMU_CB5_TTBR0_HIGH, ASID, 16, 16)
3187    DEP_FIELD(SMMU_CB5_TTBR0_HIGH, ADDRESS, 16, 0)
3188DEP_REG32(SMMU_CB5_TTBR1_LOW, 0x15028)
3189    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_31_7, 25, 7)
3190    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
3191    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
3192    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
3193    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_2, 1, 2)
3194    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_1_S, 1, 1)
3195    DEP_FIELD(SMMU_CB5_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
3196DEP_REG32(SMMU_CB5_TTBR1_HIGH, 0x1502c)
3197    DEP_FIELD(SMMU_CB5_TTBR1_HIGH, ASID, 16, 16)
3198    DEP_FIELD(SMMU_CB5_TTBR1_HIGH, ADDRESS, 16, 0)
3199DEP_REG32(SMMU_CB5_TCR_LPAE, 0x15030)
3200    DEP_FIELD(SMMU_CB5_TCR_LPAE, EAE, 1, 31)
3201    DEP_FIELD(SMMU_CB5_TCR_LPAE, NSCFG1_TG1, 1, 30)
3202    DEP_FIELD(SMMU_CB5_TCR_LPAE, SH1, 2, 28)
3203    DEP_FIELD(SMMU_CB5_TCR_LPAE, ORGN1, 2, 26)
3204    DEP_FIELD(SMMU_CB5_TCR_LPAE, IRGN1, 2, 24)
3205    DEP_FIELD(SMMU_CB5_TCR_LPAE, EPD1, 1, 23)
3206    DEP_FIELD(SMMU_CB5_TCR_LPAE, A1, 1, 22)
3207    DEP_FIELD(SMMU_CB5_TCR_LPAE, T1SZ_5_3, 3, 19)
3208    DEP_FIELD(SMMU_CB5_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
3209    DEP_FIELD(SMMU_CB5_TCR_LPAE, NSCFG0_TG0, 1, 14)
3210    DEP_FIELD(SMMU_CB5_TCR_LPAE, SH0, 2, 12)
3211    DEP_FIELD(SMMU_CB5_TCR_LPAE, ORGN0, 2, 10)
3212    DEP_FIELD(SMMU_CB5_TCR_LPAE, IRGN0, 2, 8)
3213    DEP_FIELD(SMMU_CB5_TCR_LPAE, SL0_1_EPD0, 1, 7)
3214    DEP_FIELD(SMMU_CB5_TCR_LPAE, SL0_0, 1, 6)
3215    DEP_FIELD(SMMU_CB5_TCR_LPAE, PD1_T0SZ_5, 1, 5)
3216    DEP_FIELD(SMMU_CB5_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
3217    DEP_FIELD(SMMU_CB5_TCR_LPAE, T0SZ_3_0, 4, 0)
3218DEP_REG32(SMMU_CB5_CONTEXTIDR, 0x15034)
3219    DEP_FIELD(SMMU_CB5_CONTEXTIDR, PROCID, 24, 8)
3220    DEP_FIELD(SMMU_CB5_CONTEXTIDR, ASID, 8, 0)
3221DEP_REG32(SMMU_CB5_PRRR_MAIR0, 0x15038)
3222    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS7, 1, 31)
3223    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS6, 1, 30)
3224    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS5, 1, 29)
3225    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS4, 1, 28)
3226    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS3, 1, 27)
3227    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS2, 1, 26)
3228    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS1, 1, 25)
3229    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NOS0, 1, 24)
3230    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NS1, 1, 19)
3231    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, NS0, 1, 18)
3232    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, DS1, 1, 17)
3233    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, DS0, 1, 16)
3234    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR7, 2, 14)
3235    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR6, 2, 12)
3236    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR5, 2, 10)
3237    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR4, 2, 8)
3238    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR3, 2, 6)
3239    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR2, 2, 4)
3240    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR1, 2, 2)
3241    DEP_FIELD(SMMU_CB5_PRRR_MAIR0, TR0, 2, 0)
3242DEP_REG32(SMMU_CB5_NMRR_MAIR1, 0x1503c)
3243    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR7, 2, 30)
3244    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR6, 2, 28)
3245    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR5, 2, 26)
3246    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR4, 2, 24)
3247    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR3, 2, 22)
3248    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR2, 2, 20)
3249    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR1, 2, 18)
3250    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, OR0, 2, 16)
3251    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR7, 2, 14)
3252    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR6, 2, 12)
3253    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR5, 2, 10)
3254    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR4, 2, 8)
3255    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR3, 2, 6)
3256    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR2, 2, 4)
3257    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR1, 2, 2)
3258    DEP_FIELD(SMMU_CB5_NMRR_MAIR1, IR0, 2, 0)
3259DEP_REG32(SMMU_CB5_FSR, 0x15058)
3260    DEP_FIELD(SMMU_CB5_FSR, MULTI, 1, 31)
3261    DEP_FIELD(SMMU_CB5_FSR, SS, 1, 30)
3262    DEP_FIELD(SMMU_CB5_FSR, FORMAT, 2, 9)
3263    DEP_FIELD(SMMU_CB5_FSR, UUT, 1, 8)
3264    DEP_FIELD(SMMU_CB5_FSR, ASF, 1, 7)
3265    DEP_FIELD(SMMU_CB5_FSR, TLBLKF, 1, 6)
3266    DEP_FIELD(SMMU_CB5_FSR, TLBMCF, 1, 5)
3267    DEP_FIELD(SMMU_CB5_FSR, EF, 1, 4)
3268    DEP_FIELD(SMMU_CB5_FSR, PF, 1, 3)
3269    DEP_FIELD(SMMU_CB5_FSR, AFF, 1, 2)
3270    DEP_FIELD(SMMU_CB5_FSR, TF, 1, 1)
3271DEP_REG32(SMMU_CB5_FSRRESTORE, 0x1505c)
3272DEP_REG32(SMMU_CB5_FAR_LOW, 0x15060)
3273DEP_REG32(SMMU_CB5_FAR_HIGH, 0x15064)
3274    DEP_FIELD(SMMU_CB5_FAR_HIGH, BITS, 17, 0)
3275DEP_REG32(SMMU_CB5_FSYNR0, 0x15068)
3276    DEP_FIELD(SMMU_CB5_FSYNR0, S1CBNDX, 4, 16)
3277    DEP_FIELD(SMMU_CB5_FSYNR0, AFR, 1, 11)
3278    DEP_FIELD(SMMU_CB5_FSYNR0, PTWF, 1, 10)
3279    DEP_FIELD(SMMU_CB5_FSYNR0, ATOF, 1, 9)
3280    DEP_FIELD(SMMU_CB5_FSYNR0, NSATTR, 1, 8)
3281    DEP_FIELD(SMMU_CB5_FSYNR0, IND, 1, 6)
3282    DEP_FIELD(SMMU_CB5_FSYNR0, PNU, 1, 5)
3283    DEP_FIELD(SMMU_CB5_FSYNR0, WNR, 1, 4)
3284    DEP_FIELD(SMMU_CB5_FSYNR0, PLVL, 2, 0)
3285DEP_REG32(SMMU_CB5_IPAFAR_LOW, 0x15070)
3286    DEP_FIELD(SMMU_CB5_IPAFAR_LOW, IPAFAR_L, 20, 12)
3287    DEP_FIELD(SMMU_CB5_IPAFAR_LOW, FAR_RO, 12, 0)
3288DEP_REG32(SMMU_CB5_IPAFAR_HIGH, 0x15074)
3289    DEP_FIELD(SMMU_CB5_IPAFAR_HIGH, BITS, 16, 0)
3290DEP_REG32(SMMU_CB5_TLBIVA_LOW, 0x15600)
3291DEP_REG32(SMMU_CB5_TLBIVA_HIGH, 0x15604)
3292    DEP_FIELD(SMMU_CB5_TLBIVA_HIGH, ASID, 16, 16)
3293    DEP_FIELD(SMMU_CB5_TLBIVA_HIGH, ADDRESS, 5, 0)
3294DEP_REG32(SMMU_CB5_TLBIVAA_LOW, 0x15608)
3295DEP_REG32(SMMU_CB5_TLBIVAA_HIGH, 0x1560c)
3296    DEP_FIELD(SMMU_CB5_TLBIVAA_HIGH, ASID, 16, 16)
3297    DEP_FIELD(SMMU_CB5_TLBIVAA_HIGH, ADDRESS, 5, 0)
3298DEP_REG32(SMMU_CB5_TLBIASID, 0x15610)
3299    DEP_FIELD(SMMU_CB5_TLBIASID, ASID, 16, 0)
3300DEP_REG32(SMMU_CB5_TLBIALL, 0x15618)
3301DEP_REG32(SMMU_CB5_TLBIVAL_LOW, 0x15620)
3302DEP_REG32(SMMU_CB5_TLBIVAL_HIGH, 0x15624)
3303    DEP_FIELD(SMMU_CB5_TLBIVAL_HIGH, ASID, 16, 16)
3304    DEP_FIELD(SMMU_CB5_TLBIVAL_HIGH, ADDRESS, 5, 0)
3305DEP_REG32(SMMU_CB5_TLBIVAAL_LOW, 0x15628)
3306DEP_REG32(SMMU_CB5_TLBIVAAL_HIGH, 0x1562c)
3307    DEP_FIELD(SMMU_CB5_TLBIVAAL_HIGH, ASID, 16, 16)
3308    DEP_FIELD(SMMU_CB5_TLBIVAAL_HIGH, ADDRESS, 5, 0)
3309DEP_REG32(SMMU_CB5_TLBIIPAS2_LOW, 0x15630)
3310DEP_REG32(SMMU_CB5_TLBIIPAS2_HIGH, 0x15634)
3311    DEP_FIELD(SMMU_CB5_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
3312DEP_REG32(SMMU_CB5_TLBIIPAS2L_LOW, 0x15638)
3313DEP_REG32(SMMU_CB5_TLBIIPAS2L_HIGH, 0x1563c)
3314    DEP_FIELD(SMMU_CB5_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
3315DEP_REG32(SMMU_CB5_TLBSYNC, 0x157f0)
3316DEP_REG32(SMMU_CB5_TLBSTATUS, 0x157f4)
3317    DEP_FIELD(SMMU_CB5_TLBSTATUS, SACTIVE, 1, 0)
3318DEP_REG32(SMMU_CB5_PMEVCNTR0, 0x15e00)
3319DEP_REG32(SMMU_CB5_PMEVCNTR1, 0x15e04)
3320DEP_REG32(SMMU_CB5_PMEVCNTR2, 0x15e08)
3321DEP_REG32(SMMU_CB5_PMEVCNTR3, 0x15e0c)
3322DEP_REG32(SMMU_CB5_PMEVTYPER0, 0x15e80)
3323    DEP_FIELD(SMMU_CB5_PMEVTYPER0, P, 1, 31)
3324    DEP_FIELD(SMMU_CB5_PMEVTYPER0, U, 1, 30)
3325    DEP_FIELD(SMMU_CB5_PMEVTYPER0, NSP, 1, 29)
3326    DEP_FIELD(SMMU_CB5_PMEVTYPER0, NSU, 1, 28)
3327    DEP_FIELD(SMMU_CB5_PMEVTYPER0, EVENT, 5, 0)
3328DEP_REG32(SMMU_CB5_PMEVTYPER1, 0x15e84)
3329    DEP_FIELD(SMMU_CB5_PMEVTYPER1, P, 1, 31)
3330    DEP_FIELD(SMMU_CB5_PMEVTYPER1, U, 1, 30)
3331    DEP_FIELD(SMMU_CB5_PMEVTYPER1, NSP, 1, 29)
3332    DEP_FIELD(SMMU_CB5_PMEVTYPER1, NSU, 1, 28)
3333    DEP_FIELD(SMMU_CB5_PMEVTYPER1, EVENT, 5, 0)
3334DEP_REG32(SMMU_CB5_PMEVTYPER2, 0x15e88)
3335    DEP_FIELD(SMMU_CB5_PMEVTYPER2, P, 1, 31)
3336    DEP_FIELD(SMMU_CB5_PMEVTYPER2, U, 1, 30)
3337    DEP_FIELD(SMMU_CB5_PMEVTYPER2, NSP, 1, 29)
3338    DEP_FIELD(SMMU_CB5_PMEVTYPER2, NSU, 1, 28)
3339    DEP_FIELD(SMMU_CB5_PMEVTYPER2, EVENT, 5, 0)
3340DEP_REG32(SMMU_CB5_PMEVTYPER3, 0x15e8c)
3341    DEP_FIELD(SMMU_CB5_PMEVTYPER3, P, 1, 31)
3342    DEP_FIELD(SMMU_CB5_PMEVTYPER3, U, 1, 30)
3343    DEP_FIELD(SMMU_CB5_PMEVTYPER3, NSP, 1, 29)
3344    DEP_FIELD(SMMU_CB5_PMEVTYPER3, NSU, 1, 28)
3345    DEP_FIELD(SMMU_CB5_PMEVTYPER3, EVENT, 5, 0)
3346DEP_REG32(SMMU_CB5_PMCFGR, 0x15f00)
3347    DEP_FIELD(SMMU_CB5_PMCFGR, NCG, 8, 24)
3348    DEP_FIELD(SMMU_CB5_PMCFGR, UEN, 1, 19)
3349    DEP_FIELD(SMMU_CB5_PMCFGR, EX, 1, 16)
3350    DEP_FIELD(SMMU_CB5_PMCFGR, CCD, 1, 15)
3351    DEP_FIELD(SMMU_CB5_PMCFGR, CC, 1, 14)
3352    DEP_FIELD(SMMU_CB5_PMCFGR, SIZE, 6, 8)
3353    DEP_FIELD(SMMU_CB5_PMCFGR, N, 8, 0)
3354DEP_REG32(SMMU_CB5_PMCR, 0x15f04)
3355    DEP_FIELD(SMMU_CB5_PMCR, IMP, 8, 24)
3356    DEP_FIELD(SMMU_CB5_PMCR, X, 1, 4)
3357    DEP_FIELD(SMMU_CB5_PMCR, P, 1, 1)
3358    DEP_FIELD(SMMU_CB5_PMCR, E, 1, 0)
3359DEP_REG32(SMMU_CB5_PMCEID, 0x15f20)
3360    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X12, 1, 17)
3361    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X11, 1, 16)
3362    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X10, 1, 15)
3363    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X0A, 1, 9)
3364    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X09, 1, 8)
3365    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X08, 1, 7)
3366    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X01, 1, 1)
3367    DEP_FIELD(SMMU_CB5_PMCEID, EVENT0X00, 1, 0)
3368DEP_REG32(SMMU_CB5_PMCNTENSE, 0x15f40)
3369    DEP_FIELD(SMMU_CB5_PMCNTENSE, P3, 1, 3)
3370    DEP_FIELD(SMMU_CB5_PMCNTENSE, P2, 1, 2)
3371    DEP_FIELD(SMMU_CB5_PMCNTENSE, P1, 1, 1)
3372    DEP_FIELD(SMMU_CB5_PMCNTENSE, P0, 1, 0)
3373DEP_REG32(SMMU_CB5_PMCNTENCLR, 0x15f44)
3374    DEP_FIELD(SMMU_CB5_PMCNTENCLR, P3, 1, 3)
3375    DEP_FIELD(SMMU_CB5_PMCNTENCLR, P2, 1, 2)
3376    DEP_FIELD(SMMU_CB5_PMCNTENCLR, P1, 1, 1)
3377    DEP_FIELD(SMMU_CB5_PMCNTENCLR, P0, 1, 0)
3378DEP_REG32(SMMU_CB5_PMCNTENSET, 0x15f48)
3379    DEP_FIELD(SMMU_CB5_PMCNTENSET, P3, 1, 3)
3380    DEP_FIELD(SMMU_CB5_PMCNTENSET, P2, 1, 2)
3381    DEP_FIELD(SMMU_CB5_PMCNTENSET, P1, 1, 1)
3382    DEP_FIELD(SMMU_CB5_PMCNTENSET, P0, 1, 0)
3383DEP_REG32(SMMU_CB5_PMINTENCLR, 0x15f4c)
3384    DEP_FIELD(SMMU_CB5_PMINTENCLR, P3, 1, 3)
3385    DEP_FIELD(SMMU_CB5_PMINTENCLR, P2, 1, 2)
3386    DEP_FIELD(SMMU_CB5_PMINTENCLR, P1, 1, 1)
3387    DEP_FIELD(SMMU_CB5_PMINTENCLR, P0, 1, 0)
3388DEP_REG32(SMMU_CB5_PMOVSCLR, 0x15f50)
3389    DEP_FIELD(SMMU_CB5_PMOVSCLR, P3, 1, 3)
3390    DEP_FIELD(SMMU_CB5_PMOVSCLR, P2, 1, 2)
3391    DEP_FIELD(SMMU_CB5_PMOVSCLR, P1, 1, 1)
3392    DEP_FIELD(SMMU_CB5_PMOVSCLR, P0, 1, 0)
3393DEP_REG32(SMMU_CB5_PMOVSSET, 0x15f58)
3394    DEP_FIELD(SMMU_CB5_PMOVSSET, P3, 1, 3)
3395    DEP_FIELD(SMMU_CB5_PMOVSSET, P2, 1, 2)
3396    DEP_FIELD(SMMU_CB5_PMOVSSET, P1, 1, 1)
3397    DEP_FIELD(SMMU_CB5_PMOVSSET, P0, 1, 0)
3398DEP_REG32(SMMU_CB5_PMAUTHSTATUS, 0x15fb8)
3399    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, SNI, 1, 7)
3400    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, SNE, 1, 6)
3401    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, SI, 1, 5)
3402    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, SE, 1, 4)
3403    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, NSNI, 1, 3)
3404    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, NSNE, 1, 2)
3405    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, NSI, 1, 1)
3406    DEP_FIELD(SMMU_CB5_PMAUTHSTATUS, NSE, 1, 0)
3407DEP_REG32(SMMU_CB6_SCTLR, 0x16000)
3408    DEP_FIELD(SMMU_CB6_SCTLR, NSCFG, 2, 28)
3409    DEP_FIELD(SMMU_CB6_SCTLR, WACFG, 2, 26)
3410    DEP_FIELD(SMMU_CB6_SCTLR, RACFG, 2, 24)
3411    DEP_FIELD(SMMU_CB6_SCTLR, SHCFG, 2, 22)
3412    DEP_FIELD(SMMU_CB6_SCTLR, FB, 1, 21)
3413    DEP_FIELD(SMMU_CB6_SCTLR, MTCFG, 1, 20)
3414    DEP_FIELD(SMMU_CB6_SCTLR, MEMATTR, 4, 16)
3415    DEP_FIELD(SMMU_CB6_SCTLR, TRANSIENTCFG, 2, 14)
3416    DEP_FIELD(SMMU_CB6_SCTLR, PTW, 1, 13)
3417    DEP_FIELD(SMMU_CB6_SCTLR, ASIDPNE, 1, 12)
3418    DEP_FIELD(SMMU_CB6_SCTLR, UWXN, 1, 10)
3419    DEP_FIELD(SMMU_CB6_SCTLR, WXN, 1, 9)
3420    DEP_FIELD(SMMU_CB6_SCTLR, HUPCF, 1, 8)
3421    DEP_FIELD(SMMU_CB6_SCTLR, CFCFG, 1, 7)
3422    DEP_FIELD(SMMU_CB6_SCTLR, CFIE, 1, 6)
3423    DEP_FIELD(SMMU_CB6_SCTLR, CFRE, 1, 5)
3424    DEP_FIELD(SMMU_CB6_SCTLR, E, 1, 4)
3425    DEP_FIELD(SMMU_CB6_SCTLR, AFFD, 1, 3)
3426    DEP_FIELD(SMMU_CB6_SCTLR, AFE, 1, 2)
3427    DEP_FIELD(SMMU_CB6_SCTLR, TRE, 1, 1)
3428    DEP_FIELD(SMMU_CB6_SCTLR, M, 1, 0)
3429DEP_REG32(SMMU_CB6_ACTLR, 0x16004)
3430    DEP_FIELD(SMMU_CB6_ACTLR, CPRE, 1, 1)
3431    DEP_FIELD(SMMU_CB6_ACTLR, CMTLB, 1, 0)
3432DEP_REG32(SMMU_CB6_RESUME, 0x16008)
3433    DEP_FIELD(SMMU_CB6_RESUME, TNR, 1, 0)
3434DEP_REG32(SMMU_CB6_TCR2, 0x16010)
3435    DEP_FIELD(SMMU_CB6_TCR2, NSCFG1, 1, 30)
3436    DEP_FIELD(SMMU_CB6_TCR2, SEP, 3, 15)
3437    DEP_FIELD(SMMU_CB6_TCR2, NSCFG0, 1, 14)
3438    DEP_FIELD(SMMU_CB6_TCR2, TBI1, 1, 6)
3439    DEP_FIELD(SMMU_CB6_TCR2, TBI0, 1, 5)
3440    DEP_FIELD(SMMU_CB6_TCR2, AS, 1, 4)
3441    DEP_FIELD(SMMU_CB6_TCR2, PASIZE, 3, 0)
3442DEP_REG32(SMMU_CB6_TTBR0_LOW, 0x16020)
3443    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_31_7, 25, 7)
3444    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
3445    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
3446    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
3447    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_2, 1, 2)
3448    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_1_S, 1, 1)
3449    DEP_FIELD(SMMU_CB6_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
3450DEP_REG32(SMMU_CB6_TTBR0_HIGH, 0x16024)
3451    DEP_FIELD(SMMU_CB6_TTBR0_HIGH, ASID, 16, 16)
3452    DEP_FIELD(SMMU_CB6_TTBR0_HIGH, ADDRESS, 16, 0)
3453DEP_REG32(SMMU_CB6_TTBR1_LOW, 0x16028)
3454    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_31_7, 25, 7)
3455    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
3456    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
3457    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
3458    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_2, 1, 2)
3459    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_1_S, 1, 1)
3460    DEP_FIELD(SMMU_CB6_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
3461DEP_REG32(SMMU_CB6_TTBR1_HIGH, 0x1602c)
3462    DEP_FIELD(SMMU_CB6_TTBR1_HIGH, ASID, 16, 16)
3463    DEP_FIELD(SMMU_CB6_TTBR1_HIGH, ADDRESS, 16, 0)
3464DEP_REG32(SMMU_CB6_TCR_LPAE, 0x16030)
3465    DEP_FIELD(SMMU_CB6_TCR_LPAE, EAE, 1, 31)
3466    DEP_FIELD(SMMU_CB6_TCR_LPAE, NSCFG1_TG1, 1, 30)
3467    DEP_FIELD(SMMU_CB6_TCR_LPAE, SH1, 2, 28)
3468    DEP_FIELD(SMMU_CB6_TCR_LPAE, ORGN1, 2, 26)
3469    DEP_FIELD(SMMU_CB6_TCR_LPAE, IRGN1, 2, 24)
3470    DEP_FIELD(SMMU_CB6_TCR_LPAE, EPD1, 1, 23)
3471    DEP_FIELD(SMMU_CB6_TCR_LPAE, A1, 1, 22)
3472    DEP_FIELD(SMMU_CB6_TCR_LPAE, T1SZ_5_3, 3, 19)
3473    DEP_FIELD(SMMU_CB6_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
3474    DEP_FIELD(SMMU_CB6_TCR_LPAE, NSCFG0_TG0, 1, 14)
3475    DEP_FIELD(SMMU_CB6_TCR_LPAE, SH0, 2, 12)
3476    DEP_FIELD(SMMU_CB6_TCR_LPAE, ORGN0, 2, 10)
3477    DEP_FIELD(SMMU_CB6_TCR_LPAE, IRGN0, 2, 8)
3478    DEP_FIELD(SMMU_CB6_TCR_LPAE, SL0_1_EPD0, 1, 7)
3479    DEP_FIELD(SMMU_CB6_TCR_LPAE, SL0_0, 1, 6)
3480    DEP_FIELD(SMMU_CB6_TCR_LPAE, PD1_T0SZ_5, 1, 5)
3481    DEP_FIELD(SMMU_CB6_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
3482    DEP_FIELD(SMMU_CB6_TCR_LPAE, T0SZ_3_0, 4, 0)
3483DEP_REG32(SMMU_CB6_CONTEXTIDR, 0x16034)
3484    DEP_FIELD(SMMU_CB6_CONTEXTIDR, PROCID, 24, 8)
3485    DEP_FIELD(SMMU_CB6_CONTEXTIDR, ASID, 8, 0)
3486DEP_REG32(SMMU_CB6_PRRR_MAIR0, 0x16038)
3487    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS7, 1, 31)
3488    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS6, 1, 30)
3489    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS5, 1, 29)
3490    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS4, 1, 28)
3491    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS3, 1, 27)
3492    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS2, 1, 26)
3493    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS1, 1, 25)
3494    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NOS0, 1, 24)
3495    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NS1, 1, 19)
3496    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, NS0, 1, 18)
3497    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, DS1, 1, 17)
3498    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, DS0, 1, 16)
3499    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR7, 2, 14)
3500    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR6, 2, 12)
3501    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR5, 2, 10)
3502    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR4, 2, 8)
3503    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR3, 2, 6)
3504    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR2, 2, 4)
3505    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR1, 2, 2)
3506    DEP_FIELD(SMMU_CB6_PRRR_MAIR0, TR0, 2, 0)
3507DEP_REG32(SMMU_CB6_NMRR_MAIR1, 0x1603c)
3508    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR7, 2, 30)
3509    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR6, 2, 28)
3510    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR5, 2, 26)
3511    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR4, 2, 24)
3512    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR3, 2, 22)
3513    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR2, 2, 20)
3514    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR1, 2, 18)
3515    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, OR0, 2, 16)
3516    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR7, 2, 14)
3517    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR6, 2, 12)
3518    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR5, 2, 10)
3519    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR4, 2, 8)
3520    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR3, 2, 6)
3521    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR2, 2, 4)
3522    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR1, 2, 2)
3523    DEP_FIELD(SMMU_CB6_NMRR_MAIR1, IR0, 2, 0)
3524DEP_REG32(SMMU_CB6_FSR, 0x16058)
3525    DEP_FIELD(SMMU_CB6_FSR, MULTI, 1, 31)
3526    DEP_FIELD(SMMU_CB6_FSR, SS, 1, 30)
3527    DEP_FIELD(SMMU_CB6_FSR, FORMAT, 2, 9)
3528    DEP_FIELD(SMMU_CB6_FSR, UUT, 1, 8)
3529    DEP_FIELD(SMMU_CB6_FSR, ASF, 1, 7)
3530    DEP_FIELD(SMMU_CB6_FSR, TLBLKF, 1, 6)
3531    DEP_FIELD(SMMU_CB6_FSR, TLBMCF, 1, 5)
3532    DEP_FIELD(SMMU_CB6_FSR, EF, 1, 4)
3533    DEP_FIELD(SMMU_CB6_FSR, PF, 1, 3)
3534    DEP_FIELD(SMMU_CB6_FSR, AFF, 1, 2)
3535    DEP_FIELD(SMMU_CB6_FSR, TF, 1, 1)
3536DEP_REG32(SMMU_CB6_FSRRESTORE, 0x1605c)
3537DEP_REG32(SMMU_CB6_FAR_LOW, 0x16060)
3538DEP_REG32(SMMU_CB6_FAR_HIGH, 0x16064)
3539    DEP_FIELD(SMMU_CB6_FAR_HIGH, BITS, 17, 0)
3540DEP_REG32(SMMU_CB6_FSYNR0, 0x16068)
3541    DEP_FIELD(SMMU_CB6_FSYNR0, S1CBNDX, 4, 16)
3542    DEP_FIELD(SMMU_CB6_FSYNR0, AFR, 1, 11)
3543    DEP_FIELD(SMMU_CB6_FSYNR0, PTWF, 1, 10)
3544    DEP_FIELD(SMMU_CB6_FSYNR0, ATOF, 1, 9)
3545    DEP_FIELD(SMMU_CB6_FSYNR0, NSATTR, 1, 8)
3546    DEP_FIELD(SMMU_CB6_FSYNR0, IND, 1, 6)
3547    DEP_FIELD(SMMU_CB6_FSYNR0, PNU, 1, 5)
3548    DEP_FIELD(SMMU_CB6_FSYNR0, WNR, 1, 4)
3549    DEP_FIELD(SMMU_CB6_FSYNR0, PLVL, 2, 0)
3550DEP_REG32(SMMU_CB6_IPAFAR_LOW, 0x16070)
3551    DEP_FIELD(SMMU_CB6_IPAFAR_LOW, IPAFAR_L, 20, 12)
3552    DEP_FIELD(SMMU_CB6_IPAFAR_LOW, FAR_RO, 12, 0)
3553DEP_REG32(SMMU_CB6_IPAFAR_HIGH, 0x16074)
3554    DEP_FIELD(SMMU_CB6_IPAFAR_HIGH, BITS, 16, 0)
3555DEP_REG32(SMMU_CB6_TLBIVA_LOW, 0x16600)
3556DEP_REG32(SMMU_CB6_TLBIVA_HIGH, 0x16604)
3557    DEP_FIELD(SMMU_CB6_TLBIVA_HIGH, ASID, 16, 16)
3558    DEP_FIELD(SMMU_CB6_TLBIVA_HIGH, ADDRESS, 5, 0)
3559DEP_REG32(SMMU_CB6_TLBIVAA_LOW, 0x16608)
3560DEP_REG32(SMMU_CB6_TLBIVAA_HIGH, 0x1660c)
3561    DEP_FIELD(SMMU_CB6_TLBIVAA_HIGH, ASID, 16, 16)
3562    DEP_FIELD(SMMU_CB6_TLBIVAA_HIGH, ADDRESS, 5, 0)
3563DEP_REG32(SMMU_CB6_TLBIASID, 0x16610)
3564    DEP_FIELD(SMMU_CB6_TLBIASID, ASID, 16, 0)
3565DEP_REG32(SMMU_CB6_TLBIALL, 0x16618)
3566DEP_REG32(SMMU_CB6_TLBIVAL_LOW, 0x16620)
3567DEP_REG32(SMMU_CB6_TLBIVAL_HIGH, 0x16624)
3568    DEP_FIELD(SMMU_CB6_TLBIVAL_HIGH, ASID, 16, 16)
3569    DEP_FIELD(SMMU_CB6_TLBIVAL_HIGH, ADDRESS, 5, 0)
3570DEP_REG32(SMMU_CB6_TLBIVAAL_LOW, 0x16628)
3571DEP_REG32(SMMU_CB6_TLBIVAAL_HIGH, 0x1662c)
3572    DEP_FIELD(SMMU_CB6_TLBIVAAL_HIGH, ASID, 16, 16)
3573    DEP_FIELD(SMMU_CB6_TLBIVAAL_HIGH, ADDRESS, 5, 0)
3574DEP_REG32(SMMU_CB6_TLBIIPAS2_LOW, 0x16630)
3575DEP_REG32(SMMU_CB6_TLBIIPAS2_HIGH, 0x16634)
3576    DEP_FIELD(SMMU_CB6_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
3577DEP_REG32(SMMU_CB6_TLBIIPAS2L_LOW, 0x16638)
3578DEP_REG32(SMMU_CB6_TLBIIPAS2L_HIGH, 0x1663c)
3579    DEP_FIELD(SMMU_CB6_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
3580DEP_REG32(SMMU_CB6_TLBSYNC, 0x167f0)
3581DEP_REG32(SMMU_CB6_TLBSTATUS, 0x167f4)
3582    DEP_FIELD(SMMU_CB6_TLBSTATUS, SACTIVE, 1, 0)
3583DEP_REG32(SMMU_CB6_PMEVCNTR0, 0x16e00)
3584DEP_REG32(SMMU_CB6_PMEVCNTR1, 0x16e04)
3585DEP_REG32(SMMU_CB6_PMEVCNTR2, 0x16e08)
3586DEP_REG32(SMMU_CB6_PMEVCNTR3, 0x16e0c)
3587DEP_REG32(SMMU_CB6_PMEVTYPER0, 0x16e80)
3588    DEP_FIELD(SMMU_CB6_PMEVTYPER0, P, 1, 31)
3589    DEP_FIELD(SMMU_CB6_PMEVTYPER0, U, 1, 30)
3590    DEP_FIELD(SMMU_CB6_PMEVTYPER0, NSP, 1, 29)
3591    DEP_FIELD(SMMU_CB6_PMEVTYPER0, NSU, 1, 28)
3592    DEP_FIELD(SMMU_CB6_PMEVTYPER0, EVENT, 5, 0)
3593DEP_REG32(SMMU_CB6_PMEVTYPER1, 0x16e84)
3594    DEP_FIELD(SMMU_CB6_PMEVTYPER1, P, 1, 31)
3595    DEP_FIELD(SMMU_CB6_PMEVTYPER1, U, 1, 30)
3596    DEP_FIELD(SMMU_CB6_PMEVTYPER1, NSP, 1, 29)
3597    DEP_FIELD(SMMU_CB6_PMEVTYPER1, NSU, 1, 28)
3598    DEP_FIELD(SMMU_CB6_PMEVTYPER1, EVENT, 5, 0)
3599DEP_REG32(SMMU_CB6_PMEVTYPER2, 0x16e88)
3600    DEP_FIELD(SMMU_CB6_PMEVTYPER2, P, 1, 31)
3601    DEP_FIELD(SMMU_CB6_PMEVTYPER2, U, 1, 30)
3602    DEP_FIELD(SMMU_CB6_PMEVTYPER2, NSP, 1, 29)
3603    DEP_FIELD(SMMU_CB6_PMEVTYPER2, NSU, 1, 28)
3604    DEP_FIELD(SMMU_CB6_PMEVTYPER2, EVENT, 5, 0)
3605DEP_REG32(SMMU_CB6_PMEVTYPER3, 0x16e8c)
3606    DEP_FIELD(SMMU_CB6_PMEVTYPER3, P, 1, 31)
3607    DEP_FIELD(SMMU_CB6_PMEVTYPER3, U, 1, 30)
3608    DEP_FIELD(SMMU_CB6_PMEVTYPER3, NSP, 1, 29)
3609    DEP_FIELD(SMMU_CB6_PMEVTYPER3, NSU, 1, 28)
3610    DEP_FIELD(SMMU_CB6_PMEVTYPER3, EVENT, 5, 0)
3611DEP_REG32(SMMU_CB6_PMCFGR, 0x16f00)
3612    DEP_FIELD(SMMU_CB6_PMCFGR, NCG, 8, 24)
3613    DEP_FIELD(SMMU_CB6_PMCFGR, UEN, 1, 19)
3614    DEP_FIELD(SMMU_CB6_PMCFGR, EX, 1, 16)
3615    DEP_FIELD(SMMU_CB6_PMCFGR, CCD, 1, 15)
3616    DEP_FIELD(SMMU_CB6_PMCFGR, CC, 1, 14)
3617    DEP_FIELD(SMMU_CB6_PMCFGR, SIZE, 6, 8)
3618    DEP_FIELD(SMMU_CB6_PMCFGR, N, 8, 0)
3619DEP_REG32(SMMU_CB6_PMCR, 0x16f04)
3620    DEP_FIELD(SMMU_CB6_PMCR, IMP, 8, 24)
3621    DEP_FIELD(SMMU_CB6_PMCR, X, 1, 4)
3622    DEP_FIELD(SMMU_CB6_PMCR, P, 1, 1)
3623    DEP_FIELD(SMMU_CB6_PMCR, E, 1, 0)
3624DEP_REG32(SMMU_CB6_PMCEID, 0x16f20)
3625    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X12, 1, 17)
3626    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X11, 1, 16)
3627    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X10, 1, 15)
3628    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X0A, 1, 9)
3629    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X09, 1, 8)
3630    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X08, 1, 7)
3631    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X01, 1, 1)
3632    DEP_FIELD(SMMU_CB6_PMCEID, EVENT0X00, 1, 0)
3633DEP_REG32(SMMU_CB6_PMCNTENSE, 0x16f40)
3634    DEP_FIELD(SMMU_CB6_PMCNTENSE, P3, 1, 3)
3635    DEP_FIELD(SMMU_CB6_PMCNTENSE, P2, 1, 2)
3636    DEP_FIELD(SMMU_CB6_PMCNTENSE, P1, 1, 1)
3637    DEP_FIELD(SMMU_CB6_PMCNTENSE, P0, 1, 0)
3638DEP_REG32(SMMU_CB6_PMCNTENCLR, 0x16f44)
3639    DEP_FIELD(SMMU_CB6_PMCNTENCLR, P3, 1, 3)
3640    DEP_FIELD(SMMU_CB6_PMCNTENCLR, P2, 1, 2)
3641    DEP_FIELD(SMMU_CB6_PMCNTENCLR, P1, 1, 1)
3642    DEP_FIELD(SMMU_CB6_PMCNTENCLR, P0, 1, 0)
3643DEP_REG32(SMMU_CB6_PMCNTENSET, 0x16f48)
3644    DEP_FIELD(SMMU_CB6_PMCNTENSET, P3, 1, 3)
3645    DEP_FIELD(SMMU_CB6_PMCNTENSET, P2, 1, 2)
3646    DEP_FIELD(SMMU_CB6_PMCNTENSET, P1, 1, 1)
3647    DEP_FIELD(SMMU_CB6_PMCNTENSET, P0, 1, 0)
3648DEP_REG32(SMMU_CB6_PMINTENCLR, 0x16f4c)
3649    DEP_FIELD(SMMU_CB6_PMINTENCLR, P3, 1, 3)
3650    DEP_FIELD(SMMU_CB6_PMINTENCLR, P2, 1, 2)
3651    DEP_FIELD(SMMU_CB6_PMINTENCLR, P1, 1, 1)
3652    DEP_FIELD(SMMU_CB6_PMINTENCLR, P0, 1, 0)
3653DEP_REG32(SMMU_CB6_PMOVSCLR, 0x16f50)
3654    DEP_FIELD(SMMU_CB6_PMOVSCLR, P3, 1, 3)
3655    DEP_FIELD(SMMU_CB6_PMOVSCLR, P2, 1, 2)
3656    DEP_FIELD(SMMU_CB6_PMOVSCLR, P1, 1, 1)
3657    DEP_FIELD(SMMU_CB6_PMOVSCLR, P0, 1, 0)
3658DEP_REG32(SMMU_CB6_PMOVSSET, 0x16f58)
3659    DEP_FIELD(SMMU_CB6_PMOVSSET, P3, 1, 3)
3660    DEP_FIELD(SMMU_CB6_PMOVSSET, P2, 1, 2)
3661    DEP_FIELD(SMMU_CB6_PMOVSSET, P1, 1, 1)
3662    DEP_FIELD(SMMU_CB6_PMOVSSET, P0, 1, 0)
3663DEP_REG32(SMMU_CB6_PMAUTHSTATUS, 0x16fb8)
3664    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, SNI, 1, 7)
3665    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, SNE, 1, 6)
3666    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, SI, 1, 5)
3667    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, SE, 1, 4)
3668    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, NSNI, 1, 3)
3669    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, NSNE, 1, 2)
3670    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, NSI, 1, 1)
3671    DEP_FIELD(SMMU_CB6_PMAUTHSTATUS, NSE, 1, 0)
3672DEP_REG32(SMMU_CB7_SCTLR, 0x17000)
3673    DEP_FIELD(SMMU_CB7_SCTLR, NSCFG, 2, 28)
3674    DEP_FIELD(SMMU_CB7_SCTLR, WACFG, 2, 26)
3675    DEP_FIELD(SMMU_CB7_SCTLR, RACFG, 2, 24)
3676    DEP_FIELD(SMMU_CB7_SCTLR, SHCFG, 2, 22)
3677    DEP_FIELD(SMMU_CB7_SCTLR, FB, 1, 21)
3678    DEP_FIELD(SMMU_CB7_SCTLR, MTCFG, 1, 20)
3679    DEP_FIELD(SMMU_CB7_SCTLR, MEMATTR, 4, 16)
3680    DEP_FIELD(SMMU_CB7_SCTLR, TRANSIENTCFG, 2, 14)
3681    DEP_FIELD(SMMU_CB7_SCTLR, PTW, 1, 13)
3682    DEP_FIELD(SMMU_CB7_SCTLR, ASIDPNE, 1, 12)
3683    DEP_FIELD(SMMU_CB7_SCTLR, UWXN, 1, 10)
3684    DEP_FIELD(SMMU_CB7_SCTLR, WXN, 1, 9)
3685    DEP_FIELD(SMMU_CB7_SCTLR, HUPCF, 1, 8)
3686    DEP_FIELD(SMMU_CB7_SCTLR, CFCFG, 1, 7)
3687    DEP_FIELD(SMMU_CB7_SCTLR, CFIE, 1, 6)
3688    DEP_FIELD(SMMU_CB7_SCTLR, CFRE, 1, 5)
3689    DEP_FIELD(SMMU_CB7_SCTLR, E, 1, 4)
3690    DEP_FIELD(SMMU_CB7_SCTLR, AFFD, 1, 3)
3691    DEP_FIELD(SMMU_CB7_SCTLR, AFE, 1, 2)
3692    DEP_FIELD(SMMU_CB7_SCTLR, TRE, 1, 1)
3693    DEP_FIELD(SMMU_CB7_SCTLR, M, 1, 0)
3694DEP_REG32(SMMU_CB7_ACTLR, 0x17004)
3695    DEP_FIELD(SMMU_CB7_ACTLR, CPRE, 1, 1)
3696    DEP_FIELD(SMMU_CB7_ACTLR, CMTLB, 1, 0)
3697DEP_REG32(SMMU_CB7_RESUME, 0x17008)
3698    DEP_FIELD(SMMU_CB7_RESUME, TNR, 1, 0)
3699DEP_REG32(SMMU_CB7_TCR2, 0x17010)
3700    DEP_FIELD(SMMU_CB7_TCR2, NSCFG1, 1, 30)
3701    DEP_FIELD(SMMU_CB7_TCR2, SEP, 3, 15)
3702    DEP_FIELD(SMMU_CB7_TCR2, NSCFG0, 1, 14)
3703    DEP_FIELD(SMMU_CB7_TCR2, TBI1, 1, 6)
3704    DEP_FIELD(SMMU_CB7_TCR2, TBI0, 1, 5)
3705    DEP_FIELD(SMMU_CB7_TCR2, AS, 1, 4)
3706    DEP_FIELD(SMMU_CB7_TCR2, PASIZE, 3, 0)
3707DEP_REG32(SMMU_CB7_TTBR0_LOW, 0x17020)
3708    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_31_7, 25, 7)
3709    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
3710    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
3711    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
3712    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_2, 1, 2)
3713    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_1_S, 1, 1)
3714    DEP_FIELD(SMMU_CB7_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
3715DEP_REG32(SMMU_CB7_TTBR0_HIGH, 0x17024)
3716    DEP_FIELD(SMMU_CB7_TTBR0_HIGH, ASID, 16, 16)
3717    DEP_FIELD(SMMU_CB7_TTBR0_HIGH, ADDRESS, 16, 0)
3718DEP_REG32(SMMU_CB7_TTBR1_LOW, 0x17028)
3719    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_31_7, 25, 7)
3720    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
3721    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
3722    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
3723    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_2, 1, 2)
3724    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_1_S, 1, 1)
3725    DEP_FIELD(SMMU_CB7_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
3726DEP_REG32(SMMU_CB7_TTBR1_HIGH, 0x1702c)
3727    DEP_FIELD(SMMU_CB7_TTBR1_HIGH, ASID, 16, 16)
3728    DEP_FIELD(SMMU_CB7_TTBR1_HIGH, ADDRESS, 16, 0)
3729DEP_REG32(SMMU_CB7_TCR_LPAE, 0x17030)
3730    DEP_FIELD(SMMU_CB7_TCR_LPAE, EAE, 1, 31)
3731    DEP_FIELD(SMMU_CB7_TCR_LPAE, NSCFG1_TG1, 1, 30)
3732    DEP_FIELD(SMMU_CB7_TCR_LPAE, SH1, 2, 28)
3733    DEP_FIELD(SMMU_CB7_TCR_LPAE, ORGN1, 2, 26)
3734    DEP_FIELD(SMMU_CB7_TCR_LPAE, IRGN1, 2, 24)
3735    DEP_FIELD(SMMU_CB7_TCR_LPAE, EPD1, 1, 23)
3736    DEP_FIELD(SMMU_CB7_TCR_LPAE, A1, 1, 22)
3737    DEP_FIELD(SMMU_CB7_TCR_LPAE, T1SZ_5_3, 3, 19)
3738    DEP_FIELD(SMMU_CB7_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
3739    DEP_FIELD(SMMU_CB7_TCR_LPAE, NSCFG0_TG0, 1, 14)
3740    DEP_FIELD(SMMU_CB7_TCR_LPAE, SH0, 2, 12)
3741    DEP_FIELD(SMMU_CB7_TCR_LPAE, ORGN0, 2, 10)
3742    DEP_FIELD(SMMU_CB7_TCR_LPAE, IRGN0, 2, 8)
3743    DEP_FIELD(SMMU_CB7_TCR_LPAE, SL0_1_EPD0, 1, 7)
3744    DEP_FIELD(SMMU_CB7_TCR_LPAE, SL0_0, 1, 6)
3745    DEP_FIELD(SMMU_CB7_TCR_LPAE, PD1_T0SZ_5, 1, 5)
3746    DEP_FIELD(SMMU_CB7_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
3747    DEP_FIELD(SMMU_CB7_TCR_LPAE, T0SZ_3_0, 4, 0)
3748DEP_REG32(SMMU_CB7_CONTEXTIDR, 0x17034)
3749    DEP_FIELD(SMMU_CB7_CONTEXTIDR, PROCID, 24, 8)
3750    DEP_FIELD(SMMU_CB7_CONTEXTIDR, ASID, 8, 0)
3751DEP_REG32(SMMU_CB7_PRRR_MAIR0, 0x17038)
3752    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS7, 1, 31)
3753    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS6, 1, 30)
3754    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS5, 1, 29)
3755    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS4, 1, 28)
3756    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS3, 1, 27)
3757    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS2, 1, 26)
3758    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS1, 1, 25)
3759    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NOS0, 1, 24)
3760    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NS1, 1, 19)
3761    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, NS0, 1, 18)
3762    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, DS1, 1, 17)
3763    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, DS0, 1, 16)
3764    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR7, 2, 14)
3765    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR6, 2, 12)
3766    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR5, 2, 10)
3767    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR4, 2, 8)
3768    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR3, 2, 6)
3769    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR2, 2, 4)
3770    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR1, 2, 2)
3771    DEP_FIELD(SMMU_CB7_PRRR_MAIR0, TR0, 2, 0)
3772DEP_REG32(SMMU_CB7_NMRR_MAIR1, 0x1703c)
3773    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR7, 2, 30)
3774    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR6, 2, 28)
3775    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR5, 2, 26)
3776    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR4, 2, 24)
3777    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR3, 2, 22)
3778    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR2, 2, 20)
3779    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR1, 2, 18)
3780    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, OR0, 2, 16)
3781    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR7, 2, 14)
3782    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR6, 2, 12)
3783    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR5, 2, 10)
3784    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR4, 2, 8)
3785    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR3, 2, 6)
3786    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR2, 2, 4)
3787    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR1, 2, 2)
3788    DEP_FIELD(SMMU_CB7_NMRR_MAIR1, IR0, 2, 0)
3789DEP_REG32(SMMU_CB7_FSR, 0x17058)
3790    DEP_FIELD(SMMU_CB7_FSR, MULTI, 1, 31)
3791    DEP_FIELD(SMMU_CB7_FSR, SS, 1, 30)
3792    DEP_FIELD(SMMU_CB7_FSR, FORMAT, 2, 9)
3793    DEP_FIELD(SMMU_CB7_FSR, UUT, 1, 8)
3794    DEP_FIELD(SMMU_CB7_FSR, ASF, 1, 7)
3795    DEP_FIELD(SMMU_CB7_FSR, TLBLKF, 1, 6)
3796    DEP_FIELD(SMMU_CB7_FSR, TLBMCF, 1, 5)
3797    DEP_FIELD(SMMU_CB7_FSR, EF, 1, 4)
3798    DEP_FIELD(SMMU_CB7_FSR, PF, 1, 3)
3799    DEP_FIELD(SMMU_CB7_FSR, AFF, 1, 2)
3800    DEP_FIELD(SMMU_CB7_FSR, TF, 1, 1)
3801DEP_REG32(SMMU_CB7_FSRRESTORE, 0x1705c)
3802DEP_REG32(SMMU_CB7_FAR_LOW, 0x17060)
3803DEP_REG32(SMMU_CB7_FAR_HIGH, 0x17064)
3804    DEP_FIELD(SMMU_CB7_FAR_HIGH, BITS, 17, 0)
3805DEP_REG32(SMMU_CB7_FSYNR0, 0x17068)
3806    DEP_FIELD(SMMU_CB7_FSYNR0, S1CBNDX, 4, 16)
3807    DEP_FIELD(SMMU_CB7_FSYNR0, AFR, 1, 11)
3808    DEP_FIELD(SMMU_CB7_FSYNR0, PTWF, 1, 10)
3809    DEP_FIELD(SMMU_CB7_FSYNR0, ATOF, 1, 9)
3810    DEP_FIELD(SMMU_CB7_FSYNR0, NSATTR, 1, 8)
3811    DEP_FIELD(SMMU_CB7_FSYNR0, IND, 1, 6)
3812    DEP_FIELD(SMMU_CB7_FSYNR0, PNU, 1, 5)
3813    DEP_FIELD(SMMU_CB7_FSYNR0, WNR, 1, 4)
3814    DEP_FIELD(SMMU_CB7_FSYNR0, PLVL, 2, 0)
3815DEP_REG32(SMMU_CB7_IPAFAR_LOW, 0x17070)
3816    DEP_FIELD(SMMU_CB7_IPAFAR_LOW, IPAFAR_L, 20, 12)
3817    DEP_FIELD(SMMU_CB7_IPAFAR_LOW, FAR_RO, 12, 0)
3818DEP_REG32(SMMU_CB7_IPAFAR_HIGH, 0x17074)
3819    DEP_FIELD(SMMU_CB7_IPAFAR_HIGH, BITS, 16, 0)
3820DEP_REG32(SMMU_CB7_TLBIVA_LOW, 0x17600)
3821DEP_REG32(SMMU_CB7_TLBIVA_HIGH, 0x17604)
3822    DEP_FIELD(SMMU_CB7_TLBIVA_HIGH, ASID, 16, 16)
3823    DEP_FIELD(SMMU_CB7_TLBIVA_HIGH, ADDRESS, 5, 0)
3824DEP_REG32(SMMU_CB7_TLBIVAA_LOW, 0x17608)
3825DEP_REG32(SMMU_CB7_TLBIVAA_HIGH, 0x1760c)
3826    DEP_FIELD(SMMU_CB7_TLBIVAA_HIGH, ASID, 16, 16)
3827    DEP_FIELD(SMMU_CB7_TLBIVAA_HIGH, ADDRESS, 5, 0)
3828DEP_REG32(SMMU_CB7_TLBIASID, 0x17610)
3829    DEP_FIELD(SMMU_CB7_TLBIASID, ASID, 16, 0)
3830DEP_REG32(SMMU_CB7_TLBIALL, 0x17618)
3831DEP_REG32(SMMU_CB7_TLBIVAL_LOW, 0x17620)
3832DEP_REG32(SMMU_CB7_TLBIVAL_HIGH, 0x17624)
3833    DEP_FIELD(SMMU_CB7_TLBIVAL_HIGH, ASID, 16, 16)
3834    DEP_FIELD(SMMU_CB7_TLBIVAL_HIGH, ADDRESS, 5, 0)
3835DEP_REG32(SMMU_CB7_TLBIVAAL_LOW, 0x17628)
3836DEP_REG32(SMMU_CB7_TLBIVAAL_HIGH, 0x1762c)
3837    DEP_FIELD(SMMU_CB7_TLBIVAAL_HIGH, ASID, 16, 16)
3838    DEP_FIELD(SMMU_CB7_TLBIVAAL_HIGH, ADDRESS, 5, 0)
3839DEP_REG32(SMMU_CB7_TLBIIPAS2_LOW, 0x17630)
3840DEP_REG32(SMMU_CB7_TLBIIPAS2_HIGH, 0x17634)
3841    DEP_FIELD(SMMU_CB7_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
3842DEP_REG32(SMMU_CB7_TLBIIPAS2L_LOW, 0x17638)
3843DEP_REG32(SMMU_CB7_TLBIIPAS2L_HIGH, 0x1763c)
3844    DEP_FIELD(SMMU_CB7_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
3845DEP_REG32(SMMU_CB7_TLBSYNC, 0x177f0)
3846DEP_REG32(SMMU_CB7_TLBSTATUS, 0x177f4)
3847    DEP_FIELD(SMMU_CB7_TLBSTATUS, SACTIVE, 1, 0)
3848DEP_REG32(SMMU_CB7_PMEVCNTR0, 0x17e00)
3849DEP_REG32(SMMU_CB7_PMEVCNTR1, 0x17e04)
3850DEP_REG32(SMMU_CB7_PMEVCNTR2, 0x17e08)
3851DEP_REG32(SMMU_CB7_PMEVCNTR3, 0x17e0c)
3852DEP_REG32(SMMU_CB7_PMEVTYPER0, 0x17e80)
3853    DEP_FIELD(SMMU_CB7_PMEVTYPER0, P, 1, 31)
3854    DEP_FIELD(SMMU_CB7_PMEVTYPER0, U, 1, 30)
3855    DEP_FIELD(SMMU_CB7_PMEVTYPER0, NSP, 1, 29)
3856    DEP_FIELD(SMMU_CB7_PMEVTYPER0, NSU, 1, 28)
3857    DEP_FIELD(SMMU_CB7_PMEVTYPER0, EVENT, 5, 0)
3858DEP_REG32(SMMU_CB7_PMEVTYPER1, 0x17e84)
3859    DEP_FIELD(SMMU_CB7_PMEVTYPER1, P, 1, 31)
3860    DEP_FIELD(SMMU_CB7_PMEVTYPER1, U, 1, 30)
3861    DEP_FIELD(SMMU_CB7_PMEVTYPER1, NSP, 1, 29)
3862    DEP_FIELD(SMMU_CB7_PMEVTYPER1, NSU, 1, 28)
3863    DEP_FIELD(SMMU_CB7_PMEVTYPER1, EVENT, 5, 0)
3864DEP_REG32(SMMU_CB7_PMEVTYPER2, 0x17e88)
3865    DEP_FIELD(SMMU_CB7_PMEVTYPER2, P, 1, 31)
3866    DEP_FIELD(SMMU_CB7_PMEVTYPER2, U, 1, 30)
3867    DEP_FIELD(SMMU_CB7_PMEVTYPER2, NSP, 1, 29)
3868    DEP_FIELD(SMMU_CB7_PMEVTYPER2, NSU, 1, 28)
3869    DEP_FIELD(SMMU_CB7_PMEVTYPER2, EVENT, 5, 0)
3870DEP_REG32(SMMU_CB7_PMEVTYPER3, 0x17e8c)
3871    DEP_FIELD(SMMU_CB7_PMEVTYPER3, P, 1, 31)
3872    DEP_FIELD(SMMU_CB7_PMEVTYPER3, U, 1, 30)
3873    DEP_FIELD(SMMU_CB7_PMEVTYPER3, NSP, 1, 29)
3874    DEP_FIELD(SMMU_CB7_PMEVTYPER3, NSU, 1, 28)
3875    DEP_FIELD(SMMU_CB7_PMEVTYPER3, EVENT, 5, 0)
3876DEP_REG32(SMMU_CB7_PMCFGR, 0x17f00)
3877    DEP_FIELD(SMMU_CB7_PMCFGR, NCG, 8, 24)
3878    DEP_FIELD(SMMU_CB7_PMCFGR, UEN, 1, 19)
3879    DEP_FIELD(SMMU_CB7_PMCFGR, EX, 1, 16)
3880    DEP_FIELD(SMMU_CB7_PMCFGR, CCD, 1, 15)
3881    DEP_FIELD(SMMU_CB7_PMCFGR, CC, 1, 14)
3882    DEP_FIELD(SMMU_CB7_PMCFGR, SIZE, 6, 8)
3883    DEP_FIELD(SMMU_CB7_PMCFGR, N, 8, 0)
3884DEP_REG32(SMMU_CB7_PMCR, 0x17f04)
3885    DEP_FIELD(SMMU_CB7_PMCR, IMP, 8, 24)
3886    DEP_FIELD(SMMU_CB7_PMCR, X, 1, 4)
3887    DEP_FIELD(SMMU_CB7_PMCR, P, 1, 1)
3888    DEP_FIELD(SMMU_CB7_PMCR, E, 1, 0)
3889DEP_REG32(SMMU_CB7_PMCEID, 0x17f20)
3890    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X12, 1, 17)
3891    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X11, 1, 16)
3892    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X10, 1, 15)
3893    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X0A, 1, 9)
3894    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X09, 1, 8)
3895    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X08, 1, 7)
3896    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X01, 1, 1)
3897    DEP_FIELD(SMMU_CB7_PMCEID, EVENT0X00, 1, 0)
3898DEP_REG32(SMMU_CB7_PMCNTENSE, 0x17f40)
3899    DEP_FIELD(SMMU_CB7_PMCNTENSE, P3, 1, 3)
3900    DEP_FIELD(SMMU_CB7_PMCNTENSE, P2, 1, 2)
3901    DEP_FIELD(SMMU_CB7_PMCNTENSE, P1, 1, 1)
3902    DEP_FIELD(SMMU_CB7_PMCNTENSE, P0, 1, 0)
3903DEP_REG32(SMMU_CB7_PMCNTENCLR, 0x17f44)
3904    DEP_FIELD(SMMU_CB7_PMCNTENCLR, P3, 1, 3)
3905    DEP_FIELD(SMMU_CB7_PMCNTENCLR, P2, 1, 2)
3906    DEP_FIELD(SMMU_CB7_PMCNTENCLR, P1, 1, 1)
3907    DEP_FIELD(SMMU_CB7_PMCNTENCLR, P0, 1, 0)
3908DEP_REG32(SMMU_CB7_PMCNTENSET, 0x17f48)
3909    DEP_FIELD(SMMU_CB7_PMCNTENSET, P3, 1, 3)
3910    DEP_FIELD(SMMU_CB7_PMCNTENSET, P2, 1, 2)
3911    DEP_FIELD(SMMU_CB7_PMCNTENSET, P1, 1, 1)
3912    DEP_FIELD(SMMU_CB7_PMCNTENSET, P0, 1, 0)
3913DEP_REG32(SMMU_CB7_PMINTENCLR, 0x17f4c)
3914    DEP_FIELD(SMMU_CB7_PMINTENCLR, P3, 1, 3)
3915    DEP_FIELD(SMMU_CB7_PMINTENCLR, P2, 1, 2)
3916    DEP_FIELD(SMMU_CB7_PMINTENCLR, P1, 1, 1)
3917    DEP_FIELD(SMMU_CB7_PMINTENCLR, P0, 1, 0)
3918DEP_REG32(SMMU_CB7_PMOVSCLR, 0x17f50)
3919    DEP_FIELD(SMMU_CB7_PMOVSCLR, P3, 1, 3)
3920    DEP_FIELD(SMMU_CB7_PMOVSCLR, P2, 1, 2)
3921    DEP_FIELD(SMMU_CB7_PMOVSCLR, P1, 1, 1)
3922    DEP_FIELD(SMMU_CB7_PMOVSCLR, P0, 1, 0)
3923DEP_REG32(SMMU_CB7_PMOVSSET, 0x17f58)
3924    DEP_FIELD(SMMU_CB7_PMOVSSET, P3, 1, 3)
3925    DEP_FIELD(SMMU_CB7_PMOVSSET, P2, 1, 2)
3926    DEP_FIELD(SMMU_CB7_PMOVSSET, P1, 1, 1)
3927    DEP_FIELD(SMMU_CB7_PMOVSSET, P0, 1, 0)
3928DEP_REG32(SMMU_CB7_PMAUTHSTATUS, 0x17fb8)
3929    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, SNI, 1, 7)
3930    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, SNE, 1, 6)
3931    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, SI, 1, 5)
3932    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, SE, 1, 4)
3933    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, NSNI, 1, 3)
3934    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, NSNE, 1, 2)
3935    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, NSI, 1, 1)
3936    DEP_FIELD(SMMU_CB7_PMAUTHSTATUS, NSE, 1, 0)
3937DEP_REG32(SMMU_CB8_SCTLR, 0x18000)
3938    DEP_FIELD(SMMU_CB8_SCTLR, NSCFG, 2, 28)
3939    DEP_FIELD(SMMU_CB8_SCTLR, WACFG, 2, 26)
3940    DEP_FIELD(SMMU_CB8_SCTLR, RACFG, 2, 24)
3941    DEP_FIELD(SMMU_CB8_SCTLR, SHCFG, 2, 22)
3942    DEP_FIELD(SMMU_CB8_SCTLR, FB, 1, 21)
3943    DEP_FIELD(SMMU_CB8_SCTLR, MTCFG, 1, 20)
3944    DEP_FIELD(SMMU_CB8_SCTLR, MEMATTR, 4, 16)
3945    DEP_FIELD(SMMU_CB8_SCTLR, TRANSIENTCFG, 2, 14)
3946    DEP_FIELD(SMMU_CB8_SCTLR, PTW, 1, 13)
3947    DEP_FIELD(SMMU_CB8_SCTLR, ASIDPNE, 1, 12)
3948    DEP_FIELD(SMMU_CB8_SCTLR, UWXN, 1, 10)
3949    DEP_FIELD(SMMU_CB8_SCTLR, WXN, 1, 9)
3950    DEP_FIELD(SMMU_CB8_SCTLR, HUPCF, 1, 8)
3951    DEP_FIELD(SMMU_CB8_SCTLR, CFCFG, 1, 7)
3952    DEP_FIELD(SMMU_CB8_SCTLR, CFIE, 1, 6)
3953    DEP_FIELD(SMMU_CB8_SCTLR, CFRE, 1, 5)
3954    DEP_FIELD(SMMU_CB8_SCTLR, E, 1, 4)
3955    DEP_FIELD(SMMU_CB8_SCTLR, AFFD, 1, 3)
3956    DEP_FIELD(SMMU_CB8_SCTLR, AFE, 1, 2)
3957    DEP_FIELD(SMMU_CB8_SCTLR, TRE, 1, 1)
3958    DEP_FIELD(SMMU_CB8_SCTLR, M, 1, 0)
3959DEP_REG32(SMMU_CB8_ACTLR, 0x18004)
3960    DEP_FIELD(SMMU_CB8_ACTLR, CPRE, 1, 1)
3961    DEP_FIELD(SMMU_CB8_ACTLR, CMTLB, 1, 0)
3962DEP_REG32(SMMU_CB8_RESUME, 0x18008)
3963    DEP_FIELD(SMMU_CB8_RESUME, TNR, 1, 0)
3964DEP_REG32(SMMU_CB8_TCR2, 0x18010)
3965    DEP_FIELD(SMMU_CB8_TCR2, NSCFG1, 1, 30)
3966    DEP_FIELD(SMMU_CB8_TCR2, SEP, 3, 15)
3967    DEP_FIELD(SMMU_CB8_TCR2, NSCFG0, 1, 14)
3968    DEP_FIELD(SMMU_CB8_TCR2, TBI1, 1, 6)
3969    DEP_FIELD(SMMU_CB8_TCR2, TBI0, 1, 5)
3970    DEP_FIELD(SMMU_CB8_TCR2, AS, 1, 4)
3971    DEP_FIELD(SMMU_CB8_TCR2, PASIZE, 3, 0)
3972DEP_REG32(SMMU_CB8_TTBR0_LOW, 0x18020)
3973    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_31_7, 25, 7)
3974    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
3975    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
3976    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
3977    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_2, 1, 2)
3978    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_1_S, 1, 1)
3979    DEP_FIELD(SMMU_CB8_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
3980DEP_REG32(SMMU_CB8_TTBR0_HIGH, 0x18024)
3981    DEP_FIELD(SMMU_CB8_TTBR0_HIGH, ASID, 16, 16)
3982    DEP_FIELD(SMMU_CB8_TTBR0_HIGH, ADDRESS, 16, 0)
3983DEP_REG32(SMMU_CB8_TTBR1_LOW, 0x18028)
3984    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_31_7, 25, 7)
3985    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
3986    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
3987    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
3988    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_2, 1, 2)
3989    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_1_S, 1, 1)
3990    DEP_FIELD(SMMU_CB8_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
3991DEP_REG32(SMMU_CB8_TTBR1_HIGH, 0x1802c)
3992    DEP_FIELD(SMMU_CB8_TTBR1_HIGH, ASID, 16, 16)
3993    DEP_FIELD(SMMU_CB8_TTBR1_HIGH, ADDRESS, 16, 0)
3994DEP_REG32(SMMU_CB8_TCR_LPAE, 0x18030)
3995    DEP_FIELD(SMMU_CB8_TCR_LPAE, EAE, 1, 31)
3996    DEP_FIELD(SMMU_CB8_TCR_LPAE, NSCFG1_TG1, 1, 30)
3997    DEP_FIELD(SMMU_CB8_TCR_LPAE, SH1, 2, 28)
3998    DEP_FIELD(SMMU_CB8_TCR_LPAE, ORGN1, 2, 26)
3999    DEP_FIELD(SMMU_CB8_TCR_LPAE, IRGN1, 2, 24)
4000    DEP_FIELD(SMMU_CB8_TCR_LPAE, EPD1, 1, 23)

4001    DEP_FIELD(SMMU_CB8_TCR_LPAE, A1, 1, 22)
4002    DEP_FIELD(SMMU_CB8_TCR_LPAE, T1SZ_5_3, 3, 19)
4003    DEP_FIELD(SMMU_CB8_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
4004    DEP_FIELD(SMMU_CB8_TCR_LPAE, NSCFG0_TG0, 1, 14)
4005    DEP_FIELD(SMMU_CB8_TCR_LPAE, SH0, 2, 12)
4006    DEP_FIELD(SMMU_CB8_TCR_LPAE, ORGN0, 2, 10)
4007    DEP_FIELD(SMMU_CB8_TCR_LPAE, IRGN0, 2, 8)
4008    DEP_FIELD(SMMU_CB8_TCR_LPAE, SL0_1_EPD0, 1, 7)
4009    DEP_FIELD(SMMU_CB8_TCR_LPAE, SL0_0, 1, 6)
4010    DEP_FIELD(SMMU_CB8_TCR_LPAE, PD1_T0SZ_5, 1, 5)
4011    DEP_FIELD(SMMU_CB8_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
4012    DEP_FIELD(SMMU_CB8_TCR_LPAE, T0SZ_3_0, 4, 0)
4013DEP_REG32(SMMU_CB8_CONTEXTIDR, 0x18034)
4014    DEP_FIELD(SMMU_CB8_CONTEXTIDR, PROCID, 24, 8)
4015    DEP_FIELD(SMMU_CB8_CONTEXTIDR, ASID, 8, 0)
4016DEP_REG32(SMMU_CB8_PRRR_MAIR0, 0x18038)
4017    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS7, 1, 31)
4018    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS6, 1, 30)
4019    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS5, 1, 29)
4020    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS4, 1, 28)
4021    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS3, 1, 27)
4022    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS2, 1, 26)
4023    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS1, 1, 25)
4024    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NOS0, 1, 24)
4025    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NS1, 1, 19)
4026    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, NS0, 1, 18)
4027    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, DS1, 1, 17)
4028    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, DS0, 1, 16)
4029    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR7, 2, 14)
4030    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR6, 2, 12)
4031    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR5, 2, 10)
4032    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR4, 2, 8)
4033    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR3, 2, 6)
4034    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR2, 2, 4)
4035    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR1, 2, 2)
4036    DEP_FIELD(SMMU_CB8_PRRR_MAIR0, TR0, 2, 0)
4037DEP_REG32(SMMU_CB8_NMRR_MAIR1, 0x1803c)
4038    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR7, 2, 30)
4039    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR6, 2, 28)
4040    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR5, 2, 26)
4041    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR4, 2, 24)
4042    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR3, 2, 22)
4043    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR2, 2, 20)
4044    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR1, 2, 18)
4045    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, OR0, 2, 16)
4046    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR7, 2, 14)
4047    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR6, 2, 12)
4048    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR5, 2, 10)
4049    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR4, 2, 8)
4050    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR3, 2, 6)
4051    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR2, 2, 4)
4052    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR1, 2, 2)
4053    DEP_FIELD(SMMU_CB8_NMRR_MAIR1, IR0, 2, 0)
4054DEP_REG32(SMMU_CB8_FSR, 0x18058)
4055    DEP_FIELD(SMMU_CB8_FSR, MULTI, 1, 31)
4056    DEP_FIELD(SMMU_CB8_FSR, SS, 1, 30)
4057    DEP_FIELD(SMMU_CB8_FSR, FORMAT, 2, 9)
4058    DEP_FIELD(SMMU_CB8_FSR, UUT, 1, 8)
4059    DEP_FIELD(SMMU_CB8_FSR, ASF, 1, 7)
4060    DEP_FIELD(SMMU_CB8_FSR, TLBLKF, 1, 6)
4061    DEP_FIELD(SMMU_CB8_FSR, TLBMCF, 1, 5)
4062    DEP_FIELD(SMMU_CB8_FSR, EF, 1, 4)
4063    DEP_FIELD(SMMU_CB8_FSR, PF, 1, 3)
4064    DEP_FIELD(SMMU_CB8_FSR, AFF, 1, 2)
4065    DEP_FIELD(SMMU_CB8_FSR, TF, 1, 1)
4066DEP_REG32(SMMU_CB8_FSRRESTORE, 0x1805c)
4067DEP_REG32(SMMU_CB8_FAR_LOW, 0x18060)
4068DEP_REG32(SMMU_CB8_FAR_HIGH, 0x18064)
4069    DEP_FIELD(SMMU_CB8_FAR_HIGH, BITS, 17, 0)
4070DEP_REG32(SMMU_CB8_FSYNR0, 0x18068)
4071    DEP_FIELD(SMMU_CB8_FSYNR0, S1CBNDX, 4, 16)
4072    DEP_FIELD(SMMU_CB8_FSYNR0, AFR, 1, 11)
4073    DEP_FIELD(SMMU_CB8_FSYNR0, PTWF, 1, 10)
4074    DEP_FIELD(SMMU_CB8_FSYNR0, ATOF, 1, 9)
4075    DEP_FIELD(SMMU_CB8_FSYNR0, NSATTR, 1, 8)
4076    DEP_FIELD(SMMU_CB8_FSYNR0, IND, 1, 6)
4077    DEP_FIELD(SMMU_CB8_FSYNR0, PNU, 1, 5)
4078    DEP_FIELD(SMMU_CB8_FSYNR0, WNR, 1, 4)
4079    DEP_FIELD(SMMU_CB8_FSYNR0, PLVL, 2, 0)
4080DEP_REG32(SMMU_CB8_IPAFAR_LOW, 0x18070)
4081    DEP_FIELD(SMMU_CB8_IPAFAR_LOW, IPAFAR_L, 20, 12)
4082    DEP_FIELD(SMMU_CB8_IPAFAR_LOW, FAR_RO, 12, 0)
4083DEP_REG32(SMMU_CB8_IPAFAR_HIGH, 0x18074)
4084    DEP_FIELD(SMMU_CB8_IPAFAR_HIGH, BITS, 16, 0)
4085DEP_REG32(SMMU_CB8_TLBIVA_LOW, 0x18600)
4086DEP_REG32(SMMU_CB8_TLBIVA_HIGH, 0x18604)
4087    DEP_FIELD(SMMU_CB8_TLBIVA_HIGH, ASID, 16, 16)
4088    DEP_FIELD(SMMU_CB8_TLBIVA_HIGH, ADDRESS, 5, 0)
4089DEP_REG32(SMMU_CB8_TLBIVAA_LOW, 0x18608)
4090DEP_REG32(SMMU_CB8_TLBIVAA_HIGH, 0x1860c)
4091    DEP_FIELD(SMMU_CB8_TLBIVAA_HIGH, ASID, 16, 16)
4092    DEP_FIELD(SMMU_CB8_TLBIVAA_HIGH, ADDRESS, 5, 0)
4093DEP_REG32(SMMU_CB8_TLBIASID, 0x18610)
4094    DEP_FIELD(SMMU_CB8_TLBIASID, ASID, 16, 0)
4095DEP_REG32(SMMU_CB8_TLBIALL, 0x18618)
4096DEP_REG32(SMMU_CB8_TLBIVAL_LOW, 0x18620)
4097DEP_REG32(SMMU_CB8_TLBIVAL_HIGH, 0x18624)
4098    DEP_FIELD(SMMU_CB8_TLBIVAL_HIGH, ASID, 16, 16)
4099    DEP_FIELD(SMMU_CB8_TLBIVAL_HIGH, ADDRESS, 5, 0)
4100DEP_REG32(SMMU_CB8_TLBIVAAL_LOW, 0x18628)
4101DEP_REG32(SMMU_CB8_TLBIVAAL_HIGH, 0x1862c)
4102    DEP_FIELD(SMMU_CB8_TLBIVAAL_HIGH, ASID, 16, 16)
4103    DEP_FIELD(SMMU_CB8_TLBIVAAL_HIGH, ADDRESS, 5, 0)
4104DEP_REG32(SMMU_CB8_TLBIIPAS2_LOW, 0x18630)
4105DEP_REG32(SMMU_CB8_TLBIIPAS2_HIGH, 0x18634)
4106    DEP_FIELD(SMMU_CB8_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
4107DEP_REG32(SMMU_CB8_TLBIIPAS2L_LOW, 0x18638)
4108DEP_REG32(SMMU_CB8_TLBIIPAS2L_HIGH, 0x1863c)
4109    DEP_FIELD(SMMU_CB8_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
4110DEP_REG32(SMMU_CB8_TLBSYNC, 0x187f0)
4111DEP_REG32(SMMU_CB8_TLBSTATUS, 0x187f4)
4112    DEP_FIELD(SMMU_CB8_TLBSTATUS, SACTIVE, 1, 0)
4113DEP_REG32(SMMU_CB8_PMEVCNTR0, 0x18e00)
4114DEP_REG32(SMMU_CB8_PMEVCNTR1, 0x18e04)
4115DEP_REG32(SMMU_CB8_PMEVCNTR2, 0x18e08)
4116DEP_REG32(SMMU_CB8_PMEVCNTR3, 0x18e0c)
4117DEP_REG32(SMMU_CB8_PMEVTYPER0, 0x18e80)
4118    DEP_FIELD(SMMU_CB8_PMEVTYPER0, P, 1, 31)
4119    DEP_FIELD(SMMU_CB8_PMEVTYPER0, U, 1, 30)
4120    DEP_FIELD(SMMU_CB8_PMEVTYPER0, NSP, 1, 29)
4121    DEP_FIELD(SMMU_CB8_PMEVTYPER0, NSU, 1, 28)
4122    DEP_FIELD(SMMU_CB8_PMEVTYPER0, EVENT, 5, 0)
4123DEP_REG32(SMMU_CB8_PMEVTYPER1, 0x18e84)
4124    DEP_FIELD(SMMU_CB8_PMEVTYPER1, P, 1, 31)
4125    DEP_FIELD(SMMU_CB8_PMEVTYPER1, U, 1, 30)
4126    DEP_FIELD(SMMU_CB8_PMEVTYPER1, NSP, 1, 29)
4127    DEP_FIELD(SMMU_CB8_PMEVTYPER1, NSU, 1, 28)
4128    DEP_FIELD(SMMU_CB8_PMEVTYPER1, EVENT, 5, 0)
4129DEP_REG32(SMMU_CB8_PMEVTYPER2, 0x18e88)
4130    DEP_FIELD(SMMU_CB8_PMEVTYPER2, P, 1, 31)
4131    DEP_FIELD(SMMU_CB8_PMEVTYPER2, U, 1, 30)
4132    DEP_FIELD(SMMU_CB8_PMEVTYPER2, NSP, 1, 29)
4133    DEP_FIELD(SMMU_CB8_PMEVTYPER2, NSU, 1, 28)
4134    DEP_FIELD(SMMU_CB8_PMEVTYPER2, EVENT, 5, 0)
4135DEP_REG32(SMMU_CB8_PMEVTYPER3, 0x18e8c)
4136    DEP_FIELD(SMMU_CB8_PMEVTYPER3, P, 1, 31)
4137    DEP_FIELD(SMMU_CB8_PMEVTYPER3, U, 1, 30)
4138    DEP_FIELD(SMMU_CB8_PMEVTYPER3, NSP, 1, 29)
4139    DEP_FIELD(SMMU_CB8_PMEVTYPER3, NSU, 1, 28)
4140    DEP_FIELD(SMMU_CB8_PMEVTYPER3, EVENT, 5, 0)
4141DEP_REG32(SMMU_CB8_PMCFGR, 0x18f00)
4142    DEP_FIELD(SMMU_CB8_PMCFGR, NCG, 8, 24)
4143    DEP_FIELD(SMMU_CB8_PMCFGR, UEN, 1, 19)
4144    DEP_FIELD(SMMU_CB8_PMCFGR, EX, 1, 16)
4145    DEP_FIELD(SMMU_CB8_PMCFGR, CCD, 1, 15)
4146    DEP_FIELD(SMMU_CB8_PMCFGR, CC, 1, 14)
4147    DEP_FIELD(SMMU_CB8_PMCFGR, SIZE, 6, 8)
4148    DEP_FIELD(SMMU_CB8_PMCFGR, N, 8, 0)
4149DEP_REG32(SMMU_CB8_PMCR, 0x18f04)
4150    DEP_FIELD(SMMU_CB8_PMCR, IMP, 8, 24)
4151    DEP_FIELD(SMMU_CB8_PMCR, X, 1, 4)
4152    DEP_FIELD(SMMU_CB8_PMCR, P, 1, 1)
4153    DEP_FIELD(SMMU_CB8_PMCR, E, 1, 0)
4154DEP_REG32(SMMU_CB8_PMCEID, 0x18f20)
4155    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X12, 1, 17)
4156    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X11, 1, 16)
4157    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X10, 1, 15)
4158    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X0A, 1, 9)
4159    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X09, 1, 8)
4160    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X08, 1, 7)
4161    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X01, 1, 1)
4162    DEP_FIELD(SMMU_CB8_PMCEID, EVENT0X00, 1, 0)
4163DEP_REG32(SMMU_CB8_PMCNTENSE, 0x18f40)
4164    DEP_FIELD(SMMU_CB8_PMCNTENSE, P3, 1, 3)
4165    DEP_FIELD(SMMU_CB8_PMCNTENSE, P2, 1, 2)
4166    DEP_FIELD(SMMU_CB8_PMCNTENSE, P1, 1, 1)
4167    DEP_FIELD(SMMU_CB8_PMCNTENSE, P0, 1, 0)
4168DEP_REG32(SMMU_CB8_PMCNTENCLR, 0x18f44)
4169    DEP_FIELD(SMMU_CB8_PMCNTENCLR, P3, 1, 3)
4170    DEP_FIELD(SMMU_CB8_PMCNTENCLR, P2, 1, 2)
4171    DEP_FIELD(SMMU_CB8_PMCNTENCLR, P1, 1, 1)
4172    DEP_FIELD(SMMU_CB8_PMCNTENCLR, P0, 1, 0)
4173DEP_REG32(SMMU_CB8_PMCNTENSET, 0x18f48)
4174    DEP_FIELD(SMMU_CB8_PMCNTENSET, P3, 1, 3)
4175    DEP_FIELD(SMMU_CB8_PMCNTENSET, P2, 1, 2)
4176    DEP_FIELD(SMMU_CB8_PMCNTENSET, P1, 1, 1)
4177    DEP_FIELD(SMMU_CB8_PMCNTENSET, P0, 1, 0)
4178DEP_REG32(SMMU_CB8_PMINTENCLR, 0x18f4c)
4179    DEP_FIELD(SMMU_CB8_PMINTENCLR, P3, 1, 3)
4180    DEP_FIELD(SMMU_CB8_PMINTENCLR, P2, 1, 2)
4181    DEP_FIELD(SMMU_CB8_PMINTENCLR, P1, 1, 1)
4182    DEP_FIELD(SMMU_CB8_PMINTENCLR, P0, 1, 0)
4183DEP_REG32(SMMU_CB8_PMOVSCLR, 0x18f50)
4184    DEP_FIELD(SMMU_CB8_PMOVSCLR, P3, 1, 3)
4185    DEP_FIELD(SMMU_CB8_PMOVSCLR, P2, 1, 2)
4186    DEP_FIELD(SMMU_CB8_PMOVSCLR, P1, 1, 1)
4187    DEP_FIELD(SMMU_CB8_PMOVSCLR, P0, 1, 0)
4188DEP_REG32(SMMU_CB8_PMOVSSET, 0x18f58)
4189    DEP_FIELD(SMMU_CB8_PMOVSSET, P3, 1, 3)
4190    DEP_FIELD(SMMU_CB8_PMOVSSET, P2, 1, 2)
4191    DEP_FIELD(SMMU_CB8_PMOVSSET, P1, 1, 1)
4192    DEP_FIELD(SMMU_CB8_PMOVSSET, P0, 1, 0)
4193DEP_REG32(SMMU_CB8_PMAUTHSTATUS, 0x18fb8)
4194    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, SNI, 1, 7)
4195    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, SNE, 1, 6)
4196    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, SI, 1, 5)
4197    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, SE, 1, 4)
4198    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, NSNI, 1, 3)
4199    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, NSNE, 1, 2)
4200    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, NSI, 1, 1)
4201    DEP_FIELD(SMMU_CB8_PMAUTHSTATUS, NSE, 1, 0)
4202DEP_REG32(SMMU_CB9_SCTLR, 0x19000)
4203    DEP_FIELD(SMMU_CB9_SCTLR, NSCFG, 2, 28)
4204    DEP_FIELD(SMMU_CB9_SCTLR, WACFG, 2, 26)
4205    DEP_FIELD(SMMU_CB9_SCTLR, RACFG, 2, 24)
4206    DEP_FIELD(SMMU_CB9_SCTLR, SHCFG, 2, 22)
4207    DEP_FIELD(SMMU_CB9_SCTLR, FB, 1, 21)
4208    DEP_FIELD(SMMU_CB9_SCTLR, MTCFG, 1, 20)
4209    DEP_FIELD(SMMU_CB9_SCTLR, MEMATTR, 4, 16)
4210    DEP_FIELD(SMMU_CB9_SCTLR, TRANSIENTCFG, 2, 14)
4211    DEP_FIELD(SMMU_CB9_SCTLR, PTW, 1, 13)
4212    DEP_FIELD(SMMU_CB9_SCTLR, ASIDPNE, 1, 12)
4213    DEP_FIELD(SMMU_CB9_SCTLR, UWXN, 1, 10)
4214    DEP_FIELD(SMMU_CB9_SCTLR, WXN, 1, 9)
4215    DEP_FIELD(SMMU_CB9_SCTLR, HUPCF, 1, 8)
4216    DEP_FIELD(SMMU_CB9_SCTLR, CFCFG, 1, 7)
4217    DEP_FIELD(SMMU_CB9_SCTLR, CFIE, 1, 6)
4218    DEP_FIELD(SMMU_CB9_SCTLR, CFRE, 1, 5)
4219    DEP_FIELD(SMMU_CB9_SCTLR, E, 1, 4)
4220    DEP_FIELD(SMMU_CB9_SCTLR, AFFD, 1, 3)
4221    DEP_FIELD(SMMU_CB9_SCTLR, AFE, 1, 2)
4222    DEP_FIELD(SMMU_CB9_SCTLR, TRE, 1, 1)
4223    DEP_FIELD(SMMU_CB9_SCTLR, M, 1, 0)
4224DEP_REG32(SMMU_CB9_ACTLR, 0x19004)
4225    DEP_FIELD(SMMU_CB9_ACTLR, CPRE, 1, 1)
4226    DEP_FIELD(SMMU_CB9_ACTLR, CMTLB, 1, 0)
4227DEP_REG32(SMMU_CB9_RESUME, 0x19008)
4228    DEP_FIELD(SMMU_CB9_RESUME, TNR, 1, 0)
4229DEP_REG32(SMMU_CB9_TCR2, 0x19010)
4230    DEP_FIELD(SMMU_CB9_TCR2, NSCFG1, 1, 30)
4231    DEP_FIELD(SMMU_CB9_TCR2, SEP, 3, 15)
4232    DEP_FIELD(SMMU_CB9_TCR2, NSCFG0, 1, 14)
4233    DEP_FIELD(SMMU_CB9_TCR2, TBI1, 1, 6)
4234    DEP_FIELD(SMMU_CB9_TCR2, TBI0, 1, 5)
4235    DEP_FIELD(SMMU_CB9_TCR2, AS, 1, 4)
4236    DEP_FIELD(SMMU_CB9_TCR2, PASIZE, 3, 0)
4237DEP_REG32(SMMU_CB9_TTBR0_LOW, 0x19020)
4238    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_31_7, 25, 7)
4239    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
4240    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
4241    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
4242    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_2, 1, 2)
4243    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_1_S, 1, 1)
4244    DEP_FIELD(SMMU_CB9_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
4245DEP_REG32(SMMU_CB9_TTBR0_HIGH, 0x19024)
4246    DEP_FIELD(SMMU_CB9_TTBR0_HIGH, ASID, 16, 16)
4247    DEP_FIELD(SMMU_CB9_TTBR0_HIGH, ADDRESS, 16, 0)
4248DEP_REG32(SMMU_CB9_TTBR1_LOW, 0x19028)
4249    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_31_7, 25, 7)
4250    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
4251    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
4252    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
4253    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_2, 1, 2)
4254    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_1_S, 1, 1)
4255    DEP_FIELD(SMMU_CB9_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
4256DEP_REG32(SMMU_CB9_TTBR1_HIGH, 0x1902c)
4257    DEP_FIELD(SMMU_CB9_TTBR1_HIGH, ASID, 16, 16)
4258    DEP_FIELD(SMMU_CB9_TTBR1_HIGH, ADDRESS, 16, 0)
4259DEP_REG32(SMMU_CB9_TCR_LPAE, 0x19030)
4260    DEP_FIELD(SMMU_CB9_TCR_LPAE, EAE, 1, 31)
4261    DEP_FIELD(SMMU_CB9_TCR_LPAE, NSCFG1_TG1, 1, 30)
4262    DEP_FIELD(SMMU_CB9_TCR_LPAE, SH1, 2, 28)
4263    DEP_FIELD(SMMU_CB9_TCR_LPAE, ORGN1, 2, 26)
4264    DEP_FIELD(SMMU_CB9_TCR_LPAE, IRGN1, 2, 24)
4265    DEP_FIELD(SMMU_CB9_TCR_LPAE, EPD1, 1, 23)
4266    DEP_FIELD(SMMU_CB9_TCR_LPAE, A1, 1, 22)
4267    DEP_FIELD(SMMU_CB9_TCR_LPAE, T1SZ_5_3, 3, 19)
4268    DEP_FIELD(SMMU_CB9_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
4269    DEP_FIELD(SMMU_CB9_TCR_LPAE, NSCFG0_TG0, 1, 14)
4270    DEP_FIELD(SMMU_CB9_TCR_LPAE, SH0, 2, 12)
4271    DEP_FIELD(SMMU_CB9_TCR_LPAE, ORGN0, 2, 10)
4272    DEP_FIELD(SMMU_CB9_TCR_LPAE, IRGN0, 2, 8)
4273    DEP_FIELD(SMMU_CB9_TCR_LPAE, SL0_1_EPD0, 1, 7)
4274    DEP_FIELD(SMMU_CB9_TCR_LPAE, SL0_0, 1, 6)
4275    DEP_FIELD(SMMU_CB9_TCR_LPAE, PD1_T0SZ_5, 1, 5)
4276    DEP_FIELD(SMMU_CB9_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
4277    DEP_FIELD(SMMU_CB9_TCR_LPAE, T0SZ_3_0, 4, 0)
4278DEP_REG32(SMMU_CB9_CONTEXTIDR, 0x19034)
4279    DEP_FIELD(SMMU_CB9_CONTEXTIDR, PROCID, 24, 8)
4280    DEP_FIELD(SMMU_CB9_CONTEXTIDR, ASID, 8, 0)
4281DEP_REG32(SMMU_CB9_PRRR_MAIR0, 0x19038)
4282    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS7, 1, 31)
4283    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS6, 1, 30)
4284    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS5, 1, 29)
4285    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS4, 1, 28)
4286    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS3, 1, 27)
4287    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS2, 1, 26)
4288    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS1, 1, 25)
4289    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NOS0, 1, 24)
4290    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NS1, 1, 19)
4291    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, NS0, 1, 18)
4292    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, DS1, 1, 17)
4293    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, DS0, 1, 16)
4294    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR7, 2, 14)
4295    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR6, 2, 12)
4296    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR5, 2, 10)
4297    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR4, 2, 8)
4298    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR3, 2, 6)
4299    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR2, 2, 4)
4300    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR1, 2, 2)
4301    DEP_FIELD(SMMU_CB9_PRRR_MAIR0, TR0, 2, 0)
4302DEP_REG32(SMMU_CB9_NMRR_MAIR1, 0x1903c)
4303    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR7, 2, 30)
4304    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR6, 2, 28)
4305    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR5, 2, 26)
4306    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR4, 2, 24)
4307    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR3, 2, 22)
4308    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR2, 2, 20)
4309    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR1, 2, 18)
4310    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, OR0, 2, 16)
4311    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR7, 2, 14)
4312    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR6, 2, 12)
4313    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR5, 2, 10)
4314    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR4, 2, 8)
4315    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR3, 2, 6)
4316    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR2, 2, 4)
4317    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR1, 2, 2)
4318    DEP_FIELD(SMMU_CB9_NMRR_MAIR1, IR0, 2, 0)
4319DEP_REG32(SMMU_CB9_FSR, 0x19058)
4320    DEP_FIELD(SMMU_CB9_FSR, MULTI, 1, 31)
4321    DEP_FIELD(SMMU_CB9_FSR, SS, 1, 30)
4322    DEP_FIELD(SMMU_CB9_FSR, FORMAT, 2, 9)
4323    DEP_FIELD(SMMU_CB9_FSR, UUT, 1, 8)
4324    DEP_FIELD(SMMU_CB9_FSR, ASF, 1, 7)
4325    DEP_FIELD(SMMU_CB9_FSR, TLBLKF, 1, 6)
4326    DEP_FIELD(SMMU_CB9_FSR, TLBMCF, 1, 5)
4327    DEP_FIELD(SMMU_CB9_FSR, EF, 1, 4)
4328    DEP_FIELD(SMMU_CB9_FSR, PF, 1, 3)
4329    DEP_FIELD(SMMU_CB9_FSR, AFF, 1, 2)
4330    DEP_FIELD(SMMU_CB9_FSR, TF, 1, 1)
4331DEP_REG32(SMMU_CB9_FSRRESTORE, 0x1905c)
4332DEP_REG32(SMMU_CB9_FAR_LOW, 0x19060)
4333DEP_REG32(SMMU_CB9_FAR_HIGH, 0x19064)
4334    DEP_FIELD(SMMU_CB9_FAR_HIGH, BITS, 17, 0)
4335DEP_REG32(SMMU_CB9_FSYNR0, 0x19068)
4336    DEP_FIELD(SMMU_CB9_FSYNR0, S1CBNDX, 4, 16)
4337    DEP_FIELD(SMMU_CB9_FSYNR0, AFR, 1, 11)
4338    DEP_FIELD(SMMU_CB9_FSYNR0, PTWF, 1, 10)
4339    DEP_FIELD(SMMU_CB9_FSYNR0, ATOF, 1, 9)
4340    DEP_FIELD(SMMU_CB9_FSYNR0, NSATTR, 1, 8)
4341    DEP_FIELD(SMMU_CB9_FSYNR0, IND, 1, 6)
4342    DEP_FIELD(SMMU_CB9_FSYNR0, PNU, 1, 5)
4343    DEP_FIELD(SMMU_CB9_FSYNR0, WNR, 1, 4)
4344    DEP_FIELD(SMMU_CB9_FSYNR0, PLVL, 2, 0)
4345DEP_REG32(SMMU_CB9_IPAFAR_LOW, 0x19070)
4346    DEP_FIELD(SMMU_CB9_IPAFAR_LOW, IPAFAR_L, 20, 12)
4347    DEP_FIELD(SMMU_CB9_IPAFAR_LOW, FAR_RO, 12, 0)
4348DEP_REG32(SMMU_CB9_IPAFAR_HIGH, 0x19074)
4349    DEP_FIELD(SMMU_CB9_IPAFAR_HIGH, BITS, 16, 0)
4350DEP_REG32(SMMU_CB9_TLBIVA_LOW, 0x19600)
4351DEP_REG32(SMMU_CB9_TLBIVA_HIGH, 0x19604)
4352    DEP_FIELD(SMMU_CB9_TLBIVA_HIGH, ASID, 16, 16)
4353    DEP_FIELD(SMMU_CB9_TLBIVA_HIGH, ADDRESS, 5, 0)
4354DEP_REG32(SMMU_CB9_TLBIVAA_LOW, 0x19608)
4355DEP_REG32(SMMU_CB9_TLBIVAA_HIGH, 0x1960c)
4356    DEP_FIELD(SMMU_CB9_TLBIVAA_HIGH, ASID, 16, 16)
4357    DEP_FIELD(SMMU_CB9_TLBIVAA_HIGH, ADDRESS, 5, 0)
4358DEP_REG32(SMMU_CB9_TLBIASID, 0x19610)
4359    DEP_FIELD(SMMU_CB9_TLBIASID, ASID, 16, 0)
4360DEP_REG32(SMMU_CB9_TLBIALL, 0x19618)
4361DEP_REG32(SMMU_CB9_TLBIVAL_LOW, 0x19620)
4362DEP_REG32(SMMU_CB9_TLBIVAL_HIGH, 0x19624)
4363    DEP_FIELD(SMMU_CB9_TLBIVAL_HIGH, ASID, 16, 16)
4364    DEP_FIELD(SMMU_CB9_TLBIVAL_HIGH, ADDRESS, 5, 0)
4365DEP_REG32(SMMU_CB9_TLBIVAAL_LOW, 0x19628)
4366DEP_REG32(SMMU_CB9_TLBIVAAL_HIGH, 0x1962c)
4367    DEP_FIELD(SMMU_CB9_TLBIVAAL_HIGH, ASID, 16, 16)
4368    DEP_FIELD(SMMU_CB9_TLBIVAAL_HIGH, ADDRESS, 5, 0)
4369DEP_REG32(SMMU_CB9_TLBIIPAS2_LOW, 0x19630)
4370DEP_REG32(SMMU_CB9_TLBIIPAS2_HIGH, 0x19634)
4371    DEP_FIELD(SMMU_CB9_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
4372DEP_REG32(SMMU_CB9_TLBIIPAS2L_LOW, 0x19638)
4373DEP_REG32(SMMU_CB9_TLBIIPAS2L_HIGH, 0x1963c)
4374    DEP_FIELD(SMMU_CB9_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
4375DEP_REG32(SMMU_CB9_TLBSYNC, 0x197f0)
4376DEP_REG32(SMMU_CB9_TLBSTATUS, 0x197f4)
4377    DEP_FIELD(SMMU_CB9_TLBSTATUS, SACTIVE, 1, 0)
4378DEP_REG32(SMMU_CB9_PMEVCNTR0, 0x19e00)
4379DEP_REG32(SMMU_CB9_PMEVCNTR1, 0x19e04)
4380DEP_REG32(SMMU_CB9_PMEVCNTR2, 0x19e08)
4381DEP_REG32(SMMU_CB9_PMEVCNTR3, 0x19e0c)
4382DEP_REG32(SMMU_CB9_PMEVTYPER0, 0x19e80)
4383    DEP_FIELD(SMMU_CB9_PMEVTYPER0, P, 1, 31)
4384    DEP_FIELD(SMMU_CB9_PMEVTYPER0, U, 1, 30)
4385    DEP_FIELD(SMMU_CB9_PMEVTYPER0, NSP, 1, 29)
4386    DEP_FIELD(SMMU_CB9_PMEVTYPER0, NSU, 1, 28)
4387    DEP_FIELD(SMMU_CB9_PMEVTYPER0, EVENT, 5, 0)
4388DEP_REG32(SMMU_CB9_PMEVTYPER1, 0x19e84)
4389    DEP_FIELD(SMMU_CB9_PMEVTYPER1, P, 1, 31)
4390    DEP_FIELD(SMMU_CB9_PMEVTYPER1, U, 1, 30)
4391    DEP_FIELD(SMMU_CB9_PMEVTYPER1, NSP, 1, 29)
4392    DEP_FIELD(SMMU_CB9_PMEVTYPER1, NSU, 1, 28)
4393    DEP_FIELD(SMMU_CB9_PMEVTYPER1, EVENT, 5, 0)
4394DEP_REG32(SMMU_CB9_PMEVTYPER2, 0x19e88)
4395    DEP_FIELD(SMMU_CB9_PMEVTYPER2, P, 1, 31)
4396    DEP_FIELD(SMMU_CB9_PMEVTYPER2, U, 1, 30)
4397    DEP_FIELD(SMMU_CB9_PMEVTYPER2, NSP, 1, 29)
4398    DEP_FIELD(SMMU_CB9_PMEVTYPER2, NSU, 1, 28)
4399    DEP_FIELD(SMMU_CB9_PMEVTYPER2, EVENT, 5, 0)
4400DEP_REG32(SMMU_CB9_PMEVTYPER3, 0x19e8c)
4401    DEP_FIELD(SMMU_CB9_PMEVTYPER3, P, 1, 31)
4402    DEP_FIELD(SMMU_CB9_PMEVTYPER3, U, 1, 30)
4403    DEP_FIELD(SMMU_CB9_PMEVTYPER3, NSP, 1, 29)
4404    DEP_FIELD(SMMU_CB9_PMEVTYPER3, NSU, 1, 28)
4405    DEP_FIELD(SMMU_CB9_PMEVTYPER3, EVENT, 5, 0)
4406DEP_REG32(SMMU_CB9_PMCFGR, 0x19f00)
4407    DEP_FIELD(SMMU_CB9_PMCFGR, NCG, 8, 24)
4408    DEP_FIELD(SMMU_CB9_PMCFGR, UEN, 1, 19)
4409    DEP_FIELD(SMMU_CB9_PMCFGR, EX, 1, 16)
4410    DEP_FIELD(SMMU_CB9_PMCFGR, CCD, 1, 15)
4411    DEP_FIELD(SMMU_CB9_PMCFGR, CC, 1, 14)
4412    DEP_FIELD(SMMU_CB9_PMCFGR, SIZE, 6, 8)
4413    DEP_FIELD(SMMU_CB9_PMCFGR, N, 8, 0)
4414DEP_REG32(SMMU_CB9_PMCR, 0x19f04)
4415    DEP_FIELD(SMMU_CB9_PMCR, IMP, 8, 24)
4416    DEP_FIELD(SMMU_CB9_PMCR, X, 1, 4)
4417    DEP_FIELD(SMMU_CB9_PMCR, P, 1, 1)
4418    DEP_FIELD(SMMU_CB9_PMCR, E, 1, 0)
4419DEP_REG32(SMMU_CB9_PMCEID, 0x19f20)
4420    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X12, 1, 17)
4421    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X11, 1, 16)
4422    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X10, 1, 15)
4423    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X0A, 1, 9)
4424    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X09, 1, 8)
4425    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X08, 1, 7)
4426    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X01, 1, 1)
4427    DEP_FIELD(SMMU_CB9_PMCEID, EVENT0X00, 1, 0)
4428DEP_REG32(SMMU_CB9_PMCNTENSE, 0x19f40)
4429    DEP_FIELD(SMMU_CB9_PMCNTENSE, P3, 1, 3)
4430    DEP_FIELD(SMMU_CB9_PMCNTENSE, P2, 1, 2)
4431    DEP_FIELD(SMMU_CB9_PMCNTENSE, P1, 1, 1)
4432    DEP_FIELD(SMMU_CB9_PMCNTENSE, P0, 1, 0)
4433DEP_REG32(SMMU_CB9_PMCNTENCLR, 0x19f44)
4434    DEP_FIELD(SMMU_CB9_PMCNTENCLR, P3, 1, 3)
4435    DEP_FIELD(SMMU_CB9_PMCNTENCLR, P2, 1, 2)
4436    DEP_FIELD(SMMU_CB9_PMCNTENCLR, P1, 1, 1)
4437    DEP_FIELD(SMMU_CB9_PMCNTENCLR, P0, 1, 0)
4438DEP_REG32(SMMU_CB9_PMCNTENSET, 0x19f48)
4439    DEP_FIELD(SMMU_CB9_PMCNTENSET, P3, 1, 3)
4440    DEP_FIELD(SMMU_CB9_PMCNTENSET, P2, 1, 2)
4441    DEP_FIELD(SMMU_CB9_PMCNTENSET, P1, 1, 1)
4442    DEP_FIELD(SMMU_CB9_PMCNTENSET, P0, 1, 0)
4443DEP_REG32(SMMU_CB9_PMINTENCLR, 0x19f4c)
4444    DEP_FIELD(SMMU_CB9_PMINTENCLR, P3, 1, 3)
4445    DEP_FIELD(SMMU_CB9_PMINTENCLR, P2, 1, 2)
4446    DEP_FIELD(SMMU_CB9_PMINTENCLR, P1, 1, 1)
4447    DEP_FIELD(SMMU_CB9_PMINTENCLR, P0, 1, 0)
4448DEP_REG32(SMMU_CB9_PMOVSCLR, 0x19f50)
4449    DEP_FIELD(SMMU_CB9_PMOVSCLR, P3, 1, 3)
4450    DEP_FIELD(SMMU_CB9_PMOVSCLR, P2, 1, 2)
4451    DEP_FIELD(SMMU_CB9_PMOVSCLR, P1, 1, 1)
4452    DEP_FIELD(SMMU_CB9_PMOVSCLR, P0, 1, 0)
4453DEP_REG32(SMMU_CB9_PMOVSSET, 0x19f58)
4454    DEP_FIELD(SMMU_CB9_PMOVSSET, P3, 1, 3)
4455    DEP_FIELD(SMMU_CB9_PMOVSSET, P2, 1, 2)
4456    DEP_FIELD(SMMU_CB9_PMOVSSET, P1, 1, 1)
4457    DEP_FIELD(SMMU_CB9_PMOVSSET, P0, 1, 0)
4458DEP_REG32(SMMU_CB9_PMAUTHSTATUS, 0x19fb8)
4459    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, SNI, 1, 7)
4460    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, SNE, 1, 6)
4461    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, SI, 1, 5)
4462    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, SE, 1, 4)
4463    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, NSNI, 1, 3)
4464    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, NSNE, 1, 2)
4465    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, NSI, 1, 1)
4466    DEP_FIELD(SMMU_CB9_PMAUTHSTATUS, NSE, 1, 0)
4467DEP_REG32(SMMU_CB10_SCTLR, 0x1a000)
4468    DEP_FIELD(SMMU_CB10_SCTLR, NSCFG, 2, 28)
4469    DEP_FIELD(SMMU_CB10_SCTLR, WACFG, 2, 26)
4470    DEP_FIELD(SMMU_CB10_SCTLR, RACFG, 2, 24)
4471    DEP_FIELD(SMMU_CB10_SCTLR, SHCFG, 2, 22)
4472    DEP_FIELD(SMMU_CB10_SCTLR, FB, 1, 21)
4473    DEP_FIELD(SMMU_CB10_SCTLR, MTCFG, 1, 20)
4474    DEP_FIELD(SMMU_CB10_SCTLR, MEMATTR, 4, 16)
4475    DEP_FIELD(SMMU_CB10_SCTLR, TRANSIENTCFG, 2, 14)
4476    DEP_FIELD(SMMU_CB10_SCTLR, PTW, 1, 13)
4477    DEP_FIELD(SMMU_CB10_SCTLR, ASIDPNE, 1, 12)
4478    DEP_FIELD(SMMU_CB10_SCTLR, UWXN, 1, 10)
4479    DEP_FIELD(SMMU_CB10_SCTLR, WXN, 1, 9)
4480    DEP_FIELD(SMMU_CB10_SCTLR, HUPCF, 1, 8)
4481    DEP_FIELD(SMMU_CB10_SCTLR, CFCFG, 1, 7)
4482    DEP_FIELD(SMMU_CB10_SCTLR, CFIE, 1, 6)
4483    DEP_FIELD(SMMU_CB10_SCTLR, CFRE, 1, 5)
4484    DEP_FIELD(SMMU_CB10_SCTLR, E, 1, 4)
4485    DEP_FIELD(SMMU_CB10_SCTLR, AFFD, 1, 3)
4486    DEP_FIELD(SMMU_CB10_SCTLR, AFE, 1, 2)
4487    DEP_FIELD(SMMU_CB10_SCTLR, TRE, 1, 1)
4488    DEP_FIELD(SMMU_CB10_SCTLR, M, 1, 0)
4489DEP_REG32(SMMU_CB10_ACTLR, 0x1a004)
4490    DEP_FIELD(SMMU_CB10_ACTLR, CPRE, 1, 1)
4491    DEP_FIELD(SMMU_CB10_ACTLR, CMTLB, 1, 0)
4492DEP_REG32(SMMU_CB10_RESUME, 0x1a008)
4493    DEP_FIELD(SMMU_CB10_RESUME, TNR, 1, 0)
4494DEP_REG32(SMMU_CB10_TCR2, 0x1a010)
4495    DEP_FIELD(SMMU_CB10_TCR2, NSCFG1, 1, 30)
4496    DEP_FIELD(SMMU_CB10_TCR2, SEP, 3, 15)
4497    DEP_FIELD(SMMU_CB10_TCR2, NSCFG0, 1, 14)
4498    DEP_FIELD(SMMU_CB10_TCR2, TBI1, 1, 6)
4499    DEP_FIELD(SMMU_CB10_TCR2, TBI0, 1, 5)
4500    DEP_FIELD(SMMU_CB10_TCR2, AS, 1, 4)
4501    DEP_FIELD(SMMU_CB10_TCR2, PASIZE, 3, 0)
4502DEP_REG32(SMMU_CB10_TTBR0_LOW, 0x1a020)
4503    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_31_7, 25, 7)
4504    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
4505    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
4506    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
4507    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_2, 1, 2)
4508    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_1_S, 1, 1)
4509    DEP_FIELD(SMMU_CB10_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
4510DEP_REG32(SMMU_CB10_TTBR0_HIGH, 0x1a024)
4511    DEP_FIELD(SMMU_CB10_TTBR0_HIGH, ASID, 16, 16)
4512    DEP_FIELD(SMMU_CB10_TTBR0_HIGH, ADDRESS, 16, 0)
4513DEP_REG32(SMMU_CB10_TTBR1_LOW, 0x1a028)
4514    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_31_7, 25, 7)
4515    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
4516    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
4517    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
4518    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_2, 1, 2)
4519    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_1_S, 1, 1)
4520    DEP_FIELD(SMMU_CB10_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
4521DEP_REG32(SMMU_CB10_TTBR1_HIGH, 0x1a02c)
4522    DEP_FIELD(SMMU_CB10_TTBR1_HIGH, ASID, 16, 16)
4523    DEP_FIELD(SMMU_CB10_TTBR1_HIGH, ADDRESS, 16, 0)
4524DEP_REG32(SMMU_CB10_TCR_LPAE, 0x1a030)
4525    DEP_FIELD(SMMU_CB10_TCR_LPAE, EAE, 1, 31)
4526    DEP_FIELD(SMMU_CB10_TCR_LPAE, NSCFG1_TG1, 1, 30)
4527    DEP_FIELD(SMMU_CB10_TCR_LPAE, SH1, 2, 28)
4528    DEP_FIELD(SMMU_CB10_TCR_LPAE, ORGN1, 2, 26)
4529    DEP_FIELD(SMMU_CB10_TCR_LPAE, IRGN1, 2, 24)
4530    DEP_FIELD(SMMU_CB10_TCR_LPAE, EPD1, 1, 23)
4531    DEP_FIELD(SMMU_CB10_TCR_LPAE, A1, 1, 22)
4532    DEP_FIELD(SMMU_CB10_TCR_LPAE, T1SZ_5_3, 3, 19)
4533    DEP_FIELD(SMMU_CB10_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
4534    DEP_FIELD(SMMU_CB10_TCR_LPAE, NSCFG0_TG0, 1, 14)
4535    DEP_FIELD(SMMU_CB10_TCR_LPAE, SH0, 2, 12)
4536    DEP_FIELD(SMMU_CB10_TCR_LPAE, ORGN0, 2, 10)
4537    DEP_FIELD(SMMU_CB10_TCR_LPAE, IRGN0, 2, 8)
4538    DEP_FIELD(SMMU_CB10_TCR_LPAE, SL0_1_EPD0, 1, 7)
4539    DEP_FIELD(SMMU_CB10_TCR_LPAE, SL0_0, 1, 6)
4540    DEP_FIELD(SMMU_CB10_TCR_LPAE, PD1_T0SZ_5, 1, 5)
4541    DEP_FIELD(SMMU_CB10_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
4542    DEP_FIELD(SMMU_CB10_TCR_LPAE, T0SZ_3_0, 4, 0)
4543DEP_REG32(SMMU_CB10_CONTEXTIDR, 0x1a034)
4544    DEP_FIELD(SMMU_CB10_CONTEXTIDR, PROCID, 24, 8)
4545    DEP_FIELD(SMMU_CB10_CONTEXTIDR, ASID, 8, 0)
4546DEP_REG32(SMMU_CB10_PRRR_MAIR0, 0x1a038)
4547    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS7, 1, 31)
4548    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS6, 1, 30)
4549    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS5, 1, 29)
4550    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS4, 1, 28)
4551    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS3, 1, 27)
4552    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS2, 1, 26)
4553    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS1, 1, 25)
4554    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NOS0, 1, 24)
4555    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NS1, 1, 19)
4556    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, NS0, 1, 18)
4557    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, DS1, 1, 17)
4558    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, DS0, 1, 16)
4559    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR7, 2, 14)
4560    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR6, 2, 12)
4561    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR5, 2, 10)
4562    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR4, 2, 8)
4563    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR3, 2, 6)
4564    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR2, 2, 4)
4565    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR1, 2, 2)
4566    DEP_FIELD(SMMU_CB10_PRRR_MAIR0, TR0, 2, 0)
4567DEP_REG32(SMMU_CB10_NMRR_MAIR1, 0x1a03c)
4568    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR7, 2, 30)
4569    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR6, 2, 28)
4570    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR5, 2, 26)
4571    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR4, 2, 24)
4572    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR3, 2, 22)
4573    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR2, 2, 20)
4574    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR1, 2, 18)
4575    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, OR0, 2, 16)
4576    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR7, 2, 14)
4577    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR6, 2, 12)
4578    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR5, 2, 10)
4579    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR4, 2, 8)
4580    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR3, 2, 6)
4581    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR2, 2, 4)
4582    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR1, 2, 2)
4583    DEP_FIELD(SMMU_CB10_NMRR_MAIR1, IR0, 2, 0)
4584DEP_REG32(SMMU_CB10_FSR, 0x1a058)
4585    DEP_FIELD(SMMU_CB10_FSR, MULTI, 1, 31)
4586    DEP_FIELD(SMMU_CB10_FSR, SS, 1, 30)
4587    DEP_FIELD(SMMU_CB10_FSR, FORMAT, 2, 9)
4588    DEP_FIELD(SMMU_CB10_FSR, UUT, 1, 8)
4589    DEP_FIELD(SMMU_CB10_FSR, ASF, 1, 7)
4590    DEP_FIELD(SMMU_CB10_FSR, TLBLKF, 1, 6)
4591    DEP_FIELD(SMMU_CB10_FSR, TLBMCF, 1, 5)
4592    DEP_FIELD(SMMU_CB10_FSR, EF, 1, 4)
4593    DEP_FIELD(SMMU_CB10_FSR, PF, 1, 3)
4594    DEP_FIELD(SMMU_CB10_FSR, AFF, 1, 2)
4595    DEP_FIELD(SMMU_CB10_FSR, TF, 1, 1)
4596DEP_REG32(SMMU_CB10_FSRRESTORE, 0x1a05c)
4597DEP_REG32(SMMU_CB10_FAR_LOW, 0x1a060)
4598DEP_REG32(SMMU_CB10_FAR_HIGH, 0x1a064)
4599    DEP_FIELD(SMMU_CB10_FAR_HIGH, BITS, 17, 0)
4600DEP_REG32(SMMU_CB10_FSYNR0, 0x1a068)
4601    DEP_FIELD(SMMU_CB10_FSYNR0, S1CBNDX, 4, 16)
4602    DEP_FIELD(SMMU_CB10_FSYNR0, AFR, 1, 11)
4603    DEP_FIELD(SMMU_CB10_FSYNR0, PTWF, 1, 10)
4604    DEP_FIELD(SMMU_CB10_FSYNR0, ATOF, 1, 9)
4605    DEP_FIELD(SMMU_CB10_FSYNR0, NSATTR, 1, 8)
4606    DEP_FIELD(SMMU_CB10_FSYNR0, IND, 1, 6)
4607    DEP_FIELD(SMMU_CB10_FSYNR0, PNU, 1, 5)
4608    DEP_FIELD(SMMU_CB10_FSYNR0, WNR, 1, 4)
4609    DEP_FIELD(SMMU_CB10_FSYNR0, PLVL, 2, 0)
4610DEP_REG32(SMMU_CB10_IPAFAR_LOW, 0x1a070)
4611    DEP_FIELD(SMMU_CB10_IPAFAR_LOW, IPAFAR_L, 20, 12)
4612    DEP_FIELD(SMMU_CB10_IPAFAR_LOW, FAR_RO, 12, 0)
4613DEP_REG32(SMMU_CB10_IPAFAR_HIGH, 0x1a074)
4614    DEP_FIELD(SMMU_CB10_IPAFAR_HIGH, BITS, 16, 0)
4615DEP_REG32(SMMU_CB10_TLBIVA_LOW, 0x1a600)
4616DEP_REG32(SMMU_CB10_TLBIVA_HIGH, 0x1a604)
4617    DEP_FIELD(SMMU_CB10_TLBIVA_HIGH, ASID, 16, 16)
4618    DEP_FIELD(SMMU_CB10_TLBIVA_HIGH, ADDRESS, 5, 0)
4619DEP_REG32(SMMU_CB10_TLBIVAA_LOW, 0x1a608)
4620DEP_REG32(SMMU_CB10_TLBIVAA_HIGH, 0x1a60c)
4621    DEP_FIELD(SMMU_CB10_TLBIVAA_HIGH, ASID, 16, 16)
4622    DEP_FIELD(SMMU_CB10_TLBIVAA_HIGH, ADDRESS, 5, 0)
4623DEP_REG32(SMMU_CB10_TLBIASID, 0x1a610)
4624    DEP_FIELD(SMMU_CB10_TLBIASID, ASID, 16, 0)
4625DEP_REG32(SMMU_CB10_TLBIALL, 0x1a618)
4626DEP_REG32(SMMU_CB10_TLBIVAL_LOW, 0x1a620)
4627DEP_REG32(SMMU_CB10_TLBIVAL_HIGH, 0x1a624)
4628    DEP_FIELD(SMMU_CB10_TLBIVAL_HIGH, ASID, 16, 16)
4629    DEP_FIELD(SMMU_CB10_TLBIVAL_HIGH, ADDRESS, 5, 0)
4630DEP_REG32(SMMU_CB10_TLBIVAAL_LOW, 0x1a628)
4631DEP_REG32(SMMU_CB10_TLBIVAAL_HIGH, 0x1a62c)
4632    DEP_FIELD(SMMU_CB10_TLBIVAAL_HIGH, ASID, 16, 16)
4633    DEP_FIELD(SMMU_CB10_TLBIVAAL_HIGH, ADDRESS, 5, 0)
4634DEP_REG32(SMMU_CB10_TLBIIPAS2_LOW, 0x1a630)
4635DEP_REG32(SMMU_CB10_TLBIIPAS2_HIGH, 0x1a634)
4636    DEP_FIELD(SMMU_CB10_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
4637DEP_REG32(SMMU_CB10_TLBIIPAS2L_LOW, 0x1a638)
4638DEP_REG32(SMMU_CB10_TLBIIPAS2L_HIGH, 0x1a63c)
4639    DEP_FIELD(SMMU_CB10_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
4640DEP_REG32(SMMU_CB10_TLBSYNC, 0x1a7f0)
4641DEP_REG32(SMMU_CB10_TLBSTATUS, 0x1a7f4)
4642    DEP_FIELD(SMMU_CB10_TLBSTATUS, SACTIVE, 1, 0)
4643DEP_REG32(SMMU_CB10_PMEVCNTR0, 0x1ae00)
4644DEP_REG32(SMMU_CB10_PMEVCNTR1, 0x1ae04)
4645DEP_REG32(SMMU_CB10_PMEVCNTR2, 0x1ae08)
4646DEP_REG32(SMMU_CB10_PMEVCNTR3, 0x1ae0c)
4647DEP_REG32(SMMU_CB10_PMEVTYPER0, 0x1ae80)
4648    DEP_FIELD(SMMU_CB10_PMEVTYPER0, P, 1, 31)
4649    DEP_FIELD(SMMU_CB10_PMEVTYPER0, U, 1, 30)
4650    DEP_FIELD(SMMU_CB10_PMEVTYPER0, NSP, 1, 29)
4651    DEP_FIELD(SMMU_CB10_PMEVTYPER0, NSU, 1, 28)
4652    DEP_FIELD(SMMU_CB10_PMEVTYPER0, EVENT, 5, 0)
4653DEP_REG32(SMMU_CB10_PMEVTYPER1, 0x1ae84)
4654    DEP_FIELD(SMMU_CB10_PMEVTYPER1, P, 1, 31)
4655    DEP_FIELD(SMMU_CB10_PMEVTYPER1, U, 1, 30)
4656    DEP_FIELD(SMMU_CB10_PMEVTYPER1, NSP, 1, 29)
4657    DEP_FIELD(SMMU_CB10_PMEVTYPER1, NSU, 1, 28)
4658    DEP_FIELD(SMMU_CB10_PMEVTYPER1, EVENT, 5, 0)
4659DEP_REG32(SMMU_CB10_PMEVTYPER2, 0x1ae88)
4660    DEP_FIELD(SMMU_CB10_PMEVTYPER2, P, 1, 31)
4661    DEP_FIELD(SMMU_CB10_PMEVTYPER2, U, 1, 30)
4662    DEP_FIELD(SMMU_CB10_PMEVTYPER2, NSP, 1, 29)
4663    DEP_FIELD(SMMU_CB10_PMEVTYPER2, NSU, 1, 28)
4664    DEP_FIELD(SMMU_CB10_PMEVTYPER2, EVENT, 5, 0)
4665DEP_REG32(SMMU_CB10_PMEVTYPER3, 0x1ae8c)
4666    DEP_FIELD(SMMU_CB10_PMEVTYPER3, P, 1, 31)
4667    DEP_FIELD(SMMU_CB10_PMEVTYPER3, U, 1, 30)
4668    DEP_FIELD(SMMU_CB10_PMEVTYPER3, NSP, 1, 29)
4669    DEP_FIELD(SMMU_CB10_PMEVTYPER3, NSU, 1, 28)
4670    DEP_FIELD(SMMU_CB10_PMEVTYPER3, EVENT, 5, 0)
4671DEP_REG32(SMMU_CB10_PMCFGR, 0x1af00)
4672    DEP_FIELD(SMMU_CB10_PMCFGR, NCG, 8, 24)
4673    DEP_FIELD(SMMU_CB10_PMCFGR, UEN, 1, 19)
4674    DEP_FIELD(SMMU_CB10_PMCFGR, EX, 1, 16)
4675    DEP_FIELD(SMMU_CB10_PMCFGR, CCD, 1, 15)
4676    DEP_FIELD(SMMU_CB10_PMCFGR, CC, 1, 14)
4677    DEP_FIELD(SMMU_CB10_PMCFGR, SIZE, 6, 8)
4678    DEP_FIELD(SMMU_CB10_PMCFGR, N, 8, 0)
4679DEP_REG32(SMMU_CB10_PMCR, 0x1af04)
4680    DEP_FIELD(SMMU_CB10_PMCR, IMP, 8, 24)
4681    DEP_FIELD(SMMU_CB10_PMCR, X, 1, 4)
4682    DEP_FIELD(SMMU_CB10_PMCR, P, 1, 1)
4683    DEP_FIELD(SMMU_CB10_PMCR, E, 1, 0)
4684DEP_REG32(SMMU_CB10_PMCEID, 0x1af20)
4685    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X12, 1, 17)
4686    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X11, 1, 16)
4687    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X10, 1, 15)
4688    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X0A, 1, 9)
4689    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X09, 1, 8)
4690    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X08, 1, 7)
4691    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X01, 1, 1)
4692    DEP_FIELD(SMMU_CB10_PMCEID, EVENT0X00, 1, 0)
4693DEP_REG32(SMMU_CB10_PMCNTENSE, 0x1af40)
4694    DEP_FIELD(SMMU_CB10_PMCNTENSE, P3, 1, 3)
4695    DEP_FIELD(SMMU_CB10_PMCNTENSE, P2, 1, 2)
4696    DEP_FIELD(SMMU_CB10_PMCNTENSE, P1, 1, 1)
4697    DEP_FIELD(SMMU_CB10_PMCNTENSE, P0, 1, 0)
4698DEP_REG32(SMMU_CB10_PMCNTENCLR, 0x1af44)
4699    DEP_FIELD(SMMU_CB10_PMCNTENCLR, P3, 1, 3)
4700    DEP_FIELD(SMMU_CB10_PMCNTENCLR, P2, 1, 2)
4701    DEP_FIELD(SMMU_CB10_PMCNTENCLR, P1, 1, 1)
4702    DEP_FIELD(SMMU_CB10_PMCNTENCLR, P0, 1, 0)
4703DEP_REG32(SMMU_CB10_PMCNTENSET, 0x1af48)
4704    DEP_FIELD(SMMU_CB10_PMCNTENSET, P3, 1, 3)
4705    DEP_FIELD(SMMU_CB10_PMCNTENSET, P2, 1, 2)
4706    DEP_FIELD(SMMU_CB10_PMCNTENSET, P1, 1, 1)
4707    DEP_FIELD(SMMU_CB10_PMCNTENSET, P0, 1, 0)
4708DEP_REG32(SMMU_CB10_PMINTENCLR, 0x1af4c)
4709    DEP_FIELD(SMMU_CB10_PMINTENCLR, P3, 1, 3)
4710    DEP_FIELD(SMMU_CB10_PMINTENCLR, P2, 1, 2)
4711    DEP_FIELD(SMMU_CB10_PMINTENCLR, P1, 1, 1)
4712    DEP_FIELD(SMMU_CB10_PMINTENCLR, P0, 1, 0)
4713DEP_REG32(SMMU_CB10_PMOVSCLR, 0x1af50)
4714    DEP_FIELD(SMMU_CB10_PMOVSCLR, P3, 1, 3)
4715    DEP_FIELD(SMMU_CB10_PMOVSCLR, P2, 1, 2)
4716    DEP_FIELD(SMMU_CB10_PMOVSCLR, P1, 1, 1)
4717    DEP_FIELD(SMMU_CB10_PMOVSCLR, P0, 1, 0)
4718DEP_REG32(SMMU_CB10_PMOVSSET, 0x1af58)
4719    DEP_FIELD(SMMU_CB10_PMOVSSET, P3, 1, 3)
4720    DEP_FIELD(SMMU_CB10_PMOVSSET, P2, 1, 2)
4721    DEP_FIELD(SMMU_CB10_PMOVSSET, P1, 1, 1)
4722    DEP_FIELD(SMMU_CB10_PMOVSSET, P0, 1, 0)
4723DEP_REG32(SMMU_CB10_PMAUTHSTATUS, 0x1afb8)
4724    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, SNI, 1, 7)
4725    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, SNE, 1, 6)
4726    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, SI, 1, 5)
4727    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, SE, 1, 4)
4728    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, NSNI, 1, 3)
4729    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, NSNE, 1, 2)
4730    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, NSI, 1, 1)
4731    DEP_FIELD(SMMU_CB10_PMAUTHSTATUS, NSE, 1, 0)
4732DEP_REG32(SMMU_CB11_SCTLR, 0x1b000)
4733    DEP_FIELD(SMMU_CB11_SCTLR, NSCFG, 2, 28)
4734    DEP_FIELD(SMMU_CB11_SCTLR, WACFG, 2, 26)
4735    DEP_FIELD(SMMU_CB11_SCTLR, RACFG, 2, 24)
4736    DEP_FIELD(SMMU_CB11_SCTLR, SHCFG, 2, 22)
4737    DEP_FIELD(SMMU_CB11_SCTLR, FB, 1, 21)
4738    DEP_FIELD(SMMU_CB11_SCTLR, MTCFG, 1, 20)
4739    DEP_FIELD(SMMU_CB11_SCTLR, MEMATTR, 4, 16)
4740    DEP_FIELD(SMMU_CB11_SCTLR, TRANSIENTCFG, 2, 14)
4741    DEP_FIELD(SMMU_CB11_SCTLR, PTW, 1, 13)
4742    DEP_FIELD(SMMU_CB11_SCTLR, ASIDPNE, 1, 12)
4743    DEP_FIELD(SMMU_CB11_SCTLR, UWXN, 1, 10)
4744    DEP_FIELD(SMMU_CB11_SCTLR, WXN, 1, 9)
4745    DEP_FIELD(SMMU_CB11_SCTLR, HUPCF, 1, 8)
4746    DEP_FIELD(SMMU_CB11_SCTLR, CFCFG, 1, 7)
4747    DEP_FIELD(SMMU_CB11_SCTLR, CFIE, 1, 6)
4748    DEP_FIELD(SMMU_CB11_SCTLR, CFRE, 1, 5)
4749    DEP_FIELD(SMMU_CB11_SCTLR, E, 1, 4)
4750    DEP_FIELD(SMMU_CB11_SCTLR, AFFD, 1, 3)
4751    DEP_FIELD(SMMU_CB11_SCTLR, AFE, 1, 2)
4752    DEP_FIELD(SMMU_CB11_SCTLR, TRE, 1, 1)
4753    DEP_FIELD(SMMU_CB11_SCTLR, M, 1, 0)
4754DEP_REG32(SMMU_CB11_ACTLR, 0x1b004)
4755    DEP_FIELD(SMMU_CB11_ACTLR, CPRE, 1, 1)
4756    DEP_FIELD(SMMU_CB11_ACTLR, CMTLB, 1, 0)
4757DEP_REG32(SMMU_CB11_RESUME, 0x1b008)
4758    DEP_FIELD(SMMU_CB11_RESUME, TNR, 1, 0)
4759DEP_REG32(SMMU_CB11_TCR2, 0x1b010)
4760    DEP_FIELD(SMMU_CB11_TCR2, NSCFG1, 1, 30)
4761    DEP_FIELD(SMMU_CB11_TCR2, SEP, 3, 15)
4762    DEP_FIELD(SMMU_CB11_TCR2, NSCFG0, 1, 14)
4763    DEP_FIELD(SMMU_CB11_TCR2, TBI1, 1, 6)
4764    DEP_FIELD(SMMU_CB11_TCR2, TBI0, 1, 5)
4765    DEP_FIELD(SMMU_CB11_TCR2, AS, 1, 4)
4766    DEP_FIELD(SMMU_CB11_TCR2, PASIZE, 3, 0)
4767DEP_REG32(SMMU_CB11_TTBR0_LOW, 0x1b020)
4768    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_31_7, 25, 7)
4769    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
4770    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
4771    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
4772    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_2, 1, 2)
4773    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_1_S, 1, 1)
4774    DEP_FIELD(SMMU_CB11_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
4775DEP_REG32(SMMU_CB11_TTBR0_HIGH, 0x1b024)
4776    DEP_FIELD(SMMU_CB11_TTBR0_HIGH, ASID, 16, 16)
4777    DEP_FIELD(SMMU_CB11_TTBR0_HIGH, ADDRESS, 16, 0)
4778DEP_REG32(SMMU_CB11_TTBR1_LOW, 0x1b028)
4779    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_31_7, 25, 7)
4780    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
4781    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
4782    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
4783    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_2, 1, 2)
4784    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_1_S, 1, 1)
4785    DEP_FIELD(SMMU_CB11_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
4786DEP_REG32(SMMU_CB11_TTBR1_HIGH, 0x1b02c)
4787    DEP_FIELD(SMMU_CB11_TTBR1_HIGH, ASID, 16, 16)
4788    DEP_FIELD(SMMU_CB11_TTBR1_HIGH, ADDRESS, 16, 0)
4789DEP_REG32(SMMU_CB11_TCR_LPAE, 0x1b030)
4790    DEP_FIELD(SMMU_CB11_TCR_LPAE, EAE, 1, 31)
4791    DEP_FIELD(SMMU_CB11_TCR_LPAE, NSCFG1_TG1, 1, 30)
4792    DEP_FIELD(SMMU_CB11_TCR_LPAE, SH1, 2, 28)
4793    DEP_FIELD(SMMU_CB11_TCR_LPAE, ORGN1, 2, 26)
4794    DEP_FIELD(SMMU_CB11_TCR_LPAE, IRGN1, 2, 24)
4795    DEP_FIELD(SMMU_CB11_TCR_LPAE, EPD1, 1, 23)
4796    DEP_FIELD(SMMU_CB11_TCR_LPAE, A1, 1, 22)
4797    DEP_FIELD(SMMU_CB11_TCR_LPAE, T1SZ_5_3, 3, 19)
4798    DEP_FIELD(SMMU_CB11_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
4799    DEP_FIELD(SMMU_CB11_TCR_LPAE, NSCFG0_TG0, 1, 14)
4800    DEP_FIELD(SMMU_CB11_TCR_LPAE, SH0, 2, 12)
4801    DEP_FIELD(SMMU_CB11_TCR_LPAE, ORGN0, 2, 10)
4802    DEP_FIELD(SMMU_CB11_TCR_LPAE, IRGN0, 2, 8)
4803    DEP_FIELD(SMMU_CB11_TCR_LPAE, SL0_1_EPD0, 1, 7)
4804    DEP_FIELD(SMMU_CB11_TCR_LPAE, SL0_0, 1, 6)
4805    DEP_FIELD(SMMU_CB11_TCR_LPAE, PD1_T0SZ_5, 1, 5)
4806    DEP_FIELD(SMMU_CB11_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
4807    DEP_FIELD(SMMU_CB11_TCR_LPAE, T0SZ_3_0, 4, 0)
4808DEP_REG32(SMMU_CB11_CONTEXTIDR, 0x1b034)
4809    DEP_FIELD(SMMU_CB11_CONTEXTIDR, PROCID, 24, 8)
4810    DEP_FIELD(SMMU_CB11_CONTEXTIDR, ASID, 8, 0)
4811DEP_REG32(SMMU_CB11_PRRR_MAIR0, 0x1b038)
4812    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS7, 1, 31)
4813    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS6, 1, 30)
4814    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS5, 1, 29)
4815    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS4, 1, 28)
4816    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS3, 1, 27)
4817    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS2, 1, 26)
4818    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS1, 1, 25)
4819    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NOS0, 1, 24)
4820    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NS1, 1, 19)
4821    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, NS0, 1, 18)
4822    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, DS1, 1, 17)
4823    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, DS0, 1, 16)
4824    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR7, 2, 14)
4825    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR6, 2, 12)
4826    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR5, 2, 10)
4827    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR4, 2, 8)
4828    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR3, 2, 6)
4829    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR2, 2, 4)
4830    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR1, 2, 2)
4831    DEP_FIELD(SMMU_CB11_PRRR_MAIR0, TR0, 2, 0)
4832DEP_REG32(SMMU_CB11_NMRR_MAIR1, 0x1b03c)
4833    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR7, 2, 30)
4834    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR6, 2, 28)
4835    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR5, 2, 26)
4836    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR4, 2, 24)
4837    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR3, 2, 22)
4838    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR2, 2, 20)
4839    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR1, 2, 18)
4840    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, OR0, 2, 16)
4841    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR7, 2, 14)
4842    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR6, 2, 12)
4843    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR5, 2, 10)
4844    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR4, 2, 8)
4845    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR3, 2, 6)
4846    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR2, 2, 4)
4847    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR1, 2, 2)
4848    DEP_FIELD(SMMU_CB11_NMRR_MAIR1, IR0, 2, 0)
4849DEP_REG32(SMMU_CB11_FSR, 0x1b058)
4850    DEP_FIELD(SMMU_CB11_FSR, MULTI, 1, 31)
4851    DEP_FIELD(SMMU_CB11_FSR, SS, 1, 30)
4852    DEP_FIELD(SMMU_CB11_FSR, FORMAT, 2, 9)
4853    DEP_FIELD(SMMU_CB11_FSR, UUT, 1, 8)
4854    DEP_FIELD(SMMU_CB11_FSR, ASF, 1, 7)
4855    DEP_FIELD(SMMU_CB11_FSR, TLBLKF, 1, 6)
4856    DEP_FIELD(SMMU_CB11_FSR, TLBMCF, 1, 5)
4857    DEP_FIELD(SMMU_CB11_FSR, EF, 1, 4)
4858    DEP_FIELD(SMMU_CB11_FSR, PF, 1, 3)
4859    DEP_FIELD(SMMU_CB11_FSR, AFF, 1, 2)
4860    DEP_FIELD(SMMU_CB11_FSR, TF, 1, 1)
4861DEP_REG32(SMMU_CB11_FSRRESTORE, 0x1b05c)
4862DEP_REG32(SMMU_CB11_FAR_LOW, 0x1b060)
4863DEP_REG32(SMMU_CB11_FAR_HIGH, 0x1b064)
4864    DEP_FIELD(SMMU_CB11_FAR_HIGH, BITS, 17, 0)
4865DEP_REG32(SMMU_CB11_FSYNR0, 0x1b068)
4866    DEP_FIELD(SMMU_CB11_FSYNR0, S1CBNDX, 4, 16)
4867    DEP_FIELD(SMMU_CB11_FSYNR0, AFR, 1, 11)
4868    DEP_FIELD(SMMU_CB11_FSYNR0, PTWF, 1, 10)
4869    DEP_FIELD(SMMU_CB11_FSYNR0, ATOF, 1, 9)
4870    DEP_FIELD(SMMU_CB11_FSYNR0, NSATTR, 1, 8)
4871    DEP_FIELD(SMMU_CB11_FSYNR0, IND, 1, 6)
4872    DEP_FIELD(SMMU_CB11_FSYNR0, PNU, 1, 5)
4873    DEP_FIELD(SMMU_CB11_FSYNR0, WNR, 1, 4)
4874    DEP_FIELD(SMMU_CB11_FSYNR0, PLVL, 2, 0)
4875DEP_REG32(SMMU_CB11_IPAFAR_LOW, 0x1b070)
4876    DEP_FIELD(SMMU_CB11_IPAFAR_LOW, IPAFAR_L, 20, 12)
4877    DEP_FIELD(SMMU_CB11_IPAFAR_LOW, FAR_RO, 12, 0)
4878DEP_REG32(SMMU_CB11_IPAFAR_HIGH, 0x1b074)
4879    DEP_FIELD(SMMU_CB11_IPAFAR_HIGH, BITS, 16, 0)
4880DEP_REG32(SMMU_CB11_TLBIVA_LOW, 0x1b600)
4881DEP_REG32(SMMU_CB11_TLBIVA_HIGH, 0x1b604)
4882    DEP_FIELD(SMMU_CB11_TLBIVA_HIGH, ASID, 16, 16)
4883    DEP_FIELD(SMMU_CB11_TLBIVA_HIGH, ADDRESS, 5, 0)
4884DEP_REG32(SMMU_CB11_TLBIVAA_LOW, 0x1b608)
4885DEP_REG32(SMMU_CB11_TLBIVAA_HIGH, 0x1b60c)
4886    DEP_FIELD(SMMU_CB11_TLBIVAA_HIGH, ASID, 16, 16)
4887    DEP_FIELD(SMMU_CB11_TLBIVAA_HIGH, ADDRESS, 5, 0)
4888DEP_REG32(SMMU_CB11_TLBIASID, 0x1b610)
4889    DEP_FIELD(SMMU_CB11_TLBIASID, ASID, 16, 0)
4890DEP_REG32(SMMU_CB11_TLBIALL, 0x1b618)
4891DEP_REG32(SMMU_CB11_TLBIVAL_LOW, 0x1b620)
4892DEP_REG32(SMMU_CB11_TLBIVAL_HIGH, 0x1b624)
4893    DEP_FIELD(SMMU_CB11_TLBIVAL_HIGH, ASID, 16, 16)
4894    DEP_FIELD(SMMU_CB11_TLBIVAL_HIGH, ADDRESS, 5, 0)
4895DEP_REG32(SMMU_CB11_TLBIVAAL_LOW, 0x1b628)
4896DEP_REG32(SMMU_CB11_TLBIVAAL_HIGH, 0x1b62c)
4897    DEP_FIELD(SMMU_CB11_TLBIVAAL_HIGH, ASID, 16, 16)
4898    DEP_FIELD(SMMU_CB11_TLBIVAAL_HIGH, ADDRESS, 5, 0)
4899DEP_REG32(SMMU_CB11_TLBIIPAS2_LOW, 0x1b630)
4900DEP_REG32(SMMU_CB11_TLBIIPAS2_HIGH, 0x1b634)
4901    DEP_FIELD(SMMU_CB11_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
4902DEP_REG32(SMMU_CB11_TLBIIPAS2L_LOW, 0x1b638)
4903DEP_REG32(SMMU_CB11_TLBIIPAS2L_HIGH, 0x1b63c)
4904    DEP_FIELD(SMMU_CB11_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
4905DEP_REG32(SMMU_CB11_TLBSYNC, 0x1b7f0)
4906DEP_REG32(SMMU_CB11_TLBSTATUS, 0x1b7f4)
4907    DEP_FIELD(SMMU_CB11_TLBSTATUS, SACTIVE, 1, 0)
4908DEP_REG32(SMMU_CB11_PMEVCNTR0, 0x1be00)
4909DEP_REG32(SMMU_CB11_PMEVCNTR1, 0x1be04)
4910DEP_REG32(SMMU_CB11_PMEVCNTR2, 0x1be08)
4911DEP_REG32(SMMU_CB11_PMEVCNTR3, 0x1be0c)
4912DEP_REG32(SMMU_CB11_PMEVTYPER0, 0x1be80)
4913    DEP_FIELD(SMMU_CB11_PMEVTYPER0, P, 1, 31)
4914    DEP_FIELD(SMMU_CB11_PMEVTYPER0, U, 1, 30)
4915    DEP_FIELD(SMMU_CB11_PMEVTYPER0, NSP, 1, 29)
4916    DEP_FIELD(SMMU_CB11_PMEVTYPER0, NSU, 1, 28)
4917    DEP_FIELD(SMMU_CB11_PMEVTYPER0, EVENT, 5, 0)
4918DEP_REG32(SMMU_CB11_PMEVTYPER1, 0x1be84)
4919    DEP_FIELD(SMMU_CB11_PMEVTYPER1, P, 1, 31)
4920    DEP_FIELD(SMMU_CB11_PMEVTYPER1, U, 1, 30)
4921    DEP_FIELD(SMMU_CB11_PMEVTYPER1, NSP, 1, 29)
4922    DEP_FIELD(SMMU_CB11_PMEVTYPER1, NSU, 1, 28)
4923    DEP_FIELD(SMMU_CB11_PMEVTYPER1, EVENT, 5, 0)
4924DEP_REG32(SMMU_CB11_PMEVTYPER2, 0x1be88)
4925    DEP_FIELD(SMMU_CB11_PMEVTYPER2, P, 1, 31)
4926    DEP_FIELD(SMMU_CB11_PMEVTYPER2, U, 1, 30)
4927    DEP_FIELD(SMMU_CB11_PMEVTYPER2, NSP, 1, 29)
4928    DEP_FIELD(SMMU_CB11_PMEVTYPER2, NSU, 1, 28)
4929    DEP_FIELD(SMMU_CB11_PMEVTYPER2, EVENT, 5, 0)
4930DEP_REG32(SMMU_CB11_PMEVTYPER3, 0x1be8c)
4931    DEP_FIELD(SMMU_CB11_PMEVTYPER3, P, 1, 31)
4932    DEP_FIELD(SMMU_CB11_PMEVTYPER3, U, 1, 30)
4933    DEP_FIELD(SMMU_CB11_PMEVTYPER3, NSP, 1, 29)
4934    DEP_FIELD(SMMU_CB11_PMEVTYPER3, NSU, 1, 28)
4935    DEP_FIELD(SMMU_CB11_PMEVTYPER3, EVENT, 5, 0)
4936DEP_REG32(SMMU_CB11_PMCFGR, 0x1bf00)
4937    DEP_FIELD(SMMU_CB11_PMCFGR, NCG, 8, 24)
4938    DEP_FIELD(SMMU_CB11_PMCFGR, UEN, 1, 19)
4939    DEP_FIELD(SMMU_CB11_PMCFGR, EX, 1, 16)
4940    DEP_FIELD(SMMU_CB11_PMCFGR, CCD, 1, 15)
4941    DEP_FIELD(SMMU_CB11_PMCFGR, CC, 1, 14)
4942    DEP_FIELD(SMMU_CB11_PMCFGR, SIZE, 6, 8)
4943    DEP_FIELD(SMMU_CB11_PMCFGR, N, 8, 0)
4944DEP_REG32(SMMU_CB11_PMCR, 0x1bf04)
4945    DEP_FIELD(SMMU_CB11_PMCR, IMP, 8, 24)
4946    DEP_FIELD(SMMU_CB11_PMCR, X, 1, 4)
4947    DEP_FIELD(SMMU_CB11_PMCR, P, 1, 1)
4948    DEP_FIELD(SMMU_CB11_PMCR, E, 1, 0)
4949DEP_REG32(SMMU_CB11_PMCEID, 0x1bf20)
4950    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X12, 1, 17)
4951    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X11, 1, 16)
4952    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X10, 1, 15)
4953    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X0A, 1, 9)
4954    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X09, 1, 8)
4955    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X08, 1, 7)
4956    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X01, 1, 1)
4957    DEP_FIELD(SMMU_CB11_PMCEID, EVENT0X00, 1, 0)
4958DEP_REG32(SMMU_CB11_PMCNTENSE, 0x1bf40)
4959    DEP_FIELD(SMMU_CB11_PMCNTENSE, P3, 1, 3)
4960    DEP_FIELD(SMMU_CB11_PMCNTENSE, P2, 1, 2)
4961    DEP_FIELD(SMMU_CB11_PMCNTENSE, P1, 1, 1)
4962    DEP_FIELD(SMMU_CB11_PMCNTENSE, P0, 1, 0)
4963DEP_REG32(SMMU_CB11_PMCNTENCLR, 0x1bf44)
4964    DEP_FIELD(SMMU_CB11_PMCNTENCLR, P3, 1, 3)
4965    DEP_FIELD(SMMU_CB11_PMCNTENCLR, P2, 1, 2)
4966    DEP_FIELD(SMMU_CB11_PMCNTENCLR, P1, 1, 1)
4967    DEP_FIELD(SMMU_CB11_PMCNTENCLR, P0, 1, 0)
4968DEP_REG32(SMMU_CB11_PMCNTENSET, 0x1bf48)
4969    DEP_FIELD(SMMU_CB11_PMCNTENSET, P3, 1, 3)
4970    DEP_FIELD(SMMU_CB11_PMCNTENSET, P2, 1, 2)
4971    DEP_FIELD(SMMU_CB11_PMCNTENSET, P1, 1, 1)
4972    DEP_FIELD(SMMU_CB11_PMCNTENSET, P0, 1, 0)
4973DEP_REG32(SMMU_CB11_PMINTENCLR, 0x1bf4c)
4974    DEP_FIELD(SMMU_CB11_PMINTENCLR, P3, 1, 3)
4975    DEP_FIELD(SMMU_CB11_PMINTENCLR, P2, 1, 2)
4976    DEP_FIELD(SMMU_CB11_PMINTENCLR, P1, 1, 1)
4977    DEP_FIELD(SMMU_CB11_PMINTENCLR, P0, 1, 0)
4978DEP_REG32(SMMU_CB11_PMOVSCLR, 0x1bf50)
4979    DEP_FIELD(SMMU_CB11_PMOVSCLR, P3, 1, 3)
4980    DEP_FIELD(SMMU_CB11_PMOVSCLR, P2, 1, 2)
4981    DEP_FIELD(SMMU_CB11_PMOVSCLR, P1, 1, 1)
4982    DEP_FIELD(SMMU_CB11_PMOVSCLR, P0, 1, 0)
4983DEP_REG32(SMMU_CB11_PMOVSSET, 0x1bf58)
4984    DEP_FIELD(SMMU_CB11_PMOVSSET, P3, 1, 3)
4985    DEP_FIELD(SMMU_CB11_PMOVSSET, P2, 1, 2)
4986    DEP_FIELD(SMMU_CB11_PMOVSSET, P1, 1, 1)
4987    DEP_FIELD(SMMU_CB11_PMOVSSET, P0, 1, 0)
4988DEP_REG32(SMMU_CB11_PMAUTHSTATUS, 0x1bfb8)
4989    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, SNI, 1, 7)
4990    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, SNE, 1, 6)
4991    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, SI, 1, 5)
4992    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, SE, 1, 4)
4993    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, NSNI, 1, 3)
4994    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, NSNE, 1, 2)
4995    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, NSI, 1, 1)
4996    DEP_FIELD(SMMU_CB11_PMAUTHSTATUS, NSE, 1, 0)
4997DEP_REG32(SMMU_CB12_SCTLR, 0x1c000)
4998    DEP_FIELD(SMMU_CB12_SCTLR, NSCFG, 2, 28)
4999    DEP_FIELD(SMMU_CB12_SCTLR, WACFG, 2, 26)
5000    DEP_FIELD(SMMU_CB12_SCTLR, RACFG, 2, 24)

5001    DEP_FIELD(SMMU_CB12_SCTLR, SHCFG, 2, 22)
5002    DEP_FIELD(SMMU_CB12_SCTLR, FB, 1, 21)
5003    DEP_FIELD(SMMU_CB12_SCTLR, MTCFG, 1, 20)
5004    DEP_FIELD(SMMU_CB12_SCTLR, MEMATTR, 4, 16)
5005    DEP_FIELD(SMMU_CB12_SCTLR, TRANSIENTCFG, 2, 14)
5006    DEP_FIELD(SMMU_CB12_SCTLR, PTW, 1, 13)
5007    DEP_FIELD(SMMU_CB12_SCTLR, ASIDPNE, 1, 12)
5008    DEP_FIELD(SMMU_CB12_SCTLR, UWXN, 1, 10)
5009    DEP_FIELD(SMMU_CB12_SCTLR, WXN, 1, 9)
5010    DEP_FIELD(SMMU_CB12_SCTLR, HUPCF, 1, 8)
5011    DEP_FIELD(SMMU_CB12_SCTLR, CFCFG, 1, 7)
5012    DEP_FIELD(SMMU_CB12_SCTLR, CFIE, 1, 6)
5013    DEP_FIELD(SMMU_CB12_SCTLR, CFRE, 1, 5)
5014    DEP_FIELD(SMMU_CB12_SCTLR, E, 1, 4)
5015    DEP_FIELD(SMMU_CB12_SCTLR, AFFD, 1, 3)
5016    DEP_FIELD(SMMU_CB12_SCTLR, AFE, 1, 2)
5017    DEP_FIELD(SMMU_CB12_SCTLR, TRE, 1, 1)
5018    DEP_FIELD(SMMU_CB12_SCTLR, M, 1, 0)
5019DEP_REG32(SMMU_CB12_ACTLR, 0x1c004)
5020    DEP_FIELD(SMMU_CB12_ACTLR, CPRE, 1, 1)
5021    DEP_FIELD(SMMU_CB12_ACTLR, CMTLB, 1, 0)
5022DEP_REG32(SMMU_CB12_RESUME, 0x1c008)
5023    DEP_FIELD(SMMU_CB12_RESUME, TNR, 1, 0)
5024DEP_REG32(SMMU_CB12_TCR2, 0x1c010)
5025    DEP_FIELD(SMMU_CB12_TCR2, NSCFG1, 1, 30)
5026    DEP_FIELD(SMMU_CB12_TCR2, SEP, 3, 15)
5027    DEP_FIELD(SMMU_CB12_TCR2, NSCFG0, 1, 14)
5028    DEP_FIELD(SMMU_CB12_TCR2, TBI1, 1, 6)
5029    DEP_FIELD(SMMU_CB12_TCR2, TBI0, 1, 5)
5030    DEP_FIELD(SMMU_CB12_TCR2, AS, 1, 4)
5031    DEP_FIELD(SMMU_CB12_TCR2, PASIZE, 3, 0)
5032DEP_REG32(SMMU_CB12_TTBR0_LOW, 0x1c020)
5033    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_31_7, 25, 7)
5034    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
5035    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
5036    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
5037    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_2, 1, 2)
5038    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_1_S, 1, 1)
5039    DEP_FIELD(SMMU_CB12_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
5040DEP_REG32(SMMU_CB12_TTBR0_HIGH, 0x1c024)
5041    DEP_FIELD(SMMU_CB12_TTBR0_HIGH, ASID, 16, 16)
5042    DEP_FIELD(SMMU_CB12_TTBR0_HIGH, ADDRESS, 16, 0)
5043DEP_REG32(SMMU_CB12_TTBR1_LOW, 0x1c028)
5044    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_31_7, 25, 7)
5045    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
5046    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
5047    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
5048    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_2, 1, 2)
5049    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_1_S, 1, 1)
5050    DEP_FIELD(SMMU_CB12_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
5051DEP_REG32(SMMU_CB12_TTBR1_HIGH, 0x1c02c)
5052    DEP_FIELD(SMMU_CB12_TTBR1_HIGH, ASID, 16, 16)
5053    DEP_FIELD(SMMU_CB12_TTBR1_HIGH, ADDRESS, 16, 0)
5054DEP_REG32(SMMU_CB12_TCR_LPAE, 0x1c030)
5055    DEP_FIELD(SMMU_CB12_TCR_LPAE, EAE, 1, 31)
5056    DEP_FIELD(SMMU_CB12_TCR_LPAE, NSCFG1_TG1, 1, 30)
5057    DEP_FIELD(SMMU_CB12_TCR_LPAE, SH1, 2, 28)
5058    DEP_FIELD(SMMU_CB12_TCR_LPAE, ORGN1, 2, 26)
5059    DEP_FIELD(SMMU_CB12_TCR_LPAE, IRGN1, 2, 24)
5060    DEP_FIELD(SMMU_CB12_TCR_LPAE, EPD1, 1, 23)
5061    DEP_FIELD(SMMU_CB12_TCR_LPAE, A1, 1, 22)
5062    DEP_FIELD(SMMU_CB12_TCR_LPAE, T1SZ_5_3, 3, 19)
5063    DEP_FIELD(SMMU_CB12_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
5064    DEP_FIELD(SMMU_CB12_TCR_LPAE, NSCFG0_TG0, 1, 14)
5065    DEP_FIELD(SMMU_CB12_TCR_LPAE, SH0, 2, 12)
5066    DEP_FIELD(SMMU_CB12_TCR_LPAE, ORGN0, 2, 10)
5067    DEP_FIELD(SMMU_CB12_TCR_LPAE, IRGN0, 2, 8)
5068    DEP_FIELD(SMMU_CB12_TCR_LPAE, SL0_1_EPD0, 1, 7)
5069    DEP_FIELD(SMMU_CB12_TCR_LPAE, SL0_0, 1, 6)
5070    DEP_FIELD(SMMU_CB12_TCR_LPAE, PD1_T0SZ_5, 1, 5)
5071    DEP_FIELD(SMMU_CB12_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
5072    DEP_FIELD(SMMU_CB12_TCR_LPAE, T0SZ_3_0, 4, 0)
5073DEP_REG32(SMMU_CB12_CONTEXTIDR, 0x1c034)
5074    DEP_FIELD(SMMU_CB12_CONTEXTIDR, PROCID, 24, 8)
5075    DEP_FIELD(SMMU_CB12_CONTEXTIDR, ASID, 8, 0)
5076DEP_REG32(SMMU_CB12_PRRR_MAIR0, 0x1c038)
5077    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS7, 1, 31)
5078    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS6, 1, 30)
5079    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS5, 1, 29)
5080    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS4, 1, 28)
5081    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS3, 1, 27)
5082    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS2, 1, 26)
5083    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS1, 1, 25)
5084    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NOS0, 1, 24)
5085    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NS1, 1, 19)
5086    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, NS0, 1, 18)
5087    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, DS1, 1, 17)
5088    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, DS0, 1, 16)
5089    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR7, 2, 14)
5090    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR6, 2, 12)
5091    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR5, 2, 10)
5092    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR4, 2, 8)
5093    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR3, 2, 6)
5094    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR2, 2, 4)
5095    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR1, 2, 2)
5096    DEP_FIELD(SMMU_CB12_PRRR_MAIR0, TR0, 2, 0)
5097DEP_REG32(SMMU_CB12_NMRR_MAIR1, 0x1c03c)
5098    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR7, 2, 30)
5099    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR6, 2, 28)
5100    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR5, 2, 26)
5101    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR4, 2, 24)
5102    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR3, 2, 22)
5103    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR2, 2, 20)
5104    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR1, 2, 18)
5105    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, OR0, 2, 16)
5106    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR7, 2, 14)
5107    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR6, 2, 12)
5108    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR5, 2, 10)
5109    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR4, 2, 8)
5110    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR3, 2, 6)
5111    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR2, 2, 4)
5112    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR1, 2, 2)
5113    DEP_FIELD(SMMU_CB12_NMRR_MAIR1, IR0, 2, 0)
5114DEP_REG32(SMMU_CB12_FSR, 0x1c058)
5115    DEP_FIELD(SMMU_CB12_FSR, MULTI, 1, 31)
5116    DEP_FIELD(SMMU_CB12_FSR, SS, 1, 30)
5117    DEP_FIELD(SMMU_CB12_FSR, FORMAT, 2, 9)
5118    DEP_FIELD(SMMU_CB12_FSR, UUT, 1, 8)
5119    DEP_FIELD(SMMU_CB12_FSR, ASF, 1, 7)
5120    DEP_FIELD(SMMU_CB12_FSR, TLBLKF, 1, 6)
5121    DEP_FIELD(SMMU_CB12_FSR, TLBMCF, 1, 5)
5122    DEP_FIELD(SMMU_CB12_FSR, EF, 1, 4)
5123    DEP_FIELD(SMMU_CB12_FSR, PF, 1, 3)
5124    DEP_FIELD(SMMU_CB12_FSR, AFF, 1, 2)
5125    DEP_FIELD(SMMU_CB12_FSR, TF, 1, 1)
5126DEP_REG32(SMMU_CB12_FSRRESTORE, 0x1c05c)
5127DEP_REG32(SMMU_CB12_FAR_LOW, 0x1c060)
5128DEP_REG32(SMMU_CB12_FAR_HIGH, 0x1c064)
5129    DEP_FIELD(SMMU_CB12_FAR_HIGH, BITS, 17, 0)
5130DEP_REG32(SMMU_CB12_FSYNR0, 0x1c068)
5131    DEP_FIELD(SMMU_CB12_FSYNR0, S1CBNDX, 4, 16)
5132    DEP_FIELD(SMMU_CB12_FSYNR0, AFR, 1, 11)
5133    DEP_FIELD(SMMU_CB12_FSYNR0, PTWF, 1, 10)
5134    DEP_FIELD(SMMU_CB12_FSYNR0, ATOF, 1, 9)
5135    DEP_FIELD(SMMU_CB12_FSYNR0, NSATTR, 1, 8)
5136    DEP_FIELD(SMMU_CB12_FSYNR0, IND, 1, 6)
5137    DEP_FIELD(SMMU_CB12_FSYNR0, PNU, 1, 5)
5138    DEP_FIELD(SMMU_CB12_FSYNR0, WNR, 1, 4)
5139    DEP_FIELD(SMMU_CB12_FSYNR0, PLVL, 2, 0)
5140DEP_REG32(SMMU_CB12_IPAFAR_LOW, 0x1c070)
5141    DEP_FIELD(SMMU_CB12_IPAFAR_LOW, IPAFAR_L, 20, 12)
5142    DEP_FIELD(SMMU_CB12_IPAFAR_LOW, FAR_RO, 12, 0)
5143DEP_REG32(SMMU_CB12_IPAFAR_HIGH, 0x1c074)
5144    DEP_FIELD(SMMU_CB12_IPAFAR_HIGH, BITS, 16, 0)
5145DEP_REG32(SMMU_CB12_TLBIVA_LOW, 0x1c600)
5146DEP_REG32(SMMU_CB12_TLBIVA_HIGH, 0x1c604)
5147    DEP_FIELD(SMMU_CB12_TLBIVA_HIGH, ASID, 16, 16)
5148    DEP_FIELD(SMMU_CB12_TLBIVA_HIGH, ADDRESS, 5, 0)
5149DEP_REG32(SMMU_CB12_TLBIVAA_LOW, 0x1c608)
5150DEP_REG32(SMMU_CB12_TLBIVAA_HIGH, 0x1c60c)
5151    DEP_FIELD(SMMU_CB12_TLBIVAA_HIGH, ASID, 16, 16)
5152    DEP_FIELD(SMMU_CB12_TLBIVAA_HIGH, ADDRESS, 5, 0)
5153DEP_REG32(SMMU_CB12_TLBIASID, 0x1c610)
5154    DEP_FIELD(SMMU_CB12_TLBIASID, ASID, 16, 0)
5155DEP_REG32(SMMU_CB12_TLBIALL, 0x1c618)
5156DEP_REG32(SMMU_CB12_TLBIVAL_LOW, 0x1c620)
5157DEP_REG32(SMMU_CB12_TLBIVAL_HIGH, 0x1c624)
5158    DEP_FIELD(SMMU_CB12_TLBIVAL_HIGH, ASID, 16, 16)
5159    DEP_FIELD(SMMU_CB12_TLBIVAL_HIGH, ADDRESS, 5, 0)
5160DEP_REG32(SMMU_CB12_TLBIVAAL_LOW, 0x1c628)
5161DEP_REG32(SMMU_CB12_TLBIVAAL_HIGH, 0x1c62c)
5162    DEP_FIELD(SMMU_CB12_TLBIVAAL_HIGH, ASID, 16, 16)
5163    DEP_FIELD(SMMU_CB12_TLBIVAAL_HIGH, ADDRESS, 5, 0)
5164DEP_REG32(SMMU_CB12_TLBIIPAS2_LOW, 0x1c630)
5165DEP_REG32(SMMU_CB12_TLBIIPAS2_HIGH, 0x1c634)
5166    DEP_FIELD(SMMU_CB12_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
5167DEP_REG32(SMMU_CB12_TLBIIPAS2L_LOW, 0x1c638)
5168DEP_REG32(SMMU_CB12_TLBIIPAS2L_HIGH, 0x1c63c)
5169    DEP_FIELD(SMMU_CB12_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
5170DEP_REG32(SMMU_CB12_TLBSYNC, 0x1c7f0)
5171DEP_REG32(SMMU_CB12_TLBSTATUS, 0x1c7f4)
5172    DEP_FIELD(SMMU_CB12_TLBSTATUS, SACTIVE, 1, 0)
5173DEP_REG32(SMMU_CB12_PMEVCNTR0, 0x1ce00)
5174DEP_REG32(SMMU_CB12_PMEVCNTR1, 0x1ce04)
5175DEP_REG32(SMMU_CB12_PMEVCNTR2, 0x1ce08)
5176DEP_REG32(SMMU_CB12_PMEVCNTR3, 0x1ce0c)
5177DEP_REG32(SMMU_CB12_PMEVTYPER0, 0x1ce80)
5178    DEP_FIELD(SMMU_CB12_PMEVTYPER0, P, 1, 31)
5179    DEP_FIELD(SMMU_CB12_PMEVTYPER0, U, 1, 30)
5180    DEP_FIELD(SMMU_CB12_PMEVTYPER0, NSP, 1, 29)
5181    DEP_FIELD(SMMU_CB12_PMEVTYPER0, NSU, 1, 28)
5182    DEP_FIELD(SMMU_CB12_PMEVTYPER0, EVENT, 5, 0)
5183DEP_REG32(SMMU_CB12_PMEVTYPER1, 0x1ce84)
5184    DEP_FIELD(SMMU_CB12_PMEVTYPER1, P, 1, 31)
5185    DEP_FIELD(SMMU_CB12_PMEVTYPER1, U, 1, 30)
5186    DEP_FIELD(SMMU_CB12_PMEVTYPER1, NSP, 1, 29)
5187    DEP_FIELD(SMMU_CB12_PMEVTYPER1, NSU, 1, 28)
5188    DEP_FIELD(SMMU_CB12_PMEVTYPER1, EVENT, 5, 0)
5189DEP_REG32(SMMU_CB12_PMEVTYPER2, 0x1ce88)
5190    DEP_FIELD(SMMU_CB12_PMEVTYPER2, P, 1, 31)
5191    DEP_FIELD(SMMU_CB12_PMEVTYPER2, U, 1, 30)
5192    DEP_FIELD(SMMU_CB12_PMEVTYPER2, NSP, 1, 29)
5193    DEP_FIELD(SMMU_CB12_PMEVTYPER2, NSU, 1, 28)
5194    DEP_FIELD(SMMU_CB12_PMEVTYPER2, EVENT, 5, 0)
5195DEP_REG32(SMMU_CB12_PMEVTYPER3, 0x1ce8c)
5196    DEP_FIELD(SMMU_CB12_PMEVTYPER3, P, 1, 31)
5197    DEP_FIELD(SMMU_CB12_PMEVTYPER3, U, 1, 30)
5198    DEP_FIELD(SMMU_CB12_PMEVTYPER3, NSP, 1, 29)
5199    DEP_FIELD(SMMU_CB12_PMEVTYPER3, NSU, 1, 28)
5200    DEP_FIELD(SMMU_CB12_PMEVTYPER3, EVENT, 5, 0)
5201DEP_REG32(SMMU_CB12_PMCFGR, 0x1cf00)
5202    DEP_FIELD(SMMU_CB12_PMCFGR, NCG, 8, 24)
5203    DEP_FIELD(SMMU_CB12_PMCFGR, UEN, 1, 19)
5204    DEP_FIELD(SMMU_CB12_PMCFGR, EX, 1, 16)
5205    DEP_FIELD(SMMU_CB12_PMCFGR, CCD, 1, 15)
5206    DEP_FIELD(SMMU_CB12_PMCFGR, CC, 1, 14)
5207    DEP_FIELD(SMMU_CB12_PMCFGR, SIZE, 6, 8)
5208    DEP_FIELD(SMMU_CB12_PMCFGR, N, 8, 0)
5209DEP_REG32(SMMU_CB12_PMCR, 0x1cf04)
5210    DEP_FIELD(SMMU_CB12_PMCR, IMP, 8, 24)
5211    DEP_FIELD(SMMU_CB12_PMCR, X, 1, 4)
5212    DEP_FIELD(SMMU_CB12_PMCR, P, 1, 1)
5213    DEP_FIELD(SMMU_CB12_PMCR, E, 1, 0)
5214DEP_REG32(SMMU_CB12_PMCEID, 0x1cf20)
5215    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X12, 1, 17)
5216    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X11, 1, 16)
5217    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X10, 1, 15)
5218    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X0A, 1, 9)
5219    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X09, 1, 8)
5220    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X08, 1, 7)
5221    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X01, 1, 1)
5222    DEP_FIELD(SMMU_CB12_PMCEID, EVENT0X00, 1, 0)
5223DEP_REG32(SMMU_CB12_PMCNTENSE, 0x1cf40)
5224    DEP_FIELD(SMMU_CB12_PMCNTENSE, P3, 1, 3)
5225    DEP_FIELD(SMMU_CB12_PMCNTENSE, P2, 1, 2)
5226    DEP_FIELD(SMMU_CB12_PMCNTENSE, P1, 1, 1)
5227    DEP_FIELD(SMMU_CB12_PMCNTENSE, P0, 1, 0)
5228DEP_REG32(SMMU_CB12_PMCNTENCLR, 0x1cf44)
5229    DEP_FIELD(SMMU_CB12_PMCNTENCLR, P3, 1, 3)
5230    DEP_FIELD(SMMU_CB12_PMCNTENCLR, P2, 1, 2)
5231    DEP_FIELD(SMMU_CB12_PMCNTENCLR, P1, 1, 1)
5232    DEP_FIELD(SMMU_CB12_PMCNTENCLR, P0, 1, 0)
5233DEP_REG32(SMMU_CB12_PMCNTENSET, 0x1cf48)
5234    DEP_FIELD(SMMU_CB12_PMCNTENSET, P3, 1, 3)
5235    DEP_FIELD(SMMU_CB12_PMCNTENSET, P2, 1, 2)
5236    DEP_FIELD(SMMU_CB12_PMCNTENSET, P1, 1, 1)
5237    DEP_FIELD(SMMU_CB12_PMCNTENSET, P0, 1, 0)
5238DEP_REG32(SMMU_CB12_PMINTENCLR, 0x1cf4c)
5239    DEP_FIELD(SMMU_CB12_PMINTENCLR, P3, 1, 3)
5240    DEP_FIELD(SMMU_CB12_PMINTENCLR, P2, 1, 2)
5241    DEP_FIELD(SMMU_CB12_PMINTENCLR, P1, 1, 1)
5242    DEP_FIELD(SMMU_CB12_PMINTENCLR, P0, 1, 0)
5243DEP_REG32(SMMU_CB12_PMOVSCLR, 0x1cf50)
5244    DEP_FIELD(SMMU_CB12_PMOVSCLR, P3, 1, 3)
5245    DEP_FIELD(SMMU_CB12_PMOVSCLR, P2, 1, 2)
5246    DEP_FIELD(SMMU_CB12_PMOVSCLR, P1, 1, 1)
5247    DEP_FIELD(SMMU_CB12_PMOVSCLR, P0, 1, 0)
5248DEP_REG32(SMMU_CB12_PMOVSSET, 0x1cf58)
5249    DEP_FIELD(SMMU_CB12_PMOVSSET, P3, 1, 3)
5250    DEP_FIELD(SMMU_CB12_PMOVSSET, P2, 1, 2)
5251    DEP_FIELD(SMMU_CB12_PMOVSSET, P1, 1, 1)
5252    DEP_FIELD(SMMU_CB12_PMOVSSET, P0, 1, 0)
5253DEP_REG32(SMMU_CB12_PMAUTHSTATUS, 0x1cfb8)
5254    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, SNI, 1, 7)
5255    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, SNE, 1, 6)
5256    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, SI, 1, 5)
5257    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, SE, 1, 4)
5258    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, NSNI, 1, 3)
5259    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, NSNE, 1, 2)
5260    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, NSI, 1, 1)
5261    DEP_FIELD(SMMU_CB12_PMAUTHSTATUS, NSE, 1, 0)
5262DEP_REG32(SMMU_CB13_SCTLR, 0x1d000)
5263    DEP_FIELD(SMMU_CB13_SCTLR, NSCFG, 2, 28)
5264    DEP_FIELD(SMMU_CB13_SCTLR, WACFG, 2, 26)
5265    DEP_FIELD(SMMU_CB13_SCTLR, RACFG, 2, 24)
5266    DEP_FIELD(SMMU_CB13_SCTLR, SHCFG, 2, 22)
5267    DEP_FIELD(SMMU_CB13_SCTLR, FB, 1, 21)
5268    DEP_FIELD(SMMU_CB13_SCTLR, MTCFG, 1, 20)
5269    DEP_FIELD(SMMU_CB13_SCTLR, MEMATTR, 4, 16)
5270    DEP_FIELD(SMMU_CB13_SCTLR, TRANSIENTCFG, 2, 14)
5271    DEP_FIELD(SMMU_CB13_SCTLR, PTW, 1, 13)
5272    DEP_FIELD(SMMU_CB13_SCTLR, ASIDPNE, 1, 12)
5273    DEP_FIELD(SMMU_CB13_SCTLR, UWXN, 1, 10)
5274    DEP_FIELD(SMMU_CB13_SCTLR, WXN, 1, 9)
5275    DEP_FIELD(SMMU_CB13_SCTLR, HUPCF, 1, 8)
5276    DEP_FIELD(SMMU_CB13_SCTLR, CFCFG, 1, 7)
5277    DEP_FIELD(SMMU_CB13_SCTLR, CFIE, 1, 6)
5278    DEP_FIELD(SMMU_CB13_SCTLR, CFRE, 1, 5)
5279    DEP_FIELD(SMMU_CB13_SCTLR, E, 1, 4)
5280    DEP_FIELD(SMMU_CB13_SCTLR, AFFD, 1, 3)
5281    DEP_FIELD(SMMU_CB13_SCTLR, AFE, 1, 2)
5282    DEP_FIELD(SMMU_CB13_SCTLR, TRE, 1, 1)
5283    DEP_FIELD(SMMU_CB13_SCTLR, M, 1, 0)
5284DEP_REG32(SMMU_CB13_ACTLR, 0x1d004)
5285    DEP_FIELD(SMMU_CB13_ACTLR, CPRE, 1, 1)
5286    DEP_FIELD(SMMU_CB13_ACTLR, CMTLB, 1, 0)
5287DEP_REG32(SMMU_CB13_RESUME, 0x1d008)
5288    DEP_FIELD(SMMU_CB13_RESUME, TNR, 1, 0)
5289DEP_REG32(SMMU_CB13_TCR2, 0x1d010)
5290    DEP_FIELD(SMMU_CB13_TCR2, NSCFG1, 1, 30)
5291    DEP_FIELD(SMMU_CB13_TCR2, SEP, 3, 15)
5292    DEP_FIELD(SMMU_CB13_TCR2, NSCFG0, 1, 14)
5293    DEP_FIELD(SMMU_CB13_TCR2, TBI1, 1, 6)
5294    DEP_FIELD(SMMU_CB13_TCR2, TBI0, 1, 5)
5295    DEP_FIELD(SMMU_CB13_TCR2, AS, 1, 4)
5296    DEP_FIELD(SMMU_CB13_TCR2, PASIZE, 3, 0)
5297DEP_REG32(SMMU_CB13_TTBR0_LOW, 0x1d020)
5298    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_31_7, 25, 7)
5299    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
5300    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
5301    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
5302    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_2, 1, 2)
5303    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_1_S, 1, 1)
5304    DEP_FIELD(SMMU_CB13_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
5305DEP_REG32(SMMU_CB13_TTBR0_HIGH, 0x1d024)
5306    DEP_FIELD(SMMU_CB13_TTBR0_HIGH, ASID, 16, 16)
5307    DEP_FIELD(SMMU_CB13_TTBR0_HIGH, ADDRESS, 16, 0)
5308DEP_REG32(SMMU_CB13_TTBR1_LOW, 0x1d028)
5309    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_31_7, 25, 7)
5310    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
5311    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
5312    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
5313    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_2, 1, 2)
5314    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_1_S, 1, 1)
5315    DEP_FIELD(SMMU_CB13_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
5316DEP_REG32(SMMU_CB13_TTBR1_HIGH, 0x1d02c)
5317    DEP_FIELD(SMMU_CB13_TTBR1_HIGH, ASID, 16, 16)
5318    DEP_FIELD(SMMU_CB13_TTBR1_HIGH, ADDRESS, 16, 0)
5319DEP_REG32(SMMU_CB13_TCR_LPAE, 0x1d030)
5320    DEP_FIELD(SMMU_CB13_TCR_LPAE, EAE, 1, 31)
5321    DEP_FIELD(SMMU_CB13_TCR_LPAE, NSCFG1_TG1, 1, 30)
5322    DEP_FIELD(SMMU_CB13_TCR_LPAE, SH1, 2, 28)
5323    DEP_FIELD(SMMU_CB13_TCR_LPAE, ORGN1, 2, 26)
5324    DEP_FIELD(SMMU_CB13_TCR_LPAE, IRGN1, 2, 24)
5325    DEP_FIELD(SMMU_CB13_TCR_LPAE, EPD1, 1, 23)
5326    DEP_FIELD(SMMU_CB13_TCR_LPAE, A1, 1, 22)
5327    DEP_FIELD(SMMU_CB13_TCR_LPAE, T1SZ_5_3, 3, 19)
5328    DEP_FIELD(SMMU_CB13_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
5329    DEP_FIELD(SMMU_CB13_TCR_LPAE, NSCFG0_TG0, 1, 14)
5330    DEP_FIELD(SMMU_CB13_TCR_LPAE, SH0, 2, 12)
5331    DEP_FIELD(SMMU_CB13_TCR_LPAE, ORGN0, 2, 10)
5332    DEP_FIELD(SMMU_CB13_TCR_LPAE, IRGN0, 2, 8)
5333    DEP_FIELD(SMMU_CB13_TCR_LPAE, SL0_1_EPD0, 1, 7)
5334    DEP_FIELD(SMMU_CB13_TCR_LPAE, SL0_0, 1, 6)
5335    DEP_FIELD(SMMU_CB13_TCR_LPAE, PD1_T0SZ_5, 1, 5)
5336    DEP_FIELD(SMMU_CB13_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
5337    DEP_FIELD(SMMU_CB13_TCR_LPAE, T0SZ_3_0, 4, 0)
5338DEP_REG32(SMMU_CB13_CONTEXTIDR, 0x1d034)
5339    DEP_FIELD(SMMU_CB13_CONTEXTIDR, PROCID, 24, 8)
5340    DEP_FIELD(SMMU_CB13_CONTEXTIDR, ASID, 8, 0)
5341DEP_REG32(SMMU_CB13_PRRR_MAIR0, 0x1d038)
5342    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS7, 1, 31)
5343    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS6, 1, 30)
5344    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS5, 1, 29)
5345    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS4, 1, 28)
5346    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS3, 1, 27)
5347    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS2, 1, 26)
5348    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS1, 1, 25)
5349    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NOS0, 1, 24)
5350    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NS1, 1, 19)
5351    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, NS0, 1, 18)
5352    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, DS1, 1, 17)
5353    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, DS0, 1, 16)
5354    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR7, 2, 14)
5355    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR6, 2, 12)
5356    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR5, 2, 10)
5357    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR4, 2, 8)
5358    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR3, 2, 6)
5359    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR2, 2, 4)
5360    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR1, 2, 2)
5361    DEP_FIELD(SMMU_CB13_PRRR_MAIR0, TR0, 2, 0)
5362DEP_REG32(SMMU_CB13_NMRR_MAIR1, 0x1d03c)
5363    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR7, 2, 30)
5364    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR6, 2, 28)
5365    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR5, 2, 26)
5366    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR4, 2, 24)
5367    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR3, 2, 22)
5368    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR2, 2, 20)
5369    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR1, 2, 18)
5370    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, OR0, 2, 16)
5371    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR7, 2, 14)
5372    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR6, 2, 12)
5373    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR5, 2, 10)
5374    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR4, 2, 8)
5375    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR3, 2, 6)
5376    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR2, 2, 4)
5377    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR1, 2, 2)
5378    DEP_FIELD(SMMU_CB13_NMRR_MAIR1, IR0, 2, 0)
5379DEP_REG32(SMMU_CB13_FSR, 0x1d058)
5380    DEP_FIELD(SMMU_CB13_FSR, MULTI, 1, 31)
5381    DEP_FIELD(SMMU_CB13_FSR, SS, 1, 30)
5382    DEP_FIELD(SMMU_CB13_FSR, FORMAT, 2, 9)
5383    DEP_FIELD(SMMU_CB13_FSR, UUT, 1, 8)
5384    DEP_FIELD(SMMU_CB13_FSR, ASF, 1, 7)
5385    DEP_FIELD(SMMU_CB13_FSR, TLBLKF, 1, 6)
5386    DEP_FIELD(SMMU_CB13_FSR, TLBMCF, 1, 5)
5387    DEP_FIELD(SMMU_CB13_FSR, EF, 1, 4)
5388    DEP_FIELD(SMMU_CB13_FSR, PF, 1, 3)
5389    DEP_FIELD(SMMU_CB13_FSR, AFF, 1, 2)
5390    DEP_FIELD(SMMU_CB13_FSR, TF, 1, 1)
5391DEP_REG32(SMMU_CB13_FSRRESTORE, 0x1d05c)
5392DEP_REG32(SMMU_CB13_FAR_LOW, 0x1d060)
5393DEP_REG32(SMMU_CB13_FAR_HIGH, 0x1d064)
5394    DEP_FIELD(SMMU_CB13_FAR_HIGH, BITS, 17, 0)
5395DEP_REG32(SMMU_CB13_FSYNR0, 0x1d068)
5396    DEP_FIELD(SMMU_CB13_FSYNR0, S1CBNDX, 4, 16)
5397    DEP_FIELD(SMMU_CB13_FSYNR0, AFR, 1, 11)
5398    DEP_FIELD(SMMU_CB13_FSYNR0, PTWF, 1, 10)
5399    DEP_FIELD(SMMU_CB13_FSYNR0, ATOF, 1, 9)
5400    DEP_FIELD(SMMU_CB13_FSYNR0, NSATTR, 1, 8)
5401    DEP_FIELD(SMMU_CB13_FSYNR0, IND, 1, 6)
5402    DEP_FIELD(SMMU_CB13_FSYNR0, PNU, 1, 5)
5403    DEP_FIELD(SMMU_CB13_FSYNR0, WNR, 1, 4)
5404    DEP_FIELD(SMMU_CB13_FSYNR0, PLVL, 2, 0)
5405DEP_REG32(SMMU_CB13_IPAFAR_LOW, 0x1d070)
5406    DEP_FIELD(SMMU_CB13_IPAFAR_LOW, IPAFAR_L, 20, 12)
5407    DEP_FIELD(SMMU_CB13_IPAFAR_LOW, FAR_RO, 12, 0)
5408DEP_REG32(SMMU_CB13_IPAFAR_HIGH, 0x1d074)
5409    DEP_FIELD(SMMU_CB13_IPAFAR_HIGH, BITS, 16, 0)
5410DEP_REG32(SMMU_CB13_TLBIVA_LOW, 0x1d600)
5411DEP_REG32(SMMU_CB13_TLBIVA_HIGH, 0x1d604)
5412    DEP_FIELD(SMMU_CB13_TLBIVA_HIGH, ASID, 16, 16)
5413    DEP_FIELD(SMMU_CB13_TLBIVA_HIGH, ADDRESS, 5, 0)
5414DEP_REG32(SMMU_CB13_TLBIVAA_LOW, 0x1d608)
5415DEP_REG32(SMMU_CB13_TLBIVAA_HIGH, 0x1d60c)
5416    DEP_FIELD(SMMU_CB13_TLBIVAA_HIGH, ASID, 16, 16)
5417    DEP_FIELD(SMMU_CB13_TLBIVAA_HIGH, ADDRESS, 5, 0)
5418DEP_REG32(SMMU_CB13_TLBIASID, 0x1d610)
5419    DEP_FIELD(SMMU_CB13_TLBIASID, ASID, 16, 0)
5420DEP_REG32(SMMU_CB13_TLBIALL, 0x1d618)
5421DEP_REG32(SMMU_CB13_TLBIVAL_LOW, 0x1d620)
5422DEP_REG32(SMMU_CB13_TLBIVAL_HIGH, 0x1d624)
5423    DEP_FIELD(SMMU_CB13_TLBIVAL_HIGH, ASID, 16, 16)
5424    DEP_FIELD(SMMU_CB13_TLBIVAL_HIGH, ADDRESS, 5, 0)
5425DEP_REG32(SMMU_CB13_TLBIVAAL_LOW, 0x1d628)
5426DEP_REG32(SMMU_CB13_TLBIVAAL_HIGH, 0x1d62c)
5427    DEP_FIELD(SMMU_CB13_TLBIVAAL_HIGH, ASID, 16, 16)
5428    DEP_FIELD(SMMU_CB13_TLBIVAAL_HIGH, ADDRESS, 5, 0)
5429DEP_REG32(SMMU_CB13_TLBIIPAS2_LOW, 0x1d630)
5430DEP_REG32(SMMU_CB13_TLBIIPAS2_HIGH, 0x1d634)
5431    DEP_FIELD(SMMU_CB13_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
5432DEP_REG32(SMMU_CB13_TLBIIPAS2L_LOW, 0x1d638)
5433DEP_REG32(SMMU_CB13_TLBIIPAS2L_HIGH, 0x1d63c)
5434    DEP_FIELD(SMMU_CB13_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
5435DEP_REG32(SMMU_CB13_TLBSYNC, 0x1d7f0)
5436DEP_REG32(SMMU_CB13_TLBSTATUS, 0x1d7f4)
5437    DEP_FIELD(SMMU_CB13_TLBSTATUS, SACTIVE, 1, 0)
5438DEP_REG32(SMMU_CB13_PMEVCNTR0, 0x1de00)
5439DEP_REG32(SMMU_CB13_PMEVCNTR1, 0x1de04)
5440DEP_REG32(SMMU_CB13_PMEVCNTR2, 0x1de08)
5441DEP_REG32(SMMU_CB13_PMEVCNTR3, 0x1de0c)
5442DEP_REG32(SMMU_CB13_PMEVTYPER0, 0x1de80)
5443    DEP_FIELD(SMMU_CB13_PMEVTYPER0, P, 1, 31)
5444    DEP_FIELD(SMMU_CB13_PMEVTYPER0, U, 1, 30)
5445    DEP_FIELD(SMMU_CB13_PMEVTYPER0, NSP, 1, 29)
5446    DEP_FIELD(SMMU_CB13_PMEVTYPER0, NSU, 1, 28)
5447    DEP_FIELD(SMMU_CB13_PMEVTYPER0, EVENT, 5, 0)
5448DEP_REG32(SMMU_CB13_PMEVTYPER1, 0x1de84)
5449    DEP_FIELD(SMMU_CB13_PMEVTYPER1, P, 1, 31)
5450    DEP_FIELD(SMMU_CB13_PMEVTYPER1, U, 1, 30)
5451    DEP_FIELD(SMMU_CB13_PMEVTYPER1, NSP, 1, 29)
5452    DEP_FIELD(SMMU_CB13_PMEVTYPER1, NSU, 1, 28)
5453    DEP_FIELD(SMMU_CB13_PMEVTYPER1, EVENT, 5, 0)
5454DEP_REG32(SMMU_CB13_PMEVTYPER2, 0x1de88)
5455    DEP_FIELD(SMMU_CB13_PMEVTYPER2, P, 1, 31)
5456    DEP_FIELD(SMMU_CB13_PMEVTYPER2, U, 1, 30)
5457    DEP_FIELD(SMMU_CB13_PMEVTYPER2, NSP, 1, 29)
5458    DEP_FIELD(SMMU_CB13_PMEVTYPER2, NSU, 1, 28)
5459    DEP_FIELD(SMMU_CB13_PMEVTYPER2, EVENT, 5, 0)
5460DEP_REG32(SMMU_CB13_PMEVTYPER3, 0x1de8c)
5461    DEP_FIELD(SMMU_CB13_PMEVTYPER3, P, 1, 31)
5462    DEP_FIELD(SMMU_CB13_PMEVTYPER3, U, 1, 30)
5463    DEP_FIELD(SMMU_CB13_PMEVTYPER3, NSP, 1, 29)
5464    DEP_FIELD(SMMU_CB13_PMEVTYPER3, NSU, 1, 28)
5465    DEP_FIELD(SMMU_CB13_PMEVTYPER3, EVENT, 5, 0)
5466DEP_REG32(SMMU_CB13_PMCFGR, 0x1df00)
5467    DEP_FIELD(SMMU_CB13_PMCFGR, NCG, 8, 24)
5468    DEP_FIELD(SMMU_CB13_PMCFGR, UEN, 1, 19)
5469    DEP_FIELD(SMMU_CB13_PMCFGR, EX, 1, 16)
5470    DEP_FIELD(SMMU_CB13_PMCFGR, CCD, 1, 15)
5471    DEP_FIELD(SMMU_CB13_PMCFGR, CC, 1, 14)
5472    DEP_FIELD(SMMU_CB13_PMCFGR, SIZE, 6, 8)
5473    DEP_FIELD(SMMU_CB13_PMCFGR, N, 8, 0)
5474DEP_REG32(SMMU_CB13_PMCR, 0x1df04)
5475    DEP_FIELD(SMMU_CB13_PMCR, IMP, 8, 24)
5476    DEP_FIELD(SMMU_CB13_PMCR, X, 1, 4)
5477    DEP_FIELD(SMMU_CB13_PMCR, P, 1, 1)
5478    DEP_FIELD(SMMU_CB13_PMCR, E, 1, 0)
5479DEP_REG32(SMMU_CB13_PMCEID, 0x1df20)
5480    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X12, 1, 17)
5481    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X11, 1, 16)
5482    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X10, 1, 15)
5483    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X0A, 1, 9)
5484    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X09, 1, 8)
5485    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X08, 1, 7)
5486    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X01, 1, 1)
5487    DEP_FIELD(SMMU_CB13_PMCEID, EVENT0X00, 1, 0)
5488DEP_REG32(SMMU_CB13_PMCNTENSE, 0x1df40)
5489    DEP_FIELD(SMMU_CB13_PMCNTENSE, P3, 1, 3)
5490    DEP_FIELD(SMMU_CB13_PMCNTENSE, P2, 1, 2)
5491    DEP_FIELD(SMMU_CB13_PMCNTENSE, P1, 1, 1)
5492    DEP_FIELD(SMMU_CB13_PMCNTENSE, P0, 1, 0)
5493DEP_REG32(SMMU_CB13_PMCNTENCLR, 0x1df44)
5494    DEP_FIELD(SMMU_CB13_PMCNTENCLR, P3, 1, 3)
5495    DEP_FIELD(SMMU_CB13_PMCNTENCLR, P2, 1, 2)
5496    DEP_FIELD(SMMU_CB13_PMCNTENCLR, P1, 1, 1)
5497    DEP_FIELD(SMMU_CB13_PMCNTENCLR, P0, 1, 0)
5498DEP_REG32(SMMU_CB13_PMCNTENSET, 0x1df48)
5499    DEP_FIELD(SMMU_CB13_PMCNTENSET, P3, 1, 3)
5500    DEP_FIELD(SMMU_CB13_PMCNTENSET, P2, 1, 2)
5501    DEP_FIELD(SMMU_CB13_PMCNTENSET, P1, 1, 1)
5502    DEP_FIELD(SMMU_CB13_PMCNTENSET, P0, 1, 0)
5503DEP_REG32(SMMU_CB13_PMINTENCLR, 0x1df4c)
5504    DEP_FIELD(SMMU_CB13_PMINTENCLR, P3, 1, 3)
5505    DEP_FIELD(SMMU_CB13_PMINTENCLR, P2, 1, 2)
5506    DEP_FIELD(SMMU_CB13_PMINTENCLR, P1, 1, 1)
5507    DEP_FIELD(SMMU_CB13_PMINTENCLR, P0, 1, 0)
5508DEP_REG32(SMMU_CB13_PMOVSCLR, 0x1df50)
5509    DEP_FIELD(SMMU_CB13_PMOVSCLR, P3, 1, 3)
5510    DEP_FIELD(SMMU_CB13_PMOVSCLR, P2, 1, 2)
5511    DEP_FIELD(SMMU_CB13_PMOVSCLR, P1, 1, 1)
5512    DEP_FIELD(SMMU_CB13_PMOVSCLR, P0, 1, 0)
5513DEP_REG32(SMMU_CB13_PMOVSSET, 0x1df58)
5514    DEP_FIELD(SMMU_CB13_PMOVSSET, P3, 1, 3)
5515    DEP_FIELD(SMMU_CB13_PMOVSSET, P2, 1, 2)
5516    DEP_FIELD(SMMU_CB13_PMOVSSET, P1, 1, 1)
5517    DEP_FIELD(SMMU_CB13_PMOVSSET, P0, 1, 0)
5518DEP_REG32(SMMU_CB13_PMAUTHSTATUS, 0x1dfb8)
5519    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, SNI, 1, 7)
5520    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, SNE, 1, 6)
5521    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, SI, 1, 5)
5522    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, SE, 1, 4)
5523    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, NSNI, 1, 3)
5524    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, NSNE, 1, 2)
5525    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, NSI, 1, 1)
5526    DEP_FIELD(SMMU_CB13_PMAUTHSTATUS, NSE, 1, 0)
5527DEP_REG32(SMMU_CB14_SCTLR, 0x1e000)
5528    DEP_FIELD(SMMU_CB14_SCTLR, NSCFG, 2, 28)
5529    DEP_FIELD(SMMU_CB14_SCTLR, WACFG, 2, 26)
5530    DEP_FIELD(SMMU_CB14_SCTLR, RACFG, 2, 24)
5531    DEP_FIELD(SMMU_CB14_SCTLR, SHCFG, 2, 22)
5532    DEP_FIELD(SMMU_CB14_SCTLR, FB, 1, 21)
5533    DEP_FIELD(SMMU_CB14_SCTLR, MTCFG, 1, 20)
5534    DEP_FIELD(SMMU_CB14_SCTLR, MEMATTR, 4, 16)
5535    DEP_FIELD(SMMU_CB14_SCTLR, TRANSIENTCFG, 2, 14)
5536    DEP_FIELD(SMMU_CB14_SCTLR, PTW, 1, 13)
5537    DEP_FIELD(SMMU_CB14_SCTLR, ASIDPNE, 1, 12)
5538    DEP_FIELD(SMMU_CB14_SCTLR, UWXN, 1, 10)
5539    DEP_FIELD(SMMU_CB14_SCTLR, WXN, 1, 9)
5540    DEP_FIELD(SMMU_CB14_SCTLR, HUPCF, 1, 8)
5541    DEP_FIELD(SMMU_CB14_SCTLR, CFCFG, 1, 7)
5542    DEP_FIELD(SMMU_CB14_SCTLR, CFIE, 1, 6)
5543    DEP_FIELD(SMMU_CB14_SCTLR, CFRE, 1, 5)
5544    DEP_FIELD(SMMU_CB14_SCTLR, E, 1, 4)
5545    DEP_FIELD(SMMU_CB14_SCTLR, AFFD, 1, 3)
5546    DEP_FIELD(SMMU_CB14_SCTLR, AFE, 1, 2)
5547    DEP_FIELD(SMMU_CB14_SCTLR, TRE, 1, 1)
5548    DEP_FIELD(SMMU_CB14_SCTLR, M, 1, 0)
5549DEP_REG32(SMMU_CB14_ACTLR, 0x1e004)
5550    DEP_FIELD(SMMU_CB14_ACTLR, CPRE, 1, 1)
5551    DEP_FIELD(SMMU_CB14_ACTLR, CMTLB, 1, 0)
5552DEP_REG32(SMMU_CB14_RESUME, 0x1e008)
5553    DEP_FIELD(SMMU_CB14_RESUME, TNR, 1, 0)
5554DEP_REG32(SMMU_CB14_TCR2, 0x1e010)
5555    DEP_FIELD(SMMU_CB14_TCR2, NSCFG1, 1, 30)
5556    DEP_FIELD(SMMU_CB14_TCR2, SEP, 3, 15)
5557    DEP_FIELD(SMMU_CB14_TCR2, NSCFG0, 1, 14)
5558    DEP_FIELD(SMMU_CB14_TCR2, TBI1, 1, 6)
5559    DEP_FIELD(SMMU_CB14_TCR2, TBI0, 1, 5)
5560    DEP_FIELD(SMMU_CB14_TCR2, AS, 1, 4)
5561    DEP_FIELD(SMMU_CB14_TCR2, PASIZE, 3, 0)
5562DEP_REG32(SMMU_CB14_TTBR0_LOW, 0x1e020)
5563    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_31_7, 25, 7)
5564    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
5565    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
5566    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
5567    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_2, 1, 2)
5568    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_1_S, 1, 1)
5569    DEP_FIELD(SMMU_CB14_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
5570DEP_REG32(SMMU_CB14_TTBR0_HIGH, 0x1e024)
5571    DEP_FIELD(SMMU_CB14_TTBR0_HIGH, ASID, 16, 16)
5572    DEP_FIELD(SMMU_CB14_TTBR0_HIGH, ADDRESS, 16, 0)
5573DEP_REG32(SMMU_CB14_TTBR1_LOW, 0x1e028)
5574    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_31_7, 25, 7)
5575    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
5576    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
5577    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
5578    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_2, 1, 2)
5579    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_1_S, 1, 1)
5580    DEP_FIELD(SMMU_CB14_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
5581DEP_REG32(SMMU_CB14_TTBR1_HIGH, 0x1e02c)
5582    DEP_FIELD(SMMU_CB14_TTBR1_HIGH, ASID, 16, 16)
5583    DEP_FIELD(SMMU_CB14_TTBR1_HIGH, ADDRESS, 16, 0)
5584DEP_REG32(SMMU_CB14_TCR_LPAE, 0x1e030)
5585    DEP_FIELD(SMMU_CB14_TCR_LPAE, EAE, 1, 31)
5586    DEP_FIELD(SMMU_CB14_TCR_LPAE, NSCFG1_TG1, 1, 30)
5587    DEP_FIELD(SMMU_CB14_TCR_LPAE, SH1, 2, 28)
5588    DEP_FIELD(SMMU_CB14_TCR_LPAE, ORGN1, 2, 26)
5589    DEP_FIELD(SMMU_CB14_TCR_LPAE, IRGN1, 2, 24)
5590    DEP_FIELD(SMMU_CB14_TCR_LPAE, EPD1, 1, 23)
5591    DEP_FIELD(SMMU_CB14_TCR_LPAE, A1, 1, 22)
5592    DEP_FIELD(SMMU_CB14_TCR_LPAE, T1SZ_5_3, 3, 19)
5593    DEP_FIELD(SMMU_CB14_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
5594    DEP_FIELD(SMMU_CB14_TCR_LPAE, NSCFG0_TG0, 1, 14)
5595    DEP_FIELD(SMMU_CB14_TCR_LPAE, SH0, 2, 12)
5596    DEP_FIELD(SMMU_CB14_TCR_LPAE, ORGN0, 2, 10)
5597    DEP_FIELD(SMMU_CB14_TCR_LPAE, IRGN0, 2, 8)
5598    DEP_FIELD(SMMU_CB14_TCR_LPAE, SL0_1_EPD0, 1, 7)
5599    DEP_FIELD(SMMU_CB14_TCR_LPAE, SL0_0, 1, 6)
5600    DEP_FIELD(SMMU_CB14_TCR_LPAE, PD1_T0SZ_5, 1, 5)
5601    DEP_FIELD(SMMU_CB14_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
5602    DEP_FIELD(SMMU_CB14_TCR_LPAE, T0SZ_3_0, 4, 0)
5603DEP_REG32(SMMU_CB14_CONTEXTIDR, 0x1e034)
5604    DEP_FIELD(SMMU_CB14_CONTEXTIDR, PROCID, 24, 8)
5605    DEP_FIELD(SMMU_CB14_CONTEXTIDR, ASID, 8, 0)
5606DEP_REG32(SMMU_CB14_PRRR_MAIR0, 0x1e038)
5607    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS7, 1, 31)
5608    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS6, 1, 30)
5609    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS5, 1, 29)
5610    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS4, 1, 28)
5611    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS3, 1, 27)
5612    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS2, 1, 26)
5613    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS1, 1, 25)
5614    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NOS0, 1, 24)
5615    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NS1, 1, 19)
5616    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, NS0, 1, 18)
5617    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, DS1, 1, 17)
5618    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, DS0, 1, 16)
5619    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR7, 2, 14)
5620    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR6, 2, 12)
5621    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR5, 2, 10)
5622    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR4, 2, 8)
5623    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR3, 2, 6)
5624    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR2, 2, 4)
5625    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR1, 2, 2)
5626    DEP_FIELD(SMMU_CB14_PRRR_MAIR0, TR0, 2, 0)
5627DEP_REG32(SMMU_CB14_NMRR_MAIR1, 0x1e03c)
5628    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR7, 2, 30)
5629    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR6, 2, 28)
5630    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR5, 2, 26)
5631    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR4, 2, 24)
5632    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR3, 2, 22)
5633    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR2, 2, 20)
5634    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR1, 2, 18)
5635    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, OR0, 2, 16)
5636    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR7, 2, 14)
5637    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR6, 2, 12)
5638    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR5, 2, 10)
5639    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR4, 2, 8)
5640    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR3, 2, 6)
5641    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR2, 2, 4)
5642    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR1, 2, 2)
5643    DEP_FIELD(SMMU_CB14_NMRR_MAIR1, IR0, 2, 0)
5644DEP_REG32(SMMU_CB14_FSR, 0x1e058)
5645    DEP_FIELD(SMMU_CB14_FSR, MULTI, 1, 31)
5646    DEP_FIELD(SMMU_CB14_FSR, SS, 1, 30)
5647    DEP_FIELD(SMMU_CB14_FSR, FORMAT, 2, 9)
5648    DEP_FIELD(SMMU_CB14_FSR, UUT, 1, 8)
5649    DEP_FIELD(SMMU_CB14_FSR, ASF, 1, 7)
5650    DEP_FIELD(SMMU_CB14_FSR, TLBLKF, 1, 6)
5651    DEP_FIELD(SMMU_CB14_FSR, TLBMCF, 1, 5)
5652    DEP_FIELD(SMMU_CB14_FSR, EF, 1, 4)
5653    DEP_FIELD(SMMU_CB14_FSR, PF, 1, 3)
5654    DEP_FIELD(SMMU_CB14_FSR, AFF, 1, 2)
5655    DEP_FIELD(SMMU_CB14_FSR, TF, 1, 1)
5656DEP_REG32(SMMU_CB14_FSRRESTORE, 0x1e05c)
5657DEP_REG32(SMMU_CB14_FAR_LOW, 0x1e060)
5658DEP_REG32(SMMU_CB14_FAR_HIGH, 0x1e064)
5659    DEP_FIELD(SMMU_CB14_FAR_HIGH, BITS, 17, 0)
5660DEP_REG32(SMMU_CB14_FSYNR0, 0x1e068)
5661    DEP_FIELD(SMMU_CB14_FSYNR0, S1CBNDX, 4, 16)
5662    DEP_FIELD(SMMU_CB14_FSYNR0, AFR, 1, 11)
5663    DEP_FIELD(SMMU_CB14_FSYNR0, PTWF, 1, 10)
5664    DEP_FIELD(SMMU_CB14_FSYNR0, ATOF, 1, 9)
5665    DEP_FIELD(SMMU_CB14_FSYNR0, NSATTR, 1, 8)
5666    DEP_FIELD(SMMU_CB14_FSYNR0, IND, 1, 6)
5667    DEP_FIELD(SMMU_CB14_FSYNR0, PNU, 1, 5)
5668    DEP_FIELD(SMMU_CB14_FSYNR0, WNR, 1, 4)
5669    DEP_FIELD(SMMU_CB14_FSYNR0, PLVL, 2, 0)
5670DEP_REG32(SMMU_CB14_IPAFAR_LOW, 0x1e070)
5671    DEP_FIELD(SMMU_CB14_IPAFAR_LOW, IPAFAR_L, 20, 12)
5672    DEP_FIELD(SMMU_CB14_IPAFAR_LOW, FAR_RO, 12, 0)
5673DEP_REG32(SMMU_CB14_IPAFAR_HIGH, 0x1e074)
5674    DEP_FIELD(SMMU_CB14_IPAFAR_HIGH, BITS, 16, 0)
5675DEP_REG32(SMMU_CB14_TLBIVA_LOW, 0x1e600)
5676DEP_REG32(SMMU_CB14_TLBIVA_HIGH, 0x1e604)
5677    DEP_FIELD(SMMU_CB14_TLBIVA_HIGH, ASID, 16, 16)
5678    DEP_FIELD(SMMU_CB14_TLBIVA_HIGH, ADDRESS, 5, 0)
5679DEP_REG32(SMMU_CB14_TLBIVAA_LOW, 0x1e608)
5680DEP_REG32(SMMU_CB14_TLBIVAA_HIGH, 0x1e60c)
5681    DEP_FIELD(SMMU_CB14_TLBIVAA_HIGH, ASID, 16, 16)
5682    DEP_FIELD(SMMU_CB14_TLBIVAA_HIGH, ADDRESS, 5, 0)
5683DEP_REG32(SMMU_CB14_TLBIASID, 0x1e610)
5684    DEP_FIELD(SMMU_CB14_TLBIASID, ASID, 16, 0)
5685DEP_REG32(SMMU_CB14_TLBIALL, 0x1e618)
5686DEP_REG32(SMMU_CB14_TLBIVAL_LOW, 0x1e620)
5687DEP_REG32(SMMU_CB14_TLBIVAL_HIGH, 0x1e624)
5688    DEP_FIELD(SMMU_CB14_TLBIVAL_HIGH, ASID, 16, 16)
5689    DEP_FIELD(SMMU_CB14_TLBIVAL_HIGH, ADDRESS, 5, 0)
5690DEP_REG32(SMMU_CB14_TLBIVAAL_LOW, 0x1e628)
5691DEP_REG32(SMMU_CB14_TLBIVAAL_HIGH, 0x1e62c)
5692    DEP_FIELD(SMMU_CB14_TLBIVAAL_HIGH, ASID, 16, 16)
5693    DEP_FIELD(SMMU_CB14_TLBIVAAL_HIGH, ADDRESS, 5, 0)
5694DEP_REG32(SMMU_CB14_TLBIIPAS2_LOW, 0x1e630)
5695DEP_REG32(SMMU_CB14_TLBIIPAS2_HIGH, 0x1e634)
5696    DEP_FIELD(SMMU_CB14_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
5697DEP_REG32(SMMU_CB14_TLBIIPAS2L_LOW, 0x1e638)
5698DEP_REG32(SMMU_CB14_TLBIIPAS2L_HIGH, 0x1e63c)
5699    DEP_FIELD(SMMU_CB14_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
5700DEP_REG32(SMMU_CB14_TLBSYNC, 0x1e7f0)
5701DEP_REG32(SMMU_CB14_TLBSTATUS, 0x1e7f4)
5702    DEP_FIELD(SMMU_CB14_TLBSTATUS, SACTIVE, 1, 0)
5703DEP_REG32(SMMU_CB14_PMEVCNTR0, 0x1ee00)
5704DEP_REG32(SMMU_CB14_PMEVCNTR1, 0x1ee04)
5705DEP_REG32(SMMU_CB14_PMEVCNTR2, 0x1ee08)
5706DEP_REG32(SMMU_CB14_PMEVCNTR3, 0x1ee0c)
5707DEP_REG32(SMMU_CB14_PMEVTYPER0, 0x1ee80)
5708    DEP_FIELD(SMMU_CB14_PMEVTYPER0, P, 1, 31)
5709    DEP_FIELD(SMMU_CB14_PMEVTYPER0, U, 1, 30)
5710    DEP_FIELD(SMMU_CB14_PMEVTYPER0, NSP, 1, 29)
5711    DEP_FIELD(SMMU_CB14_PMEVTYPER0, NSU, 1, 28)
5712    DEP_FIELD(SMMU_CB14_PMEVTYPER0, EVENT, 5, 0)
5713DEP_REG32(SMMU_CB14_PMEVTYPER1, 0x1ee84)
5714    DEP_FIELD(SMMU_CB14_PMEVTYPER1, P, 1, 31)
5715    DEP_FIELD(SMMU_CB14_PMEVTYPER1, U, 1, 30)
5716    DEP_FIELD(SMMU_CB14_PMEVTYPER1, NSP, 1, 29)
5717    DEP_FIELD(SMMU_CB14_PMEVTYPER1, NSU, 1, 28)
5718    DEP_FIELD(SMMU_CB14_PMEVTYPER1, EVENT, 5, 0)
5719DEP_REG32(SMMU_CB14_PMEVTYPER2, 0x1ee88)
5720    DEP_FIELD(SMMU_CB14_PMEVTYPER2, P, 1, 31)
5721    DEP_FIELD(SMMU_CB14_PMEVTYPER2, U, 1, 30)
5722    DEP_FIELD(SMMU_CB14_PMEVTYPER2, NSP, 1, 29)
5723    DEP_FIELD(SMMU_CB14_PMEVTYPER2, NSU, 1, 28)
5724    DEP_FIELD(SMMU_CB14_PMEVTYPER2, EVENT, 5, 0)
5725DEP_REG32(SMMU_CB14_PMEVTYPER3, 0x1ee8c)
5726    DEP_FIELD(SMMU_CB14_PMEVTYPER3, P, 1, 31)
5727    DEP_FIELD(SMMU_CB14_PMEVTYPER3, U, 1, 30)
5728    DEP_FIELD(SMMU_CB14_PMEVTYPER3, NSP, 1, 29)
5729    DEP_FIELD(SMMU_CB14_PMEVTYPER3, NSU, 1, 28)
5730    DEP_FIELD(SMMU_CB14_PMEVTYPER3, EVENT, 5, 0)
5731DEP_REG32(SMMU_CB14_PMCFGR, 0x1ef00)
5732    DEP_FIELD(SMMU_CB14_PMCFGR, NCG, 8, 24)
5733    DEP_FIELD(SMMU_CB14_PMCFGR, UEN, 1, 19)
5734    DEP_FIELD(SMMU_CB14_PMCFGR, EX, 1, 16)
5735    DEP_FIELD(SMMU_CB14_PMCFGR, CCD, 1, 15)
5736    DEP_FIELD(SMMU_CB14_PMCFGR, CC, 1, 14)
5737    DEP_FIELD(SMMU_CB14_PMCFGR, SIZE, 6, 8)
5738    DEP_FIELD(SMMU_CB14_PMCFGR, N, 8, 0)
5739DEP_REG32(SMMU_CB14_PMCR, 0x1ef04)
5740    DEP_FIELD(SMMU_CB14_PMCR, IMP, 8, 24)
5741    DEP_FIELD(SMMU_CB14_PMCR, X, 1, 4)
5742    DEP_FIELD(SMMU_CB14_PMCR, P, 1, 1)
5743    DEP_FIELD(SMMU_CB14_PMCR, E, 1, 0)
5744DEP_REG32(SMMU_CB14_PMCEID, 0x1ef20)
5745    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X12, 1, 17)
5746    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X11, 1, 16)
5747    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X10, 1, 15)
5748    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X0A, 1, 9)
5749    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X09, 1, 8)
5750    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X08, 1, 7)
5751    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X01, 1, 1)
5752    DEP_FIELD(SMMU_CB14_PMCEID, EVENT0X00, 1, 0)
5753DEP_REG32(SMMU_CB14_PMCNTENSE, 0x1ef40)
5754    DEP_FIELD(SMMU_CB14_PMCNTENSE, P3, 1, 3)
5755    DEP_FIELD(SMMU_CB14_PMCNTENSE, P2, 1, 2)
5756    DEP_FIELD(SMMU_CB14_PMCNTENSE, P1, 1, 1)
5757    DEP_FIELD(SMMU_CB14_PMCNTENSE, P0, 1, 0)
5758DEP_REG32(SMMU_CB14_PMCNTENCLR, 0x1ef44)
5759    DEP_FIELD(SMMU_CB14_PMCNTENCLR, P3, 1, 3)
5760    DEP_FIELD(SMMU_CB14_PMCNTENCLR, P2, 1, 2)
5761    DEP_FIELD(SMMU_CB14_PMCNTENCLR, P1, 1, 1)
5762    DEP_FIELD(SMMU_CB14_PMCNTENCLR, P0, 1, 0)
5763DEP_REG32(SMMU_CB14_PMCNTENSET, 0x1ef48)
5764    DEP_FIELD(SMMU_CB14_PMCNTENSET, P3, 1, 3)
5765    DEP_FIELD(SMMU_CB14_PMCNTENSET, P2, 1, 2)
5766    DEP_FIELD(SMMU_CB14_PMCNTENSET, P1, 1, 1)
5767    DEP_FIELD(SMMU_CB14_PMCNTENSET, P0, 1, 0)
5768DEP_REG32(SMMU_CB14_PMINTENCLR, 0x1ef4c)
5769    DEP_FIELD(SMMU_CB14_PMINTENCLR, P3, 1, 3)
5770    DEP_FIELD(SMMU_CB14_PMINTENCLR, P2, 1, 2)
5771    DEP_FIELD(SMMU_CB14_PMINTENCLR, P1, 1, 1)
5772    DEP_FIELD(SMMU_CB14_PMINTENCLR, P0, 1, 0)
5773DEP_REG32(SMMU_CB14_PMOVSCLR, 0x1ef50)
5774    DEP_FIELD(SMMU_CB14_PMOVSCLR, P3, 1, 3)
5775    DEP_FIELD(SMMU_CB14_PMOVSCLR, P2, 1, 2)
5776    DEP_FIELD(SMMU_CB14_PMOVSCLR, P1, 1, 1)
5777    DEP_FIELD(SMMU_CB14_PMOVSCLR, P0, 1, 0)
5778DEP_REG32(SMMU_CB14_PMOVSSET, 0x1ef58)
5779    DEP_FIELD(SMMU_CB14_PMOVSSET, P3, 1, 3)
5780    DEP_FIELD(SMMU_CB14_PMOVSSET, P2, 1, 2)
5781    DEP_FIELD(SMMU_CB14_PMOVSSET, P1, 1, 1)
5782    DEP_FIELD(SMMU_CB14_PMOVSSET, P0, 1, 0)
5783DEP_REG32(SMMU_CB14_PMAUTHSTATUS, 0x1efb8)
5784    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, SNI, 1, 7)
5785    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, SNE, 1, 6)
5786    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, SI, 1, 5)
5787    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, SE, 1, 4)
5788    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, NSNI, 1, 3)
5789    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, NSNE, 1, 2)
5790    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, NSI, 1, 1)
5791    DEP_FIELD(SMMU_CB14_PMAUTHSTATUS, NSE, 1, 0)
5792DEP_REG32(SMMU_CB15_SCTLR, 0x1f000)
5793    DEP_FIELD(SMMU_CB15_SCTLR, NSCFG, 2, 28)
5794    DEP_FIELD(SMMU_CB15_SCTLR, WACFG, 2, 26)
5795    DEP_FIELD(SMMU_CB15_SCTLR, RACFG, 2, 24)
5796    DEP_FIELD(SMMU_CB15_SCTLR, SHCFG, 2, 22)
5797    DEP_FIELD(SMMU_CB15_SCTLR, FB, 1, 21)
5798    DEP_FIELD(SMMU_CB15_SCTLR, MTCFG, 1, 20)
5799    DEP_FIELD(SMMU_CB15_SCTLR, MEMATTR, 4, 16)
5800    DEP_FIELD(SMMU_CB15_SCTLR, TRANSIENTCFG, 2, 14)
5801    DEP_FIELD(SMMU_CB15_SCTLR, PTW, 1, 13)
5802    DEP_FIELD(SMMU_CB15_SCTLR, ASIDPNE, 1, 12)
5803    DEP_FIELD(SMMU_CB15_SCTLR, UWXN, 1, 10)
5804    DEP_FIELD(SMMU_CB15_SCTLR, WXN, 1, 9)
5805    DEP_FIELD(SMMU_CB15_SCTLR, HUPCF, 1, 8)
5806    DEP_FIELD(SMMU_CB15_SCTLR, CFCFG, 1, 7)
5807    DEP_FIELD(SMMU_CB15_SCTLR, CFIE, 1, 6)
5808    DEP_FIELD(SMMU_CB15_SCTLR, CFRE, 1, 5)
5809    DEP_FIELD(SMMU_CB15_SCTLR, E, 1, 4)
5810    DEP_FIELD(SMMU_CB15_SCTLR, AFFD, 1, 3)
5811    DEP_FIELD(SMMU_CB15_SCTLR, AFE, 1, 2)
5812    DEP_FIELD(SMMU_CB15_SCTLR, TRE, 1, 1)
5813    DEP_FIELD(SMMU_CB15_SCTLR, M, 1, 0)
5814DEP_REG32(SMMU_CB15_ACTLR, 0x1f004)
5815    DEP_FIELD(SMMU_CB15_ACTLR, CPRE, 1, 1)
5816    DEP_FIELD(SMMU_CB15_ACTLR, CMTLB, 1, 0)
5817DEP_REG32(SMMU_CB15_RESUME, 0x1f008)
5818    DEP_FIELD(SMMU_CB15_RESUME, TNR, 1, 0)
5819DEP_REG32(SMMU_CB15_TCR2, 0x1f010)
5820    DEP_FIELD(SMMU_CB15_TCR2, NSCFG1, 1, 30)
5821    DEP_FIELD(SMMU_CB15_TCR2, SEP, 3, 15)
5822    DEP_FIELD(SMMU_CB15_TCR2, NSCFG0, 1, 14)
5823    DEP_FIELD(SMMU_CB15_TCR2, TBI1, 1, 6)
5824    DEP_FIELD(SMMU_CB15_TCR2, TBI0, 1, 5)
5825    DEP_FIELD(SMMU_CB15_TCR2, AS, 1, 4)
5826    DEP_FIELD(SMMU_CB15_TCR2, PASIZE, 3, 0)
5827DEP_REG32(SMMU_CB15_TTBR0_LOW, 0x1f020)
5828    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_31_7, 25, 7)
5829    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_6_IRGN0, 1, 6)
5830    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_5_NOS, 1, 5)
5831    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_4_3_RGN, 2, 3)
5832    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_2, 1, 2)
5833    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_1_S, 1, 1)
5834    DEP_FIELD(SMMU_CB15_TTBR0_LOW, ADDRESS_0_IRGN1, 1, 0)
5835DEP_REG32(SMMU_CB15_TTBR0_HIGH, 0x1f024)
5836    DEP_FIELD(SMMU_CB15_TTBR0_HIGH, ASID, 16, 16)
5837    DEP_FIELD(SMMU_CB15_TTBR0_HIGH, ADDRESS, 16, 0)
5838DEP_REG32(SMMU_CB15_TTBR1_LOW, 0x1f028)
5839    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_31_7, 25, 7)
5840    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_6_IRGN0, 1, 6)
5841    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_5_NOS, 1, 5)
5842    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_4_3_RGN, 2, 3)
5843    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_2, 1, 2)
5844    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_1_S, 1, 1)
5845    DEP_FIELD(SMMU_CB15_TTBR1_LOW, ADDRESS_0_IRGN1, 1, 0)
5846DEP_REG32(SMMU_CB15_TTBR1_HIGH, 0x1f02c)
5847    DEP_FIELD(SMMU_CB15_TTBR1_HIGH, ASID, 16, 16)
5848    DEP_FIELD(SMMU_CB15_TTBR1_HIGH, ADDRESS, 16, 0)
5849DEP_REG32(SMMU_CB15_TCR_LPAE, 0x1f030)
5850    DEP_FIELD(SMMU_CB15_TCR_LPAE, EAE, 1, 31)
5851    DEP_FIELD(SMMU_CB15_TCR_LPAE, NSCFG1_TG1, 1, 30)
5852    DEP_FIELD(SMMU_CB15_TCR_LPAE, SH1, 2, 28)
5853    DEP_FIELD(SMMU_CB15_TCR_LPAE, ORGN1, 2, 26)
5854    DEP_FIELD(SMMU_CB15_TCR_LPAE, IRGN1, 2, 24)
5855    DEP_FIELD(SMMU_CB15_TCR_LPAE, EPD1, 1, 23)
5856    DEP_FIELD(SMMU_CB15_TCR_LPAE, A1, 1, 22)
5857    DEP_FIELD(SMMU_CB15_TCR_LPAE, T1SZ_5_3, 3, 19)
5858    DEP_FIELD(SMMU_CB15_TCR_LPAE, T1SZ_2_0_PASIZE, 3, 16)
5859    DEP_FIELD(SMMU_CB15_TCR_LPAE, NSCFG0_TG0, 1, 14)
5860    DEP_FIELD(SMMU_CB15_TCR_LPAE, SH0, 2, 12)
5861    DEP_FIELD(SMMU_CB15_TCR_LPAE, ORGN0, 2, 10)
5862    DEP_FIELD(SMMU_CB15_TCR_LPAE, IRGN0, 2, 8)
5863    DEP_FIELD(SMMU_CB15_TCR_LPAE, SL0_1_EPD0, 1, 7)
5864    DEP_FIELD(SMMU_CB15_TCR_LPAE, SL0_0, 1, 6)
5865    DEP_FIELD(SMMU_CB15_TCR_LPAE, PD1_T0SZ_5, 1, 5)
5866    DEP_FIELD(SMMU_CB15_TCR_LPAE, S_PD0_T0SZ_4, 1, 4)
5867    DEP_FIELD(SMMU_CB15_TCR_LPAE, T0SZ_3_0, 4, 0)
5868DEP_REG32(SMMU_CB15_CONTEXTIDR, 0x1f034)
5869    DEP_FIELD(SMMU_CB15_CONTEXTIDR, PROCID, 24, 8)
5870    DEP_FIELD(SMMU_CB15_CONTEXTIDR, ASID, 8, 0)
5871DEP_REG32(SMMU_CB15_PRRR_MAIR0, 0x1f038)
5872    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS7, 1, 31)
5873    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS6, 1, 30)
5874    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS5, 1, 29)
5875    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS4, 1, 28)
5876    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS3, 1, 27)
5877    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS2, 1, 26)
5878    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS1, 1, 25)
5879    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NOS0, 1, 24)
5880    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NS1, 1, 19)
5881    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, NS0, 1, 18)
5882    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, DS1, 1, 17)
5883    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, DS0, 1, 16)
5884    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR7, 2, 14)
5885    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR6, 2, 12)
5886    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR5, 2, 10)
5887    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR4, 2, 8)
5888    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR3, 2, 6)
5889    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR2, 2, 4)
5890    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR1, 2, 2)
5891    DEP_FIELD(SMMU_CB15_PRRR_MAIR0, TR0, 2, 0)
5892DEP_REG32(SMMU_CB15_NMRR_MAIR1, 0x1f03c)
5893    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR7, 2, 30)
5894    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR6, 2, 28)
5895    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR5, 2, 26)
5896    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR4, 2, 24)
5897    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR3, 2, 22)
5898    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR2, 2, 20)
5899    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR1, 2, 18)
5900    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, OR0, 2, 16)
5901    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR7, 2, 14)
5902    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR6, 2, 12)
5903    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR5, 2, 10)
5904    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR4, 2, 8)
5905    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR3, 2, 6)
5906    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR2, 2, 4)
5907    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR1, 2, 2)
5908    DEP_FIELD(SMMU_CB15_NMRR_MAIR1, IR0, 2, 0)
5909DEP_REG32(SMMU_CB15_FSR, 0x1f058)
5910    DEP_FIELD(SMMU_CB15_FSR, MULTI, 1, 31)
5911    DEP_FIELD(SMMU_CB15_FSR, SS, 1, 30)
5912    DEP_FIELD(SMMU_CB15_FSR, FORMAT, 2, 9)
5913    DEP_FIELD(SMMU_CB15_FSR, UUT, 1, 8)
5914    DEP_FIELD(SMMU_CB15_FSR, ASF, 1, 7)
5915    DEP_FIELD(SMMU_CB15_FSR, TLBLKF, 1, 6)
5916    DEP_FIELD(SMMU_CB15_FSR, TLBMCF, 1, 5)
5917    DEP_FIELD(SMMU_CB15_FSR, EF, 1, 4)
5918    DEP_FIELD(SMMU_CB15_FSR, PF, 1, 3)
5919    DEP_FIELD(SMMU_CB15_FSR, AFF, 1, 2)
5920    DEP_FIELD(SMMU_CB15_FSR, TF, 1, 1)
5921DEP_REG32(SMMU_CB15_FSRRESTORE, 0x1f05c)
5922DEP_REG32(SMMU_CB15_FAR_LOW, 0x1f060)
5923DEP_REG32(SMMU_CB15_FAR_HIGH, 0x1f064)
5924    DEP_FIELD(SMMU_CB15_FAR_HIGH, BITS, 17, 0)
5925DEP_REG32(SMMU_CB15_FSYNR0, 0x1f068)
5926    DEP_FIELD(SMMU_CB15_FSYNR0, S1CBNDX, 4, 16)
5927    DEP_FIELD(SMMU_CB15_FSYNR0, AFR, 1, 11)
5928    DEP_FIELD(SMMU_CB15_FSYNR0, PTWF, 1, 10)
5929    DEP_FIELD(SMMU_CB15_FSYNR0, ATOF, 1, 9)
5930    DEP_FIELD(SMMU_CB15_FSYNR0, NSATTR, 1, 8)
5931    DEP_FIELD(SMMU_CB15_FSYNR0, IND, 1, 6)
5932    DEP_FIELD(SMMU_CB15_FSYNR0, PNU, 1, 5)
5933    DEP_FIELD(SMMU_CB15_FSYNR0, WNR, 1, 4)
5934    DEP_FIELD(SMMU_CB15_FSYNR0, PLVL, 2, 0)
5935DEP_REG32(SMMU_CB15_IPAFAR_LOW, 0x1f070)
5936    DEP_FIELD(SMMU_CB15_IPAFAR_LOW, IPAFAR_L, 20, 12)
5937    DEP_FIELD(SMMU_CB15_IPAFAR_LOW, FAR_RO, 12, 0)
5938DEP_REG32(SMMU_CB15_IPAFAR_HIGH, 0x1f074)
5939    DEP_FIELD(SMMU_CB15_IPAFAR_HIGH, BITS, 16, 0)
5940DEP_REG32(SMMU_CB15_TLBIVA_LOW, 0x1f600)
5941DEP_REG32(SMMU_CB15_TLBIVA_HIGH, 0x1f604)
5942    DEP_FIELD(SMMU_CB15_TLBIVA_HIGH, ASID, 16, 16)
5943    DEP_FIELD(SMMU_CB15_TLBIVA_HIGH, ADDRESS, 5, 0)
5944DEP_REG32(SMMU_CB15_TLBIVAA_LOW, 0x1f608)
5945DEP_REG32(SMMU_CB15_TLBIVAA_HIGH, 0x1f60c)
5946    DEP_FIELD(SMMU_CB15_TLBIVAA_HIGH, ASID, 16, 16)
5947    DEP_FIELD(SMMU_CB15_TLBIVAA_HIGH, ADDRESS, 5, 0)
5948DEP_REG32(SMMU_CB15_TLBIASID, 0x1f610)
5949    DEP_FIELD(SMMU_CB15_TLBIASID, ASID, 16, 0)
5950DEP_REG32(SMMU_CB15_TLBIALL, 0x1f618)
5951DEP_REG32(SMMU_CB15_TLBIVAL_LOW, 0x1f620)
5952DEP_REG32(SMMU_CB15_TLBIVAL_HIGH, 0x1f624)
5953    DEP_FIELD(SMMU_CB15_TLBIVAL_HIGH, ASID, 16, 16)
5954    DEP_FIELD(SMMU_CB15_TLBIVAL_HIGH, ADDRESS, 5, 0)
5955DEP_REG32(SMMU_CB15_TLBIVAAL_LOW, 0x1f628)
5956DEP_REG32(SMMU_CB15_TLBIVAAL_HIGH, 0x1f62c)
5957    DEP_FIELD(SMMU_CB15_TLBIVAAL_HIGH, ASID, 16, 16)
5958    DEP_FIELD(SMMU_CB15_TLBIVAAL_HIGH, ADDRESS, 5, 0)
5959DEP_REG32(SMMU_CB15_TLBIIPAS2_LOW, 0x1f630)
5960DEP_REG32(SMMU_CB15_TLBIIPAS2_HIGH, 0x1f634)
5961    DEP_FIELD(SMMU_CB15_TLBIIPAS2_HIGH, ADDRESS, 4, 0)
5962DEP_REG32(SMMU_CB15_TLBIIPAS2L_LOW, 0x1f638)
5963DEP_REG32(SMMU_CB15_TLBIIPAS2L_HIGH, 0x1f63c)
5964    DEP_FIELD(SMMU_CB15_TLBIIPAS2L_HIGH, ADDRESS, 4, 0)
5965DEP_REG32(SMMU_CB15_TLBSYNC, 0x1f7f0)
5966DEP_REG32(SMMU_CB15_TLBSTATUS, 0x1f7f4)
5967    DEP_FIELD(SMMU_CB15_TLBSTATUS, SACTIVE, 1, 0)
5968DEP_REG32(SMMU_CB15_PMEVCNTR0, 0x1fe00)
5969DEP_REG32(SMMU_CB15_PMEVCNTR1, 0x1fe04)
5970DEP_REG32(SMMU_CB15_PMEVCNTR2, 0x1fe08)
5971DEP_REG32(SMMU_CB15_PMEVCNTR3, 0x1fe0c)
5972DEP_REG32(SMMU_CB15_PMEVTYPER0, 0x1fe80)
5973    DEP_FIELD(SMMU_CB15_PMEVTYPER0, P, 1, 31)
5974    DEP_FIELD(SMMU_CB15_PMEVTYPER0, U, 1, 30)
5975    DEP_FIELD(SMMU_CB15_PMEVTYPER0, NSP, 1, 29)
5976    DEP_FIELD(SMMU_CB15_PMEVTYPER0, NSU, 1, 28)
5977    DEP_FIELD(SMMU_CB15_PMEVTYPER0, EVENT, 5, 0)
5978DEP_REG32(SMMU_CB15_PMEVTYPER1, 0x1fe84)
5979    DEP_FIELD(SMMU_CB15_PMEVTYPER1, P, 1, 31)
5980    DEP_FIELD(SMMU_CB15_PMEVTYPER1, U, 1, 30)
5981    DEP_FIELD(SMMU_CB15_PMEVTYPER1, NSP, 1, 29)
5982    DEP_FIELD(SMMU_CB15_PMEVTYPER1, NSU, 1, 28)
5983    DEP_FIELD(SMMU_CB15_PMEVTYPER1, EVENT, 5, 0)
5984DEP_REG32(SMMU_CB15_PMEVTYPER2, 0x1fe88)
5985    DEP_FIELD(SMMU_CB15_PMEVTYPER2, P, 1, 31)
5986    DEP_FIELD(SMMU_CB15_PMEVTYPER2, U, 1, 30)
5987    DEP_FIELD(SMMU_CB15_PMEVTYPER2, NSP, 1, 29)
5988    DEP_FIELD(SMMU_CB15_PMEVTYPER2, NSU, 1, 28)
5989    DEP_FIELD(SMMU_CB15_PMEVTYPER2, EVENT, 5, 0)
5990DEP_REG32(SMMU_CB15_PMEVTYPER3, 0x1fe8c)
5991    DEP_FIELD(SMMU_CB15_PMEVTYPER3, P, 1, 31)
5992    DEP_FIELD(SMMU_CB15_PMEVTYPER3, U, 1, 30)
5993    DEP_FIELD(SMMU_CB15_PMEVTYPER3, NSP, 1, 29)
5994    DEP_FIELD(SMMU_CB15_PMEVTYPER3, NSU, 1, 28)
5995    DEP_FIELD(SMMU_CB15_PMEVTYPER3, EVENT, 5, 0)
5996DEP_REG32(SMMU_CB15_PMCFGR, 0x1ff00)
5997    DEP_FIELD(SMMU_CB15_PMCFGR, NCG, 8, 24)
5998    DEP_FIELD(SMMU_CB15_PMCFGR, UEN, 1, 19)
5999    DEP_FIELD(SMMU_CB15_PMCFGR, EX, 1, 16)
6000    DEP_FIELD(SMMU_CB15_PMCFGR, CCD, 1, 15)

6001    DEP_FIELD(SMMU_CB15_PMCFGR, CC, 1, 14)
6002    DEP_FIELD(SMMU_CB15_PMCFGR, SIZE, 6, 8)
6003    DEP_FIELD(SMMU_CB15_PMCFGR, N, 8, 0)
6004DEP_REG32(SMMU_CB15_PMCR, 0x1ff04)
6005    DEP_FIELD(SMMU_CB15_PMCR, IMP, 8, 24)
6006    DEP_FIELD(SMMU_CB15_PMCR, X, 1, 4)
6007    DEP_FIELD(SMMU_CB15_PMCR, P, 1, 1)
6008    DEP_FIELD(SMMU_CB15_PMCR, E, 1, 0)
6009DEP_REG32(SMMU_CB15_PMCEID, 0x1ff20)
6010    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X12, 1, 17)
6011    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X11, 1, 16)
6012    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X10, 1, 15)
6013    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X0A, 1, 9)
6014    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X09, 1, 8)
6015    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X08, 1, 7)
6016    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X01, 1, 1)
6017    DEP_FIELD(SMMU_CB15_PMCEID, EVENT0X00, 1, 0)
6018DEP_REG32(SMMU_CB15_PMCNTENSE, 0x1ff40)
6019    DEP_FIELD(SMMU_CB15_PMCNTENSE, P3, 1, 3)
6020    DEP_FIELD(SMMU_CB15_PMCNTENSE, P2, 1, 2)
6021    DEP_FIELD(SMMU_CB15_PMCNTENSE, P1, 1, 1)
6022    DEP_FIELD(SMMU_CB15_PMCNTENSE, P0, 1, 0)
6023DEP_REG32(SMMU_CB15_PMCNTENCLR, 0x1ff44)
6024    DEP_FIELD(SMMU_CB15_PMCNTENCLR, P3, 1, 3)
6025    DEP_FIELD(SMMU_CB15_PMCNTENCLR, P2, 1, 2)
6026    DEP_FIELD(SMMU_CB15_PMCNTENCLR, P1, 1, 1)
6027    DEP_FIELD(SMMU_CB15_PMCNTENCLR, P0, 1, 0)
6028DEP_REG32(SMMU_CB15_PMCNTENSET, 0x1ff48)
6029    DEP_FIELD(SMMU_CB15_PMCNTENSET, P3, 1, 3)
6030    DEP_FIELD(SMMU_CB15_PMCNTENSET, P2, 1, 2)
6031    DEP_FIELD(SMMU_CB15_PMCNTENSET, P1, 1, 1)
6032    DEP_FIELD(SMMU_CB15_PMCNTENSET, P0, 1, 0)
6033DEP_REG32(SMMU_CB15_PMINTENCLR, 0x1ff4c)
6034    DEP_FIELD(SMMU_CB15_PMINTENCLR, P3, 1, 3)
6035    DEP_FIELD(SMMU_CB15_PMINTENCLR, P2, 1, 2)
6036    DEP_FIELD(SMMU_CB15_PMINTENCLR, P1, 1, 1)
6037    DEP_FIELD(SMMU_CB15_PMINTENCLR, P0, 1, 0)
6038DEP_REG32(SMMU_CB15_PMOVSCLR, 0x1ff50)
6039    DEP_FIELD(SMMU_CB15_PMOVSCLR, P3, 1, 3)
6040    DEP_FIELD(SMMU_CB15_PMOVSCLR, P2, 1, 2)
6041    DEP_FIELD(SMMU_CB15_PMOVSCLR, P1, 1, 1)
6042    DEP_FIELD(SMMU_CB15_PMOVSCLR, P0, 1, 0)
6043DEP_REG32(SMMU_CB15_PMOVSSET, 0x1ff58)
6044    DEP_FIELD(SMMU_CB15_PMOVSSET, P3, 1, 3)
6045    DEP_FIELD(SMMU_CB15_PMOVSSET, P2, 1, 2)
6046    DEP_FIELD(SMMU_CB15_PMOVSSET, P1, 1, 1)
6047    DEP_FIELD(SMMU_CB15_PMOVSSET, P0, 1, 0)
6048DEP_REG32(SMMU_CB15_PMAUTHSTATUS, 0x1ffb8)
6049    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, SNI, 1, 7)
6050    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, SNE, 1, 6)
6051    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, SI, 1, 5)
6052    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, SE, 1, 4)
6053    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, NSNI, 1, 3)
6054    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, NSNE, 1, 2)
6055    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, NSI, 1, 1)
6056    DEP_FIELD(SMMU_CB15_PMAUTHSTATUS, NSE, 1, 0)
6057
6058/* Missing from the regspec.  */
6059DEP_REG32(SMMU_GATS1PR, 0x110)
6060DEP_REG32(SMMU_GATS1PR_H, 0x114)
6061DEP_REG32(SMMU_GATS1PW, 0x118)
6062DEP_REG32(SMMU_GATS1PW_H, 0x11C)
6063DEP_REG32(SMMU_GATS12PR, 0x130)
6064DEP_REG32(SMMU_GATS12PR_H, 0x134)
6065DEP_REG32(SMMU_GATS12PW, 0x138)
6066DEP_REG32(SMMU_GATS12PW_H, 0x13C)
6067DEP_REG32(SMMU_GPAR, 0x180)
6068DEP_REG32(SMMU_GPAR_H, 0x184)
6069DEP_REG32(SMMU_GATSR, 0x188)
6070
6071#define R_MAX (R_SMMU_CB15_PMAUTHSTATUS + 1)
6072
6073/* This should be configurable per instance.  */
6074#define PAGESIZE (A_SMMU_CB1_TTBR0_LOW - A_SMMU_CB0_TTBR0_LOW)
6075
6076/* Maximum number of TBUs supported by this model.  */
6077#define MAX_TBU 16
6078
6079typedef struct SMMU SMMU;
6080typedef struct TBU {
6081    SMMU *smmu;
6082    IOMMUMemoryRegion iommu;
6083    AddressSpace *as;
6084    MemoryRegion *mr;
6085} TBU;
6086
6087struct SMMU {
6088    SysBusDevice parent_obj;
6089    MemoryRegion iomem;
6090
6091    MemoryRegion *dma_mr;
6092    AddressSpace *dma_as;
6093
6094    TBU tbu[MAX_TBU];
6095
6096    struct {
6097        qemu_irq global;
6098        qemu_irq context[16];
6099    } irq;
6100
6101    struct {
6102        uint32_t pamax;
6103    } cfg;
6104
6105    uint32_t regs[R_MAX];
6106    DepRegisterInfo regs_info[R_MAX];
6107};
6108
6109/* Generic page attributes.  */
6110typedef struct PageAttr {
6111    uint64_t pa;
6112    unsigned int block : 1;
6113    unsigned int rd : 1;
6114    unsigned int wr : 1;
6115    unsigned int ns : 1;
6116} PageAttr;
6117
6118typedef struct TransReq {
6119    uint64_t va;
6120    uint64_t tcr[3];
6121    uint64_t ttbr[3][2];
6122    uint32_t access;
6123    unsigned int stage;
6124    bool s2_enabled;
6125    unsigned int s2_cb;
6126
6127    uint64_t pa;
6128    uint32_t prot;
6129
6130    bool err;
6131} TransReq;
6132
6133static void smmu_update_ctx_irq(SMMU *s, unsigned int cb)
6134{
6135    unsigned int cb_offset = (cb * PAGESIZE) / 4;
6136    uint32_t sctlr;
6137    uint32_t fsr;
6138    bool ie, tf;
6139    bool pending;
6140
6141    fsr = s->regs[R_SMMU_CB0_FSR + cb_offset];
6142    sctlr = s->regs[R_SMMU_CB0_SCTLR + cb_offset];
6143
6144    tf = DEP_F_EX32(fsr, SMMU_CB0_FSR, TF);
6145    ie = DEP_F_EX32(sctlr, SMMU_CB0_SCTLR, CFIE);
6146    pending = tf && ie;
6147    qemu_set_irq(s->irq.context[cb], pending);
6148}
6149
6150static void smmu_fault(SMMU *s, unsigned int cb, TransReq *req, uint64_t syn)
6151{
6152    unsigned int cb_offset = (cb * PAGESIZE) / 4;
6153
6154    s->regs[R_SMMU_CB0_FSR + cb_offset] |= 1 << 1;
6155
6156    req->err = true;
6157    s->regs[R_SMMU_CB0_IPAFAR_LOW + cb_offset] = req->va;
6158    s->regs[R_SMMU_CB0_IPAFAR_HIGH + cb_offset] = req->va >> 32;
6159    if (req->stage == 2) {
6160        s->regs[R_SMMU_CB0_FAR_LOW + cb_offset] = req->va;
6161        s->regs[R_SMMU_CB0_FAR_HIGH + cb_offset] = req->va >> 32;
6162    }
6163    smmu_update_ctx_irq(s, cb);
6164}
6165
6166static int smmu_stream_id_match(SMMU *s, uint32_t stream_id)
6167{
6168    unsigned int nr_smr = DEP_AF_EX32(s->regs, SMMU_SIDR0, NUMSMRG);
6169    unsigned int i;
6170    uint32_t s2cr;
6171    unsigned int cbndx = -1;
6172
6173    for (i = 0; i < nr_smr; i++) {
6174        uint32_t v = s->regs[R_SMMU_SMR0 + i];
6175        bool valid = DEP_F_EX32(v, SMMU_SMR0, VALID);
6176        uint16_t mask = DEP_F_EX32(v, SMMU_SMR0, MASK);
6177        uint16_t id = DEP_F_EX32(v, SMMU_SMR0, ID);
6178
6179
6180        if (valid && (~mask & id) == (~mask & stream_id)) {
6181            s2cr = s->regs[R_SMMU_S2CR0 + i];
6182            cbndx = DEP_F_EX32(s2cr, SMMU_S2CR0, CBNDX_VMID);
6183            break;
6184        }
6185    }
6186    return cbndx;
6187}
6188
6189static bool check_s2_startlevel(bool is_aa64, unsigned int pamax, int level,
6190                                int inputsize, int stride)
6191{
6192    /* Negative levels are never allowed.  */
6193    if (level < 0) {
6194        return false;
6195    }
6196
6197    if (is_aa64) {
6198        switch (stride) {
6199        case 13: /* 64KB Pages.  */
6200            if (level == 0 || (level == 1 && pamax <= 42)) {
6201                return false;
6202            }
6203            break;
6204        case 11: /* 16KB Pages.  */
6205            if (level == 0 || (level == 1 && pamax <= 40)) {
6206                return false;
6207            }
6208            break;
6209        case 9: /* 4KB Pages.  */
6210            if (level == 0 && pamax <= 42) {
6211                return false;
6212            }
6213            break;
6214        default:
6215            g_assert_not_reached();
6216        }
6217    } else {
6218        const int grainsize = stride + 3;
6219        int startsizecheck;
6220
6221        /* AArch32 only supports 4KB pages. Assert on that.  */
6222        assert(stride == 9);
6223
6224        if (level == 0) {
6225            return false;
6226        }
6227
6228        startsizecheck = inputsize - ((3 - level) * stride + grainsize);
6229        if (startsizecheck < 1 || startsizecheck > stride + 4) {
6230            return false;
6231        }
6232    }
6233    return true;
6234}
6235
6236static bool check_out_addr(uint64_t addr, unsigned int outputsize)
6237{
6238    if (outputsize != 48 && extract64(addr, outputsize, 48 - outputsize)) {
6239        return false;
6240    }
6241    return true;
6242}
6243
6244static void smmu_ptw64(SMMU *s, unsigned int cb, TransReq *req)
6245{
6246    static const unsigned int outsize_map[] = {
6247        [0] = 32,
6248        [1] = 36,
6249        [2] = 40,
6250        [3] = 42,
6251        [4] = 44,
6252        [5] = 48,
6253        [6] = 48,
6254        [7] = 48,
6255    };
6256    unsigned int cb_offset = (cb * PAGESIZE) / 4;
6257    uint32_t sctlr;
6258    unsigned int tsz;
6259    unsigned int t0sz;
6260    unsigned int t1sz;
6261    unsigned int inputsize;
6262    unsigned int outputsize;
6263    unsigned int grainsize = -1;
6264    unsigned int stride;
6265    int level = 0;
6266    unsigned int firstblocklevel = 0;
6267    unsigned int tg;
6268    unsigned int ps;
6269    unsigned int baselowerbound;
6270    unsigned int stage = req->stage;
6271    bool blocktranslate = false;
6272    bool epd = false;
6273    bool va64;
6274    bool type64;
6275    uint32_t tableattrs = 0;
6276    uint32_t attrs;
6277    uint32_t s2attrs;
6278    uint64_t descmask;
6279    uint64_t ttbr;
6280    uint64_t desc;
6281
6282    req->err = false;
6283    sctlr = s->regs[R_SMMU_CB0_SCTLR + cb_offset];
6284
6285    if (DEP_F_EX32(sctlr, SMMU_CB0_SCTLR, M) == 0) {
6286        req->pa = req->va;
6287        req->prot = IOMMU_RW;
6288        D("SMMU disabled for context %d sctlr=%x\n", cb, sctlr);
6289        return;
6290    }
6291
6292    ttbr = req->ttbr[stage][0];
6293    tg = extract32(req->tcr[stage], 14, 2);
6294    if (stage == 1) {
6295        ps = extract64(req->tcr[stage], 32, 3);
6296    } else {
6297        ps = extract64(req->tcr[stage], 16, 3);
6298    }
6299    t0sz = extract32(req->tcr[stage], 0, 6);
6300    tsz = t0sz;
6301    req->pa = req->va;
6302
6303    va64 = s->regs[R_SMMU_CBA2R0 + cb] & 1;
6304    if (req->stage == 1) {
6305        type64 = va64 || extract32(req->tcr[1], 31, 1);
6306        /* We don't support 32bit page-tables yet.  */
6307        assert(type64);
6308
6309        if ((req->va & (1ULL << 63)) == 0) {
6310        } else {
6311            static const unsigned int tg1map[] = {
6312                [0] = 3,
6313                [1] = 2,
6314                [2] = 0,
6315                [3] = 1,
6316            };
6317            if (!va64 && type64) {
6318                /* LPAE uses 4K pages.  */
6319                tg = extract32(req->tcr[stage], 30, 2);
6320                tg = tg1map[tg];
6321                t1sz = extract32(req->tcr[stage], 16, 6);
6322            } else {
6323                /* Default to 4K.  */
6324                tg = 0;
6325                t1sz = extract32(req->tcr[stage], 16, 3);
6326            }
6327            ttbr = req->ttbr[stage][1];
6328            tsz = t1sz;
6329        }
6330        epd = extract32(req->tcr[1], 7, 1);
6331    } else {
6332        type64 = true;
6333    }
6334
6335    if (epd) {
6336        /* We've already missed the TLB at this stage so fault.  */
6337        goto do_fault;
6338    }
6339
6340    inputsize = 64 - tsz;
6341    switch (tg) {
6342    case 1:
6343        /* 64KB pages.  */
6344        grainsize = 16;
6345        level = 3;
6346        firstblocklevel = 2;
6347        break;
6348    case 2:
6349        /* 16KB pages.  */
6350        grainsize = 14;
6351        level = 3;
6352        firstblocklevel = 2;
6353        break;
6354    case 0:
6355        /* 4KB pages.  */
6356        grainsize = 12;
6357        level = 2;
6358        firstblocklevel = 1;
6359        break;
6360    default:
6361        qemu_log_mask(LOG_GUEST_ERROR, "SMMU: Wrong pagesize\n");
6362        break;
6363    }
6364
6365    stride = grainsize - 3;
6366    if (req->stage == 1) {
6367        if (grainsize < 16 && (inputsize > (grainsize + 3 * stride))) {
6368            level = 0;
6369        } else if (inputsize > (grainsize + 2 * stride)) {
6370            level = 1;
6371        } else if (inputsize > (grainsize + stride)) {
6372            level = 2;
6373        }
6374
6375        if (inputsize < 25 || inputsize > 48
6376            || extract64(req->va, inputsize, 64 - inputsize)) {
6377            goto do_fault;
6378        }
6379    } else {
6380        unsigned int startlevel = extract32(req->tcr[stage], 6, 2);
6381        bool ok;
6382
6383        level = 3 - startlevel;
6384        if (grainsize == 12) {
6385            level = 2 - startlevel;
6386        }
6387
6388        ok = check_s2_startlevel(true, 40, level, inputsize, stride);
6389        if (!ok) {
6390            goto do_fault;
6391        }
6392    }
6393
6394    outputsize = outsize_map[ps];
6395    if (outputsize > s->cfg.pamax) {
6396        outputsize = s->cfg.pamax;
6397    }
6398
6399    baselowerbound = 3 + inputsize - ((3 - level) * stride + grainsize);
6400    ttbr = extract64(ttbr, 0, 48);
6401    ttbr &= ~((1ULL << baselowerbound) - 1);
6402
6403    if (!check_out_addr(ttbr, outputsize)) {
6404        goto do_fault;
6405    }
6406
6407    descmask = (1ULL << grainsize) - 1;
6408    do {
6409        unsigned int addrselectbottom = (3 - level) * stride + grainsize;
6410        uint64_t index;
6411        uint64_t descaddr;
6412        unsigned int type;
6413
6414        index = (req->va >> (addrselectbottom - 3)) & descmask;
6415        index &= ~7ULL;
6416        descaddr = ttbr | index;
6417
6418        /* S1 PTW through the S2 system.  */
6419        if (req->stage == 1 && req->s2_enabled) {
6420            TransReq s2req = *req;
6421
6422            s2req.stage = 2;
6423            s2req.va = descaddr;
6424            smmu_ptw64(s, s2req.s2_cb, &s2req);
6425            if (req->err) {
6426                s->regs[R_SMMU_CB0_IPAFAR_LOW] = descaddr;
6427                s->regs[R_SMMU_CB0_IPAFAR_HIGH] = descaddr >> 32;
6428                goto do_fault;
6429            }
6430            descaddr = s2req.pa;
6431        }
6432        dma_memory_read(s->dma_as, descaddr, &desc, sizeof(desc));
6433        type = desc & 3;
6434
6435        D_PTW("smmu: S%d L%d va=0x%"PRIx64" gz=%d descaddr=0x%"PRIx64" "
6436              "desc=0x%"PRIx64" asb=%d index=0x%"PRIx64" osize=%d\n",
6437              req->stage, level, req->va, grainsize, descaddr, desc,
6438              addrselectbottom, index, outputsize);
6439        ttbr = extract64(desc, 0, 48);
6440        ttbr &= ~descmask;
6441
6442        /* special case.  */
6443        if (!(type & 2) && level == 3) {
6444            D("smmu: bad level 3 desc\n");
6445            goto do_fault;
6446        }
6447
6448        if (level == 3) {
6449            break;
6450        }
6451        switch (type) {
6452        case 2:
6453        case 0:
6454            /* Invalid.  */
6455            D("smmu: bad desc\n");
6456            goto do_fault;
6457            break;
6458        case 1:
6459            blocktranslate = true;
6460            if (level < firstblocklevel) {
6461                goto do_fault;
6462            }
6463            break;
6464        case 3:
6465            tableattrs |= extract64(desc, 59, 5);
6466            if (!check_out_addr(ttbr, outputsize)) {
6467                goto do_fault;
6468            }
6469            level++;
6470            break;
6471        }
6472    } while (!blocktranslate);
6473
6474    if (!check_out_addr(ttbr, outputsize)) {
6475        goto do_fault;
6476    }
6477
6478    {
6479        unsigned long page_size;
6480        page_size = (1ULL << ((stride * (4 - level)) + 3));
6481        ttbr |= (req->va & (page_size - 1));
6482    }
6483
6484    s2attrs = attrs = extract64(desc, 2, 10)
6485                      | (extract64(desc, 52, 12) << 10);
6486    if (req->stage == 1) {
6487        attrs |= extract32(tableattrs, 0, 2) << 11; /* XN, PXN */
6488        attrs |= extract32(tableattrs, 3, 1) << 5; /* APTable[1] => AP[2] */
6489        /* The sense of AP[1] vs APTable[0] is reversed, as APTable[0] == 1
6490         * means "force PL1 access only", which means forcing AP[1] to 0.
6491         */
6492        if (extract32(tableattrs, 2, 1)) {
6493            attrs &= ~(1 << 4);
6494        }
6495    }
6496
6497    req->prot = IOMMU_RW;
6498    if ((attrs & (1 << 8)) == 0) {
6499        /* Access flag */
6500        D("smmu: access forbidden %x\n", attrs);
6501        goto do_fault;
6502    }
6503
6504    /* AP[1] SBO.  */
6505    if (!(attrs & (1 << 4))) {
6506        D("smmu: AP[1] should be one but set to zero!\n");
6507        goto do_fault;
6508    }
6509    if (req->stage == 1) {
6510        if (attrs & (1 << 5)) {
6511            /* Write access forbidden */
6512            if (req->access == IOMMU_WO) {
6513                D("smmu: Write access forbidden %x\n", attrs);
6514                goto do_fault;
6515            }
6516            req->prot &= ~IOMMU_WO;
6517        }
6518    } else {
6519        switch ((s2attrs >> 4) & 3) {
6520        /* None.  */
6521        case 0:
6522            goto do_fault;
6523            break;
6524        /* RO.  */
6525        case 1:
6526            if (req->access == IOMMU_WO) {
6527                goto do_fault;
6528            }
6529            req->prot &= ~IOMMU_WO;
6530            break;
6531        /* WO.  */
6532        case 2:
6533            if (req->access == IOMMU_RO) {
6534                goto do_fault;
6535            }
6536            req->prot &= ~IOMMU_RO;
6537            break;
6538        /* RW.  */
6539        case 3:
6540            break;
6541        }
6542    }
6543
6544    req->pa = ttbr;
6545    D("SMMU: 0x%"PRIx64" -> 0x%"PRIx64"\n", req->va, req->pa);
6546    return;
6547
6548do_fault:
6549    D("smmu fault\n");
6550    smmu_fault(s, cb, req, level);
6551}
6552
6553static bool smmu500_at64(SMMU *s, unsigned int cb, hwaddr va,
6554                         bool wr, bool s2, hwaddr *pa, int *prot)
6555{
6556    unsigned int cb_offset = (cb * PAGESIZE) / 4;
6557    unsigned int cb2_offset = 0;
6558    TransReq req;
6559    uint32_t v;
6560    unsigned int t;
6561
6562    v = s->regs[R_SMMU_CBAR0 + cb];
6563    t = DEP_F_EX32(v, SMMU_CBAR0, TYPE);
6564    switch (t) {
6565    case 0:
6566        req.stage = 2;
6567        req.s2_enabled = true;
6568        req.s2_cb = cb;
6569        cb2_offset = cb_offset;
6570        break;
6571    case 1:
6572        req.stage = 1;
6573        req.s2_enabled = false;
6574        break;
6575    case 2:
6576        req.stage = 1;
6577        req.s2_enabled = false;
6578        /* Invalid ??? */
6579        break;
6580    case 3:
6581        req.stage = 1;
6582        req.s2_enabled = true;
6583        req.s2_cb = extract32(v, 8, 8);
6584        cb2_offset = (req.s2_cb * PAGESIZE) / 4;
6585        break;
6586    }
6587
6588    req.va = va;
6589    req.tcr[1] = s->regs[R_SMMU_CB0_TCR2 + cb_offset];
6590    req.tcr[1] <<= 32;
6591    req.tcr[1] |= s->regs[R_SMMU_CB0_TCR_LPAE + cb_offset];
6592
6593    req.ttbr[1][0] = s->regs[R_SMMU_CB0_TTBR0_HIGH + cb_offset];
6594    req.ttbr[1][0] <<= 32;
6595    req.ttbr[1][0] |= s->regs[R_SMMU_CB0_TTBR0_LOW + cb_offset];
6596
6597    req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_HIGH + cb_offset];
6598    req.ttbr[1][1] <<= 32;
6599    req.ttbr[1][1] |= s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset];
6600
6601    if (req.s2_enabled) {
6602        req.tcr[2] = s->regs[R_SMMU_CB0_TCR_LPAE + cb2_offset];
6603        req.ttbr[2][0] = s->regs[R_SMMU_CB0_TTBR0_HIGH + cb2_offset];
6604        req.ttbr[2][0] <<= 32;
6605        req.ttbr[2][0] |= s->regs[R_SMMU_CB0_TTBR0_LOW + cb2_offset];
6606    }
6607
6608    req.access = wr ? IOMMU_WO : IOMMU_RO;
6609
6610    if (req.stage == 1) {
6611        smmu_ptw64(s, cb, &req);
6612        req.stage++;
6613    } else {
6614        req.pa = req.va;
6615    }
6616
6617    if (s2 && req.s2_enabled) {
6618        req.va = req.pa;
6619
6620        smmu_ptw64(s, cb, &req);
6621    }
6622
6623    *pa = req.pa;
6624    *prot = req.prot;
6625    return req.err;
6626}
6627
6628static bool smmu500_at(SMMU *s, unsigned int cb, hwaddr va,
6629                       bool wr, bool s2, hwaddr *pa, int *prot)
6630{
6631    return smmu500_at64(s, cb, va, wr, s2, pa, prot);
6632}
6633
6634#define ADDRMASK    ((1ULL << 12) - 1)
6635
6636static void smmu500_gat(SMMU *s, uint64_t v, bool wr, bool s2)
6637{
6638    uint64_t va = v & ~ADDRMASK;
6639    unsigned int cb = v & ADDRMASK;
6640    hwaddr pa;
6641    int prot;
6642    bool err;
6643
6644    D("ATS: va=0x%"PRIx64" cb=%d wr=%d s2=%d\n", va, cb, wr, s2);
6645    err = smmu500_at(s, cb, va, wr, s2, &pa, &prot);
6646
6647    s->regs[R_SMMU_GPAR] = pa | err;
6648    s->regs[R_SMMU_GPAR_H] = pa >> 32;
6649}
6650
6651static void smmu_gats1pr(DepRegisterInfo *reg, uint64_t val)
6652{
6653    SMMU *s = XILINX_SMMU500(reg->opaque);
6654
6655    val <<= 32;
6656    val |= s->regs[(reg->access->decode.addr / 4) - 1];
6657    smmu500_gat(s, val, false, false);
6658}
6659
6660static void smmu_gats1pw(DepRegisterInfo *reg, uint64_t val)
6661{
6662    SMMU *s = XILINX_SMMU500(reg->opaque);
6663
6664    val <<= 32;
6665    val |= s->regs[(reg->access->decode.addr / 4) - 1];
6666    smmu500_gat(s, val, true, false);
6667}
6668
6669static void smmu_gats12pr(DepRegisterInfo *reg, uint64_t val)
6670{
6671    SMMU *s = XILINX_SMMU500(reg->opaque);
6672
6673    val <<= 32;
6674    val |= s->regs[(reg->access->decode.addr / 4) - 1];
6675    smmu500_gat(s, val, false, true);
6676}
6677
6678static void smmu_gats12pw(DepRegisterInfo *reg, uint64_t val)
6679{
6680    SMMU *s = XILINX_SMMU500(reg->opaque);
6681
6682    val <<= 32;
6683    val |= s->regs[(reg->access->decode.addr / 4) - 1];
6684    smmu500_gat(s, val, true, true);
6685}
6686
6687static void smmu_nscr0_pw(DepRegisterInfo *reg, uint64_t val)
6688{
6689    SMMU *s = XILINX_SMMU500(reg->opaque);
6690
6691    /* FIXME: Take care of secure vs non-secure accesses.  */
6692    s->regs[R_SMMU_SCR0] = val;
6693    s->regs[R_SMMU_NSCR0] = val;
6694}
6695
6696static IOMMUTLBEntry smmu_translate(IOMMUMemoryRegion *mr, hwaddr addr,
6697                                    bool is_write,
6698                                    MemTxAttrs *attr)
6699{
6700    TBU *tbu = container_of(mr, TBU, iommu);
6701    SMMU *s = tbu->smmu;
6702    IOMMUTLBEntry ret = {
6703        .target_as = tbu->as,
6704        .translated_addr = addr,
6705        .addr_mask = (1ULL << 12) - 1,
6706        .perm = IOMMU_RW,
6707    };
6708    int cb;
6709    uint64_t va = addr & ~ADDRMASK;
6710    hwaddr pa = va;
6711    int prot;
6712    bool err = false;
6713    uint64_t master_id = attr->master_id;
6714    bool clientpd = DEP_AF_EX32(s->regs, SMMU_SCR0, CLIENTPD);
6715
6716    if (clientpd) {
6717        return ret;
6718    }
6719
6720    cb = smmu_stream_id_match(s, master_id);
6721
6722    if (cb >= 0) {
6723        err = smmu500_at(s, cb, va, false, true, &pa, &prot);
6724        ret.translated_addr = pa;
6725        ret.perm = prot;
6726        if (err) {
6727            memset(&ret, 0, sizeof ret);
6728            ret.perm = IOMMU_NONE;
6729        }
6730    }
6731    return ret;
6732}
6733
6734static void smmu_fsr_pw(DepRegisterInfo *reg, uint64_t val)
6735{
6736    SMMU *s = XILINX_SMMU500(reg->opaque);
6737    unsigned int i;
6738
6739    for (i = 0; i < 16; i++) {
6740        smmu_update_ctx_irq(s, i);
6741    }
6742}
6743
6744static DepRegisterAccessInfo smmu500_regs_info[] = {
6745    /* Manually added.  */
6746    {   .name = "SMMU_GATS1PR",  .decode.addr = A_SMMU_GATS1PR,
6747    },
6748    {   .name = "SMMU_GATS1PR_H",  .decode.addr = A_SMMU_GATS1PR_H,
6749        .post_write = smmu_gats1pr,
6750    },
6751
6752    {   .name = "SMMU_GATS1PW",  .decode.addr = A_SMMU_GATS1PW,
6753    },
6754    {   .name = "SMMU_GATS1PW_H",  .decode.addr = A_SMMU_GATS1PW_H,
6755        .post_write = smmu_gats1pw,
6756    },
6757
6758    {   .name = "SMMU_GATS12PR",  .decode.addr = A_SMMU_GATS12PR,
6759    },
6760    {   .name = "SMMU_GATS12PR_H",  .decode.addr = A_SMMU_GATS12PR_H,
6761        .post_write = smmu_gats12pr,
6762    },
6763
6764    {   .name = "SMMU_GATS12PW",  .decode.addr = A_SMMU_GATS12PW,
6765    },
6766    {   .name = "SMMU_GATS12PW_H",  .decode.addr = A_SMMU_GATS12PW_H,
6767        .post_write = smmu_gats12pw,
6768    },
6769
6770    {   .name = "SMMU_GPAR",  .decode.addr = A_SMMU_GPAR, },
6771    {   .name = "SMMU_GPAR_H",  .decode.addr = A_SMMU_GPAR_H, },
6772    {   .name = "SMMU_GATSR",  .decode.addr = A_SMMU_GATSR, },
6773
6774
6775    {   .name = "SMMU_SCR0",  .decode.addr = A_SMMU_SCR0,
6776        .reset = 0x200001,
6777        .ro = 0x200330,
6778    },{ .name = "SMMU_SCR1",  .decode.addr = A_SMMU_SCR1,
6779        .reset = 0x2013010,
6780        .ro = 0x10ff0000,
6781    },{ .name = "SMMU_SACR",  .decode.addr = A_SMMU_SACR,
6782        .reset = 0x4000004,
6783    },{ .name = "SMMU_SIDR0",  .decode.addr = A_SMMU_SIDR0,
6784        .reset = 0xfc013e30,
6785        .ro = 0xffff7eff,
6786    },{ .name = "SMMU_SIDR1",  .decode.addr = A_SMMU_SIDR1,
6787        .reset = 0x30000f10,
6788        .ro = 0xf0ff9fff,
6789    },{ .name = "SMMU_SIDR2",  .decode.addr = A_SMMU_SIDR2,
6790        .reset = 0x5555,
6791        .ro = 0x7fff,
6792    },{ .name = "SMMU_SIDR7",  .decode.addr = A_SMMU_SIDR7,
6793        .reset = 0x21,
6794        .ro = 0xff,
6795    },{ .name = "SMMU_SGFAR_LOW",  .decode.addr = A_SMMU_SGFAR_LOW,
6796    },{ .name = "SMMU_SGFAR_HIGH",  .decode.addr = A_SMMU_SGFAR_HIGH,
6797    },{ .name = "SMMU_SGFSR",  .decode.addr = A_SMMU_SGFSR,
6798    },{ .name = "SMMU_SGFSRRESTORE",  .decode.addr = A_SMMU_SGFSRRESTORE,
6799    },{ .name = "SMMU_SGFSYNR0",  .decode.addr = A_SMMU_SGFSYNR0,
6800        .ro = 0x40,
6801    },{ .name = "SMMU_SGFSYNR1",  .decode.addr = A_SMMU_SGFSYNR1,
6802    },{ .name = "SMMU_STLBIALL",  .decode.addr = A_SMMU_STLBIALL,
6803    },{ .name = "SMMU_TLBIVMID",  .decode.addr = A_SMMU_TLBIVMID,
6804    },{ .name = "SMMU_TLBIALLNSNH",  .decode.addr = A_SMMU_TLBIALLNSNH,
6805    },{ .name = "SMMU_STLBGSYNC",  .decode.addr = A_SMMU_STLBGSYNC,
6806    },{ .name = "SMMU_STLBGSTATUS",  .decode.addr = A_SMMU_STLBGSTATUS,
6807        .ro = 0x1,
6808    },{ .name = "SMMU_DBGRPTRTBU",  .decode.addr = A_SMMU_DBGRPTRTBU,
6809    },{ .name = "SMMU_DBGRDATATBU",  .decode.addr = A_SMMU_DBGRDATATBU,
6810        .ro = 0xffffffff,
6811    },{ .name = "SMMU_DBGRPTRTCU",  .decode.addr = A_SMMU_DBGRPTRTCU,
6812    },{ .name = "SMMU_DBGRDATATCU",  .decode.addr = A_SMMU_DBGRDATATCU,
6813        .ro = 0xffffffff,
6814    },{ .name = "SMMU_STLBIVALM_LOW",  .decode.addr = A_SMMU_STLBIVALM_LOW,
6815    },{ .name = "SMMU_STLBIVALM_HIGH",  .decode.addr = A_SMMU_STLBIVALM_HIGH,
6816    },{ .name = "SMMU_STLBIVAM_LOW",  .decode.addr = A_SMMU_STLBIVAM_LOW,
6817    },{ .name = "SMMU_STLBIVAM_HIGH",  .decode.addr = A_SMMU_STLBIVAM_HIGH,
6818    },{ .name = "SMMU_STLBIALLM",  .decode.addr = A_SMMU_STLBIALLM,
6819    },{ .name = "SMMU_NSCR0",  .decode.addr = A_SMMU_NSCR0,
6820        .reset = 0x200001,
6821        .ro = 0x200330,
6822        .post_write = smmu_nscr0_pw,
6823    },{ .name = "SMMU_NSACR",  .decode.addr = A_SMMU_NSACR,
6824        .reset = 0x400001c,
6825    },{ .name = "SMMU_NSGFAR_LOW",  .decode.addr = A_SMMU_NSGFAR_LOW,
6826    },{ .name = "SMMU_NSGFAR_HIGH",  .decode.addr = A_SMMU_NSGFAR_HIGH,
6827    },{ .name = "SMMU_NSGFSR",  .decode.addr = A_SMMU_NSGFSR,
6828    },{ .name = "SMMU_NSGFSRRESTORE",  .decode.addr = A_SMMU_NSGFSRRESTORE,
6829    },{ .name = "SMMU_NSGFSYNR0",  .decode.addr = A_SMMU_NSGFSYNR0,
6830        .ro = 0x40,
6831    },{ .name = "SMMU_NSGFSYNDR1",  .decode.addr = A_SMMU_NSGFSYNDR1,
6832        .ro = 0x7fff0000,
6833    },{ .name = "SMMU_NSTLBGSYNC",  .decode.addr = A_SMMU_NSTLBGSYNC,
6834    },{ .name = "SMMU_NSTLBGSTATUS",  .decode.addr = A_SMMU_NSTLBGSTATUS,
6835        .ro = 0x1,
6836    },{ .name = "SMMU_SMR0",  .decode.addr = A_SMMU_SMR0,
6837    },{ .name = "SMMU_SMR1",  .decode.addr = A_SMMU_SMR1,
6838    },{ .name = "SMMU_SMR2",  .decode.addr = A_SMMU_SMR2,
6839    },{ .name = "SMMU_SMR3",  .decode.addr = A_SMMU_SMR3,
6840    },{ .name = "SMMU_SMR4",  .decode.addr = A_SMMU_SMR4,
6841    },{ .name = "SMMU_SMR5",  .decode.addr = A_SMMU_SMR5,
6842    },{ .name = "SMMU_SMR6",  .decode.addr = A_SMMU_SMR6,
6843    },{ .name = "SMMU_SMR7",  .decode.addr = A_SMMU_SMR7,
6844    },{ .name = "SMMU_SMR8",  .decode.addr = A_SMMU_SMR8,
6845    },{ .name = "SMMU_SMR9",  .decode.addr = A_SMMU_SMR9,
6846    },{ .name = "SMMU_SMR10",  .decode.addr = A_SMMU_SMR10,
6847    },{ .name = "SMMU_SMR11",  .decode.addr = A_SMMU_SMR11,
6848    },{ .name = "SMMU_SMR12",  .decode.addr = A_SMMU_SMR12,
6849    },{ .name = "SMMU_SMR13",  .decode.addr = A_SMMU_SMR13,
6850    },{ .name = "SMMU_SMR14",  .decode.addr = A_SMMU_SMR14,
6851    },{ .name = "SMMU_SMR15",  .decode.addr = A_SMMU_SMR15,
6852    },{ .name = "SMMU_SMR16",  .decode.addr = A_SMMU_SMR16,
6853    },{ .name = "SMMU_SMR17",  .decode.addr = A_SMMU_SMR17,
6854    },{ .name = "SMMU_SMR18",  .decode.addr = A_SMMU_SMR18,
6855    },{ .name = "SMMU_SMR19",  .decode.addr = A_SMMU_SMR19,
6856    },{ .name = "SMMU_SMR20",  .decode.addr = A_SMMU_SMR20,
6857    },{ .name = "SMMU_SMR21",  .decode.addr = A_SMMU_SMR21,
6858    },{ .name = "SMMU_SMR22",  .decode.addr = A_SMMU_SMR22,
6859    },{ .name = "SMMU_SMR23",  .decode.addr = A_SMMU_SMR23,
6860    },{ .name = "SMMU_SMR24",  .decode.addr = A_SMMU_SMR24,
6861    },{ .name = "SMMU_SMR25",  .decode.addr = A_SMMU_SMR25,
6862    },{ .name = "SMMU_SMR26",  .decode.addr = A_SMMU_SMR26,
6863    },{ .name = "SMMU_SMR27",  .decode.addr = A_SMMU_SMR27,
6864    },{ .name = "SMMU_SMR28",  .decode.addr = A_SMMU_SMR28,
6865    },{ .name = "SMMU_SMR29",  .decode.addr = A_SMMU_SMR29,
6866    },{ .name = "SMMU_SMR30",  .decode.addr = A_SMMU_SMR30,
6867    },{ .name = "SMMU_SMR31",  .decode.addr = A_SMMU_SMR31,
6868    },{ .name = "SMMU_SMR32",  .decode.addr = A_SMMU_SMR32,
6869    },{ .name = "SMMU_SMR33",  .decode.addr = A_SMMU_SMR33,
6870    },{ .name = "SMMU_SMR34",  .decode.addr = A_SMMU_SMR34,
6871    },{ .name = "SMMU_SMR35",  .decode.addr = A_SMMU_SMR35,
6872    },{ .name = "SMMU_SMR36",  .decode.addr = A_SMMU_SMR36,
6873    },{ .name = "SMMU_SMR37",  .decode.addr = A_SMMU_SMR37,
6874    },{ .name = "SMMU_SMR38",  .decode.addr = A_SMMU_SMR38,
6875    },{ .name = "SMMU_SMR39",  .decode.addr = A_SMMU_SMR39,
6876    },{ .name = "SMMU_SMR40",  .decode.addr = A_SMMU_SMR40,
6877    },{ .name = "SMMU_SMR41",  .decode.addr = A_SMMU_SMR41,
6878    },{ .name = "SMMU_SMR42",  .decode.addr = A_SMMU_SMR42,
6879    },{ .name = "SMMU_SMR43",  .decode.addr = A_SMMU_SMR43,
6880    },{ .name = "SMMU_SMR44",  .decode.addr = A_SMMU_SMR44,
6881    },{ .name = "SMMU_SMR45",  .decode.addr = A_SMMU_SMR45,
6882    },{ .name = "SMMU_SMR46",  .decode.addr = A_SMMU_SMR46,
6883    },{ .name = "SMMU_SMR47",  .decode.addr = A_SMMU_SMR47,
6884    },{ .name = "SMMU_S2CR0",  .decode.addr = A_SMMU_S2CR0,
6885        .reset = 0x20000,
6886    },{ .name = "SMMU_S2CR1",  .decode.addr = A_SMMU_S2CR1,
6887        .reset = 0x20000,
6888    },{ .name = "SMMU_S2CR2",  .decode.addr = A_SMMU_S2CR2,
6889        .reset = 0x20000,
6890    },{ .name = "SMMU_S2CR3",  .decode.addr = A_SMMU_S2CR3,
6891        .reset = 0x20000,
6892    },{ .name = "SMMU_S2CR4",  .decode.addr = A_SMMU_S2CR4,
6893        .reset = 0x20000,
6894    },{ .name = "SMMU_S2CR5",  .decode.addr = A_SMMU_S2CR5,
6895        .reset = 0x20000,
6896    },{ .name = "SMMU_S2CR6",  .decode.addr = A_SMMU_S2CR6,
6897        .reset = 0x20000,
6898    },{ .name = "SMMU_S2CR7",  .decode.addr = A_SMMU_S2CR7,
6899        .reset = 0x20000,
6900    },{ .name = "SMMU_S2CR8",  .decode.addr = A_SMMU_S2CR8,
6901        .reset = 0x20000,
6902    },{ .name = "SMMU_S2CR9",  .decode.addr = A_SMMU_S2CR9,
6903        .reset = 0x20000,
6904    },{ .name = "SMMU_S2CR10",  .decode.addr = A_SMMU_S2CR10,
6905        .reset = 0x20000,
6906    },{ .name = "SMMU_S2CR11",  .decode.addr = A_SMMU_S2CR11,
6907        .reset = 0x20000,
6908    },{ .name = "SMMU_S2CR12",  .decode.addr = A_SMMU_S2CR12,
6909        .reset = 0x20000,
6910    },{ .name = "SMMU_S2CR13",  .decode.addr = A_SMMU_S2CR13,
6911        .reset = 0x20000,
6912    },{ .name = "SMMU_S2CR14",  .decode.addr = A_SMMU_S2CR14,
6913        .reset = 0x20000,
6914    },{ .name = "SMMU_S2CR15",  .decode.addr = A_SMMU_S2CR15,
6915        .reset = 0x20000,
6916    },{ .name = "SMMU_S2CR16",  .decode.addr = A_SMMU_S2CR16,
6917        .reset = 0x20000,
6918    },{ .name = "SMMU_S2CR17",  .decode.addr = A_SMMU_S2CR17,
6919        .reset = 0x20000,
6920    },{ .name = "SMMU_S2CR18",  .decode.addr = A_SMMU_S2CR18,
6921        .reset = 0x20000,
6922    },{ .name = "SMMU_S2CR19",  .decode.addr = A_SMMU_S2CR19,
6923        .reset = 0x20000,
6924    },{ .name = "SMMU_S2CR20",  .decode.addr = A_SMMU_S2CR20,
6925        .reset = 0x20000,
6926    },{ .name = "SMMU_S2CR21",  .decode.addr = A_SMMU_S2CR21,
6927        .reset = 0x20000,
6928    },{ .name = "SMMU_S2CR22",  .decode.addr = A_SMMU_S2CR22,
6929        .reset = 0x20000,
6930    },{ .name = "SMMU_S2CR23",  .decode.addr = A_SMMU_S2CR23,
6931        .reset = 0x20000,
6932    },{ .name = "SMMU_S2CR24",  .decode.addr = A_SMMU_S2CR24,
6933        .reset = 0x20000,
6934    },{ .name = "SMMU_S2CR25",  .decode.addr = A_SMMU_S2CR25,
6935        .reset = 0x20000,
6936    },{ .name = "SMMU_S2CR26",  .decode.addr = A_SMMU_S2CR26,
6937        .reset = 0x20000,
6938    },{ .name = "SMMU_S2CR27",  .decode.addr = A_SMMU_S2CR27,
6939        .reset = 0x20000,
6940    },{ .name = "SMMU_S2CR28",  .decode.addr = A_SMMU_S2CR28,
6941        .reset = 0x20000,
6942    },{ .name = "SMMU_S2CR29",  .decode.addr = A_SMMU_S2CR29,
6943        .reset = 0x20000,
6944    },{ .name = "SMMU_S2CR30",  .decode.addr = A_SMMU_S2CR30,
6945        .reset = 0x20000,
6946    },{ .name = "SMMU_S2CR31",  .decode.addr = A_SMMU_S2CR31,
6947        .reset = 0x20000,
6948    },{ .name = "SMMU_S2CR32",  .decode.addr = A_SMMU_S2CR32,
6949        .reset = 0x20000,
6950    },{ .name = "SMMU_S2CR33",  .decode.addr = A_SMMU_S2CR33,
6951        .reset = 0x20000,
6952    },{ .name = "SMMU_S2CR34",  .decode.addr = A_SMMU_S2CR34,
6953        .reset = 0x20000,
6954    },{ .name = "SMMU_S2CR35",  .decode.addr = A_SMMU_S2CR35,
6955        .reset = 0x20000,
6956    },{ .name = "SMMU_S2CR36",  .decode.addr = A_SMMU_S2CR36,
6957        .reset = 0x20000,
6958    },{ .name = "SMMU_S2CR37",  .decode.addr = A_SMMU_S2CR37,
6959        .reset = 0x20000,
6960    },{ .name = "SMMU_S2CR38",  .decode.addr = A_SMMU_S2CR38,
6961        .reset = 0x20000,
6962    },{ .name = "SMMU_S2CR39",  .decode.addr = A_SMMU_S2CR39,
6963        .reset = 0x20000,
6964    },{ .name = "SMMU_S2CR40",  .decode.addr = A_SMMU_S2CR40,
6965        .reset = 0x20000,
6966    },{ .name = "SMMU_S2CR41",  .decode.addr = A_SMMU_S2CR41,
6967        .reset = 0x20000,
6968    },{ .name = "SMMU_S2CR42",  .decode.addr = A_SMMU_S2CR42,
6969        .reset = 0x20000,
6970    },{ .name = "SMMU_S2CR43",  .decode.addr = A_SMMU_S2CR43,
6971        .reset = 0x20000,
6972    },{ .name = "SMMU_S2CR44",  .decode.addr = A_SMMU_S2CR44,
6973        .reset = 0x20000,
6974    },{ .name = "SMMU_S2CR45",  .decode.addr = A_SMMU_S2CR45,
6975        .reset = 0x20000,
6976    },{ .name = "SMMU_S2CR46",  .decode.addr = A_SMMU_S2CR46,
6977        .reset = 0x20000,
6978    },{ .name = "SMMU_S2CR47",  .decode.addr = A_SMMU_S2CR47,
6979        .reset = 0x20000,
6980    },{ .name = "SMMU_PIDR4",  .decode.addr = A_SMMU_PIDR4,
6981        .reset = 0x4,
6982        .ro = 0xff,
6983    },{ .name = "SMMU_PIDR5",  .decode.addr = A_SMMU_PIDR5,
6984        .ro = 0xffffffff,
6985    },{ .name = "SMMU_PIDR6",  .decode.addr = A_SMMU_PIDR6,
6986        .ro = 0xffffffff,
6987    },{ .name = "SMMU_PIDR7",  .decode.addr = A_SMMU_PIDR7,
6988        .ro = 0xffffffff,
6989    },{ .name = "SMMU_PIDR0",  .decode.addr = A_SMMU_PIDR0,
6990        .reset = 0x81,
6991        .ro = 0xff,
6992    },{ .name = "SMMU_PIDR1",  .decode.addr = A_SMMU_PIDR1,
6993        .reset = 0xb4,
6994        .ro = 0xff,
6995    },{ .name = "SMMU_PIDR2",  .decode.addr = A_SMMU_PIDR2,
6996        .reset = 0x1b,
6997        .ro = 0xff,
6998    },{ .name = "SMMU_PIDR3",  .decode.addr = A_SMMU_PIDR3,
6999        .ro = 0xff,
7000    },{ .name = "SMMU_CIDR0",  .decode.addr = A_SMMU_CIDR0,

7001        .reset = 0xd,
7002        .ro = 0xff,
7003    },{ .name = "SMMU_CIDR1",  .decode.addr = A_SMMU_CIDR1,
7004        .reset = 0xf0,
7005        .ro = 0xff,
7006    },{ .name = "SMMU_CIDR2",  .decode.addr = A_SMMU_CIDR2,
7007        .reset = 0x5,
7008        .ro = 0xff,
7009    },{ .name = "SMMU_CIDR3",  .decode.addr = A_SMMU_CIDR3,
7010        .reset = 0xb1,
7011        .ro = 0xff,
7012    },{ .name = "SMMU_CBAR0",  .decode.addr = A_SMMU_CBAR0,
7013        .reset = 0x20000,
7014        .ro = 0xff000000,
7015    },{ .name = "SMMU_CBAR1",  .decode.addr = A_SMMU_CBAR1,
7016        .reset = 0x20000,
7017        .ro = 0xff000000,
7018    },{ .name = "SMMU_CBAR2",  .decode.addr = A_SMMU_CBAR2,
7019        .reset = 0x20000,
7020        .ro = 0xff000000,
7021    },{ .name = "SMMU_CBAR3",  .decode.addr = A_SMMU_CBAR3,
7022        .reset = 0x20000,
7023        .ro = 0xff000000,
7024    },{ .name = "SMMU_CBAR4",  .decode.addr = A_SMMU_CBAR4,
7025        .reset = 0x20000,
7026        .ro = 0xff000000,
7027    },{ .name = "SMMU_CBAR5",  .decode.addr = A_SMMU_CBAR5,
7028        .reset = 0x20000,
7029        .ro = 0xff000000,
7030    },{ .name = "SMMU_CBAR6",  .decode.addr = A_SMMU_CBAR6,
7031        .reset = 0x20000,
7032        .ro = 0xff000000,
7033    },{ .name = "SMMU_CBAR7",  .decode.addr = A_SMMU_CBAR7,
7034        .reset = 0x20000,
7035        .ro = 0xff000000,
7036    },{ .name = "SMMU_CBAR8",  .decode.addr = A_SMMU_CBAR8,
7037        .reset = 0x20000,
7038        .ro = 0xff000000,
7039    },{ .name = "SMMU_CBAR9",  .decode.addr = A_SMMU_CBAR9,
7040        .reset = 0x20000,
7041        .ro = 0xff000000,
7042    },{ .name = "SMMU_CBAR10",  .decode.addr = A_SMMU_CBAR10,
7043        .reset = 0x20000,
7044        .ro = 0xff000000,
7045    },{ .name = "SMMU_CBAR11",  .decode.addr = A_SMMU_CBAR11,
7046        .reset = 0x20000,
7047        .ro = 0xff000000,
7048    },{ .name = "SMMU_CBAR12",  .decode.addr = A_SMMU_CBAR12,
7049        .reset = 0x20000,
7050        .ro = 0xff000000,
7051    },{ .name = "SMMU_CBAR13",  .decode.addr = A_SMMU_CBAR13,
7052        .reset = 0x20000,
7053        .ro = 0xff000000,
7054    },{ .name = "SMMU_CBAR14",  .decode.addr = A_SMMU_CBAR14,
7055        .reset = 0x20000,
7056        .ro = 0xff000000,
7057    },{ .name = "SMMU_CBAR15",  .decode.addr = A_SMMU_CBAR15,
7058        .reset = 0x20000,
7059        .ro = 0xff000000,
7060    },{ .name = "SMMU_CBFRSYNRA0",  .decode.addr = A_SMMU_CBFRSYNRA0,
7061        .ro = 0x7fff0000,
7062    },{ .name = "SMMU_CBFRSYNRA1",  .decode.addr = A_SMMU_CBFRSYNRA1,
7063        .ro = 0x7fff0000,
7064    },{ .name = "SMMU_CBFRSYNRA2",  .decode.addr = A_SMMU_CBFRSYNRA2,
7065        .ro = 0x7fff0000,
7066    },{ .name = "SMMU_CBFRSYNRA3",  .decode.addr = A_SMMU_CBFRSYNRA3,
7067        .ro = 0x7fff0000,
7068    },{ .name = "SMMU_CBFRSYNRA4",  .decode.addr = A_SMMU_CBFRSYNRA4,
7069        .ro = 0x7fff0000,
7070    },{ .name = "SMMU_CBFRSYNRA5",  .decode.addr = A_SMMU_CBFRSYNRA5,
7071        .ro = 0x7fff0000,
7072    },{ .name = "SMMU_CBFRSYNRA6",  .decode.addr = A_SMMU_CBFRSYNRA6,
7073        .ro = 0x7fff0000,
7074    },{ .name = "SMMU_CBFRSYNRA7",  .decode.addr = A_SMMU_CBFRSYNRA7,
7075        .ro = 0x7fff0000,
7076    },{ .name = "SMMU_CBFRSYNRA8",  .decode.addr = A_SMMU_CBFRSYNRA8,
7077        .ro = 0x7fff0000,
7078    },{ .name = "SMMU_CBFRSYNRA9",  .decode.addr = A_SMMU_CBFRSYNRA9,
7079        .ro = 0x7fff0000,
7080    },{ .name = "SMMU_CBFRSYNRA10",  .decode.addr = A_SMMU_CBFRSYNRA10,
7081        .ro = 0x7fff0000,
7082    },{ .name = "SMMU_CBFRSYNRA11",  .decode.addr = A_SMMU_CBFRSYNRA11,
7083        .ro = 0x7fff0000,
7084    },{ .name = "SMMU_CBFRSYNRA12",  .decode.addr = A_SMMU_CBFRSYNRA12,
7085        .ro = 0x7fff0000,
7086    },{ .name = "SMMU_CBFRSYNRA13",  .decode.addr = A_SMMU_CBFRSYNRA13,
7087        .ro = 0x7fff0000,
7088    },{ .name = "SMMU_CBFRSYNRA14",  .decode.addr = A_SMMU_CBFRSYNRA14,
7089        .ro = 0x7fff0000,
7090    },{ .name = "SMMU_CBFRSYNRA15",  .decode.addr = A_SMMU_CBFRSYNRA15,
7091        .ro = 0x7fff0000,
7092    },{ .name = "SMMU_CBA2R0",  .decode.addr = A_SMMU_CBA2R0,
7093    },{ .name = "SMMU_CBA2R1",  .decode.addr = A_SMMU_CBA2R1,
7094    },{ .name = "SMMU_CBA2R2",  .decode.addr = A_SMMU_CBA2R2,
7095    },{ .name = "SMMU_CBA2R3",  .decode.addr = A_SMMU_CBA2R3,
7096    },{ .name = "SMMU_CBA2R4",  .decode.addr = A_SMMU_CBA2R4,
7097    },{ .name = "SMMU_CBA2R5",  .decode.addr = A_SMMU_CBA2R5,
7098    },{ .name = "SMMU_CBA2R6",  .decode.addr = A_SMMU_CBA2R6,
7099    },{ .name = "SMMU_CBA2R7",  .decode.addr = A_SMMU_CBA2R7,
7100    },{ .name = "SMMU_CBA2R8",  .decode.addr = A_SMMU_CBA2R8,
7101    },{ .name = "SMMU_CBA2R9",  .decode.addr = A_SMMU_CBA2R9,
7102    },{ .name = "SMMU_CBA2R10",  .decode.addr = A_SMMU_CBA2R10,
7103    },{ .name = "SMMU_CBA2R11",  .decode.addr = A_SMMU_CBA2R11,
7104    },{ .name = "SMMU_CBA2R12",  .decode.addr = A_SMMU_CBA2R12,
7105    },{ .name = "SMMU_CBA2R13",  .decode.addr = A_SMMU_CBA2R13,
7106    },{ .name = "SMMU_CBA2R14",  .decode.addr = A_SMMU_CBA2R14,
7107    },{ .name = "SMMU_CBA2R15",  .decode.addr = A_SMMU_CBA2R15,
7108    },{ .name = "SMMU_ITCTRL",  .decode.addr = A_SMMU_ITCTRL,
7109    },{ .name = "SMMU_ITIP",  .decode.addr = A_SMMU_ITIP,
7110        .ro = 0x1,
7111    },{ .name = "SMMU_ITOP_GLBL",  .decode.addr = A_SMMU_ITOP_GLBL,
7112        .ro = 0x202,
7113    },{ .name = "SMMU_ITOP_PERF_INDEX",  .decode.addr = A_SMMU_ITOP_PERF_INDEX,
7114    },{ .name = "SMMU_ITOP_CXT0TO31_RAM0",  .decode.addr = A_SMMU_ITOP_CXT0TO31_RAM0,
7115    },{ .name = "SMMU_TBUQOS0",  .decode.addr = A_SMMU_TBUQOS0,
7116    },{ .name = "SMMU_PER",  .decode.addr = A_SMMU_PER,
7117        .ro = 0xffff,
7118    },{ .name = "SMMU_TBU_PWR_STATUS",  .decode.addr = A_SMMU_TBU_PWR_STATUS,
7119        .ro = 0xffffffff,
7120    },{ .name = "PMEVCNTR0",  .decode.addr = A_PMEVCNTR0,
7121    },{ .name = "PMEVCNTR1",  .decode.addr = A_PMEVCNTR1,
7122    },{ .name = "PMEVCNTR2",  .decode.addr = A_PMEVCNTR2,
7123    },{ .name = "PMEVCNTR3",  .decode.addr = A_PMEVCNTR3,
7124    },{ .name = "PMEVCNTR4",  .decode.addr = A_PMEVCNTR4,
7125    },{ .name = "PMEVCNTR5",  .decode.addr = A_PMEVCNTR5,
7126    },{ .name = "PMEVCNTR6",  .decode.addr = A_PMEVCNTR6,
7127    },{ .name = "PMEVCNTR7",  .decode.addr = A_PMEVCNTR7,
7128    },{ .name = "PMEVCNTR8",  .decode.addr = A_PMEVCNTR8,
7129    },{ .name = "PMEVCNTR9",  .decode.addr = A_PMEVCNTR9,
7130    },{ .name = "PMEVCNTR10",  .decode.addr = A_PMEVCNTR10,
7131    },{ .name = "PMEVCNTR11",  .decode.addr = A_PMEVCNTR11,
7132    },{ .name = "PMEVCNTR12",  .decode.addr = A_PMEVCNTR12,
7133    },{ .name = "PMEVCNTR13",  .decode.addr = A_PMEVCNTR13,
7134    },{ .name = "PMEVCNTR14",  .decode.addr = A_PMEVCNTR14,
7135    },{ .name = "PMEVCNTR15",  .decode.addr = A_PMEVCNTR15,
7136    },{ .name = "PMEVCNTR16",  .decode.addr = A_PMEVCNTR16,
7137    },{ .name = "PMEVCNTR17",  .decode.addr = A_PMEVCNTR17,
7138    },{ .name = "PMEVCNTR18",  .decode.addr = A_PMEVCNTR18,
7139    },{ .name = "PMEVCNTR19",  .decode.addr = A_PMEVCNTR19,
7140    },{ .name = "PMEVCNTR20",  .decode.addr = A_PMEVCNTR20,
7141    },{ .name = "PMEVCNTR21",  .decode.addr = A_PMEVCNTR21,
7142    },{ .name = "PMEVCNTR22",  .decode.addr = A_PMEVCNTR22,
7143    },{ .name = "PMEVCNTR23",  .decode.addr = A_PMEVCNTR23,
7144    },{ .name = "PMEVTYPER0",  .decode.addr = A_PMEVTYPER0,
7145    },{ .name = "PMEVTYPER1",  .decode.addr = A_PMEVTYPER1,
7146    },{ .name = "PMEVTYPER2",  .decode.addr = A_PMEVTYPER2,
7147    },{ .name = "PMEVTYPER3",  .decode.addr = A_PMEVTYPER3,
7148    },{ .name = "PMEVTYPER4",  .decode.addr = A_PMEVTYPER4,
7149    },{ .name = "PMEVTYPER5",  .decode.addr = A_PMEVTYPER5,
7150    },{ .name = "PMEVTYPER6",  .decode.addr = A_PMEVTYPER6,
7151    },{ .name = "PMEVTYPER7",  .decode.addr = A_PMEVTYPER7,
7152    },{ .name = "PMEVTYPER8",  .decode.addr = A_PMEVTYPER8,
7153    },{ .name = "PMEVTYPER9",  .decode.addr = A_PMEVTYPER9,
7154    },{ .name = "PMEVTYPER10",  .decode.addr = A_PMEVTYPER10,
7155    },{ .name = "PMEVTYPER11",  .decode.addr = A_PMEVTYPER11,
7156    },{ .name = "PMEVTYPER12",  .decode.addr = A_PMEVTYPER12,
7157    },{ .name = "PMEVTYPER13",  .decode.addr = A_PMEVTYPER13,
7158    },{ .name = "PMEVTYPER14",  .decode.addr = A_PMEVTYPER14,
7159    },{ .name = "PMEVTYPER15",  .decode.addr = A_PMEVTYPER15,
7160    },{ .name = "PMEVTYPER16",  .decode.addr = A_PMEVTYPER16,
7161    },{ .name = "PMEVTYPER17",  .decode.addr = A_PMEVTYPER17,
7162    },{ .name = "PMEVTYPER18",  .decode.addr = A_PMEVTYPER18,
7163    },{ .name = "PMEVTYPER19",  .decode.addr = A_PMEVTYPER19,
7164    },{ .name = "PMEVTYPER20",  .decode.addr = A_PMEVTYPER20,
7165    },{ .name = "PMEVTYPER21",  .decode.addr = A_PMEVTYPER21,
7166    },{ .name = "PMEVTYPER22",  .decode.addr = A_PMEVTYPER22,
7167    },{ .name = "PMEVTYPER23",  .decode.addr = A_PMEVTYPER23,
7168    },{ .name = "PMCGCR0",  .decode.addr = A_PMCGCR0,
7169        .reset = 0x4000000,
7170        .ro = 0xf7f0000,
7171    },{ .name = "PMCGCR1",  .decode.addr = A_PMCGCR1,
7172        .reset = 0x4010000,
7173        .ro = 0xf7f0000,
7174    },{ .name = "PMCGCR2",  .decode.addr = A_PMCGCR2,
7175        .reset = 0x4020000,
7176        .ro = 0xf7f0000,
7177    },{ .name = "PMCGCR3",  .decode.addr = A_PMCGCR3,
7178        .reset = 0x4030000,
7179        .ro = 0xf7f0000,
7180    },{ .name = "PMCGCR4",  .decode.addr = A_PMCGCR4,
7181        .reset = 0x4040000,
7182        .ro = 0xf7f0000,
7183    },{ .name = "PMCGCR5",  .decode.addr = A_PMCGCR5,
7184        .reset = 0x4050000,
7185        .ro = 0xf7f0000,
7186    },{ .name = "PMCGSMR0",  .decode.addr = A_PMCGSMR0,
7187    },{ .name = "PMCGSMR1",  .decode.addr = A_PMCGSMR1,
7188    },{ .name = "PMCGSMR2",  .decode.addr = A_PMCGSMR2,
7189    },{ .name = "PMCGSMR3",  .decode.addr = A_PMCGSMR3,
7190    },{ .name = "PMCGSMR4",  .decode.addr = A_PMCGSMR4,
7191    },{ .name = "PMCGSMR5",  .decode.addr = A_PMCGSMR5,
7192    },{ .name = "PMCNTENSET",  .decode.addr = A_PMCNTENSET,
7193    },{ .name = "PMCNTENCLR",  .decode.addr = A_PMCNTENCLR,
7194    },{ .name = "PMINTENSET",  .decode.addr = A_PMINTENSET,
7195    },{ .name = "PMINTENCLR",  .decode.addr = A_PMINTENCLR,
7196    },{ .name = "PMOVSCLR",  .decode.addr = A_PMOVSCLR,
7197    },{ .name = "PMOVSSET",  .decode.addr = A_PMOVSSET,
7198    },{ .name = "PMCFGR",  .decode.addr = A_PMCFGR,
7199        .reset = 0x5011f17,
7200        .ro = 0xff09ffff,
7201    },{ .name = "PMCR",  .decode.addr = A_PMCR,
7202        .ro = 0xff000002,
7203    },{ .name = "PMCEID0",  .decode.addr = A_PMCEID0,
7204        .reset = 0x30303,
7205        .ro = 0x38383,
7206    },{ .name = "PMAUTHSTATUS",  .decode.addr = A_PMAUTHSTATUS,
7207        .reset = 0x80,
7208        .ro = 0xff,
7209    },{ .name = "PMDEVTYPE",  .decode.addr = A_PMDEVTYPE,
7210        .reset = 0x56,
7211        .ro = 0xff,
7212    },{ .name = "SMMU_CB0_SCTLR",  .decode.addr = A_SMMU_CB0_SCTLR,
7213        .reset = 0x100,
7214        .ro = 0x1000,
7215    },{ .name = "SMMU_CB0_ACTLR",  .decode.addr = A_SMMU_CB0_ACTLR,
7216        .reset = 0x3,
7217    },{ .name = "SMMU_CB0_RESUME",  .decode.addr = A_SMMU_CB0_RESUME,
7218    },{ .name = "SMMU_CB0_TCR2",  .decode.addr = A_SMMU_CB0_TCR2,
7219        .reset = 0x60,
7220        .ro = 0x60,
7221    },{ .name = "SMMU_CB0_TTBR0_LOW",  .decode.addr = A_SMMU_CB0_TTBR0_LOW,
7222        .ro = 0x4,
7223    },{ .name = "SMMU_CB0_TTBR0_HIGH",  .decode.addr = A_SMMU_CB0_TTBR0_HIGH,
7224    },{ .name = "SMMU_CB0_TTBR1_LOW",  .decode.addr = A_SMMU_CB0_TTBR1_LOW,
7225    },{ .name = "SMMU_CB0_TTBR1_HIGH",  .decode.addr = A_SMMU_CB0_TTBR1_HIGH,
7226    },{ .name = "SMMU_CB0_TCR_LPAE",  .decode.addr = A_SMMU_CB0_TCR_LPAE,
7227    },{ .name = "SMMU_CB0_CONTEXTIDR",  .decode.addr = A_SMMU_CB0_CONTEXTIDR,
7228    },{ .name = "SMMU_CB0_PRRR_MAIR0",  .decode.addr = A_SMMU_CB0_PRRR_MAIR0,
7229    },{ .name = "SMMU_CB0_NMRR_MAIR1",  .decode.addr = A_SMMU_CB0_NMRR_MAIR1,
7230    },{ .name = "SMMU_CB0_FSR",  .decode.addr = A_SMMU_CB0_FSR,
7231        .w1c = 0xffffffff,
7232        .post_write = smmu_fsr_pw,
7233    },{ .name = "SMMU_CB0_FSRRESTORE",  .decode.addr = A_SMMU_CB0_FSRRESTORE,
7234    },{ .name = "SMMU_CB0_FAR_LOW",  .decode.addr = A_SMMU_CB0_FAR_LOW,
7235    },{ .name = "SMMU_CB0_FAR_HIGH",  .decode.addr = A_SMMU_CB0_FAR_HIGH,
7236    },{ .name = "SMMU_CB0_FSYNR0",  .decode.addr = A_SMMU_CB0_FSYNR0,
7237        .ro = 0x200,
7238    },{ .name = "SMMU_CB0_IPAFAR_LOW",  .decode.addr = A_SMMU_CB0_IPAFAR_LOW,
7239        .ro = 0xfff,
7240    },{ .name = "SMMU_CB0_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB0_IPAFAR_HIGH,
7241    },{ .name = "SMMU_CB0_TLBIVA_LOW",  .decode.addr = A_SMMU_CB0_TLBIVA_LOW,
7242    },{ .name = "SMMU_CB0_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB0_TLBIVA_HIGH,
7243    },{ .name = "SMMU_CB0_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB0_TLBIVAA_LOW,
7244    },{ .name = "SMMU_CB0_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB0_TLBIVAA_HIGH,
7245    },{ .name = "SMMU_CB0_TLBIASID",  .decode.addr = A_SMMU_CB0_TLBIASID,
7246    },{ .name = "SMMU_CB0_TLBIALL",  .decode.addr = A_SMMU_CB0_TLBIALL,
7247    },{ .name = "SMMU_CB0_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB0_TLBIVAL_LOW,
7248    },{ .name = "SMMU_CB0_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB0_TLBIVAL_HIGH,
7249    },{ .name = "SMMU_CB0_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB0_TLBIVAAL_LOW,
7250    },{ .name = "SMMU_CB0_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB0_TLBIVAAL_HIGH,
7251    },{ .name = "SMMU_CB0_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB0_TLBIIPAS2_LOW,
7252    },{ .name = "SMMU_CB0_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB0_TLBIIPAS2_HIGH,
7253    },{ .name = "SMMU_CB0_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB0_TLBIIPAS2L_LOW,
7254    },{ .name = "SMMU_CB0_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB0_TLBIIPAS2L_HIGH,
7255    },{ .name = "SMMU_CB0_TLBSYNC",  .decode.addr = A_SMMU_CB0_TLBSYNC,
7256    },{ .name = "SMMU_CB0_TLBSTATUS",  .decode.addr = A_SMMU_CB0_TLBSTATUS,
7257        .ro = 0x1,
7258    },{ .name = "SMMU_CB0_PMEVCNTR0",  .decode.addr = A_SMMU_CB0_PMEVCNTR0,
7259    },{ .name = "SMMU_CB0_PMEVCNTR1",  .decode.addr = A_SMMU_CB0_PMEVCNTR1,
7260    },{ .name = "SMMU_CB0_PMEVCNTR2",  .decode.addr = A_SMMU_CB0_PMEVCNTR2,
7261    },{ .name = "SMMU_CB0_PMEVCNTR3",  .decode.addr = A_SMMU_CB0_PMEVCNTR3,
7262    },{ .name = "SMMU_CB0_PMEVTYPER0",  .decode.addr = A_SMMU_CB0_PMEVTYPER0,
7263    },{ .name = "SMMU_CB0_PMEVTYPER1",  .decode.addr = A_SMMU_CB0_PMEVTYPER1,
7264    },{ .name = "SMMU_CB0_PMEVTYPER2",  .decode.addr = A_SMMU_CB0_PMEVTYPER2,
7265    },{ .name = "SMMU_CB0_PMEVTYPER3",  .decode.addr = A_SMMU_CB0_PMEVTYPER3,
7266    },{ .name = "SMMU_CB0_PMCFGR",  .decode.addr = A_SMMU_CB0_PMCFGR,
7267        .reset = 0x11f03,
7268        .ro = 0xff09ffff,
7269    },{ .name = "SMMU_CB0_PMCR",  .decode.addr = A_SMMU_CB0_PMCR,
7270        .ro = 0xff000002,
7271    },{ .name = "SMMU_CB0_PMCEID",  .decode.addr = A_SMMU_CB0_PMCEID,
7272        .reset = 0x30303,
7273        .ro = 0x38383,
7274    },{ .name = "SMMU_CB0_PMCNTENSE",  .decode.addr = A_SMMU_CB0_PMCNTENSE,
7275    },{ .name = "SMMU_CB0_PMCNTENCLR",  .decode.addr = A_SMMU_CB0_PMCNTENCLR,
7276    },{ .name = "SMMU_CB0_PMCNTENSET",  .decode.addr = A_SMMU_CB0_PMCNTENSET,
7277    },{ .name = "SMMU_CB0_PMINTENCLR",  .decode.addr = A_SMMU_CB0_PMINTENCLR,
7278    },{ .name = "SMMU_CB0_PMOVSCLR",  .decode.addr = A_SMMU_CB0_PMOVSCLR,
7279    },{ .name = "SMMU_CB0_PMOVSSET",  .decode.addr = A_SMMU_CB0_PMOVSSET,
7280    },{ .name = "SMMU_CB0_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB0_PMAUTHSTATUS,
7281        .reset = 0x80,
7282        .ro = 0xff,
7283    },{ .name = "SMMU_CB1_SCTLR",  .decode.addr = A_SMMU_CB1_SCTLR,
7284        .reset = 0x100,
7285        .ro = 0x1000,
7286    },{ .name = "SMMU_CB1_ACTLR",  .decode.addr = A_SMMU_CB1_ACTLR,
7287        .reset = 0x3,
7288    },{ .name = "SMMU_CB1_RESUME",  .decode.addr = A_SMMU_CB1_RESUME,
7289    },{ .name = "SMMU_CB1_TCR2",  .decode.addr = A_SMMU_CB1_TCR2,
7290        .reset = 0x60,
7291        .ro = 0x60,
7292    },{ .name = "SMMU_CB1_TTBR0_LOW",  .decode.addr = A_SMMU_CB1_TTBR0_LOW,
7293        .ro = 0x4,
7294    },{ .name = "SMMU_CB1_TTBR0_HIGH",  .decode.addr = A_SMMU_CB1_TTBR0_HIGH,
7295    },{ .name = "SMMU_CB1_TTBR1_LOW",  .decode.addr = A_SMMU_CB1_TTBR1_LOW,
7296    },{ .name = "SMMU_CB1_TTBR1_HIGH",  .decode.addr = A_SMMU_CB1_TTBR1_HIGH,
7297    },{ .name = "SMMU_CB1_TCR_LPAE",  .decode.addr = A_SMMU_CB1_TCR_LPAE,
7298    },{ .name = "SMMU_CB1_CONTEXTIDR",  .decode.addr = A_SMMU_CB1_CONTEXTIDR,
7299    },{ .name = "SMMU_CB1_PRRR_MAIR0",  .decode.addr = A_SMMU_CB1_PRRR_MAIR0,
7300    },{ .name = "SMMU_CB1_NMRR_MAIR1",  .decode.addr = A_SMMU_CB1_NMRR_MAIR1,
7301    },{ .name = "SMMU_CB1_FSR",  .decode.addr = A_SMMU_CB1_FSR,
7302        .w1c = 0xffffffff,
7303        .post_write = smmu_fsr_pw,
7304    },{ .name = "SMMU_CB1_FSRRESTORE",  .decode.addr = A_SMMU_CB1_FSRRESTORE,
7305    },{ .name = "SMMU_CB1_FAR_LOW",  .decode.addr = A_SMMU_CB1_FAR_LOW,
7306    },{ .name = "SMMU_CB1_FAR_HIGH",  .decode.addr = A_SMMU_CB1_FAR_HIGH,
7307    },{ .name = "SMMU_CB1_FSYNR0",  .decode.addr = A_SMMU_CB1_FSYNR0,
7308        .ro = 0x200,
7309    },{ .name = "SMMU_CB1_IPAFAR_LOW",  .decode.addr = A_SMMU_CB1_IPAFAR_LOW,
7310        .ro = 0xfff,
7311    },{ .name = "SMMU_CB1_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB1_IPAFAR_HIGH,
7312    },{ .name = "SMMU_CB1_TLBIVA_LOW",  .decode.addr = A_SMMU_CB1_TLBIVA_LOW,
7313    },{ .name = "SMMU_CB1_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB1_TLBIVA_HIGH,
7314    },{ .name = "SMMU_CB1_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB1_TLBIVAA_LOW,
7315    },{ .name = "SMMU_CB1_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB1_TLBIVAA_HIGH,
7316    },{ .name = "SMMU_CB1_TLBIASID",  .decode.addr = A_SMMU_CB1_TLBIASID,
7317    },{ .name = "SMMU_CB1_TLBIALL",  .decode.addr = A_SMMU_CB1_TLBIALL,
7318    },{ .name = "SMMU_CB1_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB1_TLBIVAL_LOW,
7319    },{ .name = "SMMU_CB1_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB1_TLBIVAL_HIGH,
7320    },{ .name = "SMMU_CB1_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB1_TLBIVAAL_LOW,
7321    },{ .name = "SMMU_CB1_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB1_TLBIVAAL_HIGH,
7322    },{ .name = "SMMU_CB1_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB1_TLBIIPAS2_LOW,
7323    },{ .name = "SMMU_CB1_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB1_TLBIIPAS2_HIGH,
7324    },{ .name = "SMMU_CB1_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB1_TLBIIPAS2L_LOW,
7325    },{ .name = "SMMU_CB1_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB1_TLBIIPAS2L_HIGH,
7326    },{ .name = "SMMU_CB1_TLBSYNC",  .decode.addr = A_SMMU_CB1_TLBSYNC,
7327    },{ .name = "SMMU_CB1_TLBSTATUS",  .decode.addr = A_SMMU_CB1_TLBSTATUS,
7328        .ro = 0x1,
7329    },{ .name = "SMMU_CB1_PMEVCNTR0",  .decode.addr = A_SMMU_CB1_PMEVCNTR0,
7330    },{ .name = "SMMU_CB1_PMEVCNTR1",  .decode.addr = A_SMMU_CB1_PMEVCNTR1,
7331    },{ .name = "SMMU_CB1_PMEVCNTR2",  .decode.addr = A_SMMU_CB1_PMEVCNTR2,
7332    },{ .name = "SMMU_CB1_PMEVCNTR3",  .decode.addr = A_SMMU_CB1_PMEVCNTR3,
7333    },{ .name = "SMMU_CB1_PMEVTYPER0",  .decode.addr = A_SMMU_CB1_PMEVTYPER0,
7334    },{ .name = "SMMU_CB1_PMEVTYPER1",  .decode.addr = A_SMMU_CB1_PMEVTYPER1,
7335    },{ .name = "SMMU_CB1_PMEVTYPER2",  .decode.addr = A_SMMU_CB1_PMEVTYPER2,
7336    },{ .name = "SMMU_CB1_PMEVTYPER3",  .decode.addr = A_SMMU_CB1_PMEVTYPER3,
7337    },{ .name = "SMMU_CB1_PMCFGR",  .decode.addr = A_SMMU_CB1_PMCFGR,
7338        .reset = 0x11f03,
7339        .ro = 0xff09ffff,
7340    },{ .name = "SMMU_CB1_PMCR",  .decode.addr = A_SMMU_CB1_PMCR,
7341        .ro = 0xff000002,
7342    },{ .name = "SMMU_CB1_PMCEID",  .decode.addr = A_SMMU_CB1_PMCEID,
7343        .reset = 0x30303,
7344        .ro = 0x38383,
7345    },{ .name = "SMMU_CB1_PMCNTENSE",  .decode.addr = A_SMMU_CB1_PMCNTENSE,
7346    },{ .name = "SMMU_CB1_PMCNTENCLR",  .decode.addr = A_SMMU_CB1_PMCNTENCLR,
7347    },{ .name = "SMMU_CB1_PMCNTENSET",  .decode.addr = A_SMMU_CB1_PMCNTENSET,
7348    },{ .name = "SMMU_CB1_PMINTENCLR",  .decode.addr = A_SMMU_CB1_PMINTENCLR,
7349    },{ .name = "SMMU_CB1_PMOVSCLR",  .decode.addr = A_SMMU_CB1_PMOVSCLR,
7350    },{ .name = "SMMU_CB1_PMOVSSET",  .decode.addr = A_SMMU_CB1_PMOVSSET,
7351    },{ .name = "SMMU_CB1_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB1_PMAUTHSTATUS,
7352        .reset = 0x80,
7353        .ro = 0xff,
7354    },{ .name = "SMMU_CB2_SCTLR",  .decode.addr = A_SMMU_CB2_SCTLR,
7355        .reset = 0x100,
7356        .ro = 0x1000,
7357    },{ .name = "SMMU_CB2_ACTLR",  .decode.addr = A_SMMU_CB2_ACTLR,
7358        .reset = 0x3,
7359    },{ .name = "SMMU_CB2_RESUME",  .decode.addr = A_SMMU_CB2_RESUME,
7360    },{ .name = "SMMU_CB2_TCR2",  .decode.addr = A_SMMU_CB2_TCR2,
7361        .reset = 0x60,
7362        .ro = 0x60,
7363    },{ .name = "SMMU_CB2_TTBR0_LOW",  .decode.addr = A_SMMU_CB2_TTBR0_LOW,
7364        .ro = 0x4,
7365    },{ .name = "SMMU_CB2_TTBR0_HIGH",  .decode.addr = A_SMMU_CB2_TTBR0_HIGH,
7366    },{ .name = "SMMU_CB2_TTBR1_LOW",  .decode.addr = A_SMMU_CB2_TTBR1_LOW,
7367    },{ .name = "SMMU_CB2_TTBR1_HIGH",  .decode.addr = A_SMMU_CB2_TTBR1_HIGH,
7368    },{ .name = "SMMU_CB2_TCR_LPAE",  .decode.addr = A_SMMU_CB2_TCR_LPAE,
7369    },{ .name = "SMMU_CB2_CONTEXTIDR",  .decode.addr = A_SMMU_CB2_CONTEXTIDR,
7370    },{ .name = "SMMU_CB2_PRRR_MAIR0",  .decode.addr = A_SMMU_CB2_PRRR_MAIR0,
7371    },{ .name = "SMMU_CB2_NMRR_MAIR1",  .decode.addr = A_SMMU_CB2_NMRR_MAIR1,
7372    },{ .name = "SMMU_CB2_FSR",  .decode.addr = A_SMMU_CB2_FSR,
7373        .w1c = 0xffffffff,
7374        .post_write = smmu_fsr_pw,
7375    },{ .name = "SMMU_CB2_FSRRESTORE",  .decode.addr = A_SMMU_CB2_FSRRESTORE,
7376    },{ .name = "SMMU_CB2_FAR_LOW",  .decode.addr = A_SMMU_CB2_FAR_LOW,
7377    },{ .name = "SMMU_CB2_FAR_HIGH",  .decode.addr = A_SMMU_CB2_FAR_HIGH,
7378    },{ .name = "SMMU_CB2_FSYNR0",  .decode.addr = A_SMMU_CB2_FSYNR0,
7379        .ro = 0x200,
7380    },{ .name = "SMMU_CB2_IPAFAR_LOW",  .decode.addr = A_SMMU_CB2_IPAFAR_LOW,
7381        .ro = 0xfff,
7382    },{ .name = "SMMU_CB2_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB2_IPAFAR_HIGH,
7383    },{ .name = "SMMU_CB2_TLBIVA_LOW",  .decode.addr = A_SMMU_CB2_TLBIVA_LOW,
7384    },{ .name = "SMMU_CB2_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB2_TLBIVA_HIGH,
7385    },{ .name = "SMMU_CB2_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB2_TLBIVAA_LOW,
7386    },{ .name = "SMMU_CB2_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB2_TLBIVAA_HIGH,
7387    },{ .name = "SMMU_CB2_TLBIASID",  .decode.addr = A_SMMU_CB2_TLBIASID,
7388    },{ .name = "SMMU_CB2_TLBIALL",  .decode.addr = A_SMMU_CB2_TLBIALL,
7389    },{ .name = "SMMU_CB2_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB2_TLBIVAL_LOW,
7390    },{ .name = "SMMU_CB2_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB2_TLBIVAL_HIGH,
7391    },{ .name = "SMMU_CB2_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB2_TLBIVAAL_LOW,
7392    },{ .name = "SMMU_CB2_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB2_TLBIVAAL_HIGH,
7393    },{ .name = "SMMU_CB2_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB2_TLBIIPAS2_LOW,
7394    },{ .name = "SMMU_CB2_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB2_TLBIIPAS2_HIGH,
7395    },{ .name = "SMMU_CB2_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB2_TLBIIPAS2L_LOW,
7396    },{ .name = "SMMU_CB2_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB2_TLBIIPAS2L_HIGH,
7397    },{ .name = "SMMU_CB2_TLBSYNC",  .decode.addr = A_SMMU_CB2_TLBSYNC,
7398    },{ .name = "SMMU_CB2_TLBSTATUS",  .decode.addr = A_SMMU_CB2_TLBSTATUS,
7399        .ro = 0x1,
7400    },{ .name = "SMMU_CB2_PMEVCNTR0",  .decode.addr = A_SMMU_CB2_PMEVCNTR0,
7401    },{ .name = "SMMU_CB2_PMEVCNTR1",  .decode.addr = A_SMMU_CB2_PMEVCNTR1,
7402    },{ .name = "SMMU_CB2_PMEVCNTR2",  .decode.addr = A_SMMU_CB2_PMEVCNTR2,
7403    },{ .name = "SMMU_CB2_PMEVCNTR3",  .decode.addr = A_SMMU_CB2_PMEVCNTR3,
7404    },{ .name = "SMMU_CB2_PMEVTYPER0",  .decode.addr = A_SMMU_CB2_PMEVTYPER0,
7405    },{ .name = "SMMU_CB2_PMEVTYPER1",  .decode.addr = A_SMMU_CB2_PMEVTYPER1,
7406    },{ .name = "SMMU_CB2_PMEVTYPER2",  .decode.addr = A_SMMU_CB2_PMEVTYPER2,
7407    },{ .name = "SMMU_CB2_PMEVTYPER3",  .decode.addr = A_SMMU_CB2_PMEVTYPER3,
7408    },{ .name = "SMMU_CB2_PMCFGR",  .decode.addr = A_SMMU_CB2_PMCFGR,
7409        .reset = 0x11f03,
7410        .ro = 0xff09ffff,
7411    },{ .name = "SMMU_CB2_PMCR",  .decode.addr = A_SMMU_CB2_PMCR,
7412        .ro = 0xff000002,
7413    },{ .name = "SMMU_CB2_PMCEID",  .decode.addr = A_SMMU_CB2_PMCEID,
7414        .reset = 0x30303,
7415        .ro = 0x38383,
7416    },{ .name = "SMMU_CB2_PMCNTENSE",  .decode.addr = A_SMMU_CB2_PMCNTENSE,
7417    },{ .name = "SMMU_CB2_PMCNTENCLR",  .decode.addr = A_SMMU_CB2_PMCNTENCLR,
7418    },{ .name = "SMMU_CB2_PMCNTENSET",  .decode.addr = A_SMMU_CB2_PMCNTENSET,
7419    },{ .name = "SMMU_CB2_PMINTENCLR",  .decode.addr = A_SMMU_CB2_PMINTENCLR,
7420    },{ .name = "SMMU_CB2_PMOVSCLR",  .decode.addr = A_SMMU_CB2_PMOVSCLR,
7421    },{ .name = "SMMU_CB2_PMOVSSET",  .decode.addr = A_SMMU_CB2_PMOVSSET,
7422    },{ .name = "SMMU_CB2_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB2_PMAUTHSTATUS,
7423        .reset = 0x80,
7424        .ro = 0xff,
7425    },{ .name = "SMMU_CB3_SCTLR",  .decode.addr = A_SMMU_CB3_SCTLR,
7426        .reset = 0x100,
7427        .ro = 0x1000,
7428    },{ .name = "SMMU_CB3_ACTLR",  .decode.addr = A_SMMU_CB3_ACTLR,
7429        .reset = 0x3,
7430    },{ .name = "SMMU_CB3_RESUME",  .decode.addr = A_SMMU_CB3_RESUME,
7431    },{ .name = "SMMU_CB3_TCR2",  .decode.addr = A_SMMU_CB3_TCR2,
7432        .reset = 0x60,
7433        .ro = 0x60,
7434    },{ .name = "SMMU_CB3_TTBR0_LOW",  .decode.addr = A_SMMU_CB3_TTBR0_LOW,
7435        .ro = 0x4,
7436    },{ .name = "SMMU_CB3_TTBR0_HIGH",  .decode.addr = A_SMMU_CB3_TTBR0_HIGH,
7437    },{ .name = "SMMU_CB3_TTBR1_LOW",  .decode.addr = A_SMMU_CB3_TTBR1_LOW,
7438    },{ .name = "SMMU_CB3_TTBR1_HIGH",  .decode.addr = A_SMMU_CB3_TTBR1_HIGH,
7439    },{ .name = "SMMU_CB3_TCR_LPAE",  .decode.addr = A_SMMU_CB3_TCR_LPAE,
7440    },{ .name = "SMMU_CB3_CONTEXTIDR",  .decode.addr = A_SMMU_CB3_CONTEXTIDR,
7441    },{ .name = "SMMU_CB3_PRRR_MAIR0",  .decode.addr = A_SMMU_CB3_PRRR_MAIR0,
7442    },{ .name = "SMMU_CB3_NMRR_MAIR1",  .decode.addr = A_SMMU_CB3_NMRR_MAIR1,
7443    },{ .name = "SMMU_CB3_FSR",  .decode.addr = A_SMMU_CB3_FSR,
7444        .w1c = 0xffffffff,
7445        .post_write = smmu_fsr_pw,
7446    },{ .name = "SMMU_CB3_FSRRESTORE",  .decode.addr = A_SMMU_CB3_FSRRESTORE,
7447    },{ .name = "SMMU_CB3_FAR_LOW",  .decode.addr = A_SMMU_CB3_FAR_LOW,
7448    },{ .name = "SMMU_CB3_FAR_HIGH",  .decode.addr = A_SMMU_CB3_FAR_HIGH,
7449    },{ .name = "SMMU_CB3_FSYNR0",  .decode.addr = A_SMMU_CB3_FSYNR0,
7450        .ro = 0x200,
7451    },{ .name = "SMMU_CB3_IPAFAR_LOW",  .decode.addr = A_SMMU_CB3_IPAFAR_LOW,
7452        .ro = 0xfff,
7453    },{ .name = "SMMU_CB3_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB3_IPAFAR_HIGH,
7454    },{ .name = "SMMU_CB3_TLBIVA_LOW",  .decode.addr = A_SMMU_CB3_TLBIVA_LOW,
7455    },{ .name = "SMMU_CB3_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB3_TLBIVA_HIGH,
7456    },{ .name = "SMMU_CB3_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB3_TLBIVAA_LOW,
7457    },{ .name = "SMMU_CB3_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB3_TLBIVAA_HIGH,
7458    },{ .name = "SMMU_CB3_TLBIASID",  .decode.addr = A_SMMU_CB3_TLBIASID,
7459    },{ .name = "SMMU_CB3_TLBIALL",  .decode.addr = A_SMMU_CB3_TLBIALL,
7460    },{ .name = "SMMU_CB3_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB3_TLBIVAL_LOW,
7461    },{ .name = "SMMU_CB3_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB3_TLBIVAL_HIGH,
7462    },{ .name = "SMMU_CB3_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB3_TLBIVAAL_LOW,
7463    },{ .name = "SMMU_CB3_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB3_TLBIVAAL_HIGH,
7464    },{ .name = "SMMU_CB3_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB3_TLBIIPAS2_LOW,
7465    },{ .name = "SMMU_CB3_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB3_TLBIIPAS2_HIGH,
7466    },{ .name = "SMMU_CB3_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB3_TLBIIPAS2L_LOW,
7467    },{ .name = "SMMU_CB3_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB3_TLBIIPAS2L_HIGH,
7468    },{ .name = "SMMU_CB3_TLBSYNC",  .decode.addr = A_SMMU_CB3_TLBSYNC,
7469    },{ .name = "SMMU_CB3_TLBSTATUS",  .decode.addr = A_SMMU_CB3_TLBSTATUS,
7470        .ro = 0x1,
7471    },{ .name = "SMMU_CB3_PMEVCNTR0",  .decode.addr = A_SMMU_CB3_PMEVCNTR0,
7472    },{ .name = "SMMU_CB3_PMEVCNTR1",  .decode.addr = A_SMMU_CB3_PMEVCNTR1,
7473    },{ .name = "SMMU_CB3_PMEVCNTR2",  .decode.addr = A_SMMU_CB3_PMEVCNTR2,
7474    },{ .name = "SMMU_CB3_PMEVCNTR3",  .decode.addr = A_SMMU_CB3_PMEVCNTR3,
7475    },{ .name = "SMMU_CB3_PMEVTYPER0",  .decode.addr = A_SMMU_CB3_PMEVTYPER0,
7476    },{ .name = "SMMU_CB3_PMEVTYPER1",  .decode.addr = A_SMMU_CB3_PMEVTYPER1,
7477    },{ .name = "SMMU_CB3_PMEVTYPER2",  .decode.addr = A_SMMU_CB3_PMEVTYPER2,
7478    },{ .name = "SMMU_CB3_PMEVTYPER3",  .decode.addr = A_SMMU_CB3_PMEVTYPER3,
7479    },{ .name = "SMMU_CB3_PMCFGR",  .decode.addr = A_SMMU_CB3_PMCFGR,
7480        .reset = 0x11f03,
7481        .ro = 0xff09ffff,
7482    },{ .name = "SMMU_CB3_PMCR",  .decode.addr = A_SMMU_CB3_PMCR,
7483        .ro = 0xff000002,
7484    },{ .name = "SMMU_CB3_PMCEID",  .decode.addr = A_SMMU_CB3_PMCEID,
7485        .reset = 0x30303,
7486        .ro = 0x38383,
7487    },{ .name = "SMMU_CB3_PMCNTENSE",  .decode.addr = A_SMMU_CB3_PMCNTENSE,
7488    },{ .name = "SMMU_CB3_PMCNTENCLR",  .decode.addr = A_SMMU_CB3_PMCNTENCLR,
7489    },{ .name = "SMMU_CB3_PMCNTENSET",  .decode.addr = A_SMMU_CB3_PMCNTENSET,
7490    },{ .name = "SMMU_CB3_PMINTENCLR",  .decode.addr = A_SMMU_CB3_PMINTENCLR,
7491    },{ .name = "SMMU_CB3_PMOVSCLR",  .decode.addr = A_SMMU_CB3_PMOVSCLR,
7492    },{ .name = "SMMU_CB3_PMOVSSET",  .decode.addr = A_SMMU_CB3_PMOVSSET,
7493    },{ .name = "SMMU_CB3_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB3_PMAUTHSTATUS,
7494        .reset = 0x80,
7495        .ro = 0xff,
7496    },{ .name = "SMMU_CB4_SCTLR",  .decode.addr = A_SMMU_CB4_SCTLR,
7497        .reset = 0x100,
7498        .ro = 0x1000,
7499    },{ .name = "SMMU_CB4_ACTLR",  .decode.addr = A_SMMU_CB4_ACTLR,
7500        .reset = 0x3,
7501    },{ .name = "SMMU_CB4_RESUME",  .decode.addr = A_SMMU_CB4_RESUME,
7502    },{ .name = "SMMU_CB4_TCR2",  .decode.addr = A_SMMU_CB4_TCR2,
7503        .reset = 0x60,
7504        .ro = 0x60,
7505    },{ .name = "SMMU_CB4_TTBR0_LOW",  .decode.addr = A_SMMU_CB4_TTBR0_LOW,
7506        .ro = 0x4,
7507    },{ .name = "SMMU_CB4_TTBR0_HIGH",  .decode.addr = A_SMMU_CB4_TTBR0_HIGH,
7508    },{ .name = "SMMU_CB4_TTBR1_LOW",  .decode.addr = A_SMMU_CB4_TTBR1_LOW,
7509    },{ .name = "SMMU_CB4_TTBR1_HIGH",  .decode.addr = A_SMMU_CB4_TTBR1_HIGH,
7510    },{ .name = "SMMU_CB4_TCR_LPAE",  .decode.addr = A_SMMU_CB4_TCR_LPAE,
7511    },{ .name = "SMMU_CB4_CONTEXTIDR",  .decode.addr = A_SMMU_CB4_CONTEXTIDR,
7512    },{ .name = "SMMU_CB4_PRRR_MAIR0",  .decode.addr = A_SMMU_CB4_PRRR_MAIR0,
7513    },{ .name = "SMMU_CB4_NMRR_MAIR1",  .decode.addr = A_SMMU_CB4_NMRR_MAIR1,
7514    },{ .name = "SMMU_CB4_FSR",  .decode.addr = A_SMMU_CB4_FSR,
7515        .w1c = 0xffffffff,
7516        .post_write = smmu_fsr_pw,
7517    },{ .name = "SMMU_CB4_FSRRESTORE",  .decode.addr = A_SMMU_CB4_FSRRESTORE,
7518    },{ .name = "SMMU_CB4_FAR_LOW",  .decode.addr = A_SMMU_CB4_FAR_LOW,
7519    },{ .name = "SMMU_CB4_FAR_HIGH",  .decode.addr = A_SMMU_CB4_FAR_HIGH,
7520    },{ .name = "SMMU_CB4_FSYNR0",  .decode.addr = A_SMMU_CB4_FSYNR0,
7521        .ro = 0x200,
7522    },{ .name = "SMMU_CB4_IPAFAR_LOW",  .decode.addr = A_SMMU_CB4_IPAFAR_LOW,
7523        .ro = 0xfff,
7524    },{ .name = "SMMU_CB4_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB4_IPAFAR_HIGH,
7525    },{ .name = "SMMU_CB4_TLBIVA_LOW",  .decode.addr = A_SMMU_CB4_TLBIVA_LOW,
7526    },{ .name = "SMMU_CB4_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB4_TLBIVA_HIGH,
7527    },{ .name = "SMMU_CB4_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB4_TLBIVAA_LOW,
7528    },{ .name = "SMMU_CB4_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB4_TLBIVAA_HIGH,
7529    },{ .name = "SMMU_CB4_TLBIASID",  .decode.addr = A_SMMU_CB4_TLBIASID,
7530    },{ .name = "SMMU_CB4_TLBIALL",  .decode.addr = A_SMMU_CB4_TLBIALL,
7531    },{ .name = "SMMU_CB4_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB4_TLBIVAL_LOW,
7532    },{ .name = "SMMU_CB4_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB4_TLBIVAL_HIGH,
7533    },{ .name = "SMMU_CB4_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB4_TLBIVAAL_LOW,
7534    },{ .name = "SMMU_CB4_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB4_TLBIVAAL_HIGH,
7535    },{ .name = "SMMU_CB4_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB4_TLBIIPAS2_LOW,
7536    },{ .name = "SMMU_CB4_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB4_TLBIIPAS2_HIGH,
7537    },{ .name = "SMMU_CB4_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB4_TLBIIPAS2L_LOW,
7538    },{ .name = "SMMU_CB4_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB4_TLBIIPAS2L_HIGH,
7539    },{ .name = "SMMU_CB4_TLBSYNC",  .decode.addr = A_SMMU_CB4_TLBSYNC,
7540    },{ .name = "SMMU_CB4_TLBSTATUS",  .decode.addr = A_SMMU_CB4_TLBSTATUS,
7541        .ro = 0x1,
7542    },{ .name = "SMMU_CB4_PMEVCNTR0",  .decode.addr = A_SMMU_CB4_PMEVCNTR0,
7543    },{ .name = "SMMU_CB4_PMEVCNTR1",  .decode.addr = A_SMMU_CB4_PMEVCNTR1,
7544    },{ .name = "SMMU_CB4_PMEVCNTR2",  .decode.addr = A_SMMU_CB4_PMEVCNTR2,
7545    },{ .name = "SMMU_CB4_PMEVCNTR3",  .decode.addr = A_SMMU_CB4_PMEVCNTR3,
7546    },{ .name = "SMMU_CB4_PMEVTYPER0",  .decode.addr = A_SMMU_CB4_PMEVTYPER0,
7547    },{ .name = "SMMU_CB4_PMEVTYPER1",  .decode.addr = A_SMMU_CB4_PMEVTYPER1,
7548    },{ .name = "SMMU_CB4_PMEVTYPER2",  .decode.addr = A_SMMU_CB4_PMEVTYPER2,
7549    },{ .name = "SMMU_CB4_PMEVTYPER3",  .decode.addr = A_SMMU_CB4_PMEVTYPER3,
7550    },{ .name = "SMMU_CB4_PMCFGR",  .decode.addr = A_SMMU_CB4_PMCFGR,
7551        .reset = 0x11f03,
7552        .ro = 0xff09ffff,
7553    },{ .name = "SMMU_CB4_PMCR",  .decode.addr = A_SMMU_CB4_PMCR,
7554        .ro = 0xff000002,
7555    },{ .name = "SMMU_CB4_PMCEID",  .decode.addr = A_SMMU_CB4_PMCEID,
7556        .reset = 0x30303,
7557        .ro = 0x38383,
7558    },{ .name = "SMMU_CB4_PMCNTENSE",  .decode.addr = A_SMMU_CB4_PMCNTENSE,
7559    },{ .name = "SMMU_CB4_PMCNTENCLR",  .decode.addr = A_SMMU_CB4_PMCNTENCLR,
7560    },{ .name = "SMMU_CB4_PMCNTENSET",  .decode.addr = A_SMMU_CB4_PMCNTENSET,
7561    },{ .name = "SMMU_CB4_PMINTENCLR",  .decode.addr = A_SMMU_CB4_PMINTENCLR,
7562    },{ .name = "SMMU_CB4_PMOVSCLR",  .decode.addr = A_SMMU_CB4_PMOVSCLR,
7563    },{ .name = "SMMU_CB4_PMOVSSET",  .decode.addr = A_SMMU_CB4_PMOVSSET,
7564    },{ .name = "SMMU_CB4_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB4_PMAUTHSTATUS,
7565        .reset = 0x80,
7566        .ro = 0xff,
7567    },{ .name = "SMMU_CB5_SCTLR",  .decode.addr = A_SMMU_CB5_SCTLR,
7568        .reset = 0x100,
7569        .ro = 0x1000,
7570    },{ .name = "SMMU_CB5_ACTLR",  .decode.addr = A_SMMU_CB5_ACTLR,
7571        .reset = 0x3,
7572    },{ .name = "SMMU_CB5_RESUME",  .decode.addr = A_SMMU_CB5_RESUME,
7573    },{ .name = "SMMU_CB5_TCR2",  .decode.addr = A_SMMU_CB5_TCR2,
7574        .reset = 0x60,
7575        .ro = 0x60,
7576    },{ .name = "SMMU_CB5_TTBR0_LOW",  .decode.addr = A_SMMU_CB5_TTBR0_LOW,
7577        .ro = 0x4,
7578    },{ .name = "SMMU_CB5_TTBR0_HIGH",  .decode.addr = A_SMMU_CB5_TTBR0_HIGH,
7579    },{ .name = "SMMU_CB5_TTBR1_LOW",  .decode.addr = A_SMMU_CB5_TTBR1_LOW,
7580    },{ .name = "SMMU_CB5_TTBR1_HIGH",  .decode.addr = A_SMMU_CB5_TTBR1_HIGH,
7581    },{ .name = "SMMU_CB5_TCR_LPAE",  .decode.addr = A_SMMU_CB5_TCR_LPAE,
7582    },{ .name = "SMMU_CB5_CONTEXTIDR",  .decode.addr = A_SMMU_CB5_CONTEXTIDR,
7583    },{ .name = "SMMU_CB5_PRRR_MAIR0",  .decode.addr = A_SMMU_CB5_PRRR_MAIR0,
7584    },{ .name = "SMMU_CB5_NMRR_MAIR1",  .decode.addr = A_SMMU_CB5_NMRR_MAIR1,
7585    },{ .name = "SMMU_CB5_FSR",  .decode.addr = A_SMMU_CB5_FSR,
7586        .w1c = 0xffffffff,
7587        .post_write = smmu_fsr_pw,
7588    },{ .name = "SMMU_CB5_FSRRESTORE",  .decode.addr = A_SMMU_CB5_FSRRESTORE,
7589    },{ .name = "SMMU_CB5_FAR_LOW",  .decode.addr = A_SMMU_CB5_FAR_LOW,
7590    },{ .name = "SMMU_CB5_FAR_HIGH",  .decode.addr = A_SMMU_CB5_FAR_HIGH,
7591    },{ .name = "SMMU_CB5_FSYNR0",  .decode.addr = A_SMMU_CB5_FSYNR0,
7592        .ro = 0x200,
7593    },{ .name = "SMMU_CB5_IPAFAR_LOW",  .decode.addr = A_SMMU_CB5_IPAFAR_LOW,
7594        .ro = 0xfff,
7595    },{ .name = "SMMU_CB5_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB5_IPAFAR_HIGH,
7596    },{ .name = "SMMU_CB5_TLBIVA_LOW",  .decode.addr = A_SMMU_CB5_TLBIVA_LOW,
7597    },{ .name = "SMMU_CB5_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB5_TLBIVA_HIGH,
7598    },{ .name = "SMMU_CB5_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB5_TLBIVAA_LOW,
7599    },{ .name = "SMMU_CB5_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB5_TLBIVAA_HIGH,
7600    },{ .name = "SMMU_CB5_TLBIASID",  .decode.addr = A_SMMU_CB5_TLBIASID,
7601    },{ .name = "SMMU_CB5_TLBIALL",  .decode.addr = A_SMMU_CB5_TLBIALL,
7602    },{ .name = "SMMU_CB5_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB5_TLBIVAL_LOW,
7603    },{ .name = "SMMU_CB5_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB5_TLBIVAL_HIGH,
7604    },{ .name = "SMMU_CB5_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB5_TLBIVAAL_LOW,
7605    },{ .name = "SMMU_CB5_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB5_TLBIVAAL_HIGH,
7606    },{ .name = "SMMU_CB5_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB5_TLBIIPAS2_LOW,
7607    },{ .name = "SMMU_CB5_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB5_TLBIIPAS2_HIGH,
7608    },{ .name = "SMMU_CB5_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB5_TLBIIPAS2L_LOW,
7609    },{ .name = "SMMU_CB5_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB5_TLBIIPAS2L_HIGH,
7610    },{ .name = "SMMU_CB5_TLBSYNC",  .decode.addr = A_SMMU_CB5_TLBSYNC,
7611    },{ .name = "SMMU_CB5_TLBSTATUS",  .decode.addr = A_SMMU_CB5_TLBSTATUS,
7612        .ro = 0x1,
7613    },{ .name = "SMMU_CB5_PMEVCNTR0",  .decode.addr = A_SMMU_CB5_PMEVCNTR0,
7614    },{ .name = "SMMU_CB5_PMEVCNTR1",  .decode.addr = A_SMMU_CB5_PMEVCNTR1,
7615    },{ .name = "SMMU_CB5_PMEVCNTR2",  .decode.addr = A_SMMU_CB5_PMEVCNTR2,
7616    },{ .name = "SMMU_CB5_PMEVCNTR3",  .decode.addr = A_SMMU_CB5_PMEVCNTR3,
7617    },{ .name = "SMMU_CB5_PMEVTYPER0",  .decode.addr = A_SMMU_CB5_PMEVTYPER0,
7618    },{ .name = "SMMU_CB5_PMEVTYPER1",  .decode.addr = A_SMMU_CB5_PMEVTYPER1,
7619    },{ .name = "SMMU_CB5_PMEVTYPER2",  .decode.addr = A_SMMU_CB5_PMEVTYPER2,
7620    },{ .name = "SMMU_CB5_PMEVTYPER3",  .decode.addr = A_SMMU_CB5_PMEVTYPER3,
7621    },{ .name = "SMMU_CB5_PMCFGR",  .decode.addr = A_SMMU_CB5_PMCFGR,
7622        .reset = 0x11f03,
7623        .ro = 0xff09ffff,
7624    },{ .name = "SMMU_CB5_PMCR",  .decode.addr = A_SMMU_CB5_PMCR,
7625        .ro = 0xff000002,
7626    },{ .name = "SMMU_CB5_PMCEID",  .decode.addr = A_SMMU_CB5_PMCEID,
7627        .reset = 0x30303,
7628        .ro = 0x38383,
7629    },{ .name = "SMMU_CB5_PMCNTENSE",  .decode.addr = A_SMMU_CB5_PMCNTENSE,
7630    },{ .name = "SMMU_CB5_PMCNTENCLR",  .decode.addr = A_SMMU_CB5_PMCNTENCLR,
7631    },{ .name = "SMMU_CB5_PMCNTENSET",  .decode.addr = A_SMMU_CB5_PMCNTENSET,
7632    },{ .name = "SMMU_CB5_PMINTENCLR",  .decode.addr = A_SMMU_CB5_PMINTENCLR,
7633    },{ .name = "SMMU_CB5_PMOVSCLR",  .decode.addr = A_SMMU_CB5_PMOVSCLR,
7634    },{ .name = "SMMU_CB5_PMOVSSET",  .decode.addr = A_SMMU_CB5_PMOVSSET,
7635    },{ .name = "SMMU_CB5_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB5_PMAUTHSTATUS,
7636        .reset = 0x80,
7637        .ro = 0xff,
7638    },{ .name = "SMMU_CB6_SCTLR",  .decode.addr = A_SMMU_CB6_SCTLR,
7639        .reset = 0x100,
7640        .ro = 0x1000,
7641    },{ .name = "SMMU_CB6_ACTLR",  .decode.addr = A_SMMU_CB6_ACTLR,
7642        .reset = 0x3,
7643    },{ .name = "SMMU_CB6_RESUME",  .decode.addr = A_SMMU_CB6_RESUME,
7644    },{ .name = "SMMU_CB6_TCR2",  .decode.addr = A_SMMU_CB6_TCR2,
7645        .reset = 0x60,
7646        .ro = 0x60,
7647    },{ .name = "SMMU_CB6_TTBR0_LOW",  .decode.addr = A_SMMU_CB6_TTBR0_LOW,
7648        .ro = 0x4,
7649    },{ .name = "SMMU_CB6_TTBR0_HIGH",  .decode.addr = A_SMMU_CB6_TTBR0_HIGH,
7650    },{ .name = "SMMU_CB6_TTBR1_LOW",  .decode.addr = A_SMMU_CB6_TTBR1_LOW,
7651    },{ .name = "SMMU_CB6_TTBR1_HIGH",  .decode.addr = A_SMMU_CB6_TTBR1_HIGH,
7652    },{ .name = "SMMU_CB6_TCR_LPAE",  .decode.addr = A_SMMU_CB6_TCR_LPAE,
7653    },{ .name = "SMMU_CB6_CONTEXTIDR",  .decode.addr = A_SMMU_CB6_CONTEXTIDR,
7654    },{ .name = "SMMU_CB6_PRRR_MAIR0",  .decode.addr = A_SMMU_CB6_PRRR_MAIR0,
7655    },{ .name = "SMMU_CB6_NMRR_MAIR1",  .decode.addr = A_SMMU_CB6_NMRR_MAIR1,
7656    },{ .name = "SMMU_CB6_FSR",  .decode.addr = A_SMMU_CB6_FSR,
7657        .w1c = 0xffffffff,
7658        .post_write = smmu_fsr_pw,
7659    },{ .name = "SMMU_CB6_FSRRESTORE",  .decode.addr = A_SMMU_CB6_FSRRESTORE,
7660    },{ .name = "SMMU_CB6_FAR_LOW",  .decode.addr = A_SMMU_CB6_FAR_LOW,
7661    },{ .name = "SMMU_CB6_FAR_HIGH",  .decode.addr = A_SMMU_CB6_FAR_HIGH,
7662    },{ .name = "SMMU_CB6_FSYNR0",  .decode.addr = A_SMMU_CB6_FSYNR0,
7663        .ro = 0x200,
7664    },{ .name = "SMMU_CB6_IPAFAR_LOW",  .decode.addr = A_SMMU_CB6_IPAFAR_LOW,
7665        .ro = 0xfff,
7666    },{ .name = "SMMU_CB6_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB6_IPAFAR_HIGH,
7667    },{ .name = "SMMU_CB6_TLBIVA_LOW",  .decode.addr = A_SMMU_CB6_TLBIVA_LOW,
7668    },{ .name = "SMMU_CB6_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB6_TLBIVA_HIGH,
7669    },{ .name = "SMMU_CB6_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB6_TLBIVAA_LOW,
7670    },{ .name = "SMMU_CB6_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB6_TLBIVAA_HIGH,
7671    },{ .name = "SMMU_CB6_TLBIASID",  .decode.addr = A_SMMU_CB6_TLBIASID,
7672    },{ .name = "SMMU_CB6_TLBIALL",  .decode.addr = A_SMMU_CB6_TLBIALL,
7673    },{ .name = "SMMU_CB6_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB6_TLBIVAL_LOW,
7674    },{ .name = "SMMU_CB6_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB6_TLBIVAL_HIGH,
7675    },{ .name = "SMMU_CB6_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB6_TLBIVAAL_LOW,
7676    },{ .name = "SMMU_CB6_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB6_TLBIVAAL_HIGH,
7677    },{ .name = "SMMU_CB6_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB6_TLBIIPAS2_LOW,
7678    },{ .name = "SMMU_CB6_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB6_TLBIIPAS2_HIGH,
7679    },{ .name = "SMMU_CB6_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB6_TLBIIPAS2L_LOW,
7680    },{ .name = "SMMU_CB6_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB6_TLBIIPAS2L_HIGH,
7681    },{ .name = "SMMU_CB6_TLBSYNC",  .decode.addr = A_SMMU_CB6_TLBSYNC,
7682    },{ .name = "SMMU_CB6_TLBSTATUS",  .decode.addr = A_SMMU_CB6_TLBSTATUS,
7683        .ro = 0x1,
7684    },{ .name = "SMMU_CB6_PMEVCNTR0",  .decode.addr = A_SMMU_CB6_PMEVCNTR0,
7685    },{ .name = "SMMU_CB6_PMEVCNTR1",  .decode.addr = A_SMMU_CB6_PMEVCNTR1,
7686    },{ .name = "SMMU_CB6_PMEVCNTR2",  .decode.addr = A_SMMU_CB6_PMEVCNTR2,
7687    },{ .name = "SMMU_CB6_PMEVCNTR3",  .decode.addr = A_SMMU_CB6_PMEVCNTR3,
7688    },{ .name = "SMMU_CB6_PMEVTYPER0",  .decode.addr = A_SMMU_CB6_PMEVTYPER0,
7689    },{ .name = "SMMU_CB6_PMEVTYPER1",  .decode.addr = A_SMMU_CB6_PMEVTYPER1,
7690    },{ .name = "SMMU_CB6_PMEVTYPER2",  .decode.addr = A_SMMU_CB6_PMEVTYPER2,
7691    },{ .name = "SMMU_CB6_PMEVTYPER3",  .decode.addr = A_SMMU_CB6_PMEVTYPER3,
7692    },{ .name = "SMMU_CB6_PMCFGR",  .decode.addr = A_SMMU_CB6_PMCFGR,
7693        .reset = 0x11f03,
7694        .ro = 0xff09ffff,
7695    },{ .name = "SMMU_CB6_PMCR",  .decode.addr = A_SMMU_CB6_PMCR,
7696        .ro = 0xff000002,
7697    },{ .name = "SMMU_CB6_PMCEID",  .decode.addr = A_SMMU_CB6_PMCEID,
7698        .reset = 0x30303,
7699        .ro = 0x38383,
7700    },{ .name = "SMMU_CB6_PMCNTENSE",  .decode.addr = A_SMMU_CB6_PMCNTENSE,
7701    },{ .name = "SMMU_CB6_PMCNTENCLR",  .decode.addr = A_SMMU_CB6_PMCNTENCLR,
7702    },{ .name = "SMMU_CB6_PMCNTENSET",  .decode.addr = A_SMMU_CB6_PMCNTENSET,
7703    },{ .name = "SMMU_CB6_PMINTENCLR",  .decode.addr = A_SMMU_CB6_PMINTENCLR,
7704    },{ .name = "SMMU_CB6_PMOVSCLR",  .decode.addr = A_SMMU_CB6_PMOVSCLR,
7705    },{ .name = "SMMU_CB6_PMOVSSET",  .decode.addr = A_SMMU_CB6_PMOVSSET,
7706    },{ .name = "SMMU_CB6_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB6_PMAUTHSTATUS,
7707        .reset = 0x80,
7708        .ro = 0xff,
7709    },{ .name = "SMMU_CB7_SCTLR",  .decode.addr = A_SMMU_CB7_SCTLR,
7710        .reset = 0x100,
7711        .ro = 0x1000,
7712    },{ .name = "SMMU_CB7_ACTLR",  .decode.addr = A_SMMU_CB7_ACTLR,
7713        .reset = 0x3,
7714    },{ .name = "SMMU_CB7_RESUME",  .decode.addr = A_SMMU_CB7_RESUME,
7715    },{ .name = "SMMU_CB7_TCR2",  .decode.addr = A_SMMU_CB7_TCR2,
7716        .reset = 0x60,
7717        .ro = 0x60,
7718    },{ .name = "SMMU_CB7_TTBR0_LOW",  .decode.addr = A_SMMU_CB7_TTBR0_LOW,
7719        .ro = 0x4,
7720    },{ .name = "SMMU_CB7_TTBR0_HIGH",  .decode.addr = A_SMMU_CB7_TTBR0_HIGH,
7721    },{ .name = "SMMU_CB7_TTBR1_LOW",  .decode.addr = A_SMMU_CB7_TTBR1_LOW,
7722    },{ .name = "SMMU_CB7_TTBR1_HIGH",  .decode.addr = A_SMMU_CB7_TTBR1_HIGH,
7723    },{ .name = "SMMU_CB7_TCR_LPAE",  .decode.addr = A_SMMU_CB7_TCR_LPAE,
7724    },{ .name = "SMMU_CB7_CONTEXTIDR",  .decode.addr = A_SMMU_CB7_CONTEXTIDR,
7725    },{ .name = "SMMU_CB7_PRRR_MAIR0",  .decode.addr = A_SMMU_CB7_PRRR_MAIR0,
7726    },{ .name = "SMMU_CB7_NMRR_MAIR1",  .decode.addr = A_SMMU_CB7_NMRR_MAIR1,
7727    },{ .name = "SMMU_CB7_FSR",  .decode.addr = A_SMMU_CB7_FSR,
7728        .w1c = 0xffffffff,
7729        .post_write = smmu_fsr_pw,
7730    },{ .name = "SMMU_CB7_FSRRESTORE",  .decode.addr = A_SMMU_CB7_FSRRESTORE,
7731    },{ .name = "SMMU_CB7_FAR_LOW",  .decode.addr = A_SMMU_CB7_FAR_LOW,
7732    },{ .name = "SMMU_CB7_FAR_HIGH",  .decode.addr = A_SMMU_CB7_FAR_HIGH,
7733    },{ .name = "SMMU_CB7_FSYNR0",  .decode.addr = A_SMMU_CB7_FSYNR0,
7734        .ro = 0x200,
7735    },{ .name = "SMMU_CB7_IPAFAR_LOW",  .decode.addr = A_SMMU_CB7_IPAFAR_LOW,
7736        .ro = 0xfff,
7737    },{ .name = "SMMU_CB7_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB7_IPAFAR_HIGH,
7738    },{ .name = "SMMU_CB7_TLBIVA_LOW",  .decode.addr = A_SMMU_CB7_TLBIVA_LOW,
7739    },{ .name = "SMMU_CB7_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB7_TLBIVA_HIGH,
7740    },{ .name = "SMMU_CB7_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB7_TLBIVAA_LOW,
7741    },{ .name = "SMMU_CB7_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB7_TLBIVAA_HIGH,
7742    },{ .name = "SMMU_CB7_TLBIASID",  .decode.addr = A_SMMU_CB7_TLBIASID,
7743    },{ .name = "SMMU_CB7_TLBIALL",  .decode.addr = A_SMMU_CB7_TLBIALL,
7744    },{ .name = "SMMU_CB7_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB7_TLBIVAL_LOW,
7745    },{ .name = "SMMU_CB7_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB7_TLBIVAL_HIGH,
7746    },{ .name = "SMMU_CB7_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB7_TLBIVAAL_LOW,
7747    },{ .name = "SMMU_CB7_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB7_TLBIVAAL_HIGH,
7748    },{ .name = "SMMU_CB7_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB7_TLBIIPAS2_LOW,
7749    },{ .name = "SMMU_CB7_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB7_TLBIIPAS2_HIGH,
7750    },{ .name = "SMMU_CB7_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB7_TLBIIPAS2L_LOW,
7751    },{ .name = "SMMU_CB7_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB7_TLBIIPAS2L_HIGH,
7752    },{ .name = "SMMU_CB7_TLBSYNC",  .decode.addr = A_SMMU_CB7_TLBSYNC,
7753    },{ .name = "SMMU_CB7_TLBSTATUS",  .decode.addr = A_SMMU_CB7_TLBSTATUS,
7754        .ro = 0x1,
7755    },{ .name = "SMMU_CB7_PMEVCNTR0",  .decode.addr = A_SMMU_CB7_PMEVCNTR0,
7756    },{ .name = "SMMU_CB7_PMEVCNTR1",  .decode.addr = A_SMMU_CB7_PMEVCNTR1,
7757    },{ .name = "SMMU_CB7_PMEVCNTR2",  .decode.addr = A_SMMU_CB7_PMEVCNTR2,
7758    },{ .name = "SMMU_CB7_PMEVCNTR3",  .decode.addr = A_SMMU_CB7_PMEVCNTR3,
7759    },{ .name = "SMMU_CB7_PMEVTYPER0",  .decode.addr = A_SMMU_CB7_PMEVTYPER0,
7760    },{ .name = "SMMU_CB7_PMEVTYPER1",  .decode.addr = A_SMMU_CB7_PMEVTYPER1,
7761    },{ .name = "SMMU_CB7_PMEVTYPER2",  .decode.addr = A_SMMU_CB7_PMEVTYPER2,
7762    },{ .name = "SMMU_CB7_PMEVTYPER3",  .decode.addr = A_SMMU_CB7_PMEVTYPER3,
7763    },{ .name = "SMMU_CB7_PMCFGR",  .decode.addr = A_SMMU_CB7_PMCFGR,
7764        .reset = 0x11f03,
7765        .ro = 0xff09ffff,
7766    },{ .name = "SMMU_CB7_PMCR",  .decode.addr = A_SMMU_CB7_PMCR,
7767        .ro = 0xff000002,
7768    },{ .name = "SMMU_CB7_PMCEID",  .decode.addr = A_SMMU_CB7_PMCEID,
7769        .reset = 0x30303,
7770        .ro = 0x38383,
7771    },{ .name = "SMMU_CB7_PMCNTENSE",  .decode.addr = A_SMMU_CB7_PMCNTENSE,
7772    },{ .name = "SMMU_CB7_PMCNTENCLR",  .decode.addr = A_SMMU_CB7_PMCNTENCLR,
7773    },{ .name = "SMMU_CB7_PMCNTENSET",  .decode.addr = A_SMMU_CB7_PMCNTENSET,
7774    },{ .name = "SMMU_CB7_PMINTENCLR",  .decode.addr = A_SMMU_CB7_PMINTENCLR,
7775    },{ .name = "SMMU_CB7_PMOVSCLR",  .decode.addr = A_SMMU_CB7_PMOVSCLR,
7776    },{ .name = "SMMU_CB7_PMOVSSET",  .decode.addr = A_SMMU_CB7_PMOVSSET,
7777    },{ .name = "SMMU_CB7_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB7_PMAUTHSTATUS,
7778        .reset = 0x80,
7779        .ro = 0xff,
7780    },{ .name = "SMMU_CB8_SCTLR",  .decode.addr = A_SMMU_CB8_SCTLR,
7781        .reset = 0x100,
7782        .ro = 0x1000,
7783    },{ .name = "SMMU_CB8_ACTLR",  .decode.addr = A_SMMU_CB8_ACTLR,
7784        .reset = 0x3,
7785    },{ .name = "SMMU_CB8_RESUME",  .decode.addr = A_SMMU_CB8_RESUME,
7786    },{ .name = "SMMU_CB8_TCR2",  .decode.addr = A_SMMU_CB8_TCR2,
7787        .reset = 0x60,
7788        .ro = 0x60,
7789    },{ .name = "SMMU_CB8_TTBR0_LOW",  .decode.addr = A_SMMU_CB8_TTBR0_LOW,
7790        .ro = 0x4,
7791    },{ .name = "SMMU_CB8_TTBR0_HIGH",  .decode.addr = A_SMMU_CB8_TTBR0_HIGH,
7792    },{ .name = "SMMU_CB8_TTBR1_LOW",  .decode.addr = A_SMMU_CB8_TTBR1_LOW,
7793    },{ .name = "SMMU_CB8_TTBR1_HIGH",  .decode.addr = A_SMMU_CB8_TTBR1_HIGH,
7794    },{ .name = "SMMU_CB8_TCR_LPAE",  .decode.addr = A_SMMU_CB8_TCR_LPAE,
7795    },{ .name = "SMMU_CB8_CONTEXTIDR",  .decode.addr = A_SMMU_CB8_CONTEXTIDR,
7796    },{ .name = "SMMU_CB8_PRRR_MAIR0",  .decode.addr = A_SMMU_CB8_PRRR_MAIR0,
7797    },{ .name = "SMMU_CB8_NMRR_MAIR1",  .decode.addr = A_SMMU_CB8_NMRR_MAIR1,
7798    },{ .name = "SMMU_CB8_FSR",  .decode.addr = A_SMMU_CB8_FSR,
7799        .w1c = 0xffffffff,
7800        .post_write = smmu_fsr_pw,
7801    },{ .name = "SMMU_CB8_FSRRESTORE",  .decode.addr = A_SMMU_CB8_FSRRESTORE,
7802    },{ .name = "SMMU_CB8_FAR_LOW",  .decode.addr = A_SMMU_CB8_FAR_LOW,
7803    },{ .name = "SMMU_CB8_FAR_HIGH",  .decode.addr = A_SMMU_CB8_FAR_HIGH,
7804    },{ .name = "SMMU_CB8_FSYNR0",  .decode.addr = A_SMMU_CB8_FSYNR0,
7805        .ro = 0x200,
7806    },{ .name = "SMMU_CB8_IPAFAR_LOW",  .decode.addr = A_SMMU_CB8_IPAFAR_LOW,
7807        .ro = 0xfff,
7808    },{ .name = "SMMU_CB8_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB8_IPAFAR_HIGH,
7809    },{ .name = "SMMU_CB8_TLBIVA_LOW",  .decode.addr = A_SMMU_CB8_TLBIVA_LOW,
7810    },{ .name = "SMMU_CB8_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB8_TLBIVA_HIGH,
7811    },{ .name = "SMMU_CB8_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB8_TLBIVAA_LOW,
7812    },{ .name = "SMMU_CB8_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB8_TLBIVAA_HIGH,
7813    },{ .name = "SMMU_CB8_TLBIASID",  .decode.addr = A_SMMU_CB8_TLBIASID,
7814    },{ .name = "SMMU_CB8_TLBIALL",  .decode.addr = A_SMMU_CB8_TLBIALL,
7815    },{ .name = "SMMU_CB8_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB8_TLBIVAL_LOW,
7816    },{ .name = "SMMU_CB8_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB8_TLBIVAL_HIGH,
7817    },{ .name = "SMMU_CB8_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB8_TLBIVAAL_LOW,
7818    },{ .name = "SMMU_CB8_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB8_TLBIVAAL_HIGH,
7819    },{ .name = "SMMU_CB8_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB8_TLBIIPAS2_LOW,
7820    },{ .name = "SMMU_CB8_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB8_TLBIIPAS2_HIGH,
7821    },{ .name = "SMMU_CB8_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB8_TLBIIPAS2L_LOW,
7822    },{ .name = "SMMU_CB8_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB8_TLBIIPAS2L_HIGH,
7823    },{ .name = "SMMU_CB8_TLBSYNC",  .decode.addr = A_SMMU_CB8_TLBSYNC,
7824    },{ .name = "SMMU_CB8_TLBSTATUS",  .decode.addr = A_SMMU_CB8_TLBSTATUS,
7825        .ro = 0x1,
7826    },{ .name = "SMMU_CB8_PMEVCNTR0",  .decode.addr = A_SMMU_CB8_PMEVCNTR0,
7827    },{ .name = "SMMU_CB8_PMEVCNTR1",  .decode.addr = A_SMMU_CB8_PMEVCNTR1,
7828    },{ .name = "SMMU_CB8_PMEVCNTR2",  .decode.addr = A_SMMU_CB8_PMEVCNTR2,
7829    },{ .name = "SMMU_CB8_PMEVCNTR3",  .decode.addr = A_SMMU_CB8_PMEVCNTR3,
7830    },{ .name = "SMMU_CB8_PMEVTYPER0",  .decode.addr = A_SMMU_CB8_PMEVTYPER0,
7831    },{ .name = "SMMU_CB8_PMEVTYPER1",  .decode.addr = A_SMMU_CB8_PMEVTYPER1,
7832    },{ .name = "SMMU_CB8_PMEVTYPER2",  .decode.addr = A_SMMU_CB8_PMEVTYPER2,
7833    },{ .name = "SMMU_CB8_PMEVTYPER3",  .decode.addr = A_SMMU_CB8_PMEVTYPER3,
7834    },{ .name = "SMMU_CB8_PMCFGR",  .decode.addr = A_SMMU_CB8_PMCFGR,
7835        .reset = 0x11f03,
7836        .ro = 0xff09ffff,
7837    },{ .name = "SMMU_CB8_PMCR",  .decode.addr = A_SMMU_CB8_PMCR,
7838        .ro = 0xff000002,
7839    },{ .name = "SMMU_CB8_PMCEID",  .decode.addr = A_SMMU_CB8_PMCEID,
7840        .reset = 0x30303,
7841        .ro = 0x38383,
7842    },{ .name = "SMMU_CB8_PMCNTENSE",  .decode.addr = A_SMMU_CB8_PMCNTENSE,
7843    },{ .name = "SMMU_CB8_PMCNTENCLR",  .decode.addr = A_SMMU_CB8_PMCNTENCLR,
7844    },{ .name = "SMMU_CB8_PMCNTENSET",  .decode.addr = A_SMMU_CB8_PMCNTENSET,
7845    },{ .name = "SMMU_CB8_PMINTENCLR",  .decode.addr = A_SMMU_CB8_PMINTENCLR,
7846    },{ .name = "SMMU_CB8_PMOVSCLR",  .decode.addr = A_SMMU_CB8_PMOVSCLR,
7847    },{ .name = "SMMU_CB8_PMOVSSET",  .decode.addr = A_SMMU_CB8_PMOVSSET,
7848    },{ .name = "SMMU_CB8_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB8_PMAUTHSTATUS,
7849        .reset = 0x80,
7850        .ro = 0xff,
7851    },{ .name = "SMMU_CB9_SCTLR",  .decode.addr = A_SMMU_CB9_SCTLR,
7852        .reset = 0x100,
7853        .ro = 0x1000,
7854    },{ .name = "SMMU_CB9_ACTLR",  .decode.addr = A_SMMU_CB9_ACTLR,
7855        .reset = 0x3,
7856    },{ .name = "SMMU_CB9_RESUME",  .decode.addr = A_SMMU_CB9_RESUME,
7857    },{ .name = "SMMU_CB9_TCR2",  .decode.addr = A_SMMU_CB9_TCR2,
7858        .reset = 0x60,
7859        .ro = 0x60,
7860    },{ .name = "SMMU_CB9_TTBR0_LOW",  .decode.addr = A_SMMU_CB9_TTBR0_LOW,
7861        .ro = 0x4,
7862    },{ .name = "SMMU_CB9_TTBR0_HIGH",  .decode.addr = A_SMMU_CB9_TTBR0_HIGH,
7863    },{ .name = "SMMU_CB9_TTBR1_LOW",  .decode.addr = A_SMMU_CB9_TTBR1_LOW,
7864    },{ .name = "SMMU_CB9_TTBR1_HIGH",  .decode.addr = A_SMMU_CB9_TTBR1_HIGH,
7865    },{ .name = "SMMU_CB9_TCR_LPAE",  .decode.addr = A_SMMU_CB9_TCR_LPAE,
7866    },{ .name = "SMMU_CB9_CONTEXTIDR",  .decode.addr = A_SMMU_CB9_CONTEXTIDR,
7867    },{ .name = "SMMU_CB9_PRRR_MAIR0",  .decode.addr = A_SMMU_CB9_PRRR_MAIR0,
7868    },{ .name = "SMMU_CB9_NMRR_MAIR1",  .decode.addr = A_SMMU_CB9_NMRR_MAIR1,
7869    },{ .name = "SMMU_CB9_FSR",  .decode.addr = A_SMMU_CB9_FSR,
7870        .w1c = 0xffffffff,
7871        .post_write = smmu_fsr_pw,
7872    },{ .name = "SMMU_CB9_FSRRESTORE",  .decode.addr = A_SMMU_CB9_FSRRESTORE,
7873    },{ .name = "SMMU_CB9_FAR_LOW",  .decode.addr = A_SMMU_CB9_FAR_LOW,
7874    },{ .name = "SMMU_CB9_FAR_HIGH",  .decode.addr = A_SMMU_CB9_FAR_HIGH,
7875    },{ .name = "SMMU_CB9_FSYNR0",  .decode.addr = A_SMMU_CB9_FSYNR0,
7876        .ro = 0x200,
7877    },{ .name = "SMMU_CB9_IPAFAR_LOW",  .decode.addr = A_SMMU_CB9_IPAFAR_LOW,
7878        .ro = 0xfff,
7879    },{ .name = "SMMU_CB9_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB9_IPAFAR_HIGH,
7880    },{ .name = "SMMU_CB9_TLBIVA_LOW",  .decode.addr = A_SMMU_CB9_TLBIVA_LOW,
7881    },{ .name = "SMMU_CB9_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB9_TLBIVA_HIGH,
7882    },{ .name = "SMMU_CB9_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB9_TLBIVAA_LOW,
7883    },{ .name = "SMMU_CB9_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB9_TLBIVAA_HIGH,
7884    },{ .name = "SMMU_CB9_TLBIASID",  .decode.addr = A_SMMU_CB9_TLBIASID,
7885    },{ .name = "SMMU_CB9_TLBIALL",  .decode.addr = A_SMMU_CB9_TLBIALL,
7886    },{ .name = "SMMU_CB9_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB9_TLBIVAL_LOW,
7887    },{ .name = "SMMU_CB9_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB9_TLBIVAL_HIGH,
7888    },{ .name = "SMMU_CB9_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB9_TLBIVAAL_LOW,
7889    },{ .name = "SMMU_CB9_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB9_TLBIVAAL_HIGH,
7890    },{ .name = "SMMU_CB9_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB9_TLBIIPAS2_LOW,
7891    },{ .name = "SMMU_CB9_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB9_TLBIIPAS2_HIGH,
7892    },{ .name = "SMMU_CB9_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB9_TLBIIPAS2L_LOW,
7893    },{ .name = "SMMU_CB9_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB9_TLBIIPAS2L_HIGH,
7894    },{ .name = "SMMU_CB9_TLBSYNC",  .decode.addr = A_SMMU_CB9_TLBSYNC,
7895    },{ .name = "SMMU_CB9_TLBSTATUS",  .decode.addr = A_SMMU_CB9_TLBSTATUS,
7896        .ro = 0x1,
7897    },{ .name = "SMMU_CB9_PMEVCNTR0",  .decode.addr = A_SMMU_CB9_PMEVCNTR0,
7898    },{ .name = "SMMU_CB9_PMEVCNTR1",  .decode.addr = A_SMMU_CB9_PMEVCNTR1,
7899    },{ .name = "SMMU_CB9_PMEVCNTR2",  .decode.addr = A_SMMU_CB9_PMEVCNTR2,
7900    },{ .name = "SMMU_CB9_PMEVCNTR3",  .decode.addr = A_SMMU_CB9_PMEVCNTR3,
7901    },{ .name = "SMMU_CB9_PMEVTYPER0",  .decode.addr = A_SMMU_CB9_PMEVTYPER0,
7902    },{ .name = "SMMU_CB9_PMEVTYPER1",  .decode.addr = A_SMMU_CB9_PMEVTYPER1,
7903    },{ .name = "SMMU_CB9_PMEVTYPER2",  .decode.addr = A_SMMU_CB9_PMEVTYPER2,
7904    },{ .name = "SMMU_CB9_PMEVTYPER3",  .decode.addr = A_SMMU_CB9_PMEVTYPER3,
7905    },{ .name = "SMMU_CB9_PMCFGR",  .decode.addr = A_SMMU_CB9_PMCFGR,
7906        .reset = 0x11f03,
7907        .ro = 0xff09ffff,
7908    },{ .name = "SMMU_CB9_PMCR",  .decode.addr = A_SMMU_CB9_PMCR,
7909        .ro = 0xff000002,
7910    },{ .name = "SMMU_CB9_PMCEID",  .decode.addr = A_SMMU_CB9_PMCEID,
7911        .reset = 0x30303,
7912        .ro = 0x38383,
7913    },{ .name = "SMMU_CB9_PMCNTENSE",  .decode.addr = A_SMMU_CB9_PMCNTENSE,
7914    },{ .name = "SMMU_CB9_PMCNTENCLR",  .decode.addr = A_SMMU_CB9_PMCNTENCLR,
7915    },{ .name = "SMMU_CB9_PMCNTENSET",  .decode.addr = A_SMMU_CB9_PMCNTENSET,
7916    },{ .name = "SMMU_CB9_PMINTENCLR",  .decode.addr = A_SMMU_CB9_PMINTENCLR,
7917    },{ .name = "SMMU_CB9_PMOVSCLR",  .decode.addr = A_SMMU_CB9_PMOVSCLR,
7918    },{ .name = "SMMU_CB9_PMOVSSET",  .decode.addr = A_SMMU_CB9_PMOVSSET,
7919    },{ .name = "SMMU_CB9_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB9_PMAUTHSTATUS,
7920        .reset = 0x80,
7921        .ro = 0xff,
7922    },{ .name = "SMMU_CB10_SCTLR",  .decode.addr = A_SMMU_CB10_SCTLR,
7923        .reset = 0x100,
7924        .ro = 0x1000,
7925    },{ .name = "SMMU_CB10_ACTLR",  .decode.addr = A_SMMU_CB10_ACTLR,
7926        .reset = 0x3,
7927    },{ .name = "SMMU_CB10_RESUME",  .decode.addr = A_SMMU_CB10_RESUME,
7928    },{ .name = "SMMU_CB10_TCR2",  .decode.addr = A_SMMU_CB10_TCR2,
7929        .reset = 0x60,
7930        .ro = 0x60,
7931    },{ .name = "SMMU_CB10_TTBR0_LOW",  .decode.addr = A_SMMU_CB10_TTBR0_LOW,
7932        .ro = 0x4,
7933    },{ .name = "SMMU_CB10_TTBR0_HIGH",  .decode.addr = A_SMMU_CB10_TTBR0_HIGH,
7934    },{ .name = "SMMU_CB10_TTBR1_LOW",  .decode.addr = A_SMMU_CB10_TTBR1_LOW,
7935    },{ .name = "SMMU_CB10_TTBR1_HIGH",  .decode.addr = A_SMMU_CB10_TTBR1_HIGH,
7936    },{ .name = "SMMU_CB10_TCR_LPAE",  .decode.addr = A_SMMU_CB10_TCR_LPAE,
7937    },{ .name = "SMMU_CB10_CONTEXTIDR",  .decode.addr = A_SMMU_CB10_CONTEXTIDR,
7938    },{ .name = "SMMU_CB10_PRRR_MAIR0",  .decode.addr = A_SMMU_CB10_PRRR_MAIR0,
7939    },{ .name = "SMMU_CB10_NMRR_MAIR1",  .decode.addr = A_SMMU_CB10_NMRR_MAIR1,
7940    },{ .name = "SMMU_CB10_FSR",  .decode.addr = A_SMMU_CB10_FSR,
7941        .w1c = 0xffffffff,
7942        .post_write = smmu_fsr_pw,
7943    },{ .name = "SMMU_CB10_FSRRESTORE",  .decode.addr = A_SMMU_CB10_FSRRESTORE,
7944    },{ .name = "SMMU_CB10_FAR_LOW",  .decode.addr = A_SMMU_CB10_FAR_LOW,
7945    },{ .name = "SMMU_CB10_FAR_HIGH",  .decode.addr = A_SMMU_CB10_FAR_HIGH,
7946    },{ .name = "SMMU_CB10_FSYNR0",  .decode.addr = A_SMMU_CB10_FSYNR0,
7947        .ro = 0x200,
7948    },{ .name = "SMMU_CB10_IPAFAR_LOW",  .decode.addr = A_SMMU_CB10_IPAFAR_LOW,
7949        .ro = 0xfff,
7950    },{ .name = "SMMU_CB10_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB10_IPAFAR_HIGH,
7951    },{ .name = "SMMU_CB10_TLBIVA_LOW",  .decode.addr = A_SMMU_CB10_TLBIVA_LOW,
7952    },{ .name = "SMMU_CB10_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB10_TLBIVA_HIGH,
7953    },{ .name = "SMMU_CB10_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB10_TLBIVAA_LOW,
7954    },{ .name = "SMMU_CB10_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB10_TLBIVAA_HIGH,
7955    },{ .name = "SMMU_CB10_TLBIASID",  .decode.addr = A_SMMU_CB10_TLBIASID,
7956    },{ .name = "SMMU_CB10_TLBIALL",  .decode.addr = A_SMMU_CB10_TLBIALL,
7957    },{ .name = "SMMU_CB10_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB10_TLBIVAL_LOW,
7958    },{ .name = "SMMU_CB10_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB10_TLBIVAL_HIGH,
7959    },{ .name = "SMMU_CB10_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB10_TLBIVAAL_LOW,
7960    },{ .name = "SMMU_CB10_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB10_TLBIVAAL_HIGH,
7961    },{ .name = "SMMU_CB10_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB10_TLBIIPAS2_LOW,
7962    },{ .name = "SMMU_CB10_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB10_TLBIIPAS2_HIGH,
7963    },{ .name = "SMMU_CB10_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB10_TLBIIPAS2L_LOW,
7964    },{ .name = "SMMU_CB10_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB10_TLBIIPAS2L_HIGH,
7965    },{ .name = "SMMU_CB10_TLBSYNC",  .decode.addr = A_SMMU_CB10_TLBSYNC,
7966    },{ .name = "SMMU_CB10_TLBSTATUS",  .decode.addr = A_SMMU_CB10_TLBSTATUS,
7967        .ro = 0x1,
7968    },{ .name = "SMMU_CB10_PMEVCNTR0",  .decode.addr = A_SMMU_CB10_PMEVCNTR0,
7969    },{ .name = "SMMU_CB10_PMEVCNTR1",  .decode.addr = A_SMMU_CB10_PMEVCNTR1,
7970    },{ .name = "SMMU_CB10_PMEVCNTR2",  .decode.addr = A_SMMU_CB10_PMEVCNTR2,
7971    },{ .name = "SMMU_CB10_PMEVCNTR3",  .decode.addr = A_SMMU_CB10_PMEVCNTR3,
7972    },{ .name = "SMMU_CB10_PMEVTYPER0",  .decode.addr = A_SMMU_CB10_PMEVTYPER0,
7973    },{ .name = "SMMU_CB10_PMEVTYPER1",  .decode.addr = A_SMMU_CB10_PMEVTYPER1,
7974    },{ .name = "SMMU_CB10_PMEVTYPER2",  .decode.addr = A_SMMU_CB10_PMEVTYPER2,
7975    },{ .name = "SMMU_CB10_PMEVTYPER3",  .decode.addr = A_SMMU_CB10_PMEVTYPER3,
7976    },{ .name = "SMMU_CB10_PMCFGR",  .decode.addr = A_SMMU_CB10_PMCFGR,
7977        .reset = 0x11f03,
7978        .ro = 0xff09ffff,
7979    },{ .name = "SMMU_CB10_PMCR",  .decode.addr = A_SMMU_CB10_PMCR,
7980        .ro = 0xff000002,
7981    },{ .name = "SMMU_CB10_PMCEID",  .decode.addr = A_SMMU_CB10_PMCEID,
7982        .reset = 0x30303,
7983        .ro = 0x38383,
7984    },{ .name = "SMMU_CB10_PMCNTENSE",  .decode.addr = A_SMMU_CB10_PMCNTENSE,
7985    },{ .name = "SMMU_CB10_PMCNTENCLR",  .decode.addr = A_SMMU_CB10_PMCNTENCLR,
7986    },{ .name = "SMMU_CB10_PMCNTENSET",  .decode.addr = A_SMMU_CB10_PMCNTENSET,
7987    },{ .name = "SMMU_CB10_PMINTENCLR",  .decode.addr = A_SMMU_CB10_PMINTENCLR,
7988    },{ .name = "SMMU_CB10_PMOVSCLR",  .decode.addr = A_SMMU_CB10_PMOVSCLR,
7989    },{ .name = "SMMU_CB10_PMOVSSET",  .decode.addr = A_SMMU_CB10_PMOVSSET,
7990    },{ .name = "SMMU_CB10_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB10_PMAUTHSTATUS,
7991        .reset = 0x80,
7992        .ro = 0xff,
7993    },{ .name = "SMMU_CB11_SCTLR",  .decode.addr = A_SMMU_CB11_SCTLR,
7994        .reset = 0x100,
7995        .ro = 0x1000,
7996    },{ .name = "SMMU_CB11_ACTLR",  .decode.addr = A_SMMU_CB11_ACTLR,
7997        .reset = 0x3,
7998    },{ .name = "SMMU_CB11_RESUME",  .decode.addr = A_SMMU_CB11_RESUME,
7999    },{ .name = "SMMU_CB11_TCR2",  .decode.addr = A_SMMU_CB11_TCR2,
8000        .reset = 0x60,

8001        .ro = 0x60,
8002    },{ .name = "SMMU_CB11_TTBR0_LOW",  .decode.addr = A_SMMU_CB11_TTBR0_LOW,
8003        .ro = 0x4,
8004    },{ .name = "SMMU_CB11_TTBR0_HIGH",  .decode.addr = A_SMMU_CB11_TTBR0_HIGH,
8005    },{ .name = "SMMU_CB11_TTBR1_LOW",  .decode.addr = A_SMMU_CB11_TTBR1_LOW,
8006    },{ .name = "SMMU_CB11_TTBR1_HIGH",  .decode.addr = A_SMMU_CB11_TTBR1_HIGH,
8007    },{ .name = "SMMU_CB11_TCR_LPAE",  .decode.addr = A_SMMU_CB11_TCR_LPAE,
8008    },{ .name = "SMMU_CB11_CONTEXTIDR",  .decode.addr = A_SMMU_CB11_CONTEXTIDR,
8009    },{ .name = "SMMU_CB11_PRRR_MAIR0",  .decode.addr = A_SMMU_CB11_PRRR_MAIR0,
8010    },{ .name = "SMMU_CB11_NMRR_MAIR1",  .decode.addr = A_SMMU_CB11_NMRR_MAIR1,
8011    },{ .name = "SMMU_CB11_FSR",  .decode.addr = A_SMMU_CB11_FSR,
8012        .w1c = 0xffffffff,
8013        .post_write = smmu_fsr_pw,
8014    },{ .name = "SMMU_CB11_FSRRESTORE",  .decode.addr = A_SMMU_CB11_FSRRESTORE,
8015    },{ .name = "SMMU_CB11_FAR_LOW",  .decode.addr = A_SMMU_CB11_FAR_LOW,
8016    },{ .name = "SMMU_CB11_FAR_HIGH",  .decode.addr = A_SMMU_CB11_FAR_HIGH,
8017    },{ .name = "SMMU_CB11_FSYNR0",  .decode.addr = A_SMMU_CB11_FSYNR0,
8018        .ro = 0x200,
8019    },{ .name = "SMMU_CB11_IPAFAR_LOW",  .decode.addr = A_SMMU_CB11_IPAFAR_LOW,
8020        .ro = 0xfff,
8021    },{ .name = "SMMU_CB11_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB11_IPAFAR_HIGH,
8022    },{ .name = "SMMU_CB11_TLBIVA_LOW",  .decode.addr = A_SMMU_CB11_TLBIVA_LOW,
8023    },{ .name = "SMMU_CB11_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB11_TLBIVA_HIGH,
8024    },{ .name = "SMMU_CB11_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB11_TLBIVAA_LOW,
8025    },{ .name = "SMMU_CB11_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB11_TLBIVAA_HIGH,
8026    },{ .name = "SMMU_CB11_TLBIASID",  .decode.addr = A_SMMU_CB11_TLBIASID,
8027    },{ .name = "SMMU_CB11_TLBIALL",  .decode.addr = A_SMMU_CB11_TLBIALL,
8028    },{ .name = "SMMU_CB11_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB11_TLBIVAL_LOW,
8029    },{ .name = "SMMU_CB11_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB11_TLBIVAL_HIGH,
8030    },{ .name = "SMMU_CB11_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB11_TLBIVAAL_LOW,
8031    },{ .name = "SMMU_CB11_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB11_TLBIVAAL_HIGH,
8032    },{ .name = "SMMU_CB11_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB11_TLBIIPAS2_LOW,
8033    },{ .name = "SMMU_CB11_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB11_TLBIIPAS2_HIGH,
8034    },{ .name = "SMMU_CB11_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB11_TLBIIPAS2L_LOW,
8035    },{ .name = "SMMU_CB11_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB11_TLBIIPAS2L_HIGH,
8036    },{ .name = "SMMU_CB11_TLBSYNC",  .decode.addr = A_SMMU_CB11_TLBSYNC,
8037    },{ .name = "SMMU_CB11_TLBSTATUS",  .decode.addr = A_SMMU_CB11_TLBSTATUS,
8038        .ro = 0x1,
8039    },{ .name = "SMMU_CB11_PMEVCNTR0",  .decode.addr = A_SMMU_CB11_PMEVCNTR0,
8040    },{ .name = "SMMU_CB11_PMEVCNTR1",  .decode.addr = A_SMMU_CB11_PMEVCNTR1,
8041    },{ .name = "SMMU_CB11_PMEVCNTR2",  .decode.addr = A_SMMU_CB11_PMEVCNTR2,
8042    },{ .name = "SMMU_CB11_PMEVCNTR3",  .decode.addr = A_SMMU_CB11_PMEVCNTR3,
8043    },{ .name = "SMMU_CB11_PMEVTYPER0",  .decode.addr = A_SMMU_CB11_PMEVTYPER0,
8044    },{ .name = "SMMU_CB11_PMEVTYPER1",  .decode.addr = A_SMMU_CB11_PMEVTYPER1,
8045    },{ .name = "SMMU_CB11_PMEVTYPER2",  .decode.addr = A_SMMU_CB11_PMEVTYPER2,
8046    },{ .name = "SMMU_CB11_PMEVTYPER3",  .decode.addr = A_SMMU_CB11_PMEVTYPER3,
8047    },{ .name = "SMMU_CB11_PMCFGR",  .decode.addr = A_SMMU_CB11_PMCFGR,
8048        .reset = 0x11f03,
8049        .ro = 0xff09ffff,
8050    },{ .name = "SMMU_CB11_PMCR",  .decode.addr = A_SMMU_CB11_PMCR,
8051        .ro = 0xff000002,
8052    },{ .name = "SMMU_CB11_PMCEID",  .decode.addr = A_SMMU_CB11_PMCEID,
8053        .reset = 0x30303,
8054        .ro = 0x38383,
8055    },{ .name = "SMMU_CB11_PMCNTENSE",  .decode.addr = A_SMMU_CB11_PMCNTENSE,
8056    },{ .name = "SMMU_CB11_PMCNTENCLR",  .decode.addr = A_SMMU_CB11_PMCNTENCLR,
8057    },{ .name = "SMMU_CB11_PMCNTENSET",  .decode.addr = A_SMMU_CB11_PMCNTENSET,
8058    },{ .name = "SMMU_CB11_PMINTENCLR",  .decode.addr = A_SMMU_CB11_PMINTENCLR,
8059    },{ .name = "SMMU_CB11_PMOVSCLR",  .decode.addr = A_SMMU_CB11_PMOVSCLR,
8060    },{ .name = "SMMU_CB11_PMOVSSET",  .decode.addr = A_SMMU_CB11_PMOVSSET,
8061    },{ .name = "SMMU_CB11_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB11_PMAUTHSTATUS,
8062        .reset = 0x80,
8063        .ro = 0xff,
8064    },{ .name = "SMMU_CB12_SCTLR",  .decode.addr = A_SMMU_CB12_SCTLR,
8065        .reset = 0x100,
8066        .ro = 0x1000,
8067    },{ .name = "SMMU_CB12_ACTLR",  .decode.addr = A_SMMU_CB12_ACTLR,
8068        .reset = 0x3,
8069    },{ .name = "SMMU_CB12_RESUME",  .decode.addr = A_SMMU_CB12_RESUME,
8070    },{ .name = "SMMU_CB12_TCR2",  .decode.addr = A_SMMU_CB12_TCR2,
8071        .reset = 0x60,
8072        .ro = 0x60,
8073    },{ .name = "SMMU_CB12_TTBR0_LOW",  .decode.addr = A_SMMU_CB12_TTBR0_LOW,
8074        .ro = 0x4,
8075    },{ .name = "SMMU_CB12_TTBR0_HIGH",  .decode.addr = A_SMMU_CB12_TTBR0_HIGH,
8076    },{ .name = "SMMU_CB12_TTBR1_LOW",  .decode.addr = A_SMMU_CB12_TTBR1_LOW,
8077    },{ .name = "SMMU_CB12_TTBR1_HIGH",  .decode.addr = A_SMMU_CB12_TTBR1_HIGH,
8078    },{ .name = "SMMU_CB12_TCR_LPAE",  .decode.addr = A_SMMU_CB12_TCR_LPAE,
8079    },{ .name = "SMMU_CB12_CONTEXTIDR",  .decode.addr = A_SMMU_CB12_CONTEXTIDR,
8080    },{ .name = "SMMU_CB12_PRRR_MAIR0",  .decode.addr = A_SMMU_CB12_PRRR_MAIR0,
8081    },{ .name = "SMMU_CB12_NMRR_MAIR1",  .decode.addr = A_SMMU_CB12_NMRR_MAIR1,
8082    },{ .name = "SMMU_CB12_FSR",  .decode.addr = A_SMMU_CB12_FSR,
8083        .w1c = 0xffffffff,
8084        .post_write = smmu_fsr_pw,
8085    },{ .name = "SMMU_CB12_FSRRESTORE",  .decode.addr = A_SMMU_CB12_FSRRESTORE,
8086    },{ .name = "SMMU_CB12_FAR_LOW",  .decode.addr = A_SMMU_CB12_FAR_LOW,
8087    },{ .name = "SMMU_CB12_FAR_HIGH",  .decode.addr = A_SMMU_CB12_FAR_HIGH,
8088    },{ .name = "SMMU_CB12_FSYNR0",  .decode.addr = A_SMMU_CB12_FSYNR0,
8089        .ro = 0x200,
8090    },{ .name = "SMMU_CB12_IPAFAR_LOW",  .decode.addr = A_SMMU_CB12_IPAFAR_LOW,
8091        .ro = 0xfff,
8092    },{ .name = "SMMU_CB12_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB12_IPAFAR_HIGH,
8093    },{ .name = "SMMU_CB12_TLBIVA_LOW",  .decode.addr = A_SMMU_CB12_TLBIVA_LOW,
8094    },{ .name = "SMMU_CB12_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB12_TLBIVA_HIGH,
8095    },{ .name = "SMMU_CB12_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB12_TLBIVAA_LOW,
8096    },{ .name = "SMMU_CB12_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB12_TLBIVAA_HIGH,
8097    },{ .name = "SMMU_CB12_TLBIASID",  .decode.addr = A_SMMU_CB12_TLBIASID,
8098    },{ .name = "SMMU_CB12_TLBIALL",  .decode.addr = A_SMMU_CB12_TLBIALL,
8099    },{ .name = "SMMU_CB12_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB12_TLBIVAL_LOW,
8100    },{ .name = "SMMU_CB12_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB12_TLBIVAL_HIGH,
8101    },{ .name = "SMMU_CB12_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB12_TLBIVAAL_LOW,
8102    },{ .name = "SMMU_CB12_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB12_TLBIVAAL_HIGH,
8103    },{ .name = "SMMU_CB12_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB12_TLBIIPAS2_LOW,
8104    },{ .name = "SMMU_CB12_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB12_TLBIIPAS2_HIGH,
8105    },{ .name = "SMMU_CB12_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB12_TLBIIPAS2L_LOW,
8106    },{ .name = "SMMU_CB12_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB12_TLBIIPAS2L_HIGH,
8107    },{ .name = "SMMU_CB12_TLBSYNC",  .decode.addr = A_SMMU_CB12_TLBSYNC,
8108    },{ .name = "SMMU_CB12_TLBSTATUS",  .decode.addr = A_SMMU_CB12_TLBSTATUS,
8109        .ro = 0x1,
8110    },{ .name = "SMMU_CB12_PMEVCNTR0",  .decode.addr = A_SMMU_CB12_PMEVCNTR0,
8111    },{ .name = "SMMU_CB12_PMEVCNTR1",  .decode.addr = A_SMMU_CB12_PMEVCNTR1,
8112    },{ .name = "SMMU_CB12_PMEVCNTR2",  .decode.addr = A_SMMU_CB12_PMEVCNTR2,
8113    },{ .name = "SMMU_CB12_PMEVCNTR3",  .decode.addr = A_SMMU_CB12_PMEVCNTR3,
8114    },{ .name = "SMMU_CB12_PMEVTYPER0",  .decode.addr = A_SMMU_CB12_PMEVTYPER0,
8115    },{ .name = "SMMU_CB12_PMEVTYPER1",  .decode.addr = A_SMMU_CB12_PMEVTYPER1,
8116    },{ .name = "SMMU_CB12_PMEVTYPER2",  .decode.addr = A_SMMU_CB12_PMEVTYPER2,
8117    },{ .name = "SMMU_CB12_PMEVTYPER3",  .decode.addr = A_SMMU_CB12_PMEVTYPER3,
8118    },{ .name = "SMMU_CB12_PMCFGR",  .decode.addr = A_SMMU_CB12_PMCFGR,
8119        .reset = 0x11f03,
8120        .ro = 0xff09ffff,
8121    },{ .name = "SMMU_CB12_PMCR",  .decode.addr = A_SMMU_CB12_PMCR,
8122        .ro = 0xff000002,
8123    },{ .name = "SMMU_CB12_PMCEID",  .decode.addr = A_SMMU_CB12_PMCEID,
8124        .reset = 0x30303,
8125        .ro = 0x38383,
8126    },{ .name = "SMMU_CB12_PMCNTENSE",  .decode.addr = A_SMMU_CB12_PMCNTENSE,
8127    },{ .name = "SMMU_CB12_PMCNTENCLR",  .decode.addr = A_SMMU_CB12_PMCNTENCLR,
8128    },{ .name = "SMMU_CB12_PMCNTENSET",  .decode.addr = A_SMMU_CB12_PMCNTENSET,
8129    },{ .name = "SMMU_CB12_PMINTENCLR",  .decode.addr = A_SMMU_CB12_PMINTENCLR,
8130    },{ .name = "SMMU_CB12_PMOVSCLR",  .decode.addr = A_SMMU_CB12_PMOVSCLR,
8131    },{ .name = "SMMU_CB12_PMOVSSET",  .decode.addr = A_SMMU_CB12_PMOVSSET,
8132    },{ .name = "SMMU_CB12_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB12_PMAUTHSTATUS,
8133        .reset = 0x80,
8134        .ro = 0xff,
8135    },{ .name = "SMMU_CB13_SCTLR",  .decode.addr = A_SMMU_CB13_SCTLR,
8136        .reset = 0x100,
8137        .ro = 0x1000,
8138    },{ .name = "SMMU_CB13_ACTLR",  .decode.addr = A_SMMU_CB13_ACTLR,
8139        .reset = 0x3,
8140    },{ .name = "SMMU_CB13_RESUME",  .decode.addr = A_SMMU_CB13_RESUME,
8141    },{ .name = "SMMU_CB13_TCR2",  .decode.addr = A_SMMU_CB13_TCR2,
8142        .reset = 0x60,
8143        .ro = 0x60,
8144    },{ .name = "SMMU_CB13_TTBR0_LOW",  .decode.addr = A_SMMU_CB13_TTBR0_LOW,
8145        .ro = 0x4,
8146    },{ .name = "SMMU_CB13_TTBR0_HIGH",  .decode.addr = A_SMMU_CB13_TTBR0_HIGH,
8147    },{ .name = "SMMU_CB13_TTBR1_LOW",  .decode.addr = A_SMMU_CB13_TTBR1_LOW,
8148    },{ .name = "SMMU_CB13_TTBR1_HIGH",  .decode.addr = A_SMMU_CB13_TTBR1_HIGH,
8149    },{ .name = "SMMU_CB13_TCR_LPAE",  .decode.addr = A_SMMU_CB13_TCR_LPAE,
8150    },{ .name = "SMMU_CB13_CONTEXTIDR",  .decode.addr = A_SMMU_CB13_CONTEXTIDR,
8151    },{ .name = "SMMU_CB13_PRRR_MAIR0",  .decode.addr = A_SMMU_CB13_PRRR_MAIR0,
8152    },{ .name = "SMMU_CB13_NMRR_MAIR1",  .decode.addr = A_SMMU_CB13_NMRR_MAIR1,
8153    },{ .name = "SMMU_CB13_FSR",  .decode.addr = A_SMMU_CB13_FSR,
8154        .w1c = 0xffffffff,
8155        .post_write = smmu_fsr_pw,
8156    },{ .name = "SMMU_CB13_FSRRESTORE",  .decode.addr = A_SMMU_CB13_FSRRESTORE,
8157    },{ .name = "SMMU_CB13_FAR_LOW",  .decode.addr = A_SMMU_CB13_FAR_LOW,
8158    },{ .name = "SMMU_CB13_FAR_HIGH",  .decode.addr = A_SMMU_CB13_FAR_HIGH,
8159    },{ .name = "SMMU_CB13_FSYNR0",  .decode.addr = A_SMMU_CB13_FSYNR0,
8160        .ro = 0x200,
8161    },{ .name = "SMMU_CB13_IPAFAR_LOW",  .decode.addr = A_SMMU_CB13_IPAFAR_LOW,
8162        .ro = 0xfff,
8163    },{ .name = "SMMU_CB13_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB13_IPAFAR_HIGH,
8164    },{ .name = "SMMU_CB13_TLBIVA_LOW",  .decode.addr = A_SMMU_CB13_TLBIVA_LOW,
8165    },{ .name = "SMMU_CB13_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB13_TLBIVA_HIGH,
8166    },{ .name = "SMMU_CB13_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB13_TLBIVAA_LOW,
8167    },{ .name = "SMMU_CB13_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB13_TLBIVAA_HIGH,
8168    },{ .name = "SMMU_CB13_TLBIASID",  .decode.addr = A_SMMU_CB13_TLBIASID,
8169    },{ .name = "SMMU_CB13_TLBIALL",  .decode.addr = A_SMMU_CB13_TLBIALL,
8170    },{ .name = "SMMU_CB13_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB13_TLBIVAL_LOW,
8171    },{ .name = "SMMU_CB13_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB13_TLBIVAL_HIGH,
8172    },{ .name = "SMMU_CB13_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB13_TLBIVAAL_LOW,
8173    },{ .name = "SMMU_CB13_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB13_TLBIVAAL_HIGH,
8174    },{ .name = "SMMU_CB13_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB13_TLBIIPAS2_LOW,
8175    },{ .name = "SMMU_CB13_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB13_TLBIIPAS2_HIGH,
8176    },{ .name = "SMMU_CB13_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB13_TLBIIPAS2L_LOW,
8177    },{ .name = "SMMU_CB13_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB13_TLBIIPAS2L_HIGH,
8178    },{ .name = "SMMU_CB13_TLBSYNC",  .decode.addr = A_SMMU_CB13_TLBSYNC,
8179    },{ .name = "SMMU_CB13_TLBSTATUS",  .decode.addr = A_SMMU_CB13_TLBSTATUS,
8180        .ro = 0x1,
8181    },{ .name = "SMMU_CB13_PMEVCNTR0",  .decode.addr = A_SMMU_CB13_PMEVCNTR0,
8182    },{ .name = "SMMU_CB13_PMEVCNTR1",  .decode.addr = A_SMMU_CB13_PMEVCNTR1,
8183    },{ .name = "SMMU_CB13_PMEVCNTR2",  .decode.addr = A_SMMU_CB13_PMEVCNTR2,
8184    },{ .name = "SMMU_CB13_PMEVCNTR3",  .decode.addr = A_SMMU_CB13_PMEVCNTR3,
8185    },{ .name = "SMMU_CB13_PMEVTYPER0",  .decode.addr = A_SMMU_CB13_PMEVTYPER0,
8186    },{ .name = "SMMU_CB13_PMEVTYPER1",  .decode.addr = A_SMMU_CB13_PMEVTYPER1,
8187    },{ .name = "SMMU_CB13_PMEVTYPER2",  .decode.addr = A_SMMU_CB13_PMEVTYPER2,
8188    },{ .name = "SMMU_CB13_PMEVTYPER3",  .decode.addr = A_SMMU_CB13_PMEVTYPER3,
8189    },{ .name = "SMMU_CB13_PMCFGR",  .decode.addr = A_SMMU_CB13_PMCFGR,
8190        .reset = 0x11f03,
8191        .ro = 0xff09ffff,
8192    },{ .name = "SMMU_CB13_PMCR",  .decode.addr = A_SMMU_CB13_PMCR,
8193        .ro = 0xff000002,
8194    },{ .name = "SMMU_CB13_PMCEID",  .decode.addr = A_SMMU_CB13_PMCEID,
8195        .reset = 0x30303,
8196        .ro = 0x38383,
8197    },{ .name = "SMMU_CB13_PMCNTENSE",  .decode.addr = A_SMMU_CB13_PMCNTENSE,
8198    },{ .name = "SMMU_CB13_PMCNTENCLR",  .decode.addr = A_SMMU_CB13_PMCNTENCLR,
8199    },{ .name = "SMMU_CB13_PMCNTENSET",  .decode.addr = A_SMMU_CB13_PMCNTENSET,
8200    },{ .name = "SMMU_CB13_PMINTENCLR",  .decode.addr = A_SMMU_CB13_PMINTENCLR,
8201    },{ .name = "SMMU_CB13_PMOVSCLR",  .decode.addr = A_SMMU_CB13_PMOVSCLR,
8202    },{ .name = "SMMU_CB13_PMOVSSET",  .decode.addr = A_SMMU_CB13_PMOVSSET,
8203    },{ .name = "SMMU_CB13_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB13_PMAUTHSTATUS,
8204        .reset = 0x80,
8205        .ro = 0xff,
8206    },{ .name = "SMMU_CB14_SCTLR",  .decode.addr = A_SMMU_CB14_SCTLR,
8207        .reset = 0x100,
8208        .ro = 0x1000,
8209    },{ .name = "SMMU_CB14_ACTLR",  .decode.addr = A_SMMU_CB14_ACTLR,
8210        .reset = 0x3,
8211    },{ .name = "SMMU_CB14_RESUME",  .decode.addr = A_SMMU_CB14_RESUME,
8212    },{ .name = "SMMU_CB14_TCR2",  .decode.addr = A_SMMU_CB14_TCR2,
8213        .reset = 0x60,
8214        .ro = 0x60,
8215    },{ .name = "SMMU_CB14_TTBR0_LOW",  .decode.addr = A_SMMU_CB14_TTBR0_LOW,
8216        .ro = 0x4,
8217    },{ .name = "SMMU_CB14_TTBR0_HIGH",  .decode.addr = A_SMMU_CB14_TTBR0_HIGH,
8218    },{ .name = "SMMU_CB14_TTBR1_LOW",  .decode.addr = A_SMMU_CB14_TTBR1_LOW,
8219    },{ .name = "SMMU_CB14_TTBR1_HIGH",  .decode.addr = A_SMMU_CB14_TTBR1_HIGH,
8220    },{ .name = "SMMU_CB14_TCR_LPAE",  .decode.addr = A_SMMU_CB14_TCR_LPAE,
8221    },{ .name = "SMMU_CB14_CONTEXTIDR",  .decode.addr = A_SMMU_CB14_CONTEXTIDR,
8222    },{ .name = "SMMU_CB14_PRRR_MAIR0",  .decode.addr = A_SMMU_CB14_PRRR_MAIR0,
8223    },{ .name = "SMMU_CB14_NMRR_MAIR1",  .decode.addr = A_SMMU_CB14_NMRR_MAIR1,
8224    },{ .name = "SMMU_CB14_FSR",  .decode.addr = A_SMMU_CB14_FSR,
8225        .w1c = 0xffffffff,
8226        .post_write = smmu_fsr_pw,
8227    },{ .name = "SMMU_CB14_FSRRESTORE",  .decode.addr = A_SMMU_CB14_FSRRESTORE,
8228    },{ .name = "SMMU_CB14_FAR_LOW",  .decode.addr = A_SMMU_CB14_FAR_LOW,
8229    },{ .name = "SMMU_CB14_FAR_HIGH",  .decode.addr = A_SMMU_CB14_FAR_HIGH,
8230    },{ .name = "SMMU_CB14_FSYNR0",  .decode.addr = A_SMMU_CB14_FSYNR0,
8231        .ro = 0x200,
8232    },{ .name = "SMMU_CB14_IPAFAR_LOW",  .decode.addr = A_SMMU_CB14_IPAFAR_LOW,
8233        .ro = 0xfff,
8234    },{ .name = "SMMU_CB14_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB14_IPAFAR_HIGH,
8235    },{ .name = "SMMU_CB14_TLBIVA_LOW",  .decode.addr = A_SMMU_CB14_TLBIVA_LOW,
8236    },{ .name = "SMMU_CB14_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB14_TLBIVA_HIGH,
8237    },{ .name = "SMMU_CB14_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB14_TLBIVAA_LOW,
8238    },{ .name = "SMMU_CB14_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB14_TLBIVAA_HIGH,
8239    },{ .name = "SMMU_CB14_TLBIASID",  .decode.addr = A_SMMU_CB14_TLBIASID,
8240    },{ .name = "SMMU_CB14_TLBIALL",  .decode.addr = A_SMMU_CB14_TLBIALL,
8241    },{ .name = "SMMU_CB14_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB14_TLBIVAL_LOW,
8242    },{ .name = "SMMU_CB14_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB14_TLBIVAL_HIGH,
8243    },{ .name = "SMMU_CB14_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB14_TLBIVAAL_LOW,
8244    },{ .name = "SMMU_CB14_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB14_TLBIVAAL_HIGH,
8245    },{ .name = "SMMU_CB14_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB14_TLBIIPAS2_LOW,
8246    },{ .name = "SMMU_CB14_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB14_TLBIIPAS2_HIGH,
8247    },{ .name = "SMMU_CB14_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB14_TLBIIPAS2L_LOW,
8248    },{ .name = "SMMU_CB14_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB14_TLBIIPAS2L_HIGH,
8249    },{ .name = "SMMU_CB14_TLBSYNC",  .decode.addr = A_SMMU_CB14_TLBSYNC,
8250    },{ .name = "SMMU_CB14_TLBSTATUS",  .decode.addr = A_SMMU_CB14_TLBSTATUS,
8251        .ro = 0x1,
8252    },{ .name = "SMMU_CB14_PMEVCNTR0",  .decode.addr = A_SMMU_CB14_PMEVCNTR0,
8253    },{ .name = "SMMU_CB14_PMEVCNTR1",  .decode.addr = A_SMMU_CB14_PMEVCNTR1,
8254    },{ .name = "SMMU_CB14_PMEVCNTR2",  .decode.addr = A_SMMU_CB14_PMEVCNTR2,
8255    },{ .name = "SMMU_CB14_PMEVCNTR3",  .decode.addr = A_SMMU_CB14_PMEVCNTR3,
8256    },{ .name = "SMMU_CB14_PMEVTYPER0",  .decode.addr = A_SMMU_CB14_PMEVTYPER0,
8257    },{ .name = "SMMU_CB14_PMEVTYPER1",  .decode.addr = A_SMMU_CB14_PMEVTYPER1,
8258    },{ .name = "SMMU_CB14_PMEVTYPER2",  .decode.addr = A_SMMU_CB14_PMEVTYPER2,
8259    },{ .name = "SMMU_CB14_PMEVTYPER3",  .decode.addr = A_SMMU_CB14_PMEVTYPER3,
8260    },{ .name = "SMMU_CB14_PMCFGR",  .decode.addr = A_SMMU_CB14_PMCFGR,
8261        .reset = 0x11f03,
8262        .ro = 0xff09ffff,
8263    },{ .name = "SMMU_CB14_PMCR",  .decode.addr = A_SMMU_CB14_PMCR,
8264        .ro = 0xff000002,
8265    },{ .name = "SMMU_CB14_PMCEID",  .decode.addr = A_SMMU_CB14_PMCEID,
8266        .reset = 0x30303,
8267        .ro = 0x38383,
8268    },{ .name = "SMMU_CB14_PMCNTENSE",  .decode.addr = A_SMMU_CB14_PMCNTENSE,
8269    },{ .name = "SMMU_CB14_PMCNTENCLR",  .decode.addr = A_SMMU_CB14_PMCNTENCLR,
8270    },{ .name = "SMMU_CB14_PMCNTENSET",  .decode.addr = A_SMMU_CB14_PMCNTENSET,
8271    },{ .name = "SMMU_CB14_PMINTENCLR",  .decode.addr = A_SMMU_CB14_PMINTENCLR,
8272    },{ .name = "SMMU_CB14_PMOVSCLR",  .decode.addr = A_SMMU_CB14_PMOVSCLR,
8273    },{ .name = "SMMU_CB14_PMOVSSET",  .decode.addr = A_SMMU_CB14_PMOVSSET,
8274    },{ .name = "SMMU_CB14_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB14_PMAUTHSTATUS,
8275        .reset = 0x80,
8276        .ro = 0xff,
8277    },{ .name = "SMMU_CB15_SCTLR",  .decode.addr = A_SMMU_CB15_SCTLR,
8278        .reset = 0x100,
8279        .ro = 0x1000,
8280    },{ .name = "SMMU_CB15_ACTLR",  .decode.addr = A_SMMU_CB15_ACTLR,
8281        .reset = 0x3,
8282    },{ .name = "SMMU_CB15_RESUME",  .decode.addr = A_SMMU_CB15_RESUME,
8283    },{ .name = "SMMU_CB15_TCR2",  .decode.addr = A_SMMU_CB15_TCR2,
8284        .reset = 0x60,
8285        .ro = 0x60,
8286    },{ .name = "SMMU_CB15_TTBR0_LOW",  .decode.addr = A_SMMU_CB15_TTBR0_LOW,
8287        .ro = 0x4,
8288    },{ .name = "SMMU_CB15_TTBR0_HIGH",  .decode.addr = A_SMMU_CB15_TTBR0_HIGH,
8289    },{ .name = "SMMU_CB15_TTBR1_LOW",  .decode.addr = A_SMMU_CB15_TTBR1_LOW,
8290    },{ .name = "SMMU_CB15_TTBR1_HIGH",  .decode.addr = A_SMMU_CB15_TTBR1_HIGH,
8291    },{ .name = "SMMU_CB15_TCR_LPAE",  .decode.addr = A_SMMU_CB15_TCR_LPAE,
8292    },{ .name = "SMMU_CB15_CONTEXTIDR",  .decode.addr = A_SMMU_CB15_CONTEXTIDR,
8293    },{ .name = "SMMU_CB15_PRRR_MAIR0",  .decode.addr = A_SMMU_CB15_PRRR_MAIR0,
8294    },{ .name = "SMMU_CB15_NMRR_MAIR1",  .decode.addr = A_SMMU_CB15_NMRR_MAIR1,
8295    },{ .name = "SMMU_CB15_FSR",  .decode.addr = A_SMMU_CB15_FSR,
8296        .w1c = 0xffffffff,
8297        .post_write = smmu_fsr_pw,
8298    },{ .name = "SMMU_CB15_FSRRESTORE",  .decode.addr = A_SMMU_CB15_FSRRESTORE,
8299    },{ .name = "SMMU_CB15_FAR_LOW",  .decode.addr = A_SMMU_CB15_FAR_LOW,
8300    },{ .name = "SMMU_CB15_FAR_HIGH",  .decode.addr = A_SMMU_CB15_FAR_HIGH,
8301    },{ .name = "SMMU_CB15_FSYNR0",  .decode.addr = A_SMMU_CB15_FSYNR0,
8302        .ro = 0x200,
8303    },{ .name = "SMMU_CB15_IPAFAR_LOW",  .decode.addr = A_SMMU_CB15_IPAFAR_LOW,
8304        .ro = 0xfff,
8305    },{ .name = "SMMU_CB15_IPAFAR_HIGH",  .decode.addr = A_SMMU_CB15_IPAFAR_HIGH,
8306    },{ .name = "SMMU_CB15_TLBIVA_LOW",  .decode.addr = A_SMMU_CB15_TLBIVA_LOW,
8307    },{ .name = "SMMU_CB15_TLBIVA_HIGH",  .decode.addr = A_SMMU_CB15_TLBIVA_HIGH,
8308    },{ .name = "SMMU_CB15_TLBIVAA_LOW",  .decode.addr = A_SMMU_CB15_TLBIVAA_LOW,
8309    },{ .name = "SMMU_CB15_TLBIVAA_HIGH",  .decode.addr = A_SMMU_CB15_TLBIVAA_HIGH,
8310    },{ .name = "SMMU_CB15_TLBIASID",  .decode.addr = A_SMMU_CB15_TLBIASID,
8311    },{ .name = "SMMU_CB15_TLBIALL",  .decode.addr = A_SMMU_CB15_TLBIALL,
8312    },{ .name = "SMMU_CB15_TLBIVAL_LOW",  .decode.addr = A_SMMU_CB15_TLBIVAL_LOW,
8313    },{ .name = "SMMU_CB15_TLBIVAL_HIGH",  .decode.addr = A_SMMU_CB15_TLBIVAL_HIGH,
8314    },{ .name = "SMMU_CB15_TLBIVAAL_LOW",  .decode.addr = A_SMMU_CB15_TLBIVAAL_LOW,
8315    },{ .name = "SMMU_CB15_TLBIVAAL_HIGH",  .decode.addr = A_SMMU_CB15_TLBIVAAL_HIGH,
8316    },{ .name = "SMMU_CB15_TLBIIPAS2_LOW",  .decode.addr = A_SMMU_CB15_TLBIIPAS2_LOW,
8317    },{ .name = "SMMU_CB15_TLBIIPAS2_HIGH",  .decode.addr = A_SMMU_CB15_TLBIIPAS2_HIGH,
8318    },{ .name = "SMMU_CB15_TLBIIPAS2L_LOW",  .decode.addr = A_SMMU_CB15_TLBIIPAS2L_LOW,
8319    },{ .name = "SMMU_CB15_TLBIIPAS2L_HIGH",  .decode.addr = A_SMMU_CB15_TLBIIPAS2L_HIGH,
8320    },{ .name = "SMMU_CB15_TLBSYNC",  .decode.addr = A_SMMU_CB15_TLBSYNC,
8321    },{ .name = "SMMU_CB15_TLBSTATUS",  .decode.addr = A_SMMU_CB15_TLBSTATUS,
8322        .ro = 0x1,
8323    },{ .name = "SMMU_CB15_PMEVCNTR0",  .decode.addr = A_SMMU_CB15_PMEVCNTR0,
8324    },{ .name = "SMMU_CB15_PMEVCNTR1",  .decode.addr = A_SMMU_CB15_PMEVCNTR1,
8325    },{ .name = "SMMU_CB15_PMEVCNTR2",  .decode.addr = A_SMMU_CB15_PMEVCNTR2,
8326    },{ .name = "SMMU_CB15_PMEVCNTR3",  .decode.addr = A_SMMU_CB15_PMEVCNTR3,
8327    },{ .name = "SMMU_CB15_PMEVTYPER0",  .decode.addr = A_SMMU_CB15_PMEVTYPER0,
8328    },{ .name = "SMMU_CB15_PMEVTYPER1",  .decode.addr = A_SMMU_CB15_PMEVTYPER1,
8329    },{ .name = "SMMU_CB15_PMEVTYPER2",  .decode.addr = A_SMMU_CB15_PMEVTYPER2,
8330    },{ .name = "SMMU_CB15_PMEVTYPER3",  .decode.addr = A_SMMU_CB15_PMEVTYPER3,
8331    },{ .name = "SMMU_CB15_PMCFGR",  .decode.addr = A_SMMU_CB15_PMCFGR,
8332        .reset = 0x11f03,
8333        .ro = 0xff09ffff,
8334    },{ .name = "SMMU_CB15_PMCR",  .decode.addr = A_SMMU_CB15_PMCR,
8335        .ro = 0xff000002,
8336    },{ .name = "SMMU_CB15_PMCEID",  .decode.addr = A_SMMU_CB15_PMCEID,
8337        .reset = 0x30303,
8338        .ro = 0x38383,
8339    },{ .name = "SMMU_CB15_PMCNTENSE",  .decode.addr = A_SMMU_CB15_PMCNTENSE,
8340    },{ .name = "SMMU_CB15_PMCNTENCLR",  .decode.addr = A_SMMU_CB15_PMCNTENCLR,
8341    },{ .name = "SMMU_CB15_PMCNTENSET",  .decode.addr = A_SMMU_CB15_PMCNTENSET,
8342    },{ .name = "SMMU_CB15_PMINTENCLR",  .decode.addr = A_SMMU_CB15_PMINTENCLR,
8343    },{ .name = "SMMU_CB15_PMOVSCLR",  .decode.addr = A_SMMU_CB15_PMOVSCLR,
8344    },{ .name = "SMMU_CB15_PMOVSSET",  .decode.addr = A_SMMU_CB15_PMOVSSET,
8345    },{ .name = "SMMU_CB15_PMAUTHSTATUS",  .decode.addr = A_SMMU_CB15_PMAUTHSTATUS,
8346        .reset = 0x80,
8347        .ro = 0xff,
8348    }
8349};
8350
8351static void smmu500_reset(DeviceState *dev)
8352{
8353    SMMU *s = XILINX_SMMU500(dev);
8354    unsigned int i;
8355
8356    for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
8357        dep_register_reset(&s->regs_info[i]);
8358    }
8359}
8360
8361static uint64_t smmu500_read(void *opaque, hwaddr addr, unsigned size)
8362{
8363    SMMU *s = XILINX_SMMU500(opaque);
8364    DepRegisterInfo *r = &s->regs_info[addr / 4];
8365
8366    if (!r->data) {
8367        qemu_log("%s: Decode error: read from %" HWADDR_PRIx "\n",
8368                 object_get_canonical_path(OBJECT(s)),
8369                 addr);
8370        return 0;
8371    }
8372    return dep_register_read(r);
8373}
8374
8375static void smmu500_write(void *opaque, hwaddr addr, uint64_t value,
8376                      unsigned size)
8377{
8378    SMMU *s = XILINX_SMMU500(opaque);
8379    DepRegisterInfo *r = &s->regs_info[addr / 4];
8380
8381    if (!r->data) {
8382        qemu_log("%s: Decode error: write to %" HWADDR_PRIx "=%" PRIx64 "\n",
8383                 object_get_canonical_path(OBJECT(s)),
8384                 addr, value);
8385        return;
8386    }
8387    dep_register_write(r, value, ~0);
8388}
8389
8390
8391static const MemoryRegionOps smmu500_ops = {
8392    .read = smmu500_read,
8393    .write = smmu500_write,
8394    .endianness = DEVICE_LITTLE_ENDIAN,
8395    .valid = {
8396        .min_access_size = 4,
8397        .max_access_size = 8,
8398    },
8399};
8400
8401static void smmu500_realize(DeviceState *dev, Error **errp)
8402{
8403    SMMU *s = XILINX_SMMU500(dev);
8404    const char *prefix = object_get_canonical_path(OBJECT(dev));
8405    unsigned int i;
8406
8407    for (i = 0; i < ARRAY_SIZE(smmu500_regs_info); ++i) {
8408        DepRegisterInfo *r = &s->regs_info[smmu500_regs_info[i].decode.addr/4];
8409
8410        *r = (DepRegisterInfo) {
8411            .data = (uint8_t *)&s->regs[
8412                    smmu500_regs_info[i].decode.addr/4],
8413            .data_size = sizeof(uint32_t),
8414            .access = &smmu500_regs_info[i],
8415            .debug = XILINX_SMMU500_ERR_DEBUG,
8416            .prefix = prefix,
8417            .opaque = s,
8418        };
8419    }
8420
8421    s->dma_as = s->dma_mr ? address_space_init_shareable(s->dma_mr, NULL)
8422                          : &address_space_memory;
8423
8424    assert(s->dma_as);
8425
8426    sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq.global);
8427    for (i = 0; i < 16; i++) {
8428        sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq.context[i]);
8429    }
8430}
8431
8432static void smmu500_init(Object *obj)
8433{
8434    SMMU *s = XILINX_SMMU500(obj);
8435    int i;
8436
8437    object_property_add_link(obj, "dma", TYPE_MEMORY_REGION,
8438                             (Object **)&s->dma_mr,
8439                             qdev_prop_allow_set_link_before_realize,
8440                             OBJ_PROP_LINK_UNREF_ON_RELEASE,
8441                             &error_abort);
8442
8443    for (i = 0; i < MAX_TBU; i++) {
8444        char *name = g_strdup_printf("mr-%d", i);
8445        object_property_add_link(obj, name, TYPE_MEMORY_REGION,
8446                                 (Object **)&s->tbu[i].mr,
8447                                 qdev_prop_allow_set_link_before_realize,
8448                                 OBJ_PROP_LINK_UNREF_ON_RELEASE,
8449                                 &error_abort);
8450        g_free(name);
8451        s->tbu[i].smmu = s;
8452    }
8453}
8454
8455static bool smmu_parse_reg(FDTGenericMMap *obj, FDTGenericRegPropInfo reg,
8456                           Error **errp)
8457{
8458    SMMU *s = XILINX_SMMU500(obj);
8459    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
8460    ObjectClass *klass = object_class_by_name(TYPE_XILINX_SMMU500);
8461    FDTGenericMMapClass *parent_fmc;
8462    unsigned int i;
8463
8464    parent_fmc = FDT_GENERIC_MMAP_CLASS(object_class_get_parent(klass));
8465    memory_region_init_io(&s->iomem, OBJECT(obj), &smmu500_ops, s,
8466                          TYPE_XILINX_SMMU500, R_MAX * 4);
8467    sysbus_init_mmio(sbd, &s->iomem);
8468
8469    for (i = 0; i < (reg.n - 1); i++) {
8470        char *name = g_strdup_printf("smmu-tbu%d", i);
8471
8472        assert(s->tbu[i].mr);
8473        s->tbu[i].as = address_space_init_shareable(s->tbu[i].mr, NULL);
8474        memory_region_init_iommu(&s->tbu[i].iommu, sizeof(s->tbu[i].iommu),
8475                                 TYPE_XILINX_SMMU500_IOMMU_MEMORY_REGION,
8476                                 OBJECT(sbd),
8477                                 name, UINT64_MAX);
8478        sysbus_init_mmio(sbd, MEMORY_REGION(&s->tbu[i].iommu));
8479        g_free(name);
8480    }
8481
8482    return parent_fmc ? parent_fmc->parse_reg(obj, reg, errp) : false;
8483}
8484
8485static Property smmu_properties[] = {
8486    DEFINE_PROP_UINT32("pamax", SMMU, cfg.pamax, 48),
8487    DEFINE_PROP_END_OF_LIST(),
8488};
8489
8490static const VMStateDescription vmstate_smmu500 = {
8491    .name = TYPE_XILINX_SMMU500,
8492    .version_id = 1,
8493    .minimum_version_id = 1,
8494    .minimum_version_id_old = 1,
8495    .fields = (VMStateField[]) {
8496        VMSTATE_UINT32_ARRAY(regs, SMMU, R_MAX),
8497        VMSTATE_END_OF_LIST(),
8498    }
8499};
8500
8501static void smmu500_class_init(ObjectClass *klass, void *data)
8502{
8503    DeviceClass *dc = DEVICE_CLASS(klass);
8504    FDTGenericMMapClass *fmc = FDT_GENERIC_MMAP_CLASS(klass);
8505
8506    dc->reset = smmu500_reset;
8507    dc->realize = smmu500_realize;
8508    dc->vmsd = &vmstate_smmu500;
8509    dc->props = smmu_properties;
8510    fmc->parse_reg = smmu_parse_reg;
8511}
8512
8513static void smmu500_iommu_memory_region_class_init(ObjectClass *klass,
8514                                                   void *data)
8515{
8516    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass);
8517
8518    imrc->translate_attr = smmu_translate;
8519}
8520
8521static const TypeInfo smmu500_info = {
8522    .name          = TYPE_XILINX_SMMU500,
8523    .parent        = TYPE_SYS_BUS_DEVICE,
8524    .instance_size = sizeof(SMMU),
8525    .class_init    = smmu500_class_init,
8526    .instance_init = smmu500_init,
8527    .interfaces    = (InterfaceInfo[]) {
8528        { TYPE_FDT_GENERIC_MMAP },
8529        { },
8530    },
8531};
8532
8533static const TypeInfo smmu500_iommu_memory_region_info = {
8534    .name = TYPE_XILINX_SMMU500_IOMMU_MEMORY_REGION,
8535    .parent = TYPE_IOMMU_MEMORY_REGION,
8536    .class_init = smmu500_iommu_memory_region_class_init,
8537};
8538
8539
8540static void smmu500_register_types(void)
8541{
8542    type_register_static(&smmu500_info);
8543    type_register_static(&smmu500_iommu_memory_region_info);
8544}
8545
8546type_init(smmu500_register_types)
8547