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26#include "qemu/osdep.h"
27#include "qapi/error.h"
28#include "hw/hw.h"
29#include "hw/ppc/ppc.h"
30#include "mac.h"
31#include "hw/input/adb.h"
32#include "hw/timer/m48t59.h"
33#include "sysemu/sysemu.h"
34#include "net/net.h"
35#include "hw/isa/isa.h"
36#include "hw/pci/pci.h"
37#include "hw/boards.h"
38#include "hw/nvram/fw_cfg.h"
39#include "hw/char/escc.h"
40#include "hw/ide.h"
41#include "hw/loader.h"
42#include "elf.h"
43#include "qemu/error-report.h"
44#include "sysemu/kvm.h"
45#include "kvm_ppc.h"
46#include "sysemu/block-backend.h"
47#include "exec/address-spaces.h"
48#include "qemu/cutils.h"
49
50#define MAX_IDE_BUS 2
51#define CFG_ADDR 0xf0000510
52#define TBFREQ 16600000UL
53#define CLOCKFREQ 266000000UL
54#define BUSFREQ 66000000UL
55
56#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
57
58static void fw_cfg_boot_set(void *opaque, const char *boot_device,
59 Error **errp)
60{
61 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
62}
63
64static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
65{
66 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
67}
68
69static void ppc_heathrow_reset(void *opaque)
70{
71 PowerPCCPU *cpu = opaque;
72
73 cpu_reset(CPU(cpu));
74}
75
76static void ppc_heathrow_init(MachineState *machine)
77{
78 ram_addr_t ram_size = machine->ram_size;
79 const char *kernel_filename = machine->kernel_filename;
80 const char *kernel_cmdline = machine->kernel_cmdline;
81 const char *initrd_filename = machine->initrd_filename;
82 const char *boot_device = machine->boot_order;
83 MemoryRegion *sysmem = get_system_memory();
84 PowerPCCPU *cpu = NULL;
85 CPUPPCState *env = NULL;
86 char *filename;
87 qemu_irq *pic, **heathrow_irqs;
88 int linux_boot, i;
89 MemoryRegion *ram = g_new(MemoryRegion, 1);
90 MemoryRegion *bios = g_new(MemoryRegion, 1);
91 MemoryRegion *isa = g_new(MemoryRegion, 1);
92 uint32_t kernel_base, initrd_base, cmdline_base = 0;
93 int32_t kernel_size, initrd_size;
94 PCIBus *pci_bus;
95 PCIDevice *macio;
96 MACIOIDEState *macio_ide;
97 DeviceState *dev;
98 BusState *adb_bus;
99 int bios_size, ndrv_size;
100 uint8_t *ndrv_file;
101 MemoryRegion *pic_mem;
102 MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1);
103 uint16_t ppc_boot_device;
104 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
105 void *fw_cfg;
106 uint64_t tbfreq;
107
108 linux_boot = (kernel_filename != NULL);
109
110
111 for (i = 0; i < smp_cpus; i++) {
112 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
113 env = &cpu->env;
114
115
116 cpu_ppc_tb_init(env, TBFREQ);
117 qemu_register_reset(ppc_heathrow_reset, cpu);
118 }
119
120
121 if (ram_size > (2047 << 20)) {
122 fprintf(stderr,
123 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
124 ((unsigned int)ram_size / (1 << 20)));
125 exit(1);
126 }
127
128 memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
129 ram_size);
130 memory_region_add_subregion(sysmem, 0, ram);
131
132
133 memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
134 &error_fatal);
135
136 if (bios_name == NULL)
137 bios_name = PROM_FILENAME;
138 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
139 memory_region_set_readonly(bios, true);
140 memory_region_add_subregion(sysmem, PROM_ADDR, bios);
141
142
143 if (filename) {
144 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
145 1, PPC_ELF_MACHINE, 0, 0);
146 g_free(filename);
147 } else {
148 bios_size = -1;
149 }
150 if (bios_size < 0 || bios_size > BIOS_SIZE) {
151 error_report("could not load PowerPC bios '%s'", bios_name);
152 exit(1);
153 }
154
155 if (linux_boot) {
156 uint64_t lowaddr = 0;
157 int bswap_needed;
158
159#ifdef BSWAP_NEEDED
160 bswap_needed = 1;
161#else
162 bswap_needed = 0;
163#endif
164 kernel_base = KERNEL_LOAD_ADDR;
165 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
166 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
167 0, 0);
168 if (kernel_size < 0)
169 kernel_size = load_aout(kernel_filename, kernel_base,
170 ram_size - kernel_base, bswap_needed,
171 TARGET_PAGE_SIZE);
172 if (kernel_size < 0)
173 kernel_size = load_image_targphys(kernel_filename,
174 kernel_base,
175 ram_size - kernel_base);
176 if (kernel_size < 0) {
177 error_report("could not load kernel '%s'", kernel_filename);
178 exit(1);
179 }
180
181 if (initrd_filename) {
182 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
183 initrd_size = load_image_targphys(initrd_filename, initrd_base,
184 ram_size - initrd_base);
185 if (initrd_size < 0) {
186 error_report("could not load initial ram disk '%s'",
187 initrd_filename);
188 exit(1);
189 }
190 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
191 } else {
192 initrd_base = 0;
193 initrd_size = 0;
194 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
195 }
196 ppc_boot_device = 'm';
197 } else {
198 kernel_base = 0;
199 kernel_size = 0;
200 initrd_base = 0;
201 initrd_size = 0;
202 ppc_boot_device = '\0';
203 for (i = 0; boot_device[i] != '\0'; i++) {
204
205
206
207
208#if 0
209 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
210 ppc_boot_device = boot_device[i];
211 break;
212 }
213#else
214 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
215 ppc_boot_device = boot_device[i];
216 break;
217 }
218#endif
219 }
220 if (ppc_boot_device == '\0') {
221 fprintf(stderr, "No valid boot device for G3 Beige machine\n");
222 exit(1);
223 }
224 }
225
226
227 memory_region_init_alias(isa, NULL, "isa_mmio",
228 get_system_io(), 0, 0x00200000);
229 memory_region_add_subregion(sysmem, 0xfe000000, isa);
230
231
232 heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
233 heathrow_irqs[0] =
234 g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
235
236 for (i = 0; i < smp_cpus; i++) {
237 switch (PPC_INPUT(env)) {
238 case PPC_FLAGS_INPUT_6xx:
239 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
240 heathrow_irqs[i][0] =
241 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
242 break;
243 default:
244 error_report("Bus model not supported on OldWorld Mac machine");
245 exit(1);
246 }
247 }
248
249
250 if (kvm_enabled()) {
251 tbfreq = kvmppc_get_tbfreq();
252 } else {
253 tbfreq = TBFREQ;
254 }
255
256
257 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
258 error_report("Only 6xx bus is supported on heathrow machine");
259 exit(1);
260 }
261 pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
262 pci_bus = pci_grackle_init(0xfec00000, pic,
263 get_system_memory(),
264 get_system_io());
265 pci_vga_init(pci_bus);
266
267 escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
268 serial_hds[1], ESCC_CLOCK, 4);
269 memory_region_init_alias(escc_bar, NULL, "escc-bar",
270 escc_mem, 0, memory_region_size(escc_mem));
271
272 for(i = 0; i < nb_nics; i++)
273 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
274
275
276 ide_drive_get(hd, ARRAY_SIZE(hd));
277
278 macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
279 dev = DEVICE(macio);
280 qdev_connect_gpio_out(dev, 0, pic[0x12]);
281 qdev_connect_gpio_out(dev, 1, pic[0x0D]);
282 qdev_connect_gpio_out(dev, 2, pic[0x02]);
283 qdev_connect_gpio_out(dev, 3, pic[0x0E]);
284 qdev_connect_gpio_out(dev, 4, pic[0x03]);
285 qdev_prop_set_uint64(dev, "frequency", tbfreq);
286 macio_init(macio, pic_mem, escc_bar);
287
288 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
289 "ide[0]"));
290 macio_ide_init_drives(macio_ide, hd);
291
292 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
293 "ide[1]"));
294 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
295
296 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
297 adb_bus = qdev_get_child_bus(dev, "adb.0");
298 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
299 qdev_init_nofail(dev);
300 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
301 qdev_init_nofail(dev);
302
303 if (machine_usb(machine)) {
304 pci_create_simple(pci_bus, -1, "pci-ohci");
305 }
306
307 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
308 graphic_depth = 15;
309
310
311
312 fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2);
313 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
314 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
315 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
316 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
317 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
318 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
319 if (kernel_cmdline) {
320 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
321 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
322 } else {
323 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
324 }
325 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
326 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
327 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
328
329 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
330 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
331 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
332
333 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
334 if (kvm_enabled()) {
335#ifdef CONFIG_KVM
336 uint8_t *hypercall;
337
338 hypercall = g_malloc(16);
339 kvmppc_get_hypercall(env, hypercall, 16);
340 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
341 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
342#endif
343 }
344 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
345
346 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
347 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
348
349
350 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
351 if (filename) {
352 ndrv_size = get_image_size(filename);
353 if (ndrv_size != -1) {
354 ndrv_file = g_malloc(ndrv_size);
355 ndrv_size = load_image(filename, ndrv_file);
356
357 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
358 }
359 g_free(filename);
360 }
361
362 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
363}
364
365static int heathrow_kvm_type(const char *arg)
366{
367
368 return 2;
369}
370
371static void heathrow_class_init(ObjectClass *oc, void *data)
372{
373 MachineClass *mc = MACHINE_CLASS(oc);
374
375 mc->desc = "Heathrow based PowerMAC";
376 mc->init = ppc_heathrow_init;
377 mc->block_default_type = IF_IDE;
378 mc->max_cpus = MAX_CPUS;
379#ifndef TARGET_PPC64
380 mc->is_default = 1;
381#endif
382
383 mc->default_boot_order = "cd";
384 mc->kvm_type = heathrow_kvm_type;
385 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
386}
387
388static const TypeInfo ppc_heathrow_machine_info = {
389 .name = MACHINE_TYPE_NAME("g3beige"),
390 .parent = TYPE_MACHINE,
391 .class_init = heathrow_class_init
392};
393
394static void ppc_heathrow_register_types(void)
395{
396 type_register_static(&ppc_heathrow_machine_info);
397}
398
399type_init(ppc_heathrow_register_types);
400
