1#ifndef HW_SPAPR_VIO_H
2#define HW_SPAPR_VIO_H
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25#include "sysemu/dma.h"
26
27#define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"
28#define VIO_SPAPR_DEVICE(obj) \
29 OBJECT_CHECK(VIOsPAPRDevice, (obj), TYPE_VIO_SPAPR_DEVICE)
30#define VIO_SPAPR_DEVICE_CLASS(klass) \
31 OBJECT_CLASS_CHECK(VIOsPAPRDeviceClass, (klass), TYPE_VIO_SPAPR_DEVICE)
32#define VIO_SPAPR_DEVICE_GET_CLASS(obj) \
33 OBJECT_GET_CLASS(VIOsPAPRDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE)
34
35#define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
36#define SPAPR_VIO_BUS(obj) OBJECT_CHECK(VIOsPAPRBus, (obj), TYPE_SPAPR_VIO_BUS)
37
38#define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge"
39
40typedef struct VIOsPAPR_CRQ {
41 uint64_t qladdr;
42 uint32_t qsize;
43 uint32_t qnext;
44 int(*SendFunc)(struct VIOsPAPRDevice *vdev, uint8_t *crq);
45} VIOsPAPR_CRQ;
46
47typedef struct VIOsPAPRDevice VIOsPAPRDevice;
48typedef struct VIOsPAPRBus VIOsPAPRBus;
49
50typedef struct VIOsPAPRDeviceClass {
51 DeviceClass parent_class;
52
53 const char *dt_name, *dt_type, *dt_compatible;
54 target_ulong signal_mask;
55 uint32_t rtce_window_size;
56 void (*realize)(VIOsPAPRDevice *dev, Error **errp);
57 void (*reset)(VIOsPAPRDevice *dev);
58 int (*devnode)(VIOsPAPRDevice *dev, void *fdt, int node_off);
59} VIOsPAPRDeviceClass;
60
61struct VIOsPAPRDevice {
62 DeviceState qdev;
63 uint32_t reg;
64 uint32_t irq;
65 uint64_t signal_state;
66 VIOsPAPR_CRQ crq;
67 AddressSpace as;
68 MemoryRegion mrroot;
69 MemoryRegion mrbypass;
70 sPAPRTCETable *tcet;
71};
72
73#define DEFINE_SPAPR_PROPERTIES(type, field) \
74 DEFINE_PROP_UINT32("reg", type, field.reg, -1)
75
76struct VIOsPAPRBus {
77 BusState bus;
78 uint32_t next_reg;
79};
80
81extern VIOsPAPRBus *spapr_vio_bus_init(void);
82extern VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg);
83void spapr_dt_vdevice(VIOsPAPRBus *bus, void *fdt);
84extern gchar *spapr_vio_stdout_path(VIOsPAPRBus *bus);
85
86static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev)
87{
88 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
89
90 return xics_get_qirq(XICS_FABRIC(spapr), dev->irq);
91}
92
93static inline bool spapr_vio_dma_valid(VIOsPAPRDevice *dev, uint64_t taddr,
94 uint32_t size, DMADirection dir)
95{
96 return dma_memory_valid(&dev->as, taddr, size, dir);
97}
98
99static inline int spapr_vio_dma_read(VIOsPAPRDevice *dev, uint64_t taddr,
100 void *buf, uint32_t size)
101{
102 return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
103 H_DEST_PARM : H_SUCCESS;
104}
105
106static inline int spapr_vio_dma_write(VIOsPAPRDevice *dev, uint64_t taddr,
107 const void *buf, uint32_t size)
108{
109 return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
110 H_DEST_PARM : H_SUCCESS;
111}
112
113static inline int spapr_vio_dma_set(VIOsPAPRDevice *dev, uint64_t taddr,
114 uint8_t c, uint32_t size)
115{
116 return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
117 H_DEST_PARM : H_SUCCESS;
118}
119
120#define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val)))
121#define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val)))
122#define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val)))
123#define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val)))
124#define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr)))
125
126int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq);
127
128VIOsPAPRDevice *vty_lookup(sPAPRMachineState *spapr, target_ulong reg);
129void vty_putchars(VIOsPAPRDevice *sdev, uint8_t *buf, int len);
130void spapr_vty_create(VIOsPAPRBus *bus, Chardev *chardev);
131void spapr_vlan_create(VIOsPAPRBus *bus, NICInfo *nd);
132void spapr_vscsi_create(VIOsPAPRBus *bus);
133
134VIOsPAPRDevice *spapr_vty_get_default(VIOsPAPRBus *bus);
135
136extern const VMStateDescription vmstate_spapr_vio;
137
138#define VMSTATE_SPAPR_VIO(_f, _s) \
139 VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, VIOsPAPRDevice)
140
141void spapr_vio_set_bypass(VIOsPAPRDevice *dev, bool bypass);
142
143#endif
144