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19#include "qemu/osdep.h"
20#include "qemu-common.h"
21#include "qemu/log.h"
22#include "hw/i2c/i2c.h"
23#include "hw/i2c/i2c-ddc.h"
24
25#ifndef DEBUG_I2CDDC
26#define DEBUG_I2CDDC 0
27#endif
28
29#define DPRINTF(fmt, ...) do { \
30 if (DEBUG_I2CDDC) { \
31 qemu_log("i2c-ddc: " fmt , ## __VA_ARGS__); \
32 } \
33} while (0);
34
35
36
37
38
39
40struct EDIDData {
41 char manuf_id[3];
42 uint16_t product_id;
43 uint32_t serial_no;
44 uint8_t manuf_week;
45 int manuf_year;
46 uint8_t h_cm;
47 uint8_t v_cm;
48 uint8_t gamma;
49 char monitor_name[14];
50 char serial_no_string[14];
51
52 uint8_t vmin;
53 uint8_t vmax;
54 uint8_t hmin;
55 uint8_t hmax;
56 uint8_t pixclock;
57 uint8_t timing_data[18];
58};
59
60typedef struct EDIDData EDIDData;
61
62
63static const EDIDData lcd_edid = {
64
65 .manuf_id = "QMU",
66 .product_id = 0,
67 .serial_no = 1,
68 .manuf_week = 1,
69 .manuf_year = 2011,
70 .h_cm = 40,
71 .v_cm = 30,
72 .gamma = 0x78,
73 .monitor_name = "QEMU monitor",
74 .serial_no_string = "1",
75 .vmin = 40,
76 .vmax = 120,
77 .hmin = 30,
78 .hmax = 100,
79 .pixclock = 18,
80 .timing_data = {
81
82 0x48, 0x3f, 0x40, 0x30, 0x62, 0xb0, 0x32, 0x40, 0x40,
83 0xc0, 0x13, 0x00, 0x98, 0x32, 0x11, 0x00, 0x00, 0x1e
84 }
85};
86
87static uint8_t manuf_char_to_int(char c)
88{
89 return (c - 'A') & 0x1f;
90}
91
92static void write_ascii_descriptor_block(uint8_t *descblob, uint8_t blocktype,
93 const char *string)
94{
95
96 int i;
97 descblob[0] = descblob[1] = descblob[2] = descblob[4] = 0;
98 descblob[3] = blocktype;
99
100
101
102 for (i = 5; i < 19; i++) {
103 descblob[i] = string[i - 5];
104 if (!descblob[i]) {
105 break;
106 }
107 }
108 if (i < 19) {
109 descblob[i++] = '\n';
110 }
111 for ( ; i < 19; i++) {
112 descblob[i] = ' ';
113 }
114}
115
116static void write_range_limits_descriptor(const EDIDData *edid,
117 uint8_t *descblob)
118{
119 int i;
120 descblob[0] = descblob[1] = descblob[2] = descblob[4] = 0;
121 descblob[3] = 0xfd;
122 descblob[5] = edid->vmin;
123 descblob[6] = edid->vmax;
124 descblob[7] = edid->hmin;
125 descblob[8] = edid->hmax;
126 descblob[9] = edid->pixclock;
127 descblob[10] = 0;
128 descblob[11] = 0xa;
129 for (i = 12; i < 19; i++) {
130 descblob[i] = 0x20;
131 }
132}
133
134static void build_edid_blob(const EDIDData *edid, uint8_t *blob)
135{
136
137
138
139 int i;
140 uint8_t cksum;
141
142
143 blob[0] = blob[7] = 0;
144 for (i = 1 ; i < 7; i++) {
145 blob[i] = 0xff;
146 }
147
148 blob[8] = (manuf_char_to_int(edid->manuf_id[0]) << 2)
149 | (manuf_char_to_int(edid->manuf_id[1]) >> 3);
150 blob[9] = (manuf_char_to_int(edid->manuf_id[1]) << 5)
151 | manuf_char_to_int(edid->manuf_id[2]);
152
153 blob[10] = edid->product_id;
154 blob[11] = edid->product_id >> 8;
155 blob[12] = edid->serial_no;
156 blob[13] = edid->serial_no >> 8;
157 blob[14] = edid->serial_no >> 16;
158 blob[15] = edid->serial_no >> 24;
159
160 blob[16] = edid->manuf_week;
161
162 blob[17] = edid->manuf_year - 1990;
163
164 blob[18] = 1;
165 blob[19] = 3;
166
167
168 blob[20] = 0x80;
169
170 blob[21] = edid->h_cm;
171 blob[22] = edid->v_cm;
172
173 blob[23] = edid->gamma;
174
175
176
177 blob[24] = 0x0e;
178
179
180
181 blob[25] = 0xee;
182 blob[26] = 0x91;
183 blob[27] = 0xa3;
184 blob[28] = 0x54;
185 blob[29] = 0x4c;
186 blob[30] = 0x99;
187 blob[31] = 0x26;
188 blob[32] = 0x0f;
189 blob[33] = 0x50;
190 blob[34] = 0x54;
191
192 blob[35] = blob[36] = 0xff;
193
194 blob[37] = 0;
195
196
197
198
199 for (i = 38; i < 54; i++) {
200 blob[i] = 0x1;
201 }
202
203 memcpy(blob + 54, edid->timing_data, 18);
204
205
206
207
208 write_range_limits_descriptor(edid, blob + 72);
209 write_ascii_descriptor_block(blob + 90, 0xfc, edid->monitor_name);
210 write_ascii_descriptor_block(blob + 108, 0xff, edid->serial_no_string);
211
212
213 blob[126] = 0;
214
215 cksum = 0;
216 for (i = 0; i < 127; i++) {
217 cksum += blob[i];
218 }
219
220 blob[127] = -cksum;
221 if (DEBUG_I2CDDC) {
222 qemu_hexdump((char *)blob, stdout, "", 128);
223 }
224}
225
226static void i2c_ddc_reset(DeviceState *ds)
227{
228 I2CDDCState *s = I2CDDC(ds);
229
230 s->firstbyte = false;
231 s->reg = 0;
232}
233
234static int i2c_ddc_event(I2CSlave *i2c, enum i2c_event event)
235{
236 I2CDDCState *s = I2CDDC(i2c);
237
238 if (event == I2C_START_SEND) {
239 s->firstbyte = true;
240 }
241
242 return 0;
243}
244
245static int i2c_ddc_rx(I2CSlave *i2c)
246{
247 I2CDDCState *s = I2CDDC(i2c);
248
249 int value;
250 value = s->edid_blob[s->reg];
251 s->reg++;
252 return value;
253}
254
255static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data)
256{
257 I2CDDCState *s = I2CDDC(i2c);
258 if (s->firstbyte) {
259 s->reg = data;
260 s->firstbyte = false;
261 DPRINTF("[EDID] Written new pointer: %u\n", data);
262 return 1;
263 }
264
265
266 s->reg++;
267 return 1;
268}
269
270static void i2c_ddc_init(Object *obj)
271{
272 I2CDDCState *s = I2CDDC(obj);
273 build_edid_blob(&lcd_edid, s->edid_blob);
274}
275
276static const VMStateDescription vmstate_i2c_ddc = {
277 .name = TYPE_I2CDDC,
278 .version_id = 1,
279 .fields = (VMStateField[]) {
280 VMSTATE_BOOL(firstbyte, I2CDDCState),
281 VMSTATE_UINT8(reg, I2CDDCState),
282 VMSTATE_END_OF_LIST()
283 }
284};
285
286static void i2c_ddc_class_init(ObjectClass *oc, void *data)
287{
288 DeviceClass *dc = DEVICE_CLASS(oc);
289 I2CSlaveClass *isc = I2C_SLAVE_CLASS(oc);
290
291 dc->reset = i2c_ddc_reset;
292 dc->vmsd = &vmstate_i2c_ddc;
293 isc->event = i2c_ddc_event;
294 isc->recv = i2c_ddc_rx;
295 isc->send = i2c_ddc_tx;
296}
297
298static TypeInfo i2c_ddc_info = {
299 .name = TYPE_I2CDDC,
300 .parent = TYPE_I2C_SLAVE,
301 .instance_size = sizeof(I2CDDCState),
302 .instance_init = i2c_ddc_init,
303 .class_init = i2c_ddc_class_init
304};
305
306static void ddc_register_devices(void)
307{
308 type_register_static(&i2c_ddc_info);
309}
310
311type_init(ddc_register_devices);
312