LXR qemu/target/ppc/mmu-book3s-v3.h

   1/*
   2 *  PowerPC ISAV3 BookS emulation generic mmu definitions for qemu.
   3 *
   4 *  Copyright (c) 2017 Suraj Jitindar Singh, IBM Corporation
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#ifndef MMU_H
  21#define MMU_H
  22
  23#ifndef CONFIG_USER_ONLY
  24
  25/* Partition Table Entry Fields */
  26#define PATBE1_GR 0x8000000000000000
  27
  28/* Process Table Entry */
  29struct prtb_entry {
  30    uint64_t prtbe0, prtbe1;
  31};
  32
  33#ifdef TARGET_PPC64
  34
  35static inline bool ppc64_use_proc_tbl(PowerPCCPU *cpu)
  36{
  37    return !!(cpu->env.spr[SPR_LPCR] & LPCR_UPRT);
  38}
  39
  40static inline bool ppc64_radix_guest(PowerPCCPU *cpu)
  41{
  42    PPCVirtualHypervisorClass *vhc =
  43        PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp);
  44
  45    return !!(vhc->get_patbe(cpu->vhyp) & PATBE1_GR);
  46}
  47
  48int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
  49                              int mmu_idx);
  50
  51#endif /* TARGET_PPC64 */
  52
  53#endif /* CONFIG_USER_ONLY */
  54
  55#endif /* MMU_H */
  56