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27#include "qemu/osdep.h"
28#include "hw/sysbus.h"
29#include "hw/register-dep.h"
30#include "qemu/bitops.h"
31#include "qemu/log.h"
32
33#ifndef XILINX_SYSMON_ERR_DEBUG
34#define XILINX_SYSMON_ERR_DEBUG 0
35#endif
36
37#define TYPE_XILINX_SYSMON "xlnx,zynqmp_sysmon"
38
39#define XILINX_SYSMON(obj) \
40 OBJECT_CHECK(SYSMON, (obj), TYPE_XILINX_SYSMON)
41
42DEP_REG32(TEMPERATURE, 0x0)
43 DEP_FIELD(TEMPERATURE, TEMPERATURE, 16, 0)
44DEP_REG32(SUPPLY1, 0x4)
45 DEP_FIELD(SUPPLY1, SUPPLY_VAL, 16, 0)
46DEP_REG32(SUPPLY2, 0x8)
47 DEP_FIELD(SUPPLY2, SUPPLY_VAL, 16, 0)
48DEP_REG32(SUPPLY3, 0x18)
49 DEP_FIELD(SUPPLY3, SUPPLY_VAL, 16, 0)
50DEP_REG32(SUPPLY4, 0x34)
51 DEP_FIELD(SUPPLY4, SUPPLY_VAL, 16, 0)
52DEP_REG32(SUPPLY5, 0x38)
53 DEP_FIELD(SUPPLY5, SUPPLY_VAL, 16, 0)
54DEP_REG32(SUPPLY6, 0x3c)
55 DEP_FIELD(SUPPLY6, SUPPLY_VAL, 16, 0)
56DEP_REG32(MAX_TEMPERATURE, 0x80)
57 DEP_FIELD(MAX_TEMPERATURE, TEMPERATURE, 16, 0)
58DEP_REG32(MAX_SUPPLY1, 0x84)
59 DEP_FIELD(MAX_SUPPLY1, SUPPLY_VAL, 16, 0)
60DEP_REG32(MAX_SUPPLY2, 0x88)
61 DEP_FIELD(MAX_SUPPLY2, SUPPLY_VAL, 16, 0)
62DEP_REG32(MAX_SUPPLY3, 0x8c)
63 DEP_FIELD(MAX_SUPPLY3, SUPPLY_VAL, 16, 0)
64DEP_REG32(MIN_TEMPERATURE, 0x90)
65 DEP_FIELD(MIN_TEMPERATURE, TEMPERATURE, 16, 0)
66DEP_REG32(MIN_SUPPLY1, 0x94)
67 DEP_FIELD(MIN_SUPPLY1, SUPPLY_VAL, 16, 0)
68DEP_REG32(MIN_SUPPLY2, 0x98)
69 DEP_FIELD(MIN_SUPPLY2, SUPPLY_VAL, 16, 0)
70DEP_REG32(MIN_SUPPLY3, 0x9c)
71 DEP_FIELD(MIN_SUPPLY3, SUPPLY_VAL, 16, 0)
72DEP_REG32(MAX_SUPPLY4, 0xa0)
73 DEP_FIELD(MAX_SUPPLY4, SUPPLY_VAL, 16, 0)
74DEP_REG32(MAX_SUPPLY5, 0xa4)
75 DEP_FIELD(MAX_SUPPLY5, SUPPLY_VAL, 16, 0)
76DEP_REG32(MAX_SUPPLY6, 0xa8)
77 DEP_FIELD(MAX_SUPPLY6, SUPPLY_VAL, 16, 0)
78DEP_REG32(MIN_SUPPLY4, 0xb0)
79 DEP_FIELD(MIN_SUPPLY4, SUPPLY_VAL, 16, 0)
80DEP_REG32(MIN_SUPPLY5, 0xb4)
81 DEP_FIELD(MIN_SUPPLY5, SUPPLY_VAL, 16, 0)
82DEP_REG32(MIN_SUPPLY6, 0xb8)
83 DEP_FIELD(MIN_SUPPLY6, SUPPLY_VAL, 16, 0)
84DEP_REG32(STATUS_FLAG, 0xfc)
85 DEP_FIELD(STATUS_FLAG, CLK_OSC_USED, 1, 15)
86 DEP_FIELD(STATUS_FLAG, BLOCK_IN_RESET, 1, 14)
87 DEP_FIELD(STATUS_FLAG, JTAG_DISABLED, 1, 11)
88 DEP_FIELD(STATUS_FLAG, JTAG_READ_ONLY, 1, 10)
89 DEP_FIELD(STATUS_FLAG, INTERNAL_REF, 1, 9)
90 DEP_FIELD(STATUS_FLAG, DISABLED, 1, 8)
91 DEP_FIELD(STATUS_FLAG, ALM_6_3, 4, 4)
92 DEP_FIELD(STATUS_FLAG, OT, 1, 3)
93 DEP_FIELD(STATUS_FLAG, ALM_2_0, 3, 0)
94DEP_REG32(CONFIG_REG0, 0x100)
95 DEP_FIELD(CONFIG_REG0, AVERAGING, 2, 12)
96 DEP_FIELD(CONFIG_REG0, EXTERNAL_MUX, 1, 11)
97 DEP_FIELD(CONFIG_REG0, BU, 1, 10)
98 DEP_FIELD(CONFIG_REG0, EC, 1, 9)
99 DEP_FIELD(CONFIG_REG0, ACQ, 1, 8)
100 DEP_FIELD(CONFIG_REG0, MUX_CHANNEL, 6, 0)
101DEP_REG32(CONFIG_REG1, 0x104)
102 DEP_FIELD(CONFIG_REG1, SEQUENCE_MODE, 4, 12)
103 DEP_FIELD(CONFIG_REG1, ALARM_DISABLE6TO3, 4, 8)
104 DEP_FIELD(CONFIG_REG1, ALARM_DISABLE2TO0, 3, 1)
105 DEP_FIELD(CONFIG_REG1, OVER_TEMP_DISABLE, 1, 0)
106DEP_REG32(CONFIG_REG2, 0x108)
107 DEP_FIELD(CONFIG_REG2, CLOCK_DIVIDER, 8, 8)
108 DEP_FIELD(CONFIG_REG2, POWER_DOWN, 4, 4)
109 DEP_FIELD(CONFIG_REG2, TEST_CHANNEL_EN, 1, 2)
110 DEP_FIELD(CONFIG_REG2, TEST_MODE, 2, 0)
111DEP_REG32(CONFIG_REG3, 0x10c)
112 DEP_FIELD(CONFIG_REG3, I2C_OVERRIDE_EN, 1, 15)
113 DEP_FIELD(CONFIG_REG3, I2C_OVERRIDE_ADDR, 7, 8)
114 DEP_FIELD(CONFIG_REG3, I2C_EN, 1, 7)
115 DEP_FIELD(CONFIG_REG3, ALARM_DISABLE13TO8, 6, 0)
116DEP_REG32(CONFIG_REG4, 0x110)
117 DEP_FIELD(CONFIG_REG4, LOW_RATE_EOS, 2, 10)
118 DEP_FIELD(CONFIG_REG4, SEQUENCE_RATE, 2, 8)
119 DEP_FIELD(CONFIG_REG4, VUSER_ENABLE_HRANGE, 4, 0)
120DEP_REG32(SEQ_CHANNEL2, 0x118)
121 DEP_FIELD(SEQ_CHANNEL2, TEMPERATURE_REMOTE, 1, 5)
122 DEP_FIELD(SEQ_CHANNEL2, VCCAMS, 1, 4)
123 DEP_FIELD(SEQ_CHANNEL2, SUPPLY10, 1, 3)
124 DEP_FIELD(SEQ_CHANNEL2, SUPPLY9, 1, 2)
125 DEP_FIELD(SEQ_CHANNEL2, SUPPLY8, 1, 1)
126 DEP_FIELD(SEQ_CHANNEL2, SUPPLY7, 1, 0)
127DEP_REG32(SEQ_AVERAGE2, 0x11c)
128 DEP_FIELD(SEQ_AVERAGE2, AVERAGE2, 16, 0)
129DEP_REG32(SEQ_CHANNEL0, 0x120)
130 DEP_FIELD(SEQ_CHANNEL0, CURRENT_MON, 1, 15)
131 DEP_FIELD(SEQ_CHANNEL0, SUPPLY3, 1, 14)
132 DEP_FIELD(SEQ_CHANNEL0, VREFN, 1, 13)
133 DEP_FIELD(SEQ_CHANNEL0, VREFP, 1, 12)
134 DEP_FIELD(SEQ_CHANNEL0, VP_VN, 1, 11)
135 DEP_FIELD(SEQ_CHANNEL0, SUPPLY2, 1, 10)
136 DEP_FIELD(SEQ_CHANNEL0, SUPPLY1, 1, 9)
137 DEP_FIELD(SEQ_CHANNEL0, TEMPERATURE, 1, 8)
138 DEP_FIELD(SEQ_CHANNEL0, SUPPLY6, 1, 7)
139 DEP_FIELD(SEQ_CHANNEL0, SUPPLY5, 1, 6)
140 DEP_FIELD(SEQ_CHANNEL0, SUPPLY4, 1, 5)
141 DEP_FIELD(SEQ_CHANNEL0, TEST_CHANNEL, 1, 3)
142 DEP_FIELD(SEQ_CHANNEL0, CALIBRATION, 1, 0)
143DEP_REG32(SEQ_CHANNEL1, 0x124)
144 DEP_FIELD(SEQ_CHANNEL1, VAUX0F, 1, 15)
145 DEP_FIELD(SEQ_CHANNEL1, VAUX0E, 1, 14)
146 DEP_FIELD(SEQ_CHANNEL1, VAUX0D, 1, 13)
147 DEP_FIELD(SEQ_CHANNEL1, VAUX0C, 1, 12)
148 DEP_FIELD(SEQ_CHANNEL1, VAUX0B, 1, 11)
149 DEP_FIELD(SEQ_CHANNEL1, VAUX0A, 1, 10)
150 DEP_FIELD(SEQ_CHANNEL1, VAUX09, 1, 9)
151 DEP_FIELD(SEQ_CHANNEL1, VAUX08, 1, 8)
152 DEP_FIELD(SEQ_CHANNEL1, VAUX07, 1, 7)
153 DEP_FIELD(SEQ_CHANNEL1, VAUX06, 1, 6)
154 DEP_FIELD(SEQ_CHANNEL1, VAUX05, 1, 5)
155 DEP_FIELD(SEQ_CHANNEL1, VAUX04, 1, 4)
156 DEP_FIELD(SEQ_CHANNEL1, VAUX03, 1, 3)
157 DEP_FIELD(SEQ_CHANNEL1, VAUX02, 1, 2)
158 DEP_FIELD(SEQ_CHANNEL1, VAUX01, 1, 1)
159 DEP_FIELD(SEQ_CHANNEL1, VAUX00, 1, 0)
160DEP_REG32(SEQ_AVERAGE0, 0x128)
161 DEP_FIELD(SEQ_AVERAGE0, AVERAGE0, 16, 0)
162DEP_REG32(SEQ_AVERAGE1, 0x12c)
163 DEP_FIELD(SEQ_AVERAGE1, AVERAGE1, 16, 0)
164DEP_REG32(SEQ_INPUT_MODE0, 0x130)
165 DEP_FIELD(SEQ_INPUT_MODE0, INPUT_MODE0, 16, 0)
166DEP_REG32(SEQ_INPUT_MODE1, 0x134)
167 DEP_FIELD(SEQ_INPUT_MODE1, INPUT_MODE1, 16, 0)
168DEP_REG32(SEQ_ACQ0, 0x138)
169 DEP_FIELD(SEQ_ACQ0, ACQ0, 16, 0)
170DEP_REG32(SEQ_ACQ1, 0x13c)
171 DEP_FIELD(SEQ_ACQ1, ACQ1, 16, 0)
172DEP_REG32(ALARM_TEMPERATURE_UPPER, 0x140)
173 DEP_FIELD(ALARM_TEMPERATURE_UPPER, TEMPERATURE_ALARM, 16, 0)
174DEP_REG32(ALARM_SUPPLY1_UPPER, 0x144)
175 DEP_FIELD(ALARM_SUPPLY1_UPPER, SUPPLY_ALARM, 16, 0)
176DEP_REG32(ALARM_SUPPLY2_UPPER, 0x148)
177 DEP_FIELD(ALARM_SUPPLY2_UPPER, SUPPLY_ALARM, 16, 0)
178DEP_REG32(ALARM_OT_UPPER, 0x14c)
179 DEP_FIELD(ALARM_OT_UPPER, TEMPERATURE_ALARM, 16, 0)
180DEP_REG32(ALARM_TEMPERATURE_LOWER, 0x150)
181 DEP_FIELD(ALARM_TEMPERATURE_LOWER, TEMPERATURE_ALARM, 15, 1)
182 DEP_FIELD(ALARM_TEMPERATURE_LOWER, THRESHOLD_MODE, 1, 0)
183DEP_REG32(ALARM_SUPPLY1_LOWER, 0x154)
184 DEP_FIELD(ALARM_SUPPLY1_LOWER, SUPPLY_ALARM, 16, 0)
185DEP_REG32(ALARM_SUPPLY2_LOWER, 0x158)
186 DEP_FIELD(ALARM_SUPPLY2_LOWER, SUPPLY_ALARM, 16, 0)
187DEP_REG32(ALARM_OT_LOWER, 0x15c)
188 DEP_FIELD(ALARM_OT_LOWER, TEMPERATURE_ALARM, 15, 1)
189 DEP_FIELD(ALARM_OT_LOWER, THRESHOLD_MODE, 1, 0)
190DEP_REG32(ALARM_SUPPLY3_UPPER, 0x160)
191 DEP_FIELD(ALARM_SUPPLY3_UPPER, SUPPLY_ALARM, 16, 0)
192DEP_REG32(ALARM_SUPPLY4_UPPER, 0x164)
193 DEP_FIELD(ALARM_SUPPLY4_UPPER, SUPPLY_ALARM, 16, 0)
194DEP_REG32(ALARM_SUPPLY5_UPPER, 0x168)
195 DEP_FIELD(ALARM_SUPPLY5_UPPER, SUPPLY_ALARM, 16, 0)
196DEP_REG32(ALARM_SUPPLY6_UPPER, 0x16c)
197 DEP_FIELD(ALARM_SUPPLY6_UPPER, SUPPLY_ALARM, 16, 0)
198DEP_REG32(ALARM_SUPPLY3_LOWER, 0x170)
199 DEP_FIELD(ALARM_SUPPLY3_LOWER, SUPPLY_ALARM, 16, 0)
200DEP_REG32(ALARM_SUPPLY4_LOWER, 0x174)
201 DEP_FIELD(ALARM_SUPPLY4_LOWER, SUPPLY_ALARM, 16, 0)
202DEP_REG32(ALARM_SUPPLY5_LOWER, 0x178)
203 DEP_FIELD(ALARM_SUPPLY5_LOWER, SUPPLY_ALARM, 16, 0)
204DEP_REG32(ALARM_SUPPLY6_LOWER, 0x17c)
205 DEP_FIELD(ALARM_SUPPLY6_LOWER, SUPPLY_ALARM, 16, 0)
206DEP_REG32(ALARM_SUPPLY7_UPPER, 0x180)
207 DEP_FIELD(ALARM_SUPPLY7_UPPER, SUPPLY_ALARM, 16, 0)
208DEP_REG32(ALARM_SUPPLY8_UPPER, 0x184)
209 DEP_FIELD(ALARM_SUPPLY8_UPPER, SUPPLY_ALARM, 16, 0)
210DEP_REG32(ALARM_SUPPLY9_UPPER, 0x188)
211 DEP_FIELD(ALARM_SUPPLY9_UPPER, SUPPLY_ALARM, 16, 0)
212DEP_REG32(ALARM_SUPPLY10_UPPER, 0x18c)
213 DEP_FIELD(ALARM_SUPPLY10_UPPER, SUPPLY_ALARM, 16, 0)
214DEP_REG32(ALARM_VCCAMS_UPPER, 0x190)
215 DEP_FIELD(ALARM_VCCAMS_UPPER, SUPPLY_ALARM, 16, 0)
216DEP_REG32(ALARM_TREMOTE_UPPER, 0x194)
217 DEP_FIELD(ALARM_TREMOTE_UPPER, TEMPERATURE_ALARM, 16, 0)
218DEP_REG32(ALARM_SUPPLY7_LOWER, 0x1a0)
219 DEP_FIELD(ALARM_SUPPLY7_LOWER, SUPPLY_ALARM, 16, 0)
220DEP_REG32(ALARM_SUPPLY8_LOWER, 0x1a4)
221 DEP_FIELD(ALARM_SUPPLY8_LOWER, SUPPLY_ALARM, 16, 0)
222DEP_REG32(ALARM_SUPPLY9_LOWER, 0x1a8)
223 DEP_FIELD(ALARM_SUPPLY9_LOWER, SUPPLY_ALARM, 16, 0)
224DEP_REG32(ALARM_SUPPLY10_LOWER, 0x1ac)
225 DEP_FIELD(ALARM_SUPPLY10_LOWER, SUPPLY_ALARM, 16, 0)
226DEP_REG32(ALARM_VCCAMS_LOWER, 0x1b0)
227 DEP_FIELD(ALARM_VCCAMS_LOWER, SUPPLY_ALARM, 16, 0)
228DEP_REG32(ALARM_TREMOTE_LOWER, 0x1b4)
229 DEP_FIELD(ALARM_TREMOTE_LOWER, TEMPERATURE_ALARM, 15, 1)
230 DEP_FIELD(ALARM_TREMOTE_LOWER, THRESHOLD_MODE, 1, 0)
231DEP_REG32(SEQ_INPUT_MODE2, 0x1e0)
232 DEP_FIELD(SEQ_INPUT_MODE2, INPUT_MODE2, 16, 0)
233DEP_REG32(SEQ_ACQ2, 0x1e4)
234 DEP_FIELD(SEQ_ACQ2, ACQ2, 16, 0)
235DEP_REG32(SUPPLY7, 0x200)
236 DEP_FIELD(SUPPLY7, SUPPLY_VAL, 16, 0)
237DEP_REG32(SUPPLY8, 0x204)
238 DEP_FIELD(SUPPLY8, SUPPLY_VAL, 16, 0)
239DEP_REG32(SUPPLY9, 0x208)
240 DEP_FIELD(SUPPLY9, SUPPLY_VAL, 16, 0)
241DEP_REG32(SUPPLY10, 0x20c)
242 DEP_FIELD(SUPPLY10, SUPPLY_VAL, 16, 0)
243DEP_REG32(VCCAMS, 0x210)
244 DEP_FIELD(VCCAMS, SUPPLY_VAL, 16, 0)
245DEP_REG32(TEMPERATURE_REMOTE, 0x214)
246 DEP_FIELD(TEMPERATURE_REMOTE, TEMPERATURE, 16, 0)
247DEP_REG32(MAX_SUPPLY7, 0x280)
248 DEP_FIELD(MAX_SUPPLY7, SUPPLY_VAL, 16, 0)
249DEP_REG32(MAX_SUPPLY8, 0x284)
250 DEP_FIELD(MAX_SUPPLY8, SUPPLY_VAL, 16, 0)
251DEP_REG32(MAX_SUPPLY9, 0x288)
252 DEP_FIELD(MAX_SUPPLY9, SUPPLY_VAL, 16, 0)
253DEP_REG32(MAX_SUPPLY10, 0x28c)
254 DEP_FIELD(MAX_SUPPLY10, SUPPLY_VAL, 16, 0)
255DEP_REG32(MAX_VCCAMS, 0x290)
256 DEP_FIELD(MAX_VCCAMS, SUPPLY_VAL, 16, 0)
257DEP_REG32(MAX_TEMPERATURE_REMOTE, 0x294)
258 DEP_FIELD(MAX_TEMPERATURE_REMOTE, TEMPERATURE, 16, 0)
259DEP_REG32(MIN_SUPPLY7, 0x2a0)
260 DEP_FIELD(MIN_SUPPLY7, SUPPLY_VAL, 16, 0)
261DEP_REG32(MIN_SUPPLY8, 0x2a4)
262 DEP_FIELD(MIN_SUPPLY8, SUPPLY_VAL, 16, 0)
263DEP_REG32(MIN_SUPPLY9, 0x2a8)
264 DEP_FIELD(MIN_SUPPLY9, SUPPLY_VAL, 16, 0)
265DEP_REG32(MIN_SUPPLY10, 0x2ac)
266 DEP_FIELD(MIN_SUPPLY10, SUPPLY_VAL, 16, 0)
267DEP_REG32(MIN_VCCAMS, 0x2b0)
268 DEP_FIELD(MIN_VCCAMS, SUPPLY_VAL, 16, 0)
269DEP_REG32(MIN_TEMPERATURE_REMOTE, 0x2b4)
270 DEP_FIELD(MIN_TEMPERATURE_REMOTE, TEMPERATURE, 16, 0)
271
272#define R_MAX (R_MIN_TEMPERATURE_REMOTE + 1)
273
274typedef struct SYSMON {
275 SysBusDevice parent_obj;
276 MemoryRegion iomem;
277
278 uint32_t regs[R_MAX];
279 DepRegisterInfo regs_info[R_MAX];
280} SYSMON;
281
282static DepRegisterAccessInfo sysmon_regs_info[] = {
283 { .name = "TEMPERATURE", .decode.addr = A_TEMPERATURE,
284 .ro = 0xffff,
285 },{ .name = "SUPPLY1", .decode.addr = A_SUPPLY1,
286 .ro = 0xffff,
287 },{ .name = "SUPPLY2", .decode.addr = A_SUPPLY2,
288 .ro = 0xffff,
289 },{ .name = "SUPPLY3", .decode.addr = A_SUPPLY3,
290 .ro = 0xffff,
291 },{ .name = "SUPPLY4", .decode.addr = A_SUPPLY4,
292 .ro = 0xffff,
293 },{ .name = "SUPPLY5", .decode.addr = A_SUPPLY5,
294 .ro = 0xffff,
295 },{ .name = "SUPPLY6", .decode.addr = A_SUPPLY6,
296 .ro = 0xffff,
297 },{ .name = "MAX_TEMPERATURE", .decode.addr = A_MAX_TEMPERATURE,
298 .ro = 0xffff,
299 },{ .name = "MAX_SUPPLY1", .decode.addr = A_MAX_SUPPLY1,
300 .ro = 0xffff,
301 },{ .name = "MAX_SUPPLY2", .decode.addr = A_MAX_SUPPLY2,
302 .ro = 0xffff,
303 },{ .name = "MAX_SUPPLY3", .decode.addr = A_MAX_SUPPLY3,
304 .ro = 0xffff,
305 },{ .name = "MIN_TEMPERATURE", .decode.addr = A_MIN_TEMPERATURE,
306 .reset = 0xffff,
307 .ro = 0xffff,
308 },{ .name = "MIN_SUPPLY1", .decode.addr = A_MIN_SUPPLY1,
309 .reset = 0xffff,
310 .ro = 0xffff,
311 },{ .name = "MIN_SUPPLY2", .decode.addr = A_MIN_SUPPLY2,
312 .reset = 0xffff,
313 .ro = 0xffff,
314 },{ .name = "MIN_SUPPLY3", .decode.addr = A_MIN_SUPPLY3,
315 .reset = 0xffff,
316 .ro = 0xffff,
317 },{ .name = "MAX_SUPPLY4", .decode.addr = A_MAX_SUPPLY4,
318 .ro = 0xffff,
319 },{ .name = "MAX_SUPPLY5", .decode.addr = A_MAX_SUPPLY5,
320 .ro = 0xffff,
321 },{ .name = "MAX_SUPPLY6", .decode.addr = A_MAX_SUPPLY6,
322 .ro = 0xffff,
323 },{ .name = "MIN_SUPPLY4", .decode.addr = A_MIN_SUPPLY4,
324 .reset = 0xffff,
325 .ro = 0xffff,
326 },{ .name = "MIN_SUPPLY5", .decode.addr = A_MIN_SUPPLY5,
327 .reset = 0xffff,
328 .ro = 0xffff,
329 },{ .name = "MIN_SUPPLY6", .decode.addr = A_MIN_SUPPLY6,
330 .reset = 0xffff,
331 .ro = 0xffff,
332 },{ .name = "STATUS_FLAG", .decode.addr = A_STATUS_FLAG,
333 .reset = 0xa00,
334 .rsvd = 0x3000,
335 .ro = 0xffff,
336 },{ .name = "CONFIG_REG0", .decode.addr = A_CONFIG_REG0,
337 .rsvd = 0xc0c0,
338 },{ .name = "CONFIG_REG1", .decode.addr = A_CONFIG_REG1,
339 .rsvd = 0xf0,
340 },{ .name = "CONFIG_REG2", .decode.addr = A_CONFIG_REG2,
341 .rsvd = 0x8,
342 },{ .name = "CONFIG_REG3", .decode.addr = A_CONFIG_REG3,
343 .rsvd = 0x40,
344 },{ .name = "CONFIG_REG4", .decode.addr = A_CONFIG_REG4,
345 .rsvd = 0xf0f0,
346 },{ .name = "SEQ_CHANNEL2", .decode.addr = A_SEQ_CHANNEL2,
347 .rsvd = 0xffc0,
348 },{ .name = "SEQ_AVERAGE2", .decode.addr = A_SEQ_AVERAGE2,
349 },{ .name = "SEQ_CHANNEL0", .decode.addr = A_SEQ_CHANNEL0,
350 .rsvd = 0x16,
351 },{ .name = "SEQ_CHANNEL1", .decode.addr = A_SEQ_CHANNEL1,
352 },{ .name = "SEQ_AVERAGE0", .decode.addr = A_SEQ_AVERAGE0,
353 },{ .name = "SEQ_AVERAGE1", .decode.addr = A_SEQ_AVERAGE1,
354 },{ .name = "SEQ_INPUT_MODE0", .decode.addr = A_SEQ_INPUT_MODE0,
355 },{ .name = "SEQ_INPUT_MODE1", .decode.addr = A_SEQ_INPUT_MODE1,
356 },{ .name = "SEQ_ACQ0", .decode.addr = A_SEQ_ACQ0,
357 },{ .name = "SEQ_ACQ1", .decode.addr = A_SEQ_ACQ1,
358 },{ .name = "ALARM_TEMPERATURE_UPPER",
359 .decode.addr = A_ALARM_TEMPERATURE_UPPER,
360 },{ .name = "ALARM_SUPPLY1_UPPER", .decode.addr = A_ALARM_SUPPLY1_UPPER,
361 },{ .name = "ALARM_SUPPLY2_UPPER", .decode.addr = A_ALARM_SUPPLY2_UPPER,
362 },{ .name = "ALARM_OT_UPPER", .decode.addr = A_ALARM_OT_UPPER,
363 },{ .name = "ALARM_TEMPERATURE_LOWER",
364 .decode.addr = A_ALARM_TEMPERATURE_LOWER,
365 },{ .name = "ALARM_SUPPLY1_LOWER", .decode.addr = A_ALARM_SUPPLY1_LOWER,
366 },{ .name = "ALARM_SUPPLY2_LOWER", .decode.addr = A_ALARM_SUPPLY2_LOWER,
367 },{ .name = "ALARM_OT_LOWER", .decode.addr = A_ALARM_OT_LOWER,
368 },{ .name = "ALARM_SUPPLY3_UPPER", .decode.addr = A_ALARM_SUPPLY3_UPPER,
369 },{ .name = "ALARM_SUPPLY4_UPPER", .decode.addr = A_ALARM_SUPPLY4_UPPER,
370 },{ .name = "ALARM_SUPPLY5_UPPER", .decode.addr = A_ALARM_SUPPLY5_UPPER,
371 },{ .name = "ALARM_SUPPLY6_UPPER", .decode.addr = A_ALARM_SUPPLY6_UPPER,
372 },{ .name = "ALARM_SUPPLY3_LOWER", .decode.addr = A_ALARM_SUPPLY3_LOWER,
373 },{ .name = "ALARM_SUPPLY4_LOWER", .decode.addr = A_ALARM_SUPPLY4_LOWER,
374 },{ .name = "ALARM_SUPPLY5_LOWER", .decode.addr = A_ALARM_SUPPLY5_LOWER,
375 },{ .name = "ALARM_SUPPLY6_LOWER", .decode.addr = A_ALARM_SUPPLY6_LOWER,
376 },{ .name = "ALARM_SUPPLY7_UPPER", .decode.addr = A_ALARM_SUPPLY7_UPPER,
377 },{ .name = "ALARM_SUPPLY8_UPPER", .decode.addr = A_ALARM_SUPPLY8_UPPER,
378 },{ .name = "ALARM_SUPPLY9_UPPER", .decode.addr = A_ALARM_SUPPLY9_UPPER,
379 },{ .name = "ALARM_SUPPLY10_UPPER", .decode.addr = A_ALARM_SUPPLY10_UPPER,
380 },{ .name = "ALARM_VCCAMS_UPPER", .decode.addr = A_ALARM_VCCAMS_UPPER,
381 },{ .name = "ALARM_TREMOTE_UPPER", .decode.addr = A_ALARM_TREMOTE_UPPER,
382 },{ .name = "ALARM_SUPPLY7_LOWER", .decode.addr = A_ALARM_SUPPLY7_LOWER,
383 },{ .name = "ALARM_SUPPLY8_LOWER", .decode.addr = A_ALARM_SUPPLY8_LOWER,
384 },{ .name = "ALARM_SUPPLY9_LOWER", .decode.addr = A_ALARM_SUPPLY9_LOWER,
385 },{ .name = "ALARM_SUPPLY10_LOWER", .decode.addr = A_ALARM_SUPPLY10_LOWER,
386 },{ .name = "ALARM_VCCAMS_LOWER", .decode.addr = A_ALARM_VCCAMS_LOWER,
387 },{ .name = "ALARM_TREMOTE_LOWER", .decode.addr = A_ALARM_TREMOTE_LOWER,
388 },{ .name = "SEQ_INPUT_MODE2", .decode.addr = A_SEQ_INPUT_MODE2,
389 },{ .name = "SEQ_ACQ2", .decode.addr = A_SEQ_ACQ2,
390 },{ .name = "SUPPLY7", .decode.addr = A_SUPPLY7,
391 .ro = 0xffff,
392 },{ .name = "SUPPLY8", .decode.addr = A_SUPPLY8,
393 .ro = 0xffff,
394 },{ .name = "SUPPLY9", .decode.addr = A_SUPPLY9,
395 .ro = 0xffff,
396 },{ .name = "SUPPLY10", .decode.addr = A_SUPPLY10,
397 .ro = 0xffff,
398 },{ .name = "VCCAMS", .decode.addr = A_VCCAMS,
399 .ro = 0xffff,
400 },{ .name = "TEMPERATURE_REMOTE", .decode.addr = A_TEMPERATURE_REMOTE,
401 .ro = 0xffff,
402 },{ .name = "MAX_SUPPLY7", .decode.addr = A_MAX_SUPPLY7,
403 .ro = 0xffff,
404 },{ .name = "MAX_SUPPLY8", .decode.addr = A_MAX_SUPPLY8,
405 .ro = 0xffff,
406 },{ .name = "MAX_SUPPLY9", .decode.addr = A_MAX_SUPPLY9,
407 .ro = 0xffff,
408 },{ .name = "MAX_SUPPLY10", .decode.addr = A_MAX_SUPPLY10,
409 .ro = 0xffff,
410 },{ .name = "MAX_VCCAMS", .decode.addr = A_MAX_VCCAMS,
411 .ro = 0xffff,
412 },{ .name = "MAX_TEMPERATURE_REMOTE",
413 .decode.addr = A_MAX_TEMPERATURE_REMOTE,
414 .ro = 0xffff,
415 },{ .name = "MIN_SUPPLY7", .decode.addr = A_MIN_SUPPLY7,
416 .reset = 0xffff,
417 .ro = 0xffff,
418 },{ .name = "MIN_SUPPLY8", .decode.addr = A_MIN_SUPPLY8,
419 .reset = 0xffff,
420 .ro = 0xffff,
421 },{ .name = "MIN_SUPPLY9", .decode.addr = A_MIN_SUPPLY9,
422 .reset = 0xffff,
423 .ro = 0xffff,
424 },{ .name = "MIN_SUPPLY10", .decode.addr = A_MIN_SUPPLY10,
425 .reset = 0xffff,
426 .ro = 0xffff,
427 },{ .name = "MIN_VCCAMS", .decode.addr = A_MIN_VCCAMS,
428 .reset = 0xffff,
429 .ro = 0xffff,
430 },{ .name = "MIN_TEMPERATURE_REMOTE",
431 .decode.addr = A_MIN_TEMPERATURE_REMOTE,
432 .reset = 0xffff,
433 .ro = 0xffff,
434 }
435};
436
437static void sysmon_reset(DeviceState *dev)
438{
439 SYSMON *s = XILINX_SYSMON(dev);
440 unsigned int i;
441
442 for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
443 dep_register_reset(&s->regs_info[i]);
444 }
445
446}
447
448static uint64_t sysmon_read(void *opaque, hwaddr addr, unsigned size)
449{
450 SYSMON *s = XILINX_SYSMON(opaque);
451 DepRegisterInfo *r = &s->regs_info[addr / 4];
452
453 if (!r->data) {
454 qemu_log_mask(LOG_GUEST_ERROR,
455 "%s: Decode error: read from %" HWADDR_PRIx "\n",
456 object_get_canonical_path(OBJECT(s)),
457 addr);
458 return 0;
459 }
460 return dep_register_read(r);
461}
462
463static void sysmon_write(void *opaque, hwaddr addr, uint64_t value,
464 unsigned size)
465{
466 SYSMON *s = XILINX_SYSMON(opaque);
467 DepRegisterInfo *r = &s->regs_info[addr / 4];
468
469 if (!r->data) {
470 qemu_log_mask(LOG_GUEST_ERROR,
471 "%s: Decode error: write to %" HWADDR_PRIx "=%" PRIx64 "\n",
472 object_get_canonical_path(OBJECT(s)),
473 addr, value);
474 return;
475 }
476 dep_register_write(r, value, ~0);
477}
478
479static const MemoryRegionOps sysmon_ops = {
480 .read = sysmon_read,
481 .write = sysmon_write,
482 .endianness = DEVICE_LITTLE_ENDIAN,
483 .valid = {
484 .min_access_size = 4,
485 .max_access_size = 4,
486 },
487};
488
489static void sysmon_realize(DeviceState *dev, Error **errp)
490{
491 SYSMON *s = XILINX_SYSMON(dev);
492 const char *prefix = object_get_canonical_path(OBJECT(dev));
493 unsigned int i;
494
495 for (i = 0; i < ARRAY_SIZE(sysmon_regs_info); ++i) {
496 DepRegisterInfo *r = &s->regs_info[sysmon_regs_info[i].decode.addr / 4];
497
498 *r = (DepRegisterInfo) {
499 .data = (uint8_t *)&s->regs[
500 sysmon_regs_info[i].decode.addr / 4],
501 .data_size = sizeof(uint32_t),
502 .access = &sysmon_regs_info[i],
503 .debug = XILINX_SYSMON_ERR_DEBUG,
504 .prefix = prefix,
505 .opaque = s,
506 };
507 }
508}
509
510static void sysmon_init(Object *obj)
511{
512 SYSMON *s = XILINX_SYSMON(obj);
513 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
514
515 memory_region_init_io(&s->iomem, obj, &sysmon_ops, s,
516 TYPE_XILINX_SYSMON, R_MAX * 4);
517 sysbus_init_mmio(sbd, &s->iomem);
518}
519
520static const VMStateDescription vmstate_sysmon = {
521 .name = TYPE_XILINX_SYSMON,
522 .version_id = 1,
523 .minimum_version_id = 1,
524 .minimum_version_id_old = 1,
525 .fields = (VMStateField[]) {
526 VMSTATE_UINT32_ARRAY(regs, SYSMON, R_MAX),
527 VMSTATE_END_OF_LIST(),
528 }
529};
530
531static void sysmon_class_init(ObjectClass *klass, void *data)
532{
533 DeviceClass *dc = DEVICE_CLASS(klass);
534
535 dc->reset = sysmon_reset;
536 dc->realize = sysmon_realize;
537 dc->vmsd = &vmstate_sysmon;
538}
539
540static const TypeInfo sysmon_info = {
541 .name = TYPE_XILINX_SYSMON,
542 .parent = TYPE_SYS_BUS_DEVICE,
543 .instance_size = sizeof(SYSMON),
544 .class_init = sysmon_class_init,
545 .instance_init = sysmon_init,
546};
547
548static void sysmon_register_types(void)
549{
550 type_register_static(&sysmon_info);
551}
552
553type_init(sysmon_register_types)
554
