LXR qemu/include/exec/translator.h

   1/*
   2 * Generic intermediate code generation.
   3 *
   4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
   5 *
   6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7 * See the COPYING file in the top-level directory.
   8 */
   9
  10#ifndef EXEC__TRANSLATOR_H
  11#define EXEC__TRANSLATOR_H
  12
  13/*
  14 * Include this header from a target-specific file, and add a
  15 *
  16 *     DisasContextBase base;
  17 *
  18 * member in your target-specific DisasContext.
  19 */
  20
  21
  22#include "exec/exec-all.h"
  23#include "tcg/tcg.h"
  24
  25
  26/**
  27 * DisasJumpType:
  28 * @DISAS_NEXT: Next instruction in program order.
  29 * @DISAS_TOO_MANY: Too many instructions translated.
  30 * @DISAS_NORETURN: Following code is dead.
  31 * @DISAS_TARGET_*: Start of target-specific conditions.
  32 *
  33 * What instruction to disassemble next.
  34 */
  35typedef enum DisasJumpType {
  36    DISAS_NEXT,
  37    DISAS_TOO_MANY,
  38    DISAS_NORETURN,
  39    DISAS_TARGET_0,
  40    DISAS_TARGET_1,
  41    DISAS_TARGET_2,
  42    DISAS_TARGET_3,
  43    DISAS_TARGET_4,
  44    DISAS_TARGET_5,
  45    DISAS_TARGET_6,
  46    DISAS_TARGET_7,
  47    DISAS_TARGET_8,
  48    DISAS_TARGET_9,
  49    DISAS_TARGET_10,
  50    DISAS_TARGET_11,
  51} DisasJumpType;
  52
  53/**
  54 * DisasContextBase:
  55 * @tb: Translation block for this disassembly.
  56 * @pc_first: Address of first guest instruction in this TB.
  57 * @pc_next: Address of next guest instruction in this TB (current during
  58 *           disassembly).
  59 * @is_jmp: What instruction to disassemble next.
  60 * @num_insns: Number of translated instructions (including current).
  61 * @singlestep_enabled: "Hardware" single stepping enabled.
  62 *
  63 * Architecture-agnostic disassembly context.
  64 */
  65typedef struct DisasContextBase {
  66    TranslationBlock *tb;
  67    target_ulong pc_first;
  68    target_ulong pc_next;
  69    DisasJumpType is_jmp;
  70    unsigned int num_insns;
  71    bool singlestep_enabled;
  72} DisasContextBase;
  73
  74/**
  75 * TranslatorOps:
  76 * @init_disas_context:
  77 *      Initialize the target-specific portions of DisasContext struct.
  78 *      The generic DisasContextBase has already been initialized.
  79 *      Return max_insns, modified as necessary by db->tb->flags.
  80 *
  81 * @tb_start:
  82 *      Emit any code required before the start of the main loop,
  83 *      after the generic gen_tb_start().
  84 *
  85 * @insn_start:
  86 *      Emit the tcg_gen_insn_start opcode.
  87 *
  88 * @breakpoint_check:
  89 *      When called, the breakpoint has already been checked to match the PC,
  90 *      but the target may decide the breakpoint missed the address
  91 *      (e.g., due to conditions encoded in their flags).  Return true to
  92 *      indicate that the breakpoint did hit, in which case no more breakpoints
  93 *      are checked.  If the breakpoint did hit, emit any code required to
  94 *      signal the exception, and set db->is_jmp as necessary to terminate
  95 *      the main loop.
  96 *
  97 * @translate_insn:
  98 *      Disassemble one instruction and set db->pc_next for the start
  99 *      of the following instruction.  Set db->is_jmp as necessary to
 100 *      terminate the main loop.
 101 *
 102 * @tb_stop:
 103 *      Emit any opcodes required to exit the TB, based on db->is_jmp.
 104 *
 105 * @disas_log:
 106 *      Print instruction disassembly to log.
 107 */
 108typedef struct TranslatorOps {
 109    int (*init_disas_context)(DisasContextBase *db, CPUState *cpu,
 110                              int max_insns);
 111    void (*tb_start)(DisasContextBase *db, CPUState *cpu);
 112    void (*insn_start)(DisasContextBase *db, CPUState *cpu);
 113    bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu,
 114                             const CPUBreakpoint *bp);
 115    void (*translate_insn)(DisasContextBase *db, CPUState *cpu);
 116    void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
 117    void (*disas_log)(const DisasContextBase *db, CPUState *cpu);
 118} TranslatorOps;
 119
 120/**
 121 * translator_loop:
 122 * @ops: Target-specific operations.
 123 * @db: Disassembly context.
 124 * @cpu: Target vCPU.
 125 * @tb: Translation block.
 126 *
 127 * Generic translator loop.
 128 *
 129 * Translation will stop in the following cases (in order):
 130 * - When is_jmp set by #TranslatorOps::breakpoint_check.
 131 *   - set to DISAS_TOO_MANY exits after translating one more insn
 132 *   - set to any other value than DISAS_NEXT exits immediately.
 133 * - When is_jmp set by #TranslatorOps::translate_insn.
 134 *   - set to any value other than DISAS_NEXT exits immediately.
 135 * - When the TCG operation buffer is full.
 136 * - When single-stepping is enabled (system-wide or on the current vCPU).
 137 * - When too many instructions have been translated.
 138 */
 139void translator_loop(const TranslatorOps *ops, DisasContextBase *db,
 140                     CPUState *cpu, TranslationBlock *tb);
 141
 142void translator_loop_temp_check(DisasContextBase *db);
 143
 144#endif  /* EXEC__TRANSLATOR_H */
 145