1\xD0 \xFE\xED C8(3\xD8xlnx,microblaze&testingmemory@90000000,memory8\x90chosen<console=ttyUL0,115200E/plb@0/serial@84000000cpusWcpu@0]\xB9\xAC\xA0xlnx,microblaze-7.10.dm\x90~\x97\xFF\xFF\xFF\x8F\xA1,cpu\xAE\x90\xBF\x97\xFF\xFF\xFF\xD0\xE2µblaze,7.10.d8\xEF\xB9\xAC\xA0*?Shs~\x89 \x98\xAD\xC5\xDB\xF0/G_ uspartan3adsp\x81\x94 \xA7\xBA\xC9\xD4\xDF\xEA+ Emicroblaze_0Se|\x94\xA7\xBA\xCE\xDD\xF3)AJYhw\x80\x9A\xAA\xBA\xC7\xD8\xEC%5HUhplb@0xlnx,plb-v46-1.03.asimple-bus|ethernet@81000000xlnx,xps-ethernetlite-2.00.a,network\x83\x94\x9F8\x81\xB1 uspartan3adsp\xBD\xCFflash@a0000000\xE1"xlnx,xps-mch-emc-2.00.acfi-flash8\xA0 uspartan3adsp\xEC0Rt\x90\xA6\xB9\xCC \xE3>\x80\xFE -@Zt\x87\xA1\xBB\xCE\xE8/? O _ o\x82\x94\xA7\xB8\xC9\xDA\xEB 0 Gp [:\x98 o:\x98 \x83:\x98 \x97p \xAB:\x98 \xBF:\x98 \xD3:\x98 \xE7a\xA8 \xFBX 2X 3#X 47a\xA8 5KX 6_X 7sX 8\x87\x88 9\x9B 10\xAF 11\xC3 12\xD7p 13\xE9:\x98 14\xFB:\x98 :\x98\xAF\xC81.\xE0C.\xE0U.\xE0gz\x8E\xA1\xB5\xC8\xDC\xEFgpio@81400000xlnx,xps-gpio-1.00.a\x83\x948\x81@%7 uspartan3adspK[r\x80\x90\x9D\xFF\xFF\xFF\xFF\xAE\xFF\xFF\xFF\xFFserial@84000000]\xB9\xAC\xA0xlnx,xps-uartlite-1.00.a\xC1\xC2,serial\x83\x94\xCF8\x84\xDB\xC2\xE9 uspartan3adsp\xF8 debug@84400000xlnx,mdm-1.00.d8\x84@ uspartan3adspS ( : J Xmpmc@90000000xlnx,mpmc-4.03.ainterrupt-controller@81800000 mxlnx,xps-intc-1.00.a ~8\x81\x80 \x93 15 \xA5 \xBAtimer@83c00000xlnx,xps-timer-1.00.a\x83\x948\x83\xC0 \xC8 uspartan3adsp \xD9 \xEA \xFB! #address-cells#size-cellscompatiblemodeldevice_typeregbootargslinux,stdout-path#cpusclock-frequencyd-cache-baseaddrd-cache-highaddrd-cache-line-sized-cache-sizei-cache-baseaddri-cache-highaddri-cache-line-sizei-cache-sizetimebase-frequencyxlnx,addr-tag-bitsxlnx,allow-dcache-wrxlnx,allow-icache-wrxlnx,area-optimizedxlnx,cache-byte-sizexlnx,d-lmbxlnx,d-opbxlnx,d-plbxlnx,data-sizexlnx,dcache-addr-tagxlnx,dcache-always-usedxlnx,dcache-byte-sizexlnx,dcache-line-lenxlnx,dcache-use-fslxlnx,debug-enabledxlnx,div-zero-exceptionxlnx,dopb-bus-exceptionxlnx,dynamic-bus-sizingxlnx,edge-is-positivexlnx,familyxlnx,fpu-exceptionxlnx,fsl-data-sizexlnx,fsl-exceptionxlnx,fsl-linksxlnx,i-lmbxlnx,i-opbxlnx,i-plbxlnx,icache-always-usedxlnx,icache-line-lenxlnx,icache-use-fslxlnx,ill-opcode-exceptionxlnx,instancexlnx,interconnectxlnx,interrupt-is-edgexlnx,iopb-bus-exceptionxlnx,mmu-dtlb-sizexlnx,mmu-itlb-sizexlnx,mmu-tlb-accessxlnx,mmu-zonesxlnx,number-of-pc-brkxlnx,number-of-rd-addr-brkxlnx,number-of-wr-addr-brkxlnx,opcode-0x0-illegalxlnx,pvrxlnx,pvr-user1xlnx,pvr-user2xlnx,reset-msrxlnx,scoxlnx,unaligned-exceptionsxlnx,use-barrelxlnx,use-dcachexlnx,use-divxlnx,use-ext-brkxlnx,use-ext-nm-brkxlnx,use-extended-fsl-instrxlnx,use-fpuxlnx,use-hw-mulxlnx,use-icachexlnx,use-interruptxlnx,use-mmuxlnx,use-msr-instrxlnx,use-pcmp-instrrangesinterrupt-parentinterruptslocal-mac-addressxlnx,duplexxlnx,rx-ping-pongxlnx,tx-ping-pongbank-widthxlnx,include-datawidth-matching-0xlnx,include-datawidth-matching-1xlnx,include-datawidth-matching-2xlnx,include-datawidth-matching-3xlnx,include-negedge-ioregsxlnx,include-plb-ipifxlnx,include-wrbufxlnx,max-mem-widthxlnx,mch-native-dwidthxlnx,mch-plb-clk-period-psxlnx,mch-splb-awidthxlnx,mch0-accessbuf-depthxlnx,mch0-protocolxlnx,mch0-rddatabuf-depthxlnx,mch1-accessbuf-depthxlnx,mch1-protocolxlnx,mch1-rddatabuf-depthxlnx,mch2-accessbuf-depthxlnx,mch2-protocolxlnx,mch2-rddatabuf-depthxlnx,mch3-accessbuf-depthxlnx,mch3-protocolxlnx,mch3-rddatabuf-depthxlnx,mem0-widthxlnx,mem1-widthxlnx,mem2-widthxlnx,mem3-widthxlnx,num-banks-memxlnx,num-channelsxlnx,priority-modexlnx,synch-mem-0xlnx,synch-mem-1xlnx,synch-mem-2xlnx,synch-mem-3xlnx,synch-pipedelay-0xlnx,synch-pipedelay-1xlnx,synch-pipedelay-2xlnx,synch-pipedelay-3xlnx,tavdv-ps-mem-0xlnx,tavdv-ps-mem-1xlnx,tavdv-ps-mem-2xlnx,tavdv-ps-mem-3xlnx,tcedv-ps-mem-0xlnx,tcedv-ps-mem-1xlnx,tcedv-ps-mem-2xlnx,tcedv-ps-mem-3xlnx,thzce-ps-mem-0xlnx,thzce-ps-mem-1xlnx,thzce-ps-mem-2xlnx,thzce-ps-mem-3xlnx,thzoe-ps-mem-0xlnx,thzoe-ps-mem-1xlnx,thzoe-ps-mem-2xlnx,thzoe-ps-mem-3xlnx,tlzwe-ps-mem-0xlnx,tlzwe-ps-mem-1xlnx,tlzwe-ps-mem-2xlnx,tlzwe-ps-mem-3xlnx,twc-ps-mem-0xlnx,twc-ps-mem-1xlnx,twc-ps-mem-2xlnx,twc-ps-mem-3xlnx,twp-ps-mem-0xlnx,twp-ps-mem-1xlnx,twp-ps-mem-2xlnx,twp-ps-mem-3xlnx,xcl0-linesizexlnx,xcl0-writexferxlnx,xcl1-linesizexlnx,xcl1-writexferxlnx,xcl2-linesizexlnx,xcl2-writexferxlnx,xcl3-linesizexlnx,xcl3-writexferxlnx,all-inputsxlnx,all-inputs-2xlnx,dout-defaultxlnx,dout-default-2xlnx,gpio-widthxlnx,interrupt-presentxlnx,is-bidirxlnx,is-bidir-2xlnx,is-dualxlnx,tri-defaultxlnx,tri-default-2current-speedport-numberxlnx,baudratexlnx,data-bitsxlnx,odd-parityxlnx,use-parityxlnx,jtag-chainxlnx,mb-dbg-portsxlnx,uart-widthxlnx,use-uartxlnx,write-fsl-ports#interrupt-cellsinterrupt-controllerxlnx,kind-of-intrxlnx,num-intr-inputslinux,phandlexlnx,count-widthxlnx,gen0-assertxlnx,gen1-assertxlnx,one-timer-onlyxlnx,trig0-assertxlnx,trig1-assert