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25#ifndef PPC_TCG_TARGET_H
26#define PPC_TCG_TARGET_H
27
28#ifdef _ARCH_PPC64
29# define TCG_TARGET_REG_BITS 64
30#else
31# define TCG_TARGET_REG_BITS 32
32#endif
33
34#define TCG_TARGET_NB_REGS 64
35#define TCG_TARGET_INSN_UNIT_SIZE 4
36#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
37
38typedef enum {
39 TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3,
40 TCG_REG_R4, TCG_REG_R5, TCG_REG_R6, TCG_REG_R7,
41 TCG_REG_R8, TCG_REG_R9, TCG_REG_R10, TCG_REG_R11,
42 TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, TCG_REG_R15,
43 TCG_REG_R16, TCG_REG_R17, TCG_REG_R18, TCG_REG_R19,
44 TCG_REG_R20, TCG_REG_R21, TCG_REG_R22, TCG_REG_R23,
45 TCG_REG_R24, TCG_REG_R25, TCG_REG_R26, TCG_REG_R27,
46 TCG_REG_R28, TCG_REG_R29, TCG_REG_R30, TCG_REG_R31,
47
48 TCG_REG_V0, TCG_REG_V1, TCG_REG_V2, TCG_REG_V3,
49 TCG_REG_V4, TCG_REG_V5, TCG_REG_V6, TCG_REG_V7,
50 TCG_REG_V8, TCG_REG_V9, TCG_REG_V10, TCG_REG_V11,
51 TCG_REG_V12, TCG_REG_V13, TCG_REG_V14, TCG_REG_V15,
52 TCG_REG_V16, TCG_REG_V17, TCG_REG_V18, TCG_REG_V19,
53 TCG_REG_V20, TCG_REG_V21, TCG_REG_V22, TCG_REG_V23,
54 TCG_REG_V24, TCG_REG_V25, TCG_REG_V26, TCG_REG_V27,
55 TCG_REG_V28, TCG_REG_V29, TCG_REG_V30, TCG_REG_V31,
56
57 TCG_REG_CALL_STACK = TCG_REG_R1,
58 TCG_AREG0 = TCG_REG_R27
59} TCGReg;
60
61typedef enum {
62 tcg_isa_base,
63 tcg_isa_2_06,
64 tcg_isa_2_07,
65 tcg_isa_3_00,
66} TCGPowerISA;
67
68extern TCGPowerISA have_isa;
69extern bool have_altivec;
70extern bool have_vsx;
71
72#define have_isa_2_06 (have_isa >= tcg_isa_2_06)
73#define have_isa_2_07 (have_isa >= tcg_isa_2_07)
74#define have_isa_3_00 (have_isa >= tcg_isa_3_00)
75
76
77#define TCG_TARGET_HAS_ext8u_i32 0
78#define TCG_TARGET_HAS_ext16u_i32 0
79
80
81#define TCG_TARGET_HAS_div_i32 1
82#define TCG_TARGET_HAS_rem_i32 0
83#define TCG_TARGET_HAS_rot_i32 1
84#define TCG_TARGET_HAS_ext8s_i32 1
85#define TCG_TARGET_HAS_ext16s_i32 1
86#define TCG_TARGET_HAS_bswap16_i32 1
87#define TCG_TARGET_HAS_bswap32_i32 1
88#define TCG_TARGET_HAS_not_i32 1
89#define TCG_TARGET_HAS_neg_i32 1
90#define TCG_TARGET_HAS_andc_i32 1
91#define TCG_TARGET_HAS_orc_i32 1
92#define TCG_TARGET_HAS_eqv_i32 1
93#define TCG_TARGET_HAS_nand_i32 1
94#define TCG_TARGET_HAS_nor_i32 1
95#define TCG_TARGET_HAS_clz_i32 1
96#define TCG_TARGET_HAS_ctz_i32 have_isa_3_00
97#define TCG_TARGET_HAS_ctpop_i32 have_isa_2_06
98#define TCG_TARGET_HAS_deposit_i32 1
99#define TCG_TARGET_HAS_extract_i32 1
100#define TCG_TARGET_HAS_sextract_i32 0
101#define TCG_TARGET_HAS_extract2_i32 0
102#define TCG_TARGET_HAS_movcond_i32 1
103#define TCG_TARGET_HAS_mulu2_i32 0
104#define TCG_TARGET_HAS_muls2_i32 0
105#define TCG_TARGET_HAS_muluh_i32 1
106#define TCG_TARGET_HAS_mulsh_i32 1
107#define TCG_TARGET_HAS_goto_ptr 1
108#define TCG_TARGET_HAS_direct_jump 1
109
110#if TCG_TARGET_REG_BITS == 64
111#define TCG_TARGET_HAS_add2_i32 0
112#define TCG_TARGET_HAS_sub2_i32 0
113#define TCG_TARGET_HAS_extrl_i64_i32 0
114#define TCG_TARGET_HAS_extrh_i64_i32 0
115#define TCG_TARGET_HAS_div_i64 1
116#define TCG_TARGET_HAS_rem_i64 0
117#define TCG_TARGET_HAS_rot_i64 1
118#define TCG_TARGET_HAS_ext8s_i64 1
119#define TCG_TARGET_HAS_ext16s_i64 1
120#define TCG_TARGET_HAS_ext32s_i64 1
121#define TCG_TARGET_HAS_ext8u_i64 0
122#define TCG_TARGET_HAS_ext16u_i64 0
123#define TCG_TARGET_HAS_ext32u_i64 0
124#define TCG_TARGET_HAS_bswap16_i64 1
125#define TCG_TARGET_HAS_bswap32_i64 1
126#define TCG_TARGET_HAS_bswap64_i64 1
127#define TCG_TARGET_HAS_not_i64 1
128#define TCG_TARGET_HAS_neg_i64 1
129#define TCG_TARGET_HAS_andc_i64 1
130#define TCG_TARGET_HAS_orc_i64 1
131#define TCG_TARGET_HAS_eqv_i64 1
132#define TCG_TARGET_HAS_nand_i64 1
133#define TCG_TARGET_HAS_nor_i64 1
134#define TCG_TARGET_HAS_clz_i64 1
135#define TCG_TARGET_HAS_ctz_i64 have_isa_3_00
136#define TCG_TARGET_HAS_ctpop_i64 have_isa_2_06
137#define TCG_TARGET_HAS_deposit_i64 1
138#define TCG_TARGET_HAS_extract_i64 1
139#define TCG_TARGET_HAS_sextract_i64 0
140#define TCG_TARGET_HAS_extract2_i64 0
141#define TCG_TARGET_HAS_movcond_i64 1
142#define TCG_TARGET_HAS_add2_i64 1
143#define TCG_TARGET_HAS_sub2_i64 1
144#define TCG_TARGET_HAS_mulu2_i64 0
145#define TCG_TARGET_HAS_muls2_i64 0
146#define TCG_TARGET_HAS_muluh_i64 1
147#define TCG_TARGET_HAS_mulsh_i64 1
148#endif
149
150
151
152
153
154
155#define TCG_TARGET_HAS_v64 have_vsx
156#define TCG_TARGET_HAS_v128 have_altivec
157#define TCG_TARGET_HAS_v256 0
158
159#define TCG_TARGET_HAS_andc_vec 1
160#define TCG_TARGET_HAS_orc_vec have_isa_2_07
161#define TCG_TARGET_HAS_not_vec 1
162#define TCG_TARGET_HAS_neg_vec have_isa_3_00
163#define TCG_TARGET_HAS_abs_vec 0
164#define TCG_TARGET_HAS_roti_vec 0
165#define TCG_TARGET_HAS_rots_vec 0
166#define TCG_TARGET_HAS_rotv_vec 1
167#define TCG_TARGET_HAS_shi_vec 0
168#define TCG_TARGET_HAS_shs_vec 0
169#define TCG_TARGET_HAS_shv_vec 1
170#define TCG_TARGET_HAS_cmp_vec 1
171#define TCG_TARGET_HAS_mul_vec 1
172#define TCG_TARGET_HAS_sat_vec 1
173#define TCG_TARGET_HAS_minmax_vec 1
174#define TCG_TARGET_HAS_bitsel_vec have_vsx
175#define TCG_TARGET_HAS_cmpsel_vec 0
176
177void flush_icache_range(uintptr_t start, uintptr_t stop);
178void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t);
179
180#define TCG_TARGET_DEFAULT_MO (0)
181#define TCG_TARGET_HAS_MEMORY_BSWAP 1
182
183#ifdef CONFIG_SOFTMMU
184#define TCG_TARGET_NEED_LDST_LABELS
185#endif
186#define TCG_TARGET_NEED_POOL_LABELS
187
188#endif
189