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15#include "qemu/osdep.h"
16#include "qapi/error.h"
17#include "cpu.h"
18#include "migration/vmstate.h"
19#include "exec/exec-all.h"
20
21static void uc32_cpu_set_pc(CPUState *cs, vaddr value)
22{
23 UniCore32CPU *cpu = UNICORE32_CPU(cs);
24
25 cpu->env.regs[31] = value;
26}
27
28static bool uc32_cpu_has_work(CPUState *cs)
29{
30 return cs->interrupt_request &
31 (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
32}
33
34static inline void set_feature(CPUUniCore32State *env, int feature)
35{
36 env->features |= feature;
37}
38
39
40
41static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
42{
43 ObjectClass *oc;
44 char *typename;
45
46 typename = g_strdup_printf(UNICORE32_CPU_TYPE_NAME("%s"), cpu_model);
47 oc = object_class_by_name(typename);
48 g_free(typename);
49 if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
50 object_class_is_abstract(oc))) {
51 oc = NULL;
52 }
53 return oc;
54}
55
56static void unicore_ii_cpu_initfn(Object *obj)
57{
58 UniCore32CPU *cpu = UNICORE32_CPU(obj);
59 CPUUniCore32State *env = &cpu->env;
60
61 env->cp0.c0_cpuid = 0x4d000863;
62 env->cp0.c0_cachetype = 0x0d152152;
63 env->cp0.c1_sys = 0x2000;
64 env->cp0.c2_base = 0x0;
65 env->cp0.c3_faultstatus = 0x0;
66 env->cp0.c4_faultaddr = 0x0;
67 env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
68
69 set_feature(env, UC32_HWCAP_CMOV);
70 set_feature(env, UC32_HWCAP_UCF64);
71}
72
73static void uc32_any_cpu_initfn(Object *obj)
74{
75 UniCore32CPU *cpu = UNICORE32_CPU(obj);
76 CPUUniCore32State *env = &cpu->env;
77
78 env->cp0.c0_cpuid = 0xffffffff;
79 env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
80
81 set_feature(env, UC32_HWCAP_CMOV);
82 set_feature(env, UC32_HWCAP_UCF64);
83}
84
85static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
86{
87 CPUState *cs = CPU(dev);
88 UniCore32CPUClass *ucc = UNICORE32_CPU_GET_CLASS(dev);
89 Error *local_err = NULL;
90
91 cpu_exec_realizefn(cs, &local_err);
92 if (local_err != NULL) {
93 error_propagate(errp, local_err);
94 return;
95 }
96
97 qemu_init_vcpu(cs);
98
99 ucc->parent_realize(dev, errp);
100}
101
102static void uc32_cpu_initfn(Object *obj)
103{
104 UniCore32CPU *cpu = UNICORE32_CPU(obj);
105 CPUUniCore32State *env = &cpu->env;
106
107 cpu_set_cpustate_pointers(cpu);
108
109#ifdef CONFIG_USER_ONLY
110 env->uncached_asr = ASR_MODE_USER;
111 env->regs[31] = 0;
112#else
113 env->uncached_asr = ASR_MODE_PRIV;
114 env->regs[31] = 0x03000000;
115#endif
116}
117
118static const VMStateDescription vmstate_uc32_cpu = {
119 .name = "cpu",
120 .unmigratable = 1,
121};
122
123static void uc32_cpu_class_init(ObjectClass *oc, void *data)
124{
125 DeviceClass *dc = DEVICE_CLASS(oc);
126 CPUClass *cc = CPU_CLASS(oc);
127 UniCore32CPUClass *ucc = UNICORE32_CPU_CLASS(oc);
128
129 device_class_set_parent_realize(dc, uc32_cpu_realizefn,
130 &ucc->parent_realize);
131
132 cc->class_by_name = uc32_cpu_class_by_name;
133 cc->has_work = uc32_cpu_has_work;
134 cc->do_interrupt = uc32_cpu_do_interrupt;
135 cc->cpu_exec_interrupt = uc32_cpu_exec_interrupt;
136 cc->dump_state = uc32_cpu_dump_state;
137 cc->set_pc = uc32_cpu_set_pc;
138 cc->tlb_fill = uc32_cpu_tlb_fill;
139 cc->get_phys_page_debug = uc32_cpu_get_phys_page_debug;
140 cc->tcg_initialize = uc32_translate_init;
141 dc->vmsd = &vmstate_uc32_cpu;
142}
143
144#define DEFINE_UNICORE32_CPU_TYPE(cpu_model, initfn) \
145 { \
146 .parent = TYPE_UNICORE32_CPU, \
147 .instance_init = initfn, \
148 .name = UNICORE32_CPU_TYPE_NAME(cpu_model), \
149 }
150
151static const TypeInfo uc32_cpu_type_infos[] = {
152 {
153 .name = TYPE_UNICORE32_CPU,
154 .parent = TYPE_CPU,
155 .instance_size = sizeof(UniCore32CPU),
156 .instance_init = uc32_cpu_initfn,
157 .abstract = true,
158 .class_size = sizeof(UniCore32CPUClass),
159 .class_init = uc32_cpu_class_init,
160 },
161 DEFINE_UNICORE32_CPU_TYPE("UniCore-II", unicore_ii_cpu_initfn),
162 DEFINE_UNICORE32_CPU_TYPE("any", uc32_any_cpu_initfn),
163};
164
165DEFINE_TYPES(uc32_cpu_type_infos)
166