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26#include "qemu/osdep.h"
27#include "qapi/error.h"
28#include "hw/ide.h"
29#include "hw/pci/pci.h"
30#include "hw/irq.h"
31#include "hw/xen/xen_common.h"
32#include "migration/vmstate.h"
33#include "hw/xen/xen-legacy-backend.h"
34#include "trace.h"
35#include "exec/address-spaces.h"
36#include "sysemu/xen.h"
37#include "sysemu/block-backend.h"
38#include "qemu/error-report.h"
39#include "qemu/module.h"
40
41#include <xenguest.h>
42
43
44
45#ifdef DEBUG_PLATFORM
46#define DPRINTF(fmt, ...) do { \
47 fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
48} while (0)
49#else
50#define DPRINTF(fmt, ...) do { } while (0)
51#endif
52
53#define PFFLAG_ROM_LOCK 1
54
55typedef struct PCIXenPlatformState {
56
57 PCIDevice parent_obj;
58
59
60 MemoryRegion fixed_io;
61 MemoryRegion bar;
62 MemoryRegion mmio_bar;
63 uint8_t flags;
64 int drivers_blacklisted;
65 uint16_t driver_product_version;
66
67
68 char log_buffer[4096];
69 int log_buffer_off;
70} PCIXenPlatformState;
71
72#define TYPE_XEN_PLATFORM "xen-platform"
73#define XEN_PLATFORM(obj) \
74 OBJECT_CHECK(PCIXenPlatformState, (obj), TYPE_XEN_PLATFORM)
75
76#define XEN_PLATFORM_IOPORT 0x10
77
78
79static void log_writeb(PCIXenPlatformState *s, char val)
80{
81 if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
82
83 s->log_buffer[s->log_buffer_off] = 0;
84 trace_xen_platform_log(s->log_buffer);
85 s->log_buffer_off = 0;
86 } else {
87 s->log_buffer[s->log_buffer_off++] = val;
88 }
89}
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104#define _UNPLUG_IDE_SCSI_DISKS 0
105#define UNPLUG_IDE_SCSI_DISKS (1u << _UNPLUG_IDE_SCSI_DISKS)
106
107#define _UNPLUG_ALL_NICS 1
108#define UNPLUG_ALL_NICS (1u << _UNPLUG_ALL_NICS)
109
110#define _UNPLUG_AUX_IDE_DISKS 2
111#define UNPLUG_AUX_IDE_DISKS (1u << _UNPLUG_AUX_IDE_DISKS)
112
113#define _UNPLUG_NVME_DISKS 3
114#define UNPLUG_NVME_DISKS (1u << _UNPLUG_NVME_DISKS)
115
116static void unplug_nic(PCIBus *b, PCIDevice *d, void *o)
117{
118
119 if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
120 PCI_CLASS_NETWORK_ETHERNET
121 && strcmp(d->name, "xen-pci-passthrough") != 0) {
122 object_unparent(OBJECT(d));
123 }
124}
125
126
127static void del_nic_peer(NICState *nic, void *opaque)
128{
129 NetClientState *nc;
130
131 nc = qemu_get_queue(nic);
132 if (nc->peer)
133 qemu_del_net_client(nc->peer);
134}
135
136static void pci_unplug_nics(PCIBus *bus)
137{
138 qemu_foreach_nic(del_nic_peer, NULL);
139 pci_for_each_device(bus, 0, unplug_nic, NULL);
140}
141
142static void unplug_disks(PCIBus *b, PCIDevice *d, void *opaque)
143{
144 uint32_t flags = *(uint32_t *)opaque;
145 bool aux = (flags & UNPLUG_AUX_IDE_DISKS) &&
146 !(flags & UNPLUG_IDE_SCSI_DISKS);
147
148
149 if (!strcmp(d->name, "xen-pci-passthrough")) {
150 return;
151 }
152
153 switch (pci_get_word(d->config + PCI_CLASS_DEVICE)) {
154 case PCI_CLASS_STORAGE_IDE:
155 pci_piix3_xen_ide_unplug(DEVICE(d), aux);
156 break;
157
158 case PCI_CLASS_STORAGE_SCSI:
159 if (!aux) {
160 object_unparent(OBJECT(d));
161 }
162 break;
163
164 case PCI_CLASS_STORAGE_EXPRESS:
165 if (flags & UNPLUG_NVME_DISKS) {
166 object_unparent(OBJECT(d));
167 }
168
169 default:
170 break;
171 }
172}
173
174static void pci_unplug_disks(PCIBus *bus, uint32_t flags)
175{
176 pci_for_each_device(bus, 0, unplug_disks, &flags);
177}
178
179static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
180{
181 PCIXenPlatformState *s = opaque;
182
183 switch (addr) {
184 case 0: {
185 PCIDevice *pci_dev = PCI_DEVICE(s);
186
187 if (val & (UNPLUG_IDE_SCSI_DISKS | UNPLUG_AUX_IDE_DISKS |
188 UNPLUG_NVME_DISKS)) {
189 DPRINTF("unplug disks\n");
190 pci_unplug_disks(pci_get_bus(pci_dev), val);
191 }
192 if (val & UNPLUG_ALL_NICS) {
193 DPRINTF("unplug nics\n");
194 pci_unplug_nics(pci_get_bus(pci_dev));
195 }
196 break;
197 }
198 case 2:
199 switch (val) {
200 case 1:
201 DPRINTF("Citrix Windows PV drivers loaded in guest\n");
202 break;
203 case 0:
204 DPRINTF("Guest claimed to be running PV product 0?\n");
205 break;
206 default:
207 DPRINTF("Unknown PV product %d loaded in guest\n", val);
208 break;
209 }
210 s->driver_product_version = val;
211 break;
212 }
213}
214
215static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
216 uint32_t val)
217{
218 switch (addr) {
219 case 0:
220
221 break;
222 }
223}
224
225static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
226{
227 PCIXenPlatformState *s = opaque;
228
229 switch (addr) {
230 case 0: {
231 hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
232 HVMMEM_ram_ro : HVMMEM_ram_rw;
233 if (xen_set_mem_type(xen_domid, mem_type, 0xc0, 0x40)) {
234 DPRINTF("unable to change ro/rw state of ROM memory area!\n");
235 } else {
236 s->flags = val & PFFLAG_ROM_LOCK;
237 DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
238 (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
239 }
240 break;
241 }
242 case 2:
243 log_writeb(s, val);
244 break;
245 }
246}
247
248static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
249{
250 PCIXenPlatformState *s = opaque;
251
252 switch (addr) {
253 case 0:
254 if (s->drivers_blacklisted) {
255
256
257 return 0xd249;
258 } else {
259
260 return 0x49d2;
261 }
262 default:
263 return 0xffff;
264 }
265}
266
267static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
268{
269 PCIXenPlatformState *s = opaque;
270
271 switch (addr) {
272 case 0:
273
274 return s->flags;
275 case 2:
276
277 return 1;
278 default:
279 return 0xff;
280 }
281}
282
283static void platform_fixed_ioport_reset(void *opaque)
284{
285 PCIXenPlatformState *s = opaque;
286
287 platform_fixed_ioport_writeb(s, 0, 0);
288}
289
290static uint64_t platform_fixed_ioport_read(void *opaque,
291 hwaddr addr,
292 unsigned size)
293{
294 switch (size) {
295 case 1:
296 return platform_fixed_ioport_readb(opaque, addr);
297 case 2:
298 return platform_fixed_ioport_readw(opaque, addr);
299 default:
300 return -1;
301 }
302}
303
304static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
305
306 uint64_t val, unsigned size)
307{
308 switch (size) {
309 case 1:
310 platform_fixed_ioport_writeb(opaque, addr, val);
311 break;
312 case 2:
313 platform_fixed_ioport_writew(opaque, addr, val);
314 break;
315 case 4:
316 platform_fixed_ioport_writel(opaque, addr, val);
317 break;
318 }
319}
320
321
322static const MemoryRegionOps platform_fixed_io_ops = {
323 .read = platform_fixed_ioport_read,
324 .write = platform_fixed_ioport_write,
325 .valid = {
326 .unaligned = true,
327 },
328 .impl = {
329 .min_access_size = 1,
330 .max_access_size = 4,
331 .unaligned = true,
332 },
333 .endianness = DEVICE_LITTLE_ENDIAN,
334};
335
336static void platform_fixed_ioport_init(PCIXenPlatformState* s)
337{
338 memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
339 "xen-fixed", 16);
340 memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
341 &s->fixed_io);
342}
343
344
345
346static uint64_t xen_platform_ioport_readb(void *opaque, hwaddr addr,
347 unsigned int size)
348{
349 if (addr == 0) {
350 return platform_fixed_ioport_readb(opaque, 0);
351 } else {
352 return ~0u;
353 }
354}
355
356static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
357 uint64_t val, unsigned int size)
358{
359 PCIXenPlatformState *s = opaque;
360 PCIDevice *pci_dev = PCI_DEVICE(s);
361
362 switch (addr) {
363 case 0:
364 platform_fixed_ioport_writeb(opaque, 0, (uint32_t)val);
365 break;
366 case 4:
367 if (val == 1) {
368
369
370
371
372
373
374
375
376 pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS);
377 pci_unplug_nics(pci_get_bus(pci_dev));
378 }
379 break;
380 case 8:
381 switch (val) {
382 case 1:
383 pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS);
384 break;
385 case 2:
386 pci_unplug_nics(pci_get_bus(pci_dev));
387 break;
388 default:
389 log_writeb(s, (uint32_t)val);
390 break;
391 }
392 break;
393 default:
394 break;
395 }
396}
397
398static const MemoryRegionOps xen_pci_io_ops = {
399 .read = xen_platform_ioport_readb,
400 .write = xen_platform_ioport_writeb,
401 .impl.min_access_size = 1,
402 .impl.max_access_size = 1,
403};
404
405static void platform_ioport_bar_setup(PCIXenPlatformState *d)
406{
407 memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
408 "xen-pci", 0x100);
409}
410
411static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
412 unsigned size)
413{
414 DPRINTF("Warning: attempted read from physical address "
415 "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
416
417 return 0;
418}
419
420static void platform_mmio_write(void *opaque, hwaddr addr,
421 uint64_t val, unsigned size)
422{
423 DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
424 "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
425 val, addr);
426}
427
428static const MemoryRegionOps platform_mmio_handler = {
429 .read = &platform_mmio_read,
430 .write = &platform_mmio_write,
431 .endianness = DEVICE_NATIVE_ENDIAN,
432};
433
434static void platform_mmio_setup(PCIXenPlatformState *d)
435{
436 memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
437 "xen-mmio", 0x1000000);
438}
439
440static int xen_platform_post_load(void *opaque, int version_id)
441{
442 PCIXenPlatformState *s = opaque;
443
444 platform_fixed_ioport_writeb(s, 0, s->flags);
445
446 return 0;
447}
448
449static const VMStateDescription vmstate_xen_platform = {
450 .name = "platform",
451 .version_id = 4,
452 .minimum_version_id = 4,
453 .post_load = xen_platform_post_load,
454 .fields = (VMStateField[]) {
455 VMSTATE_PCI_DEVICE(parent_obj, PCIXenPlatformState),
456 VMSTATE_UINT8(flags, PCIXenPlatformState),
457 VMSTATE_END_OF_LIST()
458 }
459};
460
461static void xen_platform_realize(PCIDevice *dev, Error **errp)
462{
463 PCIXenPlatformState *d = XEN_PLATFORM(dev);
464 uint8_t *pci_conf;
465
466
467 if (!xen_enabled()) {
468 error_setg(errp, "xen-platform device requires the Xen accelerator");
469 return;
470 }
471
472 pci_conf = dev->config;
473
474 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
475
476 pci_config_set_prog_interface(pci_conf, 0);
477
478 pci_conf[PCI_INTERRUPT_PIN] = 1;
479
480 platform_ioport_bar_setup(d);
481 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
482
483
484 platform_mmio_setup(d);
485 pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
486 &d->mmio_bar);
487
488 platform_fixed_ioport_init(d);
489}
490
491static void platform_reset(DeviceState *dev)
492{
493 PCIXenPlatformState *s = XEN_PLATFORM(dev);
494
495 platform_fixed_ioport_reset(s);
496}
497
498static void xen_platform_class_init(ObjectClass *klass, void *data)
499{
500 DeviceClass *dc = DEVICE_CLASS(klass);
501 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
502
503 k->realize = xen_platform_realize;
504 k->vendor_id = PCI_VENDOR_ID_XEN;
505 k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
506 k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
507 k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
508 k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
509 k->revision = 1;
510 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
511 dc->desc = "XEN platform pci device";
512 dc->reset = platform_reset;
513 dc->vmsd = &vmstate_xen_platform;
514}
515
516static const TypeInfo xen_platform_info = {
517 .name = TYPE_XEN_PLATFORM,
518 .parent = TYPE_PCI_DEVICE,
519 .instance_size = sizeof(PCIXenPlatformState),
520 .class_init = xen_platform_class_init,
521 .interfaces = (InterfaceInfo[]) {
522 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
523 { },
524 },
525};
526
527static void xen_platform_register_types(void)
528{
529 type_register_static(&xen_platform_info);
530}
531
532type_init(xen_platform_register_types)
533