1/* 2 * QEMU model of Xilinx PUF Syndrome Bits for Versal 3 * 4 * Copyright (c) 2020 Xilinx Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24#ifndef XLNX_VERSAL_PUFHD_H 25#define XLNX_VERSAL_PUFHD_H 26 27#include "qemu/osdep.h" 28#include "exec/address-spaces.h" 29#include "hw/block/xlnx-efuse.h" 30#include "hw/zynqmp_aes_key.h" 31 32typedef struct Versal_PUFHD Versal_PUFHD; /* Opaque */ 33 34typedef struct { /* all fields in cpu endian */ 35 uint32_t aux; 36 uint32_t c_hash; 37 uint32_t puf_id[8]; 38 bool id_only; 39} Versal_PUFExtra; 40 41typedef struct { 42 enum { 43 Versal_PUFRegen_EFUSE, /* helper-data from efuse */ 44 Versal_PUFRegen_MEM, /* helper-data from guest memory */ 45 Versal_PUFRegen_BUF, /* helper-data from host memory */ 46 } source; 47 48 union { 49 struct { 50 XLNXEFuse *dev; 51 uint32_t base_row; 52 } efuse; 53 struct { 54 AddressSpace *as; 55 MemTxAttrs attr; 56 hwaddr addr; 57 } mem; 58 struct { 59 uint32_t *pufhd; 60 unsigned wcnt; 61 } buf; 62 }; 63 64 Versal_PUFExtra info; 65} Versal_PUFRegen; 66 67Versal_PUFHD *versal_pufhd_new(ZynqMPAESKeySink *puf_keysink, bool is_12k); 68bool versal_pufhd_next(Versal_PUFHD *s, uint32_t *word, Versal_PUFExtra *info); 69bool versal_pufhd_regen(Versal_PUFRegen *data, ZynqMPAESKeySink *keysink); 70 71#endif 72