LXR qemu/include/hw/i386/pc.h

   1#ifndef HW_PC_H
   2#define HW_PC_H
   3
   4#include "qemu/notify.h"
   5#include "qapi/qapi-types-common.h"
   6#include "hw/boards.h"
   7#include "hw/block/fdc.h"
   8#include "hw/block/flash.h"
   9#include "hw/i386/x86.h"
  10
  11#include "hw/acpi/acpi_dev_interface.h"
  12#include "hw/hotplug.h"
  13
  14#define HPET_INTCAP "hpet-intcap"
  15
  16/**
  17 * PCMachineState:
  18 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
  19 * @boot_cpus: number of present VCPUs
  20 * @smp_dies: number of dies per one package
  21 */
  22struct PCMachineState {
  23    /*< private >*/
  24    X86MachineState parent_obj;
  25
  26    /* <public> */
  27
  28    /* State for other subsystems/APIs: */
  29    Notifier machine_done;
  30
  31    /* Pointers to devices and objects: */
  32    HotplugHandler *acpi_dev;
  33    PCIBus *bus;
  34    I2CBus *smbus;
  35    PFlashCFI01 *flash[2];
  36    ISADevice *pcspk;
  37
  38    /* Configuration options: */
  39    uint64_t max_ram_below_4g;
  40    OnOffAuto vmport;
  41
  42    bool acpi_build_enabled;
  43    bool smbus_enabled;
  44    bool sata_enabled;
  45    bool pit_enabled;
  46
  47    /* NUMA information: */
  48    uint64_t numa_nodes;
  49    uint64_t *node_mem;
  50
  51    /* ACPI Memory hotplug IO base address */
  52    hwaddr memhp_io_base;
  53};
  54
  55#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
  56#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
  57#define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
  58#define PC_MACHINE_VMPORT           "vmport"
  59#define PC_MACHINE_SMBUS            "smbus"
  60#define PC_MACHINE_SATA             "sata"
  61#define PC_MACHINE_PIT              "pit"
  62
  63/**
  64 * PCMachineClass:
  65 *
  66 * Compat fields:
  67 *
  68 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
  69 *                        backend's alignment value if provided
  70 * @acpi_data_size: Size of the chunk of memory at the top of RAM
  71 *                  for the BIOS ACPI tables and other BIOS
  72 *                  datastructures.
  73 * @gigabyte_align: Make sure that guest addresses aligned at
  74 *                  1Gbyte boundaries get mapped to host
  75 *                  addresses aligned at 1Gbyte boundaries. This
  76 *                  way we can use 1GByte pages in the host.
  77 *
  78 */
  79typedef struct PCMachineClass {
  80    /*< private >*/
  81    X86MachineClass parent_class;
  82
  83    /*< public >*/
  84
  85    /* Device configuration: */
  86    bool pci_enabled;
  87    bool kvmclock_enabled;
  88    const char *default_nic_model;
  89
  90    /* Compat options: */
  91
  92    /* Default CPU model version.  See x86_cpu_set_default_version(). */
  93    int default_cpu_version;
  94
  95    /* ACPI compat: */
  96    bool has_acpi_build;
  97    bool rsdp_in_ram;
  98    int legacy_acpi_table_size;
  99    unsigned acpi_data_size;
 100    bool do_not_add_smb_acpi;
 101
 102    /* SMBIOS compat: */
 103    bool smbios_defaults;
 104    bool smbios_legacy_mode;
 105    bool smbios_uuid_encoded;
 106
 107    /* RAM / address space compat: */
 108    bool gigabyte_align;
 109    bool has_reserved_memory;
 110    bool enforce_aligned_dimm;
 111    bool broken_reserved_end;
 112
 113    /* generate legacy CPU hotplug AML */
 114    bool legacy_cpu_hotplug;
 115
 116    /* use DMA capable linuxboot option rom */
 117    bool linuxboot_dma_enabled;
 118
 119    /* use PVH to load kernels that support this feature */
 120    bool pvh_enabled;
 121} PCMachineClass;
 122
 123#define TYPE_PC_MACHINE "generic-pc-machine"
 124#define PC_MACHINE(obj) \
 125    OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
 126#define PC_MACHINE_GET_CLASS(obj) \
 127    OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
 128#define PC_MACHINE_CLASS(klass) \
 129    OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
 130
 131/* ioapic.c */
 132
 133GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
 134
 135/* pc.c */
 136extern int fd_bootchk;
 137
 138void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
 139
 140void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp);
 141void pc_smp_parse(MachineState *ms, QemuOpts *opts);
 142
 143void pc_guest_info_init(PCMachineState *pcms);
 144
 145#define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
 146#define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
 147#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
 148#define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
 149#define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
 150#define PCI_HOST_BELOW_4G_MEM_SIZE     "below-4g-mem-size"
 151#define PCI_HOST_ABOVE_4G_MEM_SIZE     "above-4g-mem-size"
 152
 153
 154void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
 155                            MemoryRegion *pci_address_space);
 156
 157void xen_load_linux(PCMachineState *pcms);
 158void pc_memory_init(PCMachineState *pcms,
 159                    MemoryRegion *system_memory,
 160                    MemoryRegion *rom_memory,
 161                    MemoryRegion **ram_memory);
 162uint64_t pc_pci_hole64_start(void);
 163DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
 164void pc_basic_device_init(struct PCMachineState *pcms,
 165                          ISABus *isa_bus, qemu_irq *gsi,
 166                          ISADevice **rtc_state,
 167                          bool create_fdctrl,
 168                          uint32_t hpet_irqs);
 169void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
 170void pc_cmos_init(PCMachineState *pcms,
 171                  BusState *ide0, BusState *ide1,
 172                  ISADevice *s);
 173void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
 174void pc_pci_device_init(PCIBus *pci_bus);
 175
 176typedef void (*cpu_set_smm_t)(int smm, void *arg);
 177
 178void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
 179
 180ISADevice *pc_find_fdc0(void);
 181
 182/* port92.c */
 183#define PORT92_A20_LINE "a20"
 184
 185#define TYPE_PORT92 "port92"
 186
 187/* pc_sysfw.c */
 188void pc_system_flash_create(PCMachineState *pcms);
 189void pc_system_flash_cleanup_unused(PCMachineState *pcms);
 190void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
 191
 192/* acpi-build.c */
 193void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 194                       const CPUArchIdList *apic_ids, GArray *entry);
 195
 196extern GlobalProperty pc_compat_5_0[];
 197extern const size_t pc_compat_5_0_len;
 198
 199extern GlobalProperty pc_compat_4_2[];
 200extern const size_t pc_compat_4_2_len;
 201
 202extern GlobalProperty pc_compat_4_1[];
 203extern const size_t pc_compat_4_1_len;
 204
 205extern GlobalProperty pc_compat_4_0[];
 206extern const size_t pc_compat_4_0_len;
 207
 208extern GlobalProperty pc_compat_3_1[];
 209extern const size_t pc_compat_3_1_len;
 210
 211extern GlobalProperty pc_compat_3_0[];
 212extern const size_t pc_compat_3_0_len;
 213
 214extern GlobalProperty pc_compat_2_12[];
 215extern const size_t pc_compat_2_12_len;
 216
 217extern GlobalProperty pc_compat_2_11[];
 218extern const size_t pc_compat_2_11_len;
 219
 220extern GlobalProperty pc_compat_2_10[];
 221extern const size_t pc_compat_2_10_len;
 222
 223extern GlobalProperty pc_compat_2_9[];
 224extern const size_t pc_compat_2_9_len;
 225
 226extern GlobalProperty pc_compat_2_8[];
 227extern const size_t pc_compat_2_8_len;
 228
 229extern GlobalProperty pc_compat_2_7[];
 230extern const size_t pc_compat_2_7_len;
 231
 232extern GlobalProperty pc_compat_2_6[];
 233extern const size_t pc_compat_2_6_len;
 234
 235extern GlobalProperty pc_compat_2_5[];
 236extern const size_t pc_compat_2_5_len;
 237
 238extern GlobalProperty pc_compat_2_4[];
 239extern const size_t pc_compat_2_4_len;
 240
 241extern GlobalProperty pc_compat_2_3[];
 242extern const size_t pc_compat_2_3_len;
 243
 244extern GlobalProperty pc_compat_2_2[];
 245extern const size_t pc_compat_2_2_len;
 246
 247extern GlobalProperty pc_compat_2_1[];
 248extern const size_t pc_compat_2_1_len;
 249
 250extern GlobalProperty pc_compat_2_0[];
 251extern const size_t pc_compat_2_0_len;
 252
 253extern GlobalProperty pc_compat_1_7[];
 254extern const size_t pc_compat_1_7_len;
 255
 256extern GlobalProperty pc_compat_1_6[];
 257extern const size_t pc_compat_1_6_len;
 258
 259extern GlobalProperty pc_compat_1_5[];
 260extern const size_t pc_compat_1_5_len;
 261
 262extern GlobalProperty pc_compat_1_4[];
 263extern const size_t pc_compat_1_4_len;
 264
 265/* Helper for setting model-id for CPU models that changed model-id
 266 * depending on QEMU versions up to QEMU 2.4.
 267 */
 268#define PC_CPU_MODEL_IDS(v) \
 269    { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
 270    { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
 271    { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
 272
 273#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
 274    static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
 275    { \
 276        MachineClass *mc = MACHINE_CLASS(oc); \
 277        optsfn(mc); \
 278        mc->init = initfn; \
 279    } \
 280    static const TypeInfo pc_machine_type_##suffix = { \
 281        .name       = namestr TYPE_MACHINE_SUFFIX, \
 282        .parent     = TYPE_PC_MACHINE, \
 283        .class_init = pc_machine_##suffix##_class_init, \
 284    }; \
 285    static void pc_machine_init_##suffix(void) \
 286    { \
 287        type_register(&pc_machine_type_##suffix); \
 288    } \
 289    type_init(pc_machine_init_##suffix)
 290
 291extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
 292#endif
 293