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28#ifndef XLNX_XMPU_H
29#define XLNX_XMPU_H
30
31#include "hw/register.h"
32
33#ifndef XILINX_XMPU_ERR_DEBUG
34#define XILINX_XMPU_ERR_DEBUG 0
35#endif
36
37
38REG32(CTRL, 0x0)
39 FIELD(CTRL, ALIGNCFG, 3, 1)
40 FIELD(CTRL, HIDEALLOWED, 2, 1)
41 FIELD(CTRL, DEFWRALLOWED, 1, 1)
42 FIELD(CTRL, DEFRDALLOWED, 0, 1)
43REG32(ISR, 0x10)
44 FIELD(ISR, SECURITYVIO, 3, 1)
45 FIELD(ISR, WRPERMVIO, 2, 1)
46 FIELD(ISR, RDPERMVIO, 1, 1)
47 FIELD(ISR, INV_APB, 0, 1)
48REG32(IMR, 0x14)
49 FIELD(IMR, SECURITYVIO, 3, 1)
50 FIELD(IMR, WRPERMVIO, 2, 1)
51 FIELD(IMR, RDPERMVIO, 1, 1)
52 FIELD(IMR, INV_APB, 0, 1)
53REG32(IEN, 0x18)
54 FIELD(IEN, SECURITYVIO, 3, 1)
55 FIELD(IEN, WRPERMVIO, 2, 1)
56 FIELD(IEN, RDPERMVIO, 1, 1)
57 FIELD(IEN, INV_APB, 0, 1)
58REG32(IDS, 0x1c)
59 FIELD(IDS, SECURITYVIO, 3, 1)
60 FIELD(IDS, WRPERMVIO, 2, 1)
61 FIELD(IDS, RDPERMVIO, 1, 1)
62 FIELD(IDS, INV_APB, 0, 1)
63REG32(LOCK, 0x20)
64 FIELD(LOCK, REGWRDIS, 0, 1)
65REG32(ECO, 0xFC)
66
67#define XMPU_VERSAL_R_MAX 0xA2
68#define NR_XMPU_REGIONS 16
69#define MAX_NR_MASTERS 8
70
71typedef struct XMPU XMPU;
72
73typedef struct XMPUMaster {
74 XMPU *parent;
75
76 AddressSpace *parent_as;
77 MemoryRegion *parent_mr;
78 uint64_t size;
79 uint64_t base;
80
81 MemoryRegion mr;
82 IOMMUMemoryRegion iommu;
83
84 struct {
85 struct {
86 AddressSpace as;
87 MemoryRegion mr;
88 } rw, ro, none;
89 } down;
90
91 struct {
92 MemoryRegion mr[NR_XMPU_REGIONS];
93 } err;
94 uint8_t curr_region;
95} XMPUMaster;
96
97typedef struct XMPURegion {
98 uint64_t start;
99 uint64_t end;
100 uint64_t size;
101 union {
102 uint32_t u32;
103 struct {
104 uint16_t mask;
105 uint16_t id;
106 };
107 } master;
108 struct {
109 bool nschecktype;
110 bool regionns;
111 bool wrallowed;
112 bool rdallowed;
113 bool enable;
114 } config;
115} XMPURegion;
116
117struct XMPU {
118 SysBusDevice parent_obj;
119 MemoryRegion iomem;
120
121 MemoryRegion *protected_mr;
122
123
124 XMPUMaster masters[MAX_NR_MASTERS];
125 qemu_irq irq_isr;
126
127 struct {
128 uint32_t nr_masters;
129
130 uint64_t base;
131
132 bool align;
133 bool poison;
134 } cfg;
135
136
137
138
139
140 uint32_t regs[XMPU_VERSAL_R_MAX];
141 RegisterInfo regs_info[XMPU_VERSAL_R_MAX];
142 size_t regs_size;
143
144 const char *prefix;
145 bool enabled;
146 bool dis_def_rw;
147 qemu_irq enabled_signal;
148 uint8_t addr_shift;
149 uint64_t addr_mask;
150
151 void (*decode_region)(XMPU *s, XMPURegion *xr, unsigned int region);
152 bool (*match)(XMPU *s, XMPURegion *xr, uint16_t master_id, hwaddr addr);
153};
154
155void xmpu_update_enabled(XMPU *s);
156void xmpu_flush(XMPU *s);
157MemTxResult xmpu_read_common(void *opaque, XMPU *s, hwaddr addr, uint64_t *val,
158 unsigned size, MemTxAttrs attr);
159
160MemTxResult xmpu_write_common(void *opaque, XMPU *s, hwaddr addr, uint64_t val,
161 unsigned size, MemTxAttrs attr);
162int xmpu_attrs_to_index(IOMMUMemoryRegion *iommu, MemTxAttrs attrs);
163int xmpu_num_indexes(IOMMUMemoryRegion *iommu);
164IOMMUTLBEntry xmpu_master_translate(XMPUMaster *xm, hwaddr addr,
165 bool attr_secure, uint16_t master_id,
166 bool *sec_vio, int *perm);
167IOMMUTLBEntry xmpu_translate(IOMMUMemoryRegion *mr, hwaddr addr,
168 IOMMUAccessFlags flags, int iommu_idx);
169void xmpu_init_common(XMPU *s, Object *obj, const char *tn,
170 const MemoryRegionOps *ops,
171 const RegisterAccessInfo *regs_info, size_t regs_info_sz);
172bool xmpu_parse_reg_common(XMPU *s, const char *tn, const char *iommu_tn,
173 const MemoryRegionOps *zero_ops,
174 FDTGenericRegPropInfo reg, FDTGenericMMap *obj,
175 Error **errp);
176
177#endif
178