LXR qemu/include/hw/ssi/sifive

   1/*
   2 * QEMU model of the SiFive SPI Controller
   3 *
   4 * Copyright (c) 2021 Wind River Systems, Inc.
   5 *
   6 * Author:
   7 *   Bin Meng <bin.meng@windriver.com>
   8 *
   9 * This program is free software; you can redistribute it and/or modify it
  10 * under the terms and conditions of the GNU General Public License,
  11 * version 2 or later, as published by the Free Software Foundation.
  12 *
  13 * This program is distributed in the hope it will be useful, but WITHOUT
  14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  16 * more details.
  17 *
  18 * You should have received a copy of the GNU General Public License along with
  19 * this program.  If not, see <http://www.gnu.org/licenses/>.
  20 */
  21
  22#ifndef HW_SIFIVE_SPI_H
  23#define HW_SIFIVE_SPI_H
  24
  25#define SIFIVE_SPI_REG_NUM  (0x78 / 4)
  26
  27#define TYPE_SIFIVE_SPI "sifive.spi"
  28#define SIFIVE_SPI(obj) OBJECT_CHECK(SiFiveSPIState, (obj), TYPE_SIFIVE_SPI)
  29
  30typedef struct SiFiveSPIState {
  31    SysBusDevice parent_obj;
  32
  33    MemoryRegion mmio;
  34    qemu_irq irq;
  35
  36    uint32_t num_cs;
  37    qemu_irq *cs_lines;
  38
  39    SSIBus *spi;
  40
  41    Fifo8 tx_fifo;
  42    Fifo8 rx_fifo;
  43
  44    uint32_t regs[SIFIVE_SPI_REG_NUM];
  45} SiFiveSPIState;
  46
  47#endif /* HW_SIFIVE_SPI_H */
  48