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15#ifndef HW_PL011_H
16#define HW_PL011_H
17
18#include "hw/qdev-properties.h"
19#include "hw/sysbus.h"
20#include "chardev/char-fe.h"
21#include "qapi/error.h"
22#include "qom/object.h"
23
24#define TYPE_PL011 "pl011"
25OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
26
27
28#define TYPE_PL011_LUMINARY "pl011_luminary"
29
30struct PL011State {
31 SysBusDevice parent_obj;
32
33 MemoryRegion iomem;
34 uint32_t readbuff;
35 uint32_t flags;
36 uint32_t lcr;
37 uint32_t rsr;
38 uint32_t cr;
39 uint32_t dmacr;
40 uint32_t int_enabled;
41 uint32_t int_level;
42 uint32_t read_fifo[16];
43 uint32_t ilpr;
44 uint32_t ibrd;
45 uint32_t fbrd;
46 uint32_t ifl;
47 int read_pos;
48 int read_count;
49 int read_trigger;
50 CharBackend chr;
51 qemu_irq irq[6];
52 Clock *clk;
53 bool migrate_clk;
54 const unsigned char *id;
55};
56
57static inline DeviceState *pl011_create(hwaddr addr,
58 qemu_irq irq,
59 Chardev *chr)
60{
61 DeviceState *dev;
62 SysBusDevice *s;
63
64 dev = qdev_new("pl011");
65 s = SYS_BUS_DEVICE(dev);
66 qdev_prop_set_chr(dev, "chardev", chr);
67 sysbus_realize_and_unref(s, &error_fatal);
68 sysbus_mmio_map(s, 0, addr);
69 sysbus_connect_irq(s, 0, irq);
70
71 return dev;
72}
73
74static inline DeviceState *pl011_luminary_create(hwaddr addr,
75 qemu_irq irq,
76 Chardev *chr)
77{
78 DeviceState *dev;
79 SysBusDevice *s;
80
81 dev = qdev_new("pl011_luminary");
82 s = SYS_BUS_DEVICE(dev);
83 qdev_prop_set_chr(dev, "chardev", chr);
84 sysbus_realize_and_unref(s, &error_fatal);
85 sysbus_mmio_map(s, 0, addr);
86 sysbus_connect_irq(s, 0, irq);
87
88 return dev;
89}
90
91#endif
92