1
2
3
4
5
6
7
8
9
10#include "qemu/osdep.h"
11#include "qapi/error.h"
12#include "cpu.h"
13#include "hw/sysbus.h"
14#include "hw/arm/boot.h"
15#include "hw/arm/primecell.h"
16#include "hw/net/lan9118.h"
17#include "hw/net/smc91c111.h"
18#include "hw/pci/pci.h"
19#include "net/net.h"
20#include "sysemu/sysemu.h"
21#include "hw/boards.h"
22#include "hw/i2c/i2c.h"
23#include "qemu/error-report.h"
24#include "hw/char/pl011.h"
25#include "hw/cpu/a9mpcore.h"
26#include "hw/intc/realview_gic.h"
27#include "hw/irq.h"
28#include "hw/i2c/arm_sbcon_i2c.h"
29#include "hw/sd/sd.h"
30
31#define SMP_BOOT_ADDR 0xe0000000
32#define SMP_BOOTREG_ADDR 0x10000030
33
34
35
36static struct arm_boot_info realview_binfo = {
37 .smp_loader_start = SMP_BOOT_ADDR,
38 .smp_bootreg_addr = SMP_BOOTREG_ADDR,
39};
40
41
42enum realview_board_type {
43 BOARD_EB,
44 BOARD_EB_MPCORE,
45 BOARD_PB_A8,
46 BOARD_PBX_A9,
47};
48
49static const int realview_board_id[] = {
50 0x33b,
51 0x33b,
52 0x769,
53 0x76d
54};
55
56static void realview_init(MachineState *machine,
57 enum realview_board_type board_type)
58{
59 ARMCPU *cpu = NULL;
60 CPUARMState *env;
61 MemoryRegion *sysmem = get_system_memory();
62 MemoryRegion *ram_lo;
63 MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
64 MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
65 MemoryRegion *ram_hack = g_new(MemoryRegion, 1);
66 DeviceState *dev, *sysctl, *gpio2, *pl041;
67 SysBusDevice *busdev;
68 qemu_irq pic[64];
69 qemu_irq mmc_irq[2];
70 PCIBus *pci_bus = NULL;
71 NICInfo *nd;
72 DriveInfo *dinfo;
73 I2CBus *i2c;
74 int n;
75 unsigned int smp_cpus = machine->smp.cpus;
76 int done_nic = 0;
77 qemu_irq cpu_irq[4];
78 int is_mpcore = 0;
79 int is_pb = 0;
80 uint32_t proc_id = 0;
81 uint32_t sys_id;
82 ram_addr_t low_ram_size;
83 ram_addr_t ram_size = machine->ram_size;
84 hwaddr periphbase = 0;
85
86 switch (board_type) {
87 case BOARD_EB:
88 break;
89 case BOARD_EB_MPCORE:
90 is_mpcore = 1;
91 periphbase = 0x10100000;
92 break;
93 case BOARD_PB_A8:
94 is_pb = 1;
95 break;
96 case BOARD_PBX_A9:
97 is_mpcore = 1;
98 is_pb = 1;
99 periphbase = 0x1f000000;
100 break;
101 }
102
103 for (n = 0; n < smp_cpus; n++) {
104 Object *cpuobj = object_new(machine->cpu_type);
105
106
107
108
109
110 if (object_property_find(cpuobj, "has_el3")) {
111 object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
112 }
113
114 if (is_pb && is_mpcore) {
115 object_property_set_int(cpuobj, "reset-cbar", periphbase,
116 &error_fatal);
117 }
118
119 qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
120
121 cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ);
122 }
123 cpu = ARM_CPU(first_cpu);
124 env = &cpu->env;
125 if (arm_feature(env, ARM_FEATURE_V7)) {
126 if (is_mpcore) {
127 proc_id = 0x0c000000;
128 } else {
129 proc_id = 0x0e000000;
130 }
131 } else if (arm_feature(env, ARM_FEATURE_V6K)) {
132 proc_id = 0x06000000;
133 } else if (arm_feature(env, ARM_FEATURE_V6)) {
134 proc_id = 0x04000000;
135 } else {
136 proc_id = 0x02000000;
137 }
138
139 if (is_pb && ram_size > 0x20000000) {
140
141 ram_lo = g_new(MemoryRegion, 1);
142 low_ram_size = ram_size - 0x20000000;
143 ram_size = 0x20000000;
144 memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size,
145 &error_fatal);
146 memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
147 }
148
149 memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size,
150 &error_fatal);
151 low_ram_size = ram_size;
152 if (low_ram_size > 0x10000000)
153 low_ram_size = 0x10000000;
154
155 memory_region_init_alias(ram_alias, NULL, "realview.alias",
156 ram_hi, 0, low_ram_size);
157 memory_region_add_subregion(sysmem, 0, ram_alias);
158 if (is_pb) {
159
160 memory_region_add_subregion(sysmem, 0x70000000, ram_hi);
161 } else {
162 ram_size = low_ram_size;
163 }
164
165 sys_id = is_pb ? 0x01780500 : 0xc1400400;
166 sysctl = qdev_new("realview_sysctl");
167 qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
168 qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
169 sysbus_realize_and_unref(SYS_BUS_DEVICE(sysctl), &error_fatal);
170 sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);
171
172 if (is_mpcore) {
173 dev = qdev_new(is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore");
174 qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
175 busdev = SYS_BUS_DEVICE(dev);
176 sysbus_realize_and_unref(busdev, &error_fatal);
177 sysbus_mmio_map(busdev, 0, periphbase);
178 for (n = 0; n < smp_cpus; n++) {
179 sysbus_connect_irq(busdev, n, cpu_irq[n]);
180 }
181 sysbus_create_varargs("l2x0", periphbase + 0x2000, NULL);
182
183 realview_binfo.gic_cpu_if_addr = periphbase + 0x100;
184 } else {
185 uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000;
186
187 dev = sysbus_create_simple(TYPE_REALVIEW_GIC, gic_addr, cpu_irq[0]);
188 }
189 for (n = 0; n < 64; n++) {
190 pic[n] = qdev_get_gpio_in(dev, n);
191 }
192
193 pl041 = qdev_new("pl041");
194 qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
195 sysbus_realize_and_unref(SYS_BUS_DEVICE(pl041), &error_fatal);
196 sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000);
197 sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]);
198
199 sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]);
200 sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]);
201
202 pl011_create(0x10009000, pic[12], serial_hd(0));
203 pl011_create(0x1000a000, pic[13], serial_hd(1));
204 pl011_create(0x1000b000, pic[14], serial_hd(2));
205 pl011_create(0x1000c000, pic[15], serial_hd(3));
206
207
208 dev = qdev_new("pl081");
209 object_property_set_link(OBJECT(dev), "downstream", OBJECT(sysmem),
210 &error_fatal);
211 busdev = SYS_BUS_DEVICE(dev);
212 sysbus_realize_and_unref(busdev, &error_fatal);
213 sysbus_mmio_map(busdev, 0, 0x10030000);
214 sysbus_connect_irq(busdev, 0, pic[24]);
215
216 sysbus_create_simple("sp804", 0x10011000, pic[4]);
217 sysbus_create_simple("sp804", 0x10012000, pic[5]);
218
219 sysbus_create_simple("pl061", 0x10013000, pic[6]);
220 sysbus_create_simple("pl061", 0x10014000, pic[7]);
221 gpio2 = sysbus_create_simple("pl061", 0x10015000, pic[8]);
222
223 sysbus_create_simple("pl111", 0x10020000, pic[23]);
224
225 dev = sysbus_create_varargs("pl181", 0x10005000, pic[17], pic[18], NULL);
226
227
228
229
230
231
232 mmc_irq[0] = qemu_irq_split(
233 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_WPROT),
234 qdev_get_gpio_in(gpio2, 1));
235 mmc_irq[1] = qemu_irq_split(
236 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_CARDIN),
237 qemu_irq_invert(qdev_get_gpio_in(gpio2, 0)));
238 qdev_connect_gpio_out_named(dev, "card-read-only", 0, mmc_irq[0]);
239 qdev_connect_gpio_out_named(dev, "card-inserted", 0, mmc_irq[1]);
240 dinfo = drive_get_next(IF_SD);
241 if (dinfo) {
242 DeviceState *card;
243
244 card = qdev_new(TYPE_SD_CARD);
245 qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
246 &error_fatal);
247 qdev_realize_and_unref(card, qdev_get_child_bus(dev, "sd-bus"),
248 &error_fatal);
249 }
250
251 sysbus_create_simple("pl031", 0x10017000, pic[10]);
252
253 if (!is_pb) {
254 dev = qdev_new("realview_pci");
255 busdev = SYS_BUS_DEVICE(dev);
256 sysbus_realize_and_unref(busdev, &error_fatal);
257 sysbus_mmio_map(busdev, 0, 0x10019000);
258 sysbus_mmio_map(busdev, 1, 0x60000000);
259 sysbus_mmio_map(busdev, 2, 0x61000000);
260 sysbus_mmio_map(busdev, 3, 0x62000000);
261 sysbus_mmio_map(busdev, 4, 0x63000000);
262 sysbus_mmio_map(busdev, 5, 0x64000000);
263 sysbus_mmio_map(busdev, 6, 0x68000000);
264 sysbus_connect_irq(busdev, 0, pic[48]);
265 sysbus_connect_irq(busdev, 1, pic[49]);
266 sysbus_connect_irq(busdev, 2, pic[50]);
267 sysbus_connect_irq(busdev, 3, pic[51]);
268 pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
269 if (machine_usb(machine)) {
270 pci_create_simple(pci_bus, -1, "pci-ohci");
271 }
272 n = drive_get_max_bus(IF_SCSI);
273 while (n >= 0) {
274 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
275 lsi53c8xx_handle_legacy_cmdline(dev);
276 n--;
277 }
278 }
279 for(n = 0; n < nb_nics; n++) {
280 nd = &nd_table[n];
281
282 if (!done_nic && (!nd->model ||
283 strcmp(nd->model, is_pb ? "lan9118" : "smc91c111") == 0)) {
284 if (is_pb) {
285 lan9118_init(nd, 0x4e000000, pic[28]);
286 } else {
287 smc91c111_init(nd, 0x4e000000, pic[28]);
288 }
289 done_nic = 1;
290 } else {
291 if (pci_bus) {
292 pci_nic_init_nofail(nd, pci_bus, "rtl8139", NULL);
293 }
294 }
295 }
296
297 dev = sysbus_create_simple(TYPE_VERSATILE_I2C, 0x10002000, NULL);
298 i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
299 i2c_slave_create_simple(i2c, "ds1338", 0x68);
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361 memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000,
362 &error_fatal);
363 memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
364
365 realview_binfo.ram_size = ram_size;
366 realview_binfo.nb_cpus = smp_cpus;
367 realview_binfo.board_id = realview_board_id[board_type];
368 realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0);
369 arm_load_kernel(ARM_CPU(first_cpu), machine, &realview_binfo);
370}
371
372static void realview_eb_init(MachineState *machine)
373{
374 realview_init(machine, BOARD_EB);
375}
376
377static void realview_eb_mpcore_init(MachineState *machine)
378{
379 realview_init(machine, BOARD_EB_MPCORE);
380}
381
382static void realview_pb_a8_init(MachineState *machine)
383{
384 realview_init(machine, BOARD_PB_A8);
385}
386
387static void realview_pbx_a9_init(MachineState *machine)
388{
389 realview_init(machine, BOARD_PBX_A9);
390}
391
392static void realview_eb_class_init(ObjectClass *oc, void *data)
393{
394 MachineClass *mc = MACHINE_CLASS(oc);
395
396 mc->desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)";
397 mc->init = realview_eb_init;
398 mc->block_default_type = IF_SCSI;
399 mc->ignore_memory_transaction_failures = true;
400 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926");
401}
402
403static const TypeInfo realview_eb_type = {
404 .name = MACHINE_TYPE_NAME("realview-eb"),
405 .parent = TYPE_MACHINE,
406 .class_init = realview_eb_class_init,
407};
408
409static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data)
410{
411 MachineClass *mc = MACHINE_CLASS(oc);
412
413 mc->desc = "ARM RealView Emulation Baseboard (ARM11MPCore)";
414 mc->init = realview_eb_mpcore_init;
415 mc->block_default_type = IF_SCSI;
416 mc->max_cpus = 4;
417 mc->ignore_memory_transaction_failures = true;
418 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm11mpcore");
419}
420
421static const TypeInfo realview_eb_mpcore_type = {
422 .name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
423 .parent = TYPE_MACHINE,
424 .class_init = realview_eb_mpcore_class_init,
425};
426
427static void realview_pb_a8_class_init(ObjectClass *oc, void *data)
428{
429 MachineClass *mc = MACHINE_CLASS(oc);
430
431 mc->desc = "ARM RealView Platform Baseboard for Cortex-A8";
432 mc->init = realview_pb_a8_init;
433 mc->ignore_memory_transaction_failures = true;
434 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
435}
436
437static const TypeInfo realview_pb_a8_type = {
438 .name = MACHINE_TYPE_NAME("realview-pb-a8"),
439 .parent = TYPE_MACHINE,
440 .class_init = realview_pb_a8_class_init,
441};
442
443static void realview_pbx_a9_class_init(ObjectClass *oc, void *data)
444{
445 MachineClass *mc = MACHINE_CLASS(oc);
446
447 mc->desc = "ARM RealView Platform Baseboard Explore for Cortex-A9";
448 mc->init = realview_pbx_a9_init;
449 mc->max_cpus = 4;
450 mc->ignore_memory_transaction_failures = true;
451 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
452}
453
454static const TypeInfo realview_pbx_a9_type = {
455 .name = MACHINE_TYPE_NAME("realview-pbx-a9"),
456 .parent = TYPE_MACHINE,
457 .class_init = realview_pbx_a9_class_init,
458};
459
460static void realview_machine_init(void)
461{
462 type_register_static(&realview_eb_type);
463 type_register_static(&realview_eb_mpcore_type);
464 type_register_static(&realview_pb_a8_type);
465 type_register_static(&realview_pbx_a9_type);
466}
467
468type_init(realview_machine_init)
469