LXR qemu/hw/i386/acpi-common.c

   1/* Support for generating ACPI tables and passing them to Guests
   2 *
   3 * Copyright (C) 2008-2010  Kevin O'Connor <kevin@koconnor.net>
   4 * Copyright (C) 2006 Fabrice Bellard
   5 * Copyright (C) 2013 Red Hat Inc
   6 *
   7 * Author: Michael S. Tsirkin <mst@redhat.com>
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License as published by
  11 * the Free Software Foundation; either version 2 of the License, or
  12 * (at your option) any later version.
  13
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 * GNU General Public License for more details.
  18
  19 * You should have received a copy of the GNU General Public License along
  20 * with this program; if not, see <http://www.gnu.org/licenses/>.
  21 */
  22
  23#include "qemu/osdep.h"
  24#include "qapi/error.h"
  25
  26#include "exec/memory.h"
  27#include "hw/acpi/acpi.h"
  28#include "hw/acpi/aml-build.h"
  29#include "hw/acpi/utils.h"
  30#include "hw/i386/pc.h"
  31#include "target/i386/cpu.h"
  32
  33#include "acpi-build.h"
  34#include "acpi-common.h"
  35
  36void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
  37                       const CPUArchIdList *apic_ids, GArray *entry,
  38                       bool force_enabled)
  39{
  40    uint32_t apic_id = apic_ids->cpus[uid].arch_id;
  41    /* Flags – Local APIC Flags */
  42    uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
  43                     1 /* Enabled */ : 0;
  44
  45    /* ACPI spec says that LAPIC entry for non present
  46     * CPU may be omitted from MADT or it must be marked
  47     * as disabled. However omitting non present CPU from
  48     * MADT breaks hotplug on linux. So possible CPUs
  49     * should be put in MADT but kept disabled.
  50     */
  51    if (apic_id < 255) {
  52        /* Rev 1.0b, Table 5-13 Processor Local APIC Structure */
  53        build_append_int_noprefix(entry, 0, 1);       /* Type */
  54        build_append_int_noprefix(entry, 8, 1);       /* Length */
  55        build_append_int_noprefix(entry, uid, 1);     /* ACPI Processor ID */
  56        build_append_int_noprefix(entry, apic_id, 1); /* APIC ID */
  57        build_append_int_noprefix(entry, flags, 4); /* Flags */
  58    } else {
  59        /* Rev 4.0, 5.2.12.12 Processor Local x2APIC Structure */
  60        build_append_int_noprefix(entry, 9, 1);       /* Type */
  61        build_append_int_noprefix(entry, 16, 1);      /* Length */
  62        build_append_int_noprefix(entry, 0, 2);       /* Reserved */
  63        build_append_int_noprefix(entry, apic_id, 4); /* X2APIC ID */
  64        build_append_int_noprefix(entry, flags, 4);   /* Flags */
  65        build_append_int_noprefix(entry, uid, 4);     /* ACPI Processor UID */
  66    }
  67}
  68
  69static void build_ioapic(GArray *entry, uint8_t id, uint32_t addr, uint32_t irq)
  70{
  71    /* Rev 1.0b, 5.2.8.2 IO APIC */
  72    build_append_int_noprefix(entry, 1, 1);    /* Type */
  73    build_append_int_noprefix(entry, 12, 1);   /* Length */
  74    build_append_int_noprefix(entry, id, 1);   /* IO APIC ID */
  75    build_append_int_noprefix(entry, 0, 1);    /* Reserved */
  76    build_append_int_noprefix(entry, addr, 4); /* IO APIC Address */
  77    build_append_int_noprefix(entry, irq, 4);  /* System Vector Base */
  78}
  79
  80static void
  81build_xrupt_override(GArray *entry, uint8_t src, uint32_t gsi, uint16_t flags)
  82{
  83    /* Rev 1.0b, 5.2.8.3.1 Interrupt Source Overrides */
  84    build_append_int_noprefix(entry, 2, 1);  /* Type */
  85    build_append_int_noprefix(entry, 10, 1); /* Length */
  86    build_append_int_noprefix(entry, 0, 1);  /* Bus */
  87    build_append_int_noprefix(entry, src, 1);  /* Source */
  88    /* Global System Interrupt Vector */
  89    build_append_int_noprefix(entry, gsi, 4);
  90    build_append_int_noprefix(entry, flags, 2);  /* Flags */
  91}
  92
  93/*
  94 * ACPI spec, Revision 1.0b
  95 * 5.2.8 Multiple APIC Description Table
  96 */
  97void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
  98                     X86MachineState *x86ms, AcpiDeviceIf *adev,
  99                     const char *oem_id, const char *oem_table_id)
 100{
 101    int i;
 102    bool x2apic_mode = false;
 103    MachineClass *mc = MACHINE_GET_CLASS(x86ms);
 104    const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
 105    AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
 106    AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
 107                        .oem_table_id = oem_table_id };
 108
 109    acpi_table_begin(&table, table_data);
 110    /* Local APIC Address */
 111    build_append_int_noprefix(table_data, APIC_DEFAULT_ADDRESS, 4);
 112    build_append_int_noprefix(table_data, 1 /* PCAT_COMPAT */, 4); /* Flags */
 113
 114    for (i = 0; i < apic_ids->len; i++) {
 115        adevc->madt_cpu(adev, i, apic_ids, table_data, false);
 116        if (apic_ids->cpus[i].arch_id > 254) {
 117            x2apic_mode = true;
 118        }
 119    }
 120
 121    build_ioapic(table_data, ACPI_BUILD_IOAPIC_ID, IO_APIC_DEFAULT_ADDRESS, 0);
 122    if (x86ms->ioapic2) {
 123        build_ioapic(table_data, ACPI_BUILD_IOAPIC_ID + 1,
 124                     IO_APIC_SECONDARY_ADDRESS, IO_APIC_SECONDARY_IRQBASE);
 125    }
 126
 127    if (x86ms->apic_xrupt_override) {
 128        build_xrupt_override(table_data, 0, 2,
 129            0 /* Flags: Conforms to the specifications of the bus */);
 130    }
 131
 132    for (i = 1; i < 16; i++) {
 133        if (!(x86ms->pci_irq_mask & (1 << i))) {
 134            /* No need for a INT source override structure. */
 135            continue;
 136        }
 137        build_xrupt_override(table_data, i, i,
 138            0xd /* Flags: Active high, Level Triggered */);
 139    }
 140
 141    if (x2apic_mode) {
 142        /* Rev 4.0, 5.2.12.13 Local x2APIC NMI Structure*/
 143        build_append_int_noprefix(table_data, 0xA, 1); /* Type */
 144        build_append_int_noprefix(table_data, 12, 1);  /* Length */
 145        build_append_int_noprefix(table_data, 0, 2);   /* Flags */
 146        /* ACPI Processor UID */
 147        build_append_int_noprefix(table_data, 0xFFFFFFFF /* all processors */,
 148                                  4);
 149        /* Local x2APIC LINT# */
 150        build_append_int_noprefix(table_data, 1 /* ACPI_LINT1 */, 1);
 151        build_append_int_noprefix(table_data, 0, 3); /* Reserved */
 152    } else {
 153        /* Rev 1.0b, 5.2.8.3.3 Local APIC NMI */
 154        build_append_int_noprefix(table_data, 4, 1);  /* Type */
 155        build_append_int_noprefix(table_data, 6, 1);  /* Length */
 156        /* ACPI Processor ID */
 157        build_append_int_noprefix(table_data, 0xFF /* all processors */, 1);
 158        build_append_int_noprefix(table_data, 0, 2);  /* Flags */
 159        /* Local APIC INTI# */
 160        build_append_int_noprefix(table_data, 1 /* ACPI_LINT1 */, 1);
 161    }
 162
 163    acpi_table_end(linker, &table);
 164}
 165
 166