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21#include "qemu/osdep.h"
22#include "qemu-common.h"
23#include "qemu/datadir.h"
24#include "qemu/units.h"
25#include "qapi/error.h"
26#include "cpu.h"
27#include "hw/clock.h"
28#include "net/net.h"
29#include "hw/boards.h"
30#include "hw/i2c/smbus_eeprom.h"
31#include "hw/block/flash.h"
32#include "hw/mips/mips.h"
33#include "hw/mips/bootloader.h"
34#include "hw/mips/cpudevs.h"
35#include "hw/pci/pci.h"
36#include "hw/loader.h"
37#include "hw/ide/pci.h"
38#include "hw/qdev-properties.h"
39#include "elf.h"
40#include "hw/isa/vt82c686.h"
41#include "sysemu/qtest.h"
42#include "sysemu/reset.h"
43#include "sysemu/sysemu.h"
44#include "qemu/error-report.h"
45
46#define ENVP_PADDR 0x2000
47#define ENVP_VADDR cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
48#define ENVP_NB_ENTRIES 16
49#define ENVP_ENTRY_SIZE 256
50
51
52#define BIOS_SIZE (512 * KiB)
53#define MAX_IDE_BUS 2
54
55
56
57
58
59
60
61#define FULOONG_BIOSNAME "pmon_2e.bin"
62
63
64#define FULOONG2E_VIA_SLOT 5
65#define FULOONG2E_ATI_SLOT 6
66#define FULOONG2E_RTL8139_SLOT 7
67
68static struct _loaderparams {
69 int ram_size;
70 const char *kernel_filename;
71 const char *kernel_cmdline;
72 const char *initrd_filename;
73} loaderparams;
74
75static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
76 const char *string, ...)
77{
78 va_list ap;
79 int32_t table_addr;
80
81 if (index >= ENVP_NB_ENTRIES) {
82 return;
83 }
84
85 if (string == NULL) {
86 prom_buf[index] = 0;
87 return;
88 }
89
90 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
91 prom_buf[index] = tswap32(ENVP_VADDR + table_addr);
92
93 va_start(ap, string);
94 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
95 va_end(ap);
96}
97
98static uint64_t load_kernel(MIPSCPU *cpu)
99{
100 uint64_t kernel_entry, kernel_high, initrd_size;
101 int index = 0;
102 long kernel_size;
103 ram_addr_t initrd_offset;
104 uint32_t *prom_buf;
105 long prom_size;
106
107 kernel_size = load_elf(loaderparams.kernel_filename, NULL,
108 cpu_mips_kseg0_to_phys, NULL,
109 &kernel_entry, NULL,
110 &kernel_high, NULL,
111 0, EM_MIPS, 1, 0);
112 if (kernel_size < 0) {
113 error_report("could not load kernel '%s': %s",
114 loaderparams.kernel_filename,
115 load_elf_strerror(kernel_size));
116 exit(1);
117 }
118
119
120 initrd_size = 0;
121 initrd_offset = 0;
122 if (loaderparams.initrd_filename) {
123 initrd_size = get_image_size(loaderparams.initrd_filename);
124 if (initrd_size > 0) {
125 initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
126 if (initrd_offset + initrd_size > loaderparams.ram_size) {
127 error_report("memory too small for initial ram disk '%s'",
128 loaderparams.initrd_filename);
129 exit(1);
130 }
131 initrd_size = load_image_targphys(loaderparams.initrd_filename,
132 initrd_offset,
133 loaderparams.ram_size - initrd_offset);
134 }
135 if (initrd_size == (target_ulong) -1) {
136 error_report("could not load initial ram disk '%s'",
137 loaderparams.initrd_filename);
138 exit(1);
139 }
140 }
141
142
143 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
144 prom_buf = g_malloc(prom_size);
145
146 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
147 if (initrd_size > 0) {
148 prom_set(prom_buf, index++,
149 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
150 cpu_mips_phys_to_kseg0(NULL, initrd_offset),
151 initrd_size, loaderparams.kernel_cmdline);
152 } else {
153 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
154 }
155
156
157 prom_set(prom_buf, index++, "busclock=33000000");
158 prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock));
159 prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
160 prom_set(prom_buf, index++, NULL);
161
162 rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
163
164 g_free(prom_buf);
165 return kernel_entry;
166}
167
168static void write_bootloader(CPUMIPSState *env, uint8_t *base,
169 uint64_t kernel_addr)
170{
171 uint32_t *p;
172
173
174 p = (uint32_t *)base;
175
176
177 stl_p(p++, 0x0bf00010);
178
179 stl_p(p++, 0x00000000);
180
181
182 p = (uint32_t *)(base + 0x040);
183
184 bl_gen_jump_kernel(&p, ENVP_VADDR - 64, 2, ENVP_VADDR, ENVP_VADDR + 8,
185 loaderparams.ram_size, kernel_addr);
186}
187
188static void main_cpu_reset(void *opaque)
189{
190 MIPSCPU *cpu = opaque;
191 CPUMIPSState *env = &cpu->env;
192
193 cpu_reset(CPU(cpu));
194
195 if (loaderparams.kernel_filename) {
196 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
197 }
198}
199
200static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
201 I2CBus **i2c_bus)
202{
203 PCIDevice *dev;
204
205 dev = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(slot, 0), true,
206 TYPE_VT82C686B_ISA);
207 qdev_connect_gpio_out(DEVICE(dev), 0, intc);
208
209 dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide");
210 pci_ide_create_devs(dev);
211
212 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
213 pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
214
215 dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 4), TYPE_VT82C686B_PM);
216 *i2c_bus = I2C_BUS(qdev_get_child_bus(DEVICE(dev), "i2c"));
217
218
219 pci_create_simple(pci_bus, PCI_DEVFN(slot, 5), TYPE_VIA_AC97);
220 pci_create_simple(pci_bus, PCI_DEVFN(slot, 6), TYPE_VIA_MC97);
221}
222
223
224static void network_init(PCIBus *pci_bus)
225{
226 int i;
227
228 for (i = 0; i < nb_nics; i++) {
229 NICInfo *nd = &nd_table[i];
230 const char *default_devaddr = NULL;
231
232 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
233
234 default_devaddr = "07";
235 }
236
237 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
238 }
239}
240
241static void mips_fuloong2e_init(MachineState *machine)
242{
243 const char *kernel_filename = machine->kernel_filename;
244 const char *kernel_cmdline = machine->kernel_cmdline;
245 const char *initrd_filename = machine->initrd_filename;
246 char *filename;
247 MemoryRegion *address_space_mem = get_system_memory();
248 MemoryRegion *bios = g_new(MemoryRegion, 1);
249 long bios_size;
250 uint8_t *spd_data;
251 uint64_t kernel_entry;
252 PCIDevice *pci_dev;
253 PCIBus *pci_bus;
254 I2CBus *smbus;
255 Clock *cpuclk;
256 MIPSCPU *cpu;
257 CPUMIPSState *env;
258 DeviceState *dev;
259
260 cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
261 clock_set_hz(cpuclk, 533080000);
262
263
264 cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk);
265 env = &cpu->env;
266
267 qemu_register_reset(main_cpu_reset, cpu);
268
269
270 if (machine->ram_size != 256 * MiB) {
271 error_report("Invalid RAM size, should be 256MB");
272 exit(EXIT_FAILURE);
273 }
274 memory_region_add_subregion(address_space_mem, 0, machine->ram);
275
276
277 memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
278 &error_fatal);
279 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
280
281
282
283
284
285
286 if (kernel_filename) {
287 loaderparams.ram_size = machine->ram_size;
288 loaderparams.kernel_filename = kernel_filename;
289 loaderparams.kernel_cmdline = kernel_cmdline;
290 loaderparams.initrd_filename = initrd_filename;
291 kernel_entry = load_kernel(cpu);
292 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
293 } else {
294 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
295 machine->firmware ?: FULOONG_BIOSNAME);
296 if (filename) {
297 bios_size = load_image_targphys(filename, 0x1fc00000LL,
298 BIOS_SIZE);
299 g_free(filename);
300 } else {
301 bios_size = -1;
302 }
303
304 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
305 machine->firmware && !qtest_enabled()) {
306 error_report("Could not load MIPS bios '%s'", machine->firmware);
307 exit(1);
308 }
309 }
310
311
312 cpu_mips_irq_init_cpu(cpu);
313 cpu_mips_clock_init(cpu);
314
315
316 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
317
318
319 vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
320 &smbus);
321
322
323 if (vga_interface_type != VGA_NONE) {
324 pci_dev = pci_new(-1, "ati-vga");
325 dev = DEVICE(pci_dev);
326 qdev_prop_set_uint32(dev, "vgamem_mb", 16);
327 qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
328 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
329 }
330
331
332 spd_data = spd_data_generate(DDR, machine->ram_size);
333 smbus_eeprom_init_one(smbus, 0x50, spd_data);
334
335
336 network_init(pci_bus);
337}
338
339static void mips_fuloong2e_machine_init(MachineClass *mc)
340{
341 mc->desc = "Fuloong 2e mini pc";
342 mc->init = mips_fuloong2e_init;
343 mc->block_default_type = IF_IDE;
344 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
345 mc->default_ram_size = 256 * MiB;
346 mc->default_ram_id = "fuloong2e.ram";
347 mc->minimum_page_bits = 14;
348}
349
350DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
351
