qemu/hw/ppc/mac_newworld.c
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   1/*
   2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3 *
   4 * Copyright (c) 2004-2007 Fabrice Bellard
   5 * Copyright (c) 2007 Jocelyn Mayer
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 *
  25 * PCI bus layout on a real G5 (U3 based):
  26 *
  27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
  28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
  29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
  30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
  33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
  34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
  35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
  36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
  37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
  38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
  43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
  44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
  45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
  46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
  47 */
  48
  49#include "qemu/osdep.h"
  50#include "qemu-common.h"
  51#include "qemu/datadir.h"
  52#include "qapi/error.h"
  53#include "hw/ppc/ppc.h"
  54#include "hw/qdev-properties.h"
  55#include "hw/ppc/mac.h"
  56#include "hw/input/adb.h"
  57#include "hw/ppc/mac_dbdma.h"
  58#include "hw/pci/pci.h"
  59#include "net/net.h"
  60#include "sysemu/sysemu.h"
  61#include "hw/nvram/fw_cfg.h"
  62#include "hw/char/escc.h"
  63#include "hw/misc/macio/macio.h"
  64#include "hw/ppc/openpic.h"
  65#include "hw/loader.h"
  66#include "hw/fw-path-provider.h"
  67#include "elf.h"
  68#include "qemu/error-report.h"
  69#include "sysemu/kvm.h"
  70#include "sysemu/reset.h"
  71#include "kvm_ppc.h"
  72#include "hw/usb.h"
  73#include "hw/sysbus.h"
  74#include "trace.h"
  75
  76#define MAX_IDE_BUS 2
  77#define CFG_ADDR 0xf0000510
  78#define TBFREQ (100UL * 1000UL * 1000UL)
  79#define CLOCKFREQ (900UL * 1000UL * 1000UL)
  80#define BUSFREQ (100UL * 1000UL * 1000UL)
  81
  82#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
  83
  84#define PROM_BASE 0xfff00000
  85#define PROM_SIZE (1 * MiB)
  86
  87static void fw_cfg_boot_set(void *opaque, const char *boot_device,
  88                            Error **errp)
  89{
  90    fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  91}
  92
  93static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  94{
  95    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  96}
  97
  98static void ppc_core99_reset(void *opaque)
  99{
 100    PowerPCCPU *cpu = opaque;
 101
 102    cpu_reset(CPU(cpu));
 103    /* 970 CPUs want to get their initial IP as part of their boot protocol */
 104    cpu->env.nip = PROM_BASE + 0x100;
 105}
 106
 107/* PowerPC Mac99 hardware initialisation */
 108static void ppc_core99_init(MachineState *machine)
 109{
 110    ram_addr_t ram_size = machine->ram_size;
 111    const char *bios_name = machine->firmware ?: PROM_FILENAME;
 112    const char *kernel_filename = machine->kernel_filename;
 113    const char *kernel_cmdline = machine->kernel_cmdline;
 114    const char *initrd_filename = machine->initrd_filename;
 115    const char *boot_device = machine->boot_order;
 116    Core99MachineState *core99_machine = CORE99_MACHINE(machine);
 117    PowerPCCPU *cpu = NULL;
 118    CPUPPCState *env = NULL;
 119    char *filename;
 120    IrqLines *openpic_irqs;
 121    int linux_boot, i, j, k;
 122    MemoryRegion *bios = g_new(MemoryRegion, 1);
 123    hwaddr kernel_base, initrd_base, cmdline_base = 0;
 124    long kernel_size, initrd_size;
 125    UNINHostState *uninorth_pci;
 126    PCIBus *pci_bus;
 127    PCIDevice *macio;
 128    ESCCState *escc;
 129    bool has_pmu, has_adb;
 130    MACIOIDEState *macio_ide;
 131    BusState *adb_bus;
 132    MacIONVRAMState *nvr;
 133    int bios_size;
 134    int ppc_boot_device;
 135    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 136    void *fw_cfg;
 137    int machine_arch;
 138    SysBusDevice *s;
 139    DeviceState *dev, *pic_dev;
 140    DeviceState *uninorth_internal_dev = NULL, *uninorth_agp_dev = NULL;
 141    hwaddr nvram_addr = 0xFFF04000;
 142    uint64_t tbfreq;
 143    unsigned int smp_cpus = machine->smp.cpus;
 144
 145    linux_boot = (kernel_filename != NULL);
 146
 147    /* init CPUs */
 148    for (i = 0; i < smp_cpus; i++) {
 149        cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
 150        env = &cpu->env;
 151
 152        /* Set time-base frequency to 100 Mhz */
 153        cpu_ppc_tb_init(env, TBFREQ);
 154        qemu_register_reset(ppc_core99_reset, cpu);
 155    }
 156
 157    /* allocate RAM */
 158    if (machine->ram_size > 2 * GiB) {
 159        error_report("RAM size more than 2 GiB is not supported");
 160        exit(1);
 161    }
 162    memory_region_add_subregion(get_system_memory(), 0, machine->ram);
 163
 164    /* allocate and load firmware ROM */
 165    memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE,
 166                           &error_fatal);
 167    memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
 168
 169    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 170    if (filename) {
 171        /* Load OpenBIOS (ELF) */
 172        bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
 173                             NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
 174
 175        if (bios_size <= 0) {
 176            /* or load binary ROM image */
 177            bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
 178        }
 179        g_free(filename);
 180    } else {
 181        bios_size = -1;
 182    }
 183    if (bios_size < 0 || bios_size > PROM_SIZE) {
 184        error_report("could not load PowerPC bios '%s'", bios_name);
 185        exit(1);
 186    }
 187
 188    if (linux_boot) {
 189        int bswap_needed;
 190
 191#ifdef BSWAP_NEEDED
 192        bswap_needed = 1;
 193#else
 194        bswap_needed = 0;
 195#endif
 196        kernel_base = KERNEL_LOAD_ADDR;
 197
 198        kernel_size = load_elf(kernel_filename, NULL,
 199                               translate_kernel_address, NULL, NULL, NULL,
 200                               NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
 201        if (kernel_size < 0)
 202            kernel_size = load_aout(kernel_filename, kernel_base,
 203                                    ram_size - kernel_base, bswap_needed,
 204                                    TARGET_PAGE_SIZE);
 205        if (kernel_size < 0)
 206            kernel_size = load_image_targphys(kernel_filename,
 207                                              kernel_base,
 208                                              ram_size - kernel_base);
 209        if (kernel_size < 0) {
 210            error_report("could not load kernel '%s'", kernel_filename);
 211            exit(1);
 212        }
 213        /* load initrd */
 214        if (initrd_filename) {
 215            initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 216            initrd_size = load_image_targphys(initrd_filename, initrd_base,
 217                                              ram_size - initrd_base);
 218            if (initrd_size < 0) {
 219                error_report("could not load initial ram disk '%s'",
 220                             initrd_filename);
 221                exit(1);
 222            }
 223            cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
 224        } else {
 225            initrd_base = 0;
 226            initrd_size = 0;
 227            cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 228        }
 229        ppc_boot_device = 'm';
 230    } else {
 231        kernel_base = 0;
 232        kernel_size = 0;
 233        initrd_base = 0;
 234        initrd_size = 0;
 235        ppc_boot_device = '\0';
 236        /* We consider that NewWorld PowerMac never have any floppy drive
 237         * For now, OHW cannot boot from the network.
 238         */
 239        for (i = 0; boot_device[i] != '\0'; i++) {
 240            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 241                ppc_boot_device = boot_device[i];
 242                break;
 243            }
 244        }
 245        if (ppc_boot_device == '\0') {
 246            error_report("No valid boot device for Mac99 machine");
 247            exit(1);
 248        }
 249    }
 250
 251    /* UniN init */
 252    dev = qdev_new(TYPE_UNI_NORTH);
 253    s = SYS_BUS_DEVICE(dev);
 254    sysbus_realize_and_unref(s, &error_fatal);
 255    memory_region_add_subregion(get_system_memory(), 0xf8000000,
 256                                sysbus_mmio_get_region(s, 0));
 257
 258    openpic_irqs = g_new0(IrqLines, smp_cpus);
 259    for (i = 0; i < smp_cpus; i++) {
 260        /* Mac99 IRQ connection between OpenPIC outputs pins
 261         * and PowerPC input pins
 262         */
 263        switch (PPC_INPUT(env)) {
 264        case PPC_FLAGS_INPUT_6xx:
 265            openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
 266                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 267            openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
 268                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 269            openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
 270                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 271            /* Not connected ? */
 272            openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
 273            /* Check this */
 274            openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
 275                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 276            break;
 277#if defined(TARGET_PPC64)
 278        case PPC_FLAGS_INPUT_970:
 279            openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
 280                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 281            openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
 282                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 283            openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
 284                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 285            /* Not connected ? */
 286            openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
 287            /* Check this */
 288            openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
 289                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 290            break;
 291#endif /* defined(TARGET_PPC64) */
 292        default:
 293            error_report("Bus model not supported on mac99 machine");
 294            exit(1);
 295        }
 296    }
 297
 298    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
 299        /* 970 gets a U3 bus */
 300        /* Uninorth AGP bus */
 301        dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
 302        sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 303        uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
 304        s = SYS_BUS_DEVICE(dev);
 305        /* PCI hole */
 306        memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
 307                                    sysbus_mmio_get_region(s, 2));
 308        /* Register 8 MB of ISA IO space */
 309        memory_region_add_subregion(get_system_memory(), 0xf2000000,
 310                                    sysbus_mmio_get_region(s, 3));
 311        sysbus_mmio_map(s, 0, 0xf0800000);
 312        sysbus_mmio_map(s, 1, 0xf0c00000);
 313
 314        machine_arch = ARCH_MAC99_U3;
 315    } else {
 316        /* Use values found on a real PowerMac */
 317        /* Uninorth AGP bus */
 318        uninorth_agp_dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
 319        s = SYS_BUS_DEVICE(uninorth_agp_dev);
 320        sysbus_realize_and_unref(s, &error_fatal);
 321        sysbus_mmio_map(s, 0, 0xf0800000);
 322        sysbus_mmio_map(s, 1, 0xf0c00000);
 323
 324        /* Uninorth internal bus */
 325        uninorth_internal_dev = qdev_new(
 326                                TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
 327        s = SYS_BUS_DEVICE(uninorth_internal_dev);
 328        sysbus_realize_and_unref(s, &error_fatal);
 329        sysbus_mmio_map(s, 0, 0xf4800000);
 330        sysbus_mmio_map(s, 1, 0xf4c00000);
 331
 332        /* Uninorth main bus */
 333        dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
 334        qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
 335        sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 336        uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
 337        s = SYS_BUS_DEVICE(dev);
 338        /* PCI hole */
 339        memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
 340                                    sysbus_mmio_get_region(s, 2));
 341        /* Register 8 MB of ISA IO space */
 342        memory_region_add_subregion(get_system_memory(), 0xf2000000,
 343                                    sysbus_mmio_get_region(s, 3));
 344        sysbus_mmio_map(s, 0, 0xf2800000);
 345        sysbus_mmio_map(s, 1, 0xf2c00000);
 346
 347        machine_arch = ARCH_MAC99;
 348    }
 349
 350    machine->usb |= defaults_enabled() && !machine->usb_disabled;
 351    has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
 352    has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
 353               core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
 354
 355    /* Timebase Frequency */
 356    if (kvm_enabled()) {
 357        tbfreq = kvmppc_get_tbfreq();
 358    } else {
 359        tbfreq = TBFREQ;
 360    }
 361
 362    /* init basic PC hardware */
 363    pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
 364
 365    /* MacIO */
 366    macio = pci_new(-1, TYPE_NEWWORLD_MACIO);
 367    dev = DEVICE(macio);
 368    qdev_prop_set_uint64(dev, "frequency", tbfreq);
 369    qdev_prop_set_bit(dev, "has-pmu", has_pmu);
 370    qdev_prop_set_bit(dev, "has-adb", has_adb);
 371
 372    escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc"));
 373    qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0));
 374    qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1));
 375
 376    pci_realize_and_unref(macio, pci_bus, &error_fatal);
 377
 378    pic_dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pic"));
 379    for (i = 0; i < 4; i++) {
 380        qdev_connect_gpio_out(DEVICE(uninorth_pci), i,
 381                              qdev_get_gpio_in(pic_dev, 0x1b + i));
 382    }
 383
 384    /* TODO: additional PCI buses only wired up for 32-bit machines */
 385    if (PPC_INPUT(env) != PPC_FLAGS_INPUT_970) {
 386        /* Uninorth AGP bus */
 387        for (i = 0; i < 4; i++) {
 388            qdev_connect_gpio_out(uninorth_agp_dev, i,
 389                                  qdev_get_gpio_in(pic_dev, 0x1b + i));
 390        }
 391
 392        /* Uninorth internal bus */
 393        for (i = 0; i < 4; i++) {
 394            qdev_connect_gpio_out(uninorth_internal_dev, i,
 395                                  qdev_get_gpio_in(pic_dev, 0x1b + i));
 396        }
 397    }
 398
 399    /* OpenPIC */
 400    s = SYS_BUS_DEVICE(pic_dev);
 401    k = 0;
 402    for (i = 0; i < smp_cpus; i++) {
 403        for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
 404            sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
 405        }
 406    }
 407    g_free(openpic_irqs);
 408
 409    /* We only emulate 2 out of 3 IDE controllers for now */
 410    ide_drive_get(hd, ARRAY_SIZE(hd));
 411
 412    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 413                                                        "ide[0]"));
 414    macio_ide_init_drives(macio_ide, hd);
 415
 416    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 417                                                        "ide[1]"));
 418    macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
 419
 420    if (has_adb) {
 421        if (has_pmu) {
 422            dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
 423        } else {
 424            dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
 425        }
 426
 427        adb_bus = qdev_get_child_bus(dev, "adb.0");
 428        dev = qdev_new(TYPE_ADB_KEYBOARD);
 429        qdev_realize_and_unref(dev, adb_bus, &error_fatal);
 430
 431        dev = qdev_new(TYPE_ADB_MOUSE);
 432        qdev_realize_and_unref(dev, adb_bus, &error_fatal);
 433    }
 434
 435    if (machine->usb) {
 436        pci_create_simple(pci_bus, -1, "pci-ohci");
 437
 438        /* U3 needs to use USB for input because Linux doesn't support via-cuda
 439        on PPC64 */
 440        if (!has_adb || machine_arch == ARCH_MAC99_U3) {
 441            USBBus *usb_bus = usb_bus_find(-1);
 442
 443            usb_create_simple(usb_bus, "usb-kbd");
 444            usb_create_simple(usb_bus, "usb-mouse");
 445        }
 446    }
 447
 448    pci_vga_init(pci_bus);
 449
 450    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
 451        graphic_depth = 15;
 452    }
 453
 454    for (i = 0; i < nb_nics; i++) {
 455        pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
 456    }
 457
 458    /* The NewWorld NVRAM is not located in the MacIO device */
 459    if (kvm_enabled() && qemu_real_host_page_size > 4096) {
 460        /* We can't combine read-write and read-only in a single page, so
 461           move the NVRAM out of ROM again for KVM */
 462        nvram_addr = 0xFFE00000;
 463    }
 464    dev = qdev_new(TYPE_MACIO_NVRAM);
 465    qdev_prop_set_uint32(dev, "size", 0x2000);
 466    qdev_prop_set_uint32(dev, "it_shift", 1);
 467    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 468    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
 469    nvr = MACIO_NVRAM(dev);
 470    pmac_format_nvram_partition(nvr, 0x2000);
 471    /* No PCI init: the BIOS will do it */
 472
 473    dev = qdev_new(TYPE_FW_CFG_MEM);
 474    fw_cfg = FW_CFG(dev);
 475    qdev_prop_set_uint32(dev, "data_width", 1);
 476    qdev_prop_set_bit(dev, "dma_enabled", false);
 477    object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
 478                              OBJECT(fw_cfg));
 479    s = SYS_BUS_DEVICE(dev);
 480    sysbus_realize_and_unref(s, &error_fatal);
 481    sysbus_mmio_map(s, 0, CFG_ADDR);
 482    sysbus_mmio_map(s, 1, CFG_ADDR + 2);
 483
 484    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
 485    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
 486    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 487    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
 488    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 489    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 490    if (kernel_cmdline) {
 491        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 492        pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 493    } else {
 494        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 495    }
 496    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 497    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 498    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 499
 500    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 501    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 502    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 503
 504    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
 505
 506    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 507    if (kvm_enabled()) {
 508        uint8_t *hypercall;
 509
 510        hypercall = g_malloc(16);
 511        kvmppc_get_hypercall(env, hypercall, 16);
 512        fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 513        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 514    }
 515    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
 516    /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
 517    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
 518    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
 519    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
 520
 521    /* MacOS NDRV VGA driver */
 522    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
 523    if (filename) {
 524        gchar *ndrv_file;
 525        gsize ndrv_size;
 526
 527        if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
 528            fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
 529        }
 530        g_free(filename);
 531    }
 532
 533    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 534}
 535
 536/*
 537 * Implementation of an interface to adjust firmware path
 538 * for the bootindex property handling.
 539 */
 540static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
 541                                DeviceState *dev)
 542{
 543    PCIDevice *pci;
 544    MACIOIDEState *macio_ide;
 545
 546    if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
 547        pci = PCI_DEVICE(dev);
 548        return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
 549    }
 550
 551    if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
 552        macio_ide = MACIO_IDE(dev);
 553        return g_strdup_printf("ata-3@%x", macio_ide->addr);
 554    }
 555
 556    if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
 557        return g_strdup("disk");
 558    }
 559
 560    if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
 561        return g_strdup("cdrom");
 562    }
 563
 564    if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
 565        return g_strdup("disk");
 566    }
 567
 568    return NULL;
 569}
 570static int core99_kvm_type(MachineState *machine, const char *arg)
 571{
 572    /* Always force PR KVM */
 573    return 2;
 574}
 575
 576static void core99_machine_class_init(ObjectClass *oc, void *data)
 577{
 578    MachineClass *mc = MACHINE_CLASS(oc);
 579    FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
 580
 581    mc->desc = "Mac99 based PowerMAC";
 582    mc->init = ppc_core99_init;
 583    mc->block_default_type = IF_IDE;
 584    mc->max_cpus = MAX_CPUS;
 585    mc->default_boot_order = "cd";
 586    mc->default_display = "std";
 587    mc->kvm_type = core99_kvm_type;
 588#ifdef TARGET_PPC64
 589    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
 590#else
 591    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
 592#endif
 593    mc->default_ram_id = "ppc_core99.ram";
 594    mc->ignore_boot_device_suffixes = true;
 595    fwc->get_dev_path = core99_fw_dev_path;
 596}
 597
 598static char *core99_get_via_config(Object *obj, Error **errp)
 599{
 600    Core99MachineState *cms = CORE99_MACHINE(obj);
 601
 602    switch (cms->via_config) {
 603    default:
 604    case CORE99_VIA_CONFIG_CUDA:
 605        return g_strdup("cuda");
 606
 607    case CORE99_VIA_CONFIG_PMU:
 608        return g_strdup("pmu");
 609
 610    case CORE99_VIA_CONFIG_PMU_ADB:
 611        return g_strdup("pmu-adb");
 612    }
 613}
 614
 615static void core99_set_via_config(Object *obj, const char *value, Error **errp)
 616{
 617    Core99MachineState *cms = CORE99_MACHINE(obj);
 618
 619    if (!strcmp(value, "cuda")) {
 620        cms->via_config = CORE99_VIA_CONFIG_CUDA;
 621    } else if (!strcmp(value, "pmu")) {
 622        cms->via_config = CORE99_VIA_CONFIG_PMU;
 623    } else if (!strcmp(value, "pmu-adb")) {
 624        cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
 625    } else {
 626        error_setg(errp, "Invalid via value");
 627        error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
 628    }
 629}
 630
 631static void core99_instance_init(Object *obj)
 632{
 633    Core99MachineState *cms = CORE99_MACHINE(obj);
 634
 635    /* Default via_config is CORE99_VIA_CONFIG_CUDA */
 636    cms->via_config = CORE99_VIA_CONFIG_CUDA;
 637    object_property_add_str(obj, "via", core99_get_via_config,
 638                            core99_set_via_config);
 639    object_property_set_description(obj, "via",
 640                                    "Set VIA configuration. "
 641                                    "Valid values are cuda, pmu and pmu-adb");
 642
 643    return;
 644}
 645
 646static const TypeInfo core99_machine_info = {
 647    .name          = MACHINE_TYPE_NAME("mac99"),
 648    .parent        = TYPE_MACHINE,
 649    .class_init    = core99_machine_class_init,
 650    .instance_init = core99_instance_init,
 651    .instance_size = sizeof(Core99MachineState),
 652    .interfaces = (InterfaceInfo[]) {
 653        { TYPE_FW_PATH_PROVIDER },
 654        { }
 655    },
 656};
 657
 658static void mac_machine_register_types(void)
 659{
 660    type_register_static(&core99_machine_info);
 661}
 662
 663type_init(mac_machine_register_types)
 664