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13#include "qemu/osdep.h"
14#include "qemu-common.h"
15#include "hw/ppc/spapr_numa.h"
16#include "hw/pci-host/spapr.h"
17#include "hw/ppc/fdt.h"
18
19
20#define SPAPR_GPU_NUMA_ID (cpu_to_be32(1))
21
22
23
24
25static int get_max_dist_ref_points(SpaprMachineState *spapr)
26{
27 if (spapr_ovec_test(spapr->ov5_cas, OV5_FORM2_AFFINITY)) {
28 return FORM2_DIST_REF_POINTS;
29 }
30
31 return FORM1_DIST_REF_POINTS;
32}
33
34
35
36
37static int get_numa_assoc_size(SpaprMachineState *spapr)
38{
39 if (spapr_ovec_test(spapr->ov5_cas, OV5_FORM2_AFFINITY)) {
40 return FORM2_NUMA_ASSOC_SIZE;
41 }
42
43 return FORM1_NUMA_ASSOC_SIZE;
44}
45
46
47
48
49
50
51
52static int get_vcpu_assoc_size(SpaprMachineState *spapr)
53{
54 return get_numa_assoc_size(spapr) + 1;
55}
56
57
58
59
60
61static const uint32_t *get_associativity(SpaprMachineState *spapr, int node_id)
62{
63 if (spapr_ovec_test(spapr->ov5_cas, OV5_FORM2_AFFINITY)) {
64 return spapr->FORM2_assoc_array[node_id];
65 }
66 return spapr->FORM1_assoc_array[node_id];
67}
68
69
70
71
72
73static int get_numa_distance(MachineState *ms, int src, int dst)
74{
75 NodeInfo *numa_info = ms->numa_state->nodes;
76 int ret = numa_info[src].distance[dst];
77
78 if (ret != 0) {
79 return ret;
80 }
81
82
83
84
85
86
87
88 if (src == dst) {
89 return NUMA_DISTANCE_MIN;
90 }
91
92 return NUMA_DISTANCE_DEFAULT;
93}
94
95static bool spapr_numa_is_symmetrical(MachineState *ms)
96{
97 int nb_numa_nodes = ms->numa_state->num_nodes;
98 int src, dst;
99
100 for (src = 0; src < nb_numa_nodes; src++) {
101 for (dst = src; dst < nb_numa_nodes; dst++) {
102 if (get_numa_distance(ms, src, dst) !=
103 get_numa_distance(ms, dst, src)) {
104 return false;
105 }
106 }
107 }
108
109 return true;
110}
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120
121unsigned int spapr_numa_initial_nvgpu_numa_id(MachineState *machine)
122{
123 return MAX(1, machine->numa_state->num_nodes);
124}
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142
143static uint8_t spapr_numa_get_numa_level(uint8_t distance)
144{
145 if (distance == 10) {
146 return 0x4;
147 } else if (distance > 11 && distance <= 30) {
148 return 0x3;
149 } else if (distance > 31 && distance <= 60) {
150 return 0x2;
151 } else if (distance > 61 && distance <= 120) {
152 return 0x1;
153 }
154
155 return 0;
156}
157
158static void spapr_numa_define_FORM1_domains(SpaprMachineState *spapr)
159{
160 MachineState *ms = MACHINE(spapr);
161 int nb_numa_nodes = ms->numa_state->num_nodes;
162 int src, dst, i, j;
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168
169 for (i = 1; i < nb_numa_nodes; i++) {
170 for (j = 1; j < FORM1_DIST_REF_POINTS; j++) {
171 spapr->FORM1_assoc_array[i][j] = cpu_to_be32(i);
172 }
173 }
174
175 for (src = 0; src < nb_numa_nodes; src++) {
176 for (dst = src; dst < nb_numa_nodes; dst++) {
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197 uint8_t distance = get_numa_distance(ms, src, dst);
198 uint8_t n_level = spapr_numa_get_numa_level(distance);
199 uint32_t assoc_src;
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213
214 if (n_level == 0) {
215 continue;
216 }
217
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220
221
222 for (i = n_level; i > 0; i--) {
223 assoc_src = spapr->FORM1_assoc_array[src][i];
224 spapr->FORM1_assoc_array[dst][i] = assoc_src;
225 }
226 }
227 }
228
229}
230
231static void spapr_numa_FORM1_affinity_check(MachineState *machine)
232{
233 int i;
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240
241
242 if (machine->numa_state->num_nodes) {
243 for (i = 0; i < machine->numa_state->num_nodes; ++i) {
244
245 if (machine->numa_state->nodes[i].node_mem == 0) {
246 CPUState *cs;
247 int found = 0;
248
249 CPU_FOREACH(cs) {
250 PowerPCCPU *cpu = POWERPC_CPU(cs);
251 if (cpu->node_id == i) {
252 found = 1;
253 break;
254 }
255 }
256
257 if (!found) {
258 error_report(
259"Memory-less/cpu-less nodes are not supported with FORM1 NUMA (node %d)", i);
260 exit(EXIT_FAILURE);
261 }
262 }
263 }
264 }
265
266 if (!spapr_numa_is_symmetrical(machine)) {
267 error_report(
268"Asymmetrical NUMA topologies aren't supported in the pSeries machine using FORM1 NUMA");
269 exit(EXIT_FAILURE);
270 }
271}
272
273
274
275
276static void spapr_numa_FORM1_affinity_init(SpaprMachineState *spapr,
277 MachineState *machine)
278{
279 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
280 int nb_numa_nodes = machine->numa_state->num_nodes;
281 int i, j, max_nodes_with_gpus;
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291
292 for (i = 0; i < nb_numa_nodes; i++) {
293 spapr->FORM1_assoc_array[i][0] = cpu_to_be32(FORM1_DIST_REF_POINTS);
294 spapr->FORM1_assoc_array[i][FORM1_DIST_REF_POINTS] = cpu_to_be32(i);
295 }
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305 max_nodes_with_gpus = nb_numa_nodes + NVGPU_MAX_NUM;
306
307 for (i = nb_numa_nodes; i < max_nodes_with_gpus; i++) {
308 spapr->FORM1_assoc_array[i][0] = cpu_to_be32(FORM1_DIST_REF_POINTS);
309
310 for (j = 1; j < FORM1_DIST_REF_POINTS; j++) {
311 uint32_t gpu_assoc = smc->pre_5_1_assoc_refpoints ?
312 SPAPR_GPU_NUMA_ID : cpu_to_be32(i);
313 spapr->FORM1_assoc_array[i][j] = gpu_assoc;
314 }
315
316 spapr->FORM1_assoc_array[i][FORM1_DIST_REF_POINTS] = cpu_to_be32(i);
317 }
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324
325 if (smc->pre_5_2_numa_associativity ||
326 machine->numa_state->num_nodes <= 1) {
327 return;
328 }
329
330 spapr_numa_define_FORM1_domains(spapr);
331}
332
333
334
335
336static void spapr_numa_FORM2_affinity_init(SpaprMachineState *spapr)
337{
338 int i;
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354 for (i = 0; i < NUMA_NODES_MAX_NUM; i++) {
355 spapr->FORM2_assoc_array[i][0] = cpu_to_be32(1);
356 spapr->FORM2_assoc_array[i][1] = cpu_to_be32(i);
357 }
358}
359
360void spapr_numa_associativity_init(SpaprMachineState *spapr,
361 MachineState *machine)
362{
363 spapr_numa_FORM1_affinity_init(spapr, machine);
364 spapr_numa_FORM2_affinity_init(spapr);
365}
366
367void spapr_numa_associativity_check(SpaprMachineState *spapr)
368{
369
370
371
372
373 if (spapr_ovec_test(spapr->ov5_cas, OV5_FORM2_AFFINITY)) {
374 return;
375 }
376
377 spapr_numa_FORM1_affinity_check(MACHINE(spapr));
378}
379
380void spapr_numa_write_associativity_dt(SpaprMachineState *spapr, void *fdt,
381 int offset, int nodeid)
382{
383 const uint32_t *associativity = get_associativity(spapr, nodeid);
384
385 _FDT((fdt_setprop(fdt, offset, "ibm,associativity",
386 associativity,
387 get_numa_assoc_size(spapr) * sizeof(uint32_t))));
388}
389
390static uint32_t *spapr_numa_get_vcpu_assoc(SpaprMachineState *spapr,
391 PowerPCCPU *cpu)
392{
393 const uint32_t *associativity = get_associativity(spapr, cpu->node_id);
394 int max_distance_ref_points = get_max_dist_ref_points(spapr);
395 int vcpu_assoc_size = get_vcpu_assoc_size(spapr);
396 uint32_t *vcpu_assoc = g_new(uint32_t, vcpu_assoc_size);
397 int index = spapr_get_vcpu_id(cpu);
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404
405 vcpu_assoc[0] = cpu_to_be32(max_distance_ref_points + 1);
406 vcpu_assoc[vcpu_assoc_size - 1] = cpu_to_be32(index);
407 memcpy(vcpu_assoc + 1, associativity + 1,
408 (vcpu_assoc_size - 2) * sizeof(uint32_t));
409
410 return vcpu_assoc;
411}
412
413int spapr_numa_fixup_cpu_dt(SpaprMachineState *spapr, void *fdt,
414 int offset, PowerPCCPU *cpu)
415{
416 g_autofree uint32_t *vcpu_assoc = NULL;
417 int vcpu_assoc_size = get_vcpu_assoc_size(spapr);
418
419 vcpu_assoc = spapr_numa_get_vcpu_assoc(spapr, cpu);
420
421
422 return fdt_setprop(fdt, offset, "ibm,associativity", vcpu_assoc,
423 vcpu_assoc_size * sizeof(uint32_t));
424}
425
426
427int spapr_numa_write_assoc_lookup_arrays(SpaprMachineState *spapr, void *fdt,
428 int offset)
429{
430 MachineState *machine = MACHINE(spapr);
431 int max_distance_ref_points = get_max_dist_ref_points(spapr);
432 int nb_numa_nodes = machine->numa_state->num_nodes;
433 int nr_nodes = nb_numa_nodes ? nb_numa_nodes : 1;
434 uint32_t *int_buf, *cur_index, buf_len;
435 int ret, i;
436
437
438 buf_len = (nr_nodes * max_distance_ref_points + 2) * sizeof(uint32_t);
439 cur_index = int_buf = g_malloc0(buf_len);
440 int_buf[0] = cpu_to_be32(nr_nodes);
441
442 int_buf[1] = cpu_to_be32(max_distance_ref_points);
443 cur_index += 2;
444 for (i = 0; i < nr_nodes; i++) {
445
446
447
448
449 const uint32_t *associativity = get_associativity(spapr, i);
450 memcpy(cur_index, ++associativity,
451 sizeof(uint32_t) * max_distance_ref_points);
452 cur_index += max_distance_ref_points;
453 }
454 ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf,
455 (cur_index - int_buf) * sizeof(uint32_t));
456 g_free(int_buf);
457
458 return ret;
459}
460
461static void spapr_numa_FORM1_write_rtas_dt(SpaprMachineState *spapr,
462 void *fdt, int rtas)
463{
464 MachineState *ms = MACHINE(spapr);
465 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
466 uint32_t number_nvgpus_nodes = spapr->gpu_numa_id -
467 spapr_numa_initial_nvgpu_numa_id(ms);
468 uint32_t refpoints[] = {
469 cpu_to_be32(0x4),
470 cpu_to_be32(0x3),
471 cpu_to_be32(0x2),
472 cpu_to_be32(0x1),
473 };
474 uint32_t nr_refpoints = ARRAY_SIZE(refpoints);
475 uint32_t maxdomain = ms->numa_state->num_nodes + number_nvgpus_nodes;
476 uint32_t maxdomains[] = {
477 cpu_to_be32(4),
478 cpu_to_be32(maxdomain),
479 cpu_to_be32(maxdomain),
480 cpu_to_be32(maxdomain),
481 cpu_to_be32(maxdomain)
482 };
483
484 if (smc->pre_5_2_numa_associativity ||
485 ms->numa_state->num_nodes <= 1) {
486 uint32_t legacy_refpoints[] = {
487 cpu_to_be32(0x4),
488 cpu_to_be32(0x4),
489 cpu_to_be32(0x2),
490 };
491 uint32_t legacy_maxdomain = spapr->gpu_numa_id > 1 ? 1 : 0;
492 uint32_t legacy_maxdomains[] = {
493 cpu_to_be32(4),
494 cpu_to_be32(legacy_maxdomain),
495 cpu_to_be32(legacy_maxdomain),
496 cpu_to_be32(legacy_maxdomain),
497 cpu_to_be32(spapr->gpu_numa_id),
498 };
499
500 G_STATIC_ASSERT(sizeof(legacy_refpoints) <= sizeof(refpoints));
501 G_STATIC_ASSERT(sizeof(legacy_maxdomains) <= sizeof(maxdomains));
502
503 nr_refpoints = 3;
504
505 memcpy(refpoints, legacy_refpoints, sizeof(legacy_refpoints));
506 memcpy(maxdomains, legacy_maxdomains, sizeof(legacy_maxdomains));
507
508
509 if (smc->pre_5_1_assoc_refpoints) {
510 nr_refpoints = 2;
511 }
512 }
513
514 _FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points",
515 refpoints, nr_refpoints * sizeof(refpoints[0])));
516
517 _FDT(fdt_setprop(fdt, rtas, "ibm,max-associativity-domains",
518 maxdomains, sizeof(maxdomains)));
519}
520
521static void spapr_numa_FORM2_write_rtas_tables(SpaprMachineState *spapr,
522 void *fdt, int rtas)
523{
524 MachineState *ms = MACHINE(spapr);
525 int nb_numa_nodes = ms->numa_state->num_nodes;
526 int distance_table_entries = nb_numa_nodes * nb_numa_nodes;
527 g_autofree uint32_t *lookup_index_table = NULL;
528 g_autofree uint8_t *distance_table = NULL;
529 int src, dst, i, distance_table_size;
530
531
532
533
534
535 lookup_index_table = g_new0(uint32_t, nb_numa_nodes + 1);
536 lookup_index_table[0] = cpu_to_be32(nb_numa_nodes);
537
538 for (i = 0; i < nb_numa_nodes; i++) {
539 lookup_index_table[i + 1] = cpu_to_be32(i);
540 }
541
542 _FDT(fdt_setprop(fdt, rtas, "ibm,numa-lookup-index-table",
543 lookup_index_table,
544 (nb_numa_nodes + 1) * sizeof(uint32_t)));
545
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554
555
556 distance_table_size = distance_table_entries * sizeof(uint8_t) +
557 sizeof(uint32_t);
558 distance_table = g_new0(uint8_t, distance_table_size);
559 stl_be_p(distance_table, distance_table_entries);
560
561
562 i = sizeof(uint32_t);
563
564 for (src = 0; src < nb_numa_nodes; src++) {
565 for (dst = 0; dst < nb_numa_nodes; dst++) {
566 distance_table[i++] = get_numa_distance(ms, src, dst);
567 }
568 }
569
570 _FDT(fdt_setprop(fdt, rtas, "ibm,numa-distance-table",
571 distance_table, distance_table_size));
572}
573
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581
582static void spapr_numa_FORM2_write_rtas_dt(SpaprMachineState *spapr,
583 void *fdt, int rtas)
584{
585 MachineState *ms = MACHINE(spapr);
586 uint32_t number_nvgpus_nodes = spapr->gpu_numa_id -
587 spapr_numa_initial_nvgpu_numa_id(ms);
588
589
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597
598
599 uint32_t refpoints[] = { cpu_to_be32(1) };
600
601 uint32_t maxdomain = ms->numa_state->num_nodes + number_nvgpus_nodes;
602 uint32_t maxdomains[] = { cpu_to_be32(1), cpu_to_be32(maxdomain) };
603
604 _FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points",
605 refpoints, sizeof(refpoints)));
606
607 _FDT(fdt_setprop(fdt, rtas, "ibm,max-associativity-domains",
608 maxdomains, sizeof(maxdomains)));
609
610 spapr_numa_FORM2_write_rtas_tables(spapr, fdt, rtas);
611}
612
613
614
615
616
617
618void spapr_numa_write_rtas_dt(SpaprMachineState *spapr, void *fdt, int rtas)
619{
620 if (spapr_ovec_test(spapr->ov5_cas, OV5_FORM2_AFFINITY)) {
621 spapr_numa_FORM2_write_rtas_dt(spapr, fdt, rtas);
622 return;
623 }
624
625 spapr_numa_FORM1_write_rtas_dt(spapr, fdt, rtas);
626}
627
628static target_ulong h_home_node_associativity(PowerPCCPU *cpu,
629 SpaprMachineState *spapr,
630 target_ulong opcode,
631 target_ulong *args)
632{
633 g_autofree uint32_t *vcpu_assoc = NULL;
634 target_ulong flags = args[0];
635 target_ulong procno = args[1];
636 PowerPCCPU *tcpu;
637 int idx, assoc_idx;
638 int vcpu_assoc_size = get_vcpu_assoc_size(spapr);
639
640
641 if (flags != 0x1) {
642 return H_FUNCTION;
643 }
644
645 tcpu = spapr_find_cpu(procno);
646 if (tcpu == NULL) {
647 return H_P2;
648 }
649
650
651
652
653
654
655
656
657 g_assert((vcpu_assoc_size - 1) <= 12);
658
659 vcpu_assoc = spapr_numa_get_vcpu_assoc(spapr, tcpu);
660
661 assoc_idx = 1;
662
663#define ASSOCIATIVITY(a, b) (((uint64_t)(a) << 32) | \
664 ((uint64_t)(b) & 0xffffffff))
665
666 for (idx = 0; idx < 6; idx++) {
667 int32_t a, b;
668
669
670
671
672
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674
675
676
677
678 a = assoc_idx < vcpu_assoc_size ?
679 be32_to_cpu(vcpu_assoc[assoc_idx++]) : -1;
680 b = assoc_idx < vcpu_assoc_size ?
681 be32_to_cpu(vcpu_assoc[assoc_idx++]) : -1;
682
683 args[idx] = ASSOCIATIVITY(a, b);
684 }
685#undef ASSOCIATIVITY
686
687 return H_SUCCESS;
688}
689
690static void spapr_numa_register_types(void)
691{
692
693 spapr_register_hypercall(H_HOME_NODE_ASSOCIATIVITY,
694 h_home_node_associativity);
695}
696
697type_init(spapr_numa_register_types)
698