qemu/hw/timer/trace-events
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   1# See docs/devel/tracing.rst for syntax documentation.
   2
   3# slavio_timer.c
   4slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit 0x%"PRIx64" count 0x%x0x%08x"
   5slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count 0x%x0x%08x"
   6slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address 0x%"PRIx64
   7slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read 0x%"PRIx64" = 0x%08x"
   8slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write 0x%"PRIx64" = 0x%08x"
   9slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to 0x%016"PRIx64
  10slavio_timer_mem_writel_counter_invalid(void) "not user timer"
  11slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
  12slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
  13slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
  14slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
  15slavio_timer_mem_writel_mode_invalid(void) "not system timer"
  16slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address 0x%"PRIx64
  17
  18# grlib_gptimer.c
  19grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
  20grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
  21grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
  22grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq:%uHz"
  23grlib_gptimer_hit(int id) "timer:%d HIT"
  24grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
  25grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
  26
  27# aspeed_timer.c
  28aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
  29aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
  30aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
  31aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
  32aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32
  33aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32
  34aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64
  35
  36# armv7m_systick.c
  37systick_reload(void) "systick reload"
  38systick_timer_tick(void) "systick reload"
  39systick_read(uint64_t addr, uint32_t value, unsigned size) "systick read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
  40systick_write(uint64_t addr, uint32_t value, unsigned size) "systick write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
  41
  42# cmsdk-apb-timer.c
  43cmsdk_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  44cmsdk_apb_timer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  45cmsdk_apb_timer_reset(void) "CMSDK APB timer: reset"
  46
  47# cmsdk-apb-dualtimer.c
  48cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  49cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  50cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset"
  51
  52# npcm7xx_timer.c
  53npcm7xx_timer_read(const char *id, uint64_t offset, uint64_t value) " %s offset: 0x%04" PRIx64 " value 0x%08" PRIx64
  54npcm7xx_timer_write(const char *id, uint64_t offset, uint64_t value) "%s offset: 0x%04" PRIx64 " value 0x%08" PRIx64
  55npcm7xx_timer_irq(const char *id, int timer, int state) "%s timer %d state %d"
  56
  57# nrf51_timer.c
  58nrf51_timer_read(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) "timer %u read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
  59nrf51_timer_write(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) "timer %u write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
  60nrf51_timer_set_count(uint8_t timer_id, uint8_t counter_id, uint32_t value) "timer %u counter %u count 0x%" PRIx32
  61
  62# bcm2835_systmr.c
  63bcm2835_systmr_timer_expired(unsigned id) "timer #%u expired"
  64bcm2835_systmr_irq_ack(unsigned id) "timer #%u acked"
  65bcm2835_systmr_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64 " data 0x%" PRIx64
  66bcm2835_systmr_write(uint64_t offset, uint32_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx32
  67bcm2835_systmr_run(unsigned id, uint64_t delay_us) "timer #%u expiring in %"PRIu64" us"
  68
  69# avr_timer16.c
  70avr_timer16_read(uint8_t addr, uint8_t value) "timer16 read addr:%u value:%u"
  71avr_timer16_read_ifr(uint8_t value) "timer16 read addr:ifr value:%u"
  72avr_timer16_read_imsk(uint8_t value) "timer16 read addr:imsk value:%u"
  73avr_timer16_write(uint8_t addr, uint8_t value) "timer16 write addr:%u value:%u"
  74avr_timer16_write_imsk(uint8_t value) "timer16 write addr:imsk value:%u"
  75avr_timer16_interrupt_count(uint8_t cnt) "count: %u"
  76avr_timer16_interrupt_overflow(const char *reason) "overflow: %s"
  77avr_timer16_next_alarm(uint64_t delay_ns) "next alarm: %" PRIu64 " ns from now"
  78avr_timer16_clksrc_update(uint64_t freq_hz, uint64_t period_ns, uint64_t delay_s) "timer frequency: %" PRIu64 " Hz, period: %" PRIu64 " ns (%" PRId64 " us)"
  79
  80# sse_counter.c
  81sse_counter_control_read(uint64_t offset, uint64_t data, unsigned size) "SSE system counter control frame read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  82sse_counter_control_write(uint64_t offset, uint64_t data, unsigned size) "SSE system counter control framen write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  83sse_counter_status_read(uint64_t offset, uint64_t data, unsigned size) "SSE system counter status frame read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  84sse_counter_status_write(uint64_t offset, uint64_t data, unsigned size) "SSE system counter status frame write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  85sse_counter_reset(void) "SSE system counter: reset"
  86
  87# sse_timer.c
  88sse_timer_read(uint64_t offset, uint64_t data, unsigned size) "SSE system timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  89sse_timer_write(uint64_t offset, uint64_t data, unsigned size) "SSE system timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  90sse_timer_reset(void) "SSE system timer: reset"
  91
  92# sifive_pwm.c
  93sifive_pwm_set_alarm(uint64_t alarm, uint64_t now) "Setting alarm to: 0x%" PRIx64 ", now: 0x%" PRIx64
  94sifive_pwm_interrupt(int num) "Interrupt %d"
  95sifive_pwm_read(uint64_t offset) "Read at address: 0x%" PRIx64
  96sifive_pwm_write(uint64_t data, uint64_t offset) "Write 0x%" PRIx64 " at address: 0x%" PRIx64
  97
  98# sh_timer.c
  99sh_timer_start_stop(int enable, int current) "%d (%d)"
 100sh_timer_read(uint64_t offset) "tmu012_read 0x%" PRIx64
 101sh_timer_write(uint64_t offset, uint64_t value) "tmu012_write 0x%" PRIx64 " 0x%08" PRIx64
 102