1#ifndef QEMU_ELF_H 2#define QEMU_ELF_H 3 4/* 32-bit ELF base types. */ 5typedef uint32_t Elf32_Addr; 6typedef uint16_t Elf32_Half; 7typedef uint32_t Elf32_Off; 8typedef int32_t Elf32_Sword; 9typedef uint32_t Elf32_Word; 10 11/* 64-bit ELF base types. */ 12typedef uint64_t Elf64_Addr; 13typedef uint16_t Elf64_Half; 14typedef int16_t Elf64_SHalf; 15typedef uint64_t Elf64_Off; 16typedef int32_t Elf64_Sword; 17typedef uint32_t Elf64_Word; 18typedef uint64_t Elf64_Xword; 19typedef int64_t Elf64_Sxword; 20 21/* These constants are for the segment types stored in the image headers */ 22#define PT_NULL 0 23#define PT_LOAD 1 24#define PT_DYNAMIC 2 25#define PT_INTERP 3 26#define PT_NOTE 4 27#define PT_SHLIB 5 28#define PT_PHDR 6 29#define PT_LOOS 0x60000000 30#define PT_HIOS 0x6fffffff 31#define PT_LOPROC 0x70000000 32#define PT_HIPROC 0x7fffffff 33 34#define PT_GNU_PROPERTY (PT_LOOS + 0x474e553) 35 36#define PT_MIPS_REGINFO 0x70000000 37#define PT_MIPS_RTPROC 0x70000001 38#define PT_MIPS_OPTIONS 0x70000002 39#define PT_MIPS_ABIFLAGS 0x70000003 40 41/* Flags in the e_flags field of the header */ 42/* MIPS architecture level. */ 43#define EF_MIPS_ARCH 0xf0000000 44 45/* Legal values for MIPS architecture level. */ 46#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ 47#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ 48#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ 49#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ 50#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ 51#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ 52#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */ 53#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32r2 code. */ 54#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64r2 code. */ 55#define EF_MIPS_ARCH_32R6 0x90000000 /* MIPS32r6 code. */ 56#define EF_MIPS_ARCH_64R6 0xa0000000 /* MIPS64r6 code. */ 57 58/* The ABI of a file. */ 59#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */ 60#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */ 61 62#define EF_MIPS_NOREORDER 0x00000001 63#define EF_MIPS_PIC 0x00000002 64#define EF_MIPS_CPIC 0x00000004 65#define EF_MIPS_ABI2 0x00000020 66#define EF_MIPS_OPTIONS_FIRST 0x00000080 67#define EF_MIPS_32BITMODE 0x00000100 68#define EF_MIPS_ABI 0x0000f000 69#define EF_MIPS_FP64 0x00000200 70#define EF_MIPS_NAN2008 0x00000400 71 72/* MIPS machine variant */ 73#define EF_MIPS_MACH_NONE 0x00000000 /* A standard MIPS implementation */ 74#define EF_MIPS_MACH_3900 0x00810000 /* Toshiba R3900 */ 75#define EF_MIPS_MACH_4010 0x00820000 /* LSI R4010 */ 76#define EF_MIPS_MACH_4100 0x00830000 /* NEC VR4100 */ 77#define EF_MIPS_MACH_4650 0x00850000 /* MIPS R4650 */ 78#define EF_MIPS_MACH_4120 0x00870000 /* NEC VR4120 */ 79#define EF_MIPS_MACH_4111 0x00880000 /* NEC VR4111/VR4181 */ 80#define EF_MIPS_MACH_SB1 0x008a0000 /* Broadcom SB-1 */ 81#define EF_MIPS_MACH_OCTEON 0x008b0000 /* Cavium Networks Octeon */ 82#define EF_MIPS_MACH_XLR 0x008c0000 /* RMI Xlr */ 83#define EF_MIPS_MACH_OCTEON2 0x008d0000 /* Cavium Networks Octeon2 */ 84#define EF_MIPS_MACH_OCTEON3 0x008e0000 /* Cavium Networks Octeon3 */ 85#define EF_MIPS_MACH_5400 0x00910000 /* NEC VR5400 */ 86#define EF_MIPS_MACH_5900 0x00920000 /* Toshiba/Sony R5900 */ 87#define EF_MIPS_MACH_5500 0x00980000 /* NEC VR5500 */ 88#define EF_MIPS_MACH_9000 0x00990000 /* PMC-Sierra RM9000 */ 89#define EF_MIPS_MACH_LS2E 0x00a00000 /* ST Microelectronics Loongson 2E */ 90#define EF_MIPS_MACH_LS2F 0x00a10000 /* ST Microelectronics Loongson 2F */ 91#define EF_MIPS_MACH_LS3A 0x00a20000 /* ST Microelectronics Loongson 3A */ 92#define EF_MIPS_MACH 0x00ff0000 /* EF_MIPS_MACH_xxx selection mask */ 93 94#define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (internal) */ 95 96#define MIPS_ABI_FP_ANY 0x0 /* FP ABI doesn't matter */ 97#define MIPS_ABI_FP_DOUBLE 0x1 /* -mdouble-float */ 98#define MIPS_ABI_FP_SINGLE 0x2 /* -msingle-float */ 99#define MIPS_ABI_FP_SOFT 0x3 /* -msoft-float */ 100#define MIPS_ABI_FP_OLD_64 0x4 /* -mips32r2 -mfp64 */ 101#define MIPS_ABI_FP_XX 0x5 /* -mfpxx */ 102#define MIPS_ABI_FP_64 0x6 /* -mips32r2 -mfp64 */ 103#define MIPS_ABI_FP_64A 0x7 /* -mips32r2 -mfp64 -mno-odd-spreg */ 104 105typedef struct mips_elf_abiflags_v0 { 106 uint16_t version; /* Version of flags structure */ 107 uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */ 108 uint8_t isa_rev; /* The revision of ISA: */ 109 /* - 0 for MIPS V and below, */ 110 /* - 1-n otherwise. */ 111 uint8_t gpr_size; /* The size of general purpose registers */ 112 uint8_t cpr1_size; /* The size of co-processor 1 registers */ 113 uint8_t cpr2_size; /* The size of co-processor 2 registers */ 114 uint8_t fp_abi; /* The floating-point ABI */ 115 uint32_t isa_ext; /* Mask of processor-specific extensions */ 116 uint32_t ases; /* Mask of ASEs used */ 117 uint32_t flags1; /* Mask of general flags */ 118 uint32_t flags2; 119} Mips_elf_abiflags_v0; 120 121/* These constants define the different elf file types */ 122#define ET_NONE 0 123#define ET_REL 1 124#define ET_EXEC 2 125#define ET_DYN 3 126#define ET_CORE 4 127#define ET_LOPROC 0xff00 128#define ET_HIPROC 0xffff 129 130/* These constants define the various ELF target machines */ 131#define EM_NONE 0 132#define EM_M32 1 133#define EM_SPARC 2 134#define EM_386 3 135#define EM_68K 4 136#define EM_88K 5 137#define EM_486 6 /* Perhaps disused */ 138#define EM_860 7 139 140#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */ 141 142#define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */ 143 144#define EM_PARISC 15 /* HPPA */ 145 146#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ 147 148#define EM_PPC 20 /* PowerPC */ 149#define EM_PPC64 21 /* PowerPC64 */ 150 151#define EM_ARM 40 /* ARM */ 152 153#define EM_SH 42 /* SuperH */ 154 155#define EM_SPARCV9 43 /* SPARC v9 64-bit */ 156 157#define EM_TRICORE 44 /* Infineon TriCore */ 158 159#define EM_IA_64 50 /* HP/Intel IA-64 */ 160 161#define EM_X86_64 62 /* AMD x86-64 */ 162 163#define EM_S390 22 /* IBM S/390 */ 164 165#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ 166 167#define EM_AVR 83 /* AVR 8-bit microcontroller */ 168 169#define EM_V850 87 /* NEC v850 */ 170 171#define EM_H8_300H 47 /* Hitachi H8/300H */ 172#define EM_H8S 48 /* Hitachi H8S */ 173#define EM_LATTICEMICO32 138 /* LatticeMico32 */ 174 175#define EM_OPENRISC 92 /* OpenCores OpenRISC */ 176 177#define EM_HEXAGON 164 /* Qualcomm Hexagon */ 178 179#define EM_RX 173 /* Renesas RX family */ 180 181#define EM_RISCV 243 /* RISC-V */ 182 183#define EM_NANOMIPS 249 /* Wave Computing nanoMIPS */ 184 185/* 186 * This is an interim value that we will use until the committee comes 187 * up with a final number. 188 */ 189#define EM_ALPHA 0x9026 190 191/* Bogus old v850 magic number, used by old tools. */ 192#define EM_CYGNUS_V850 0x9080 193 194/* 195 * This is the old interim value for S/390 architecture 196 */ 197#define EM_S390_OLD 0xA390 198 199#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */ 200 201#define EM_MICROBLAZE 189 202#define EM_MICROBLAZE_OLD 0xBAAB 203 204#define EM_XTENSA 94 /* Tensilica Xtensa */ 205 206#define EM_AARCH64 183 207 208#define EF_AVR_MACH 0x7F /* Mask for AVR e_flags to get core type */ 209 210/* This is the info that is needed to parse the dynamic section of the file */ 211#define DT_NULL 0 212#define DT_NEEDED 1 213#define DT_PLTRELSZ 2 214#define DT_PLTGOT 3 215#define DT_HASH 4 216#define DT_STRTAB 5 217#define DT_SYMTAB 6 218#define DT_RELA 7 219#define DT_RELASZ 8 220#define DT_RELAENT 9 221#define DT_STRSZ 10 222#define DT_SYMENT 11 223#define DT_INIT 12 224#define DT_FINI 13 225#define DT_SONAME 14 226#define DT_RPATH 15 227#define DT_SYMBOLIC 16 228#define DT_REL 17 229#define DT_RELSZ 18 230#define DT_RELENT 19 231#define DT_PLTREL 20 232#define DT_DEBUG 21 233#define DT_TEXTREL 22 234#define DT_JMPREL 23 235#define DT_BINDNOW 24 236#define DT_INIT_ARRAY 25 237#define DT_FINI_ARRAY 26 238#define DT_INIT_ARRAYSZ 27 239#define DT_FINI_ARRAYSZ 28 240#define DT_RUNPATH 29 241#define DT_FLAGS 30 242#define DT_LOOS 0x6000000d 243#define DT_HIOS 0x6ffff000 244#define DT_LOPROC 0x70000000 245#define DT_HIPROC 0x7fffffff 246 247/* DT_ entries which fall between DT_VALRNGLO and DT_VALRNDHI use 248 the d_val field of the Elf*_Dyn structure. I.e. they contain scalars. */ 249#define DT_VALRNGLO 0x6ffffd00 250#define DT_VALRNGHI 0x6ffffdff 251 252/* DT_ entries which fall between DT_ADDRRNGLO and DT_ADDRRNGHI use 253 the d_ptr field of the Elf*_Dyn structure. I.e. they contain pointers. */ 254#define DT_ADDRRNGLO 0x6ffffe00 255#define DT_ADDRRNGHI 0x6ffffeff 256 257#define DT_VERSYM 0x6ffffff0 258#define DT_RELACOUNT 0x6ffffff9 259#define DT_RELCOUNT 0x6ffffffa 260#define DT_FLAGS_1 0x6ffffffb 261#define DT_VERDEF 0x6ffffffc 262#define DT_VERDEFNUM 0x6ffffffd 263#define DT_VERNEED 0x6ffffffe 264#define DT_VERNEEDNUM 0x6fffffff 265 266#define DT_MIPS_RLD_VERSION 0x70000001 267#define DT_MIPS_TIME_STAMP 0x70000002 268#define DT_MIPS_ICHECKSUM 0x70000003 269#define DT_MIPS_IVERSION 0x70000004 270#define DT_MIPS_FLAGS 0x70000005 271 #define RHF_NONE 0 272 #define RHF_HARDWAY 1 273 #define RHF_NOTPOT 2 274#define DT_MIPS_BASE_ADDRESS 0x70000006 275#define DT_MIPS_CONFLICT 0x70000008 276#define DT_MIPS_LIBLIST 0x70000009 277#define DT_MIPS_LOCAL_GOTNO 0x7000000a 278#define DT_MIPS_CONFLICTNO 0x7000000b 279#define DT_MIPS_LIBLISTNO 0x70000010 280#define DT_MIPS_SYMTABNO 0x70000011 281#define DT_MIPS_UNREFEXTNO 0x70000012 282#define DT_MIPS_GOTSYM 0x70000013 283#define DT_MIPS_HIPAGENO 0x70000014 284#define DT_MIPS_RLD_MAP 0x70000016 285 286/* This info is needed when parsing the symbol table */ 287#define STB_LOCAL 0 288#define STB_GLOBAL 1 289#define STB_WEAK 2 290 291#define STT_NOTYPE 0 292#define STT_OBJECT 1 293#define STT_FUNC 2 294#define STT_SECTION 3 295#define STT_FILE 4 296 297#define ELF_ST_BIND(x) ((x) >> 4) 298#define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf) 299#define ELF_ST_INFO(bind, type) (((bind) << 4) | ((type) & 0xf)) 300#define ELF32_ST_BIND(x) ELF_ST_BIND(x) 301#define ELF32_ST_TYPE(x) ELF_ST_TYPE(x) 302#define ELF64_ST_BIND(x) ELF_ST_BIND(x) 303#define ELF64_ST_TYPE(x) ELF_ST_TYPE(x) 304 305/* Symbolic values for the entries in the auxiliary table 306 put on the initial stack */ 307#define AT_NULL 0 /* end of vector */ 308#define AT_IGNORE 1 /* entry should be ignored */ 309#define AT_EXECFD 2 /* file descriptor of program */ 310#define AT_PHDR 3 /* program headers for program */ 311#define AT_PHENT 4 /* size of program header entry */ 312#define AT_PHNUM 5 /* number of program headers */ 313#define AT_PAGESZ 6 /* system page size */ 314#define AT_BASE 7 /* base address of interpreter */ 315#define AT_FLAGS 8 /* flags */ 316#define AT_ENTRY 9 /* entry point of program */ 317#define AT_NOTELF 10 /* program is not ELF */ 318#define AT_UID 11 /* real uid */ 319#define AT_EUID 12 /* effective uid */ 320#define AT_GID 13 /* real gid */ 321#define AT_EGID 14 /* effective gid */ 322#define AT_PLATFORM 15 /* string identifying CPU for optimizations */ 323#define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ 324#define AT_CLKTCK 17 /* frequency at which times() increments */ 325#define AT_FPUCW 18 /* info about fpu initialization by kernel */ 326#define AT_DCACHEBSIZE 19 /* data cache block size */ 327#define AT_ICACHEBSIZE 20 /* instruction cache block size */ 328#define AT_UCACHEBSIZE 21 /* unified cache block size */ 329#define AT_IGNOREPPC 22 /* ppc only; entry should be ignored */ 330#define AT_SECURE 23 /* boolean, was exec suid-like? */ 331#define AT_BASE_PLATFORM 24 /* string identifying real platforms */ 332#define AT_RANDOM 25 /* address of 16 random bytes */ 333#define AT_HWCAP2 26 /* extension of AT_HWCAP */ 334#define AT_EXECFN 31 /* filename of the executable */ 335#define AT_SYSINFO 32 /* address of kernel entry point */ 336#define AT_SYSINFO_EHDR 33 /* address of kernel vdso */ 337#define AT_L1I_CACHESHAPE 34 /* shapes of the caches: */ 338#define AT_L1D_CACHESHAPE 35 /* bits 0-3: cache associativity. */ 339#define AT_L2_CACHESHAPE 36 /* bits 4-7: log2 of line size. */ 340#define AT_L3_CACHESHAPE 37 /* val&~255: cache size. */ 341 342typedef struct dynamic{ 343 Elf32_Sword d_tag; 344 union{ 345 Elf32_Sword d_val; 346 Elf32_Addr d_ptr; 347 } d_un; 348} Elf32_Dyn; 349 350typedef struct { 351 Elf64_Sxword d_tag; /* entry tag value */ 352 union { 353 Elf64_Xword d_val; 354 Elf64_Addr d_ptr; 355 } d_un; 356} Elf64_Dyn; 357 358/* The following are used with relocations */ 359#define ELF32_R_SYM(x) ((x) >> 8) 360#define ELF32_R_TYPE(x) ((x) & 0xff) 361 362#define ELF64_R_SYM(i) ((i) >> 32) 363#define ELF64_R_TYPE(i) ((i) & 0xffffffff) 364#define ELF64_R_TYPE_DATA(i) (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000) 365 366#define R_386_NONE 0 367#define R_386_32 1 368#define R_386_PC32 2 369#define R_386_GOT32 3 370#define R_386_PLT32 4 371#define R_386_COPY 5 372#define R_386_GLOB_DAT 6 373#define R_386_JMP_SLOT 7 374#define R_386_RELATIVE 8 375#define R_386_GOTOFF 9 376#define R_386_GOTPC 10 377#define R_386_NUM 11 378/* Not a dynamic reloc, so not included in R_386_NUM. Used in TCG. */ 379#define R_386_PC8 23 380 381#define R_MIPS_NONE 0 382#define R_MIPS_16 1 383#define R_MIPS_32 2 384#define R_MIPS_REL32 3 385#define R_MIPS_26 4 386#define R_MIPS_HI16 5 387#define R_MIPS_LO16 6 388#define R_MIPS_GPREL16 7 389#define R_MIPS_LITERAL 8 390#define R_MIPS_GOT16 9 391#define R_MIPS_PC16 10 392#define R_MIPS_CALL16 11 393#define R_MIPS_GPREL32 12 394/* The remaining relocs are defined on Irix, although they are not 395 in the MIPS ELF ABI. */ 396#define R_MIPS_UNUSED1 13 397#define R_MIPS_UNUSED2 14 398#define R_MIPS_UNUSED3 15 399#define R_MIPS_SHIFT5 16 400#define R_MIPS_SHIFT6 17 401#define R_MIPS_64 18 402#define R_MIPS_GOT_DISP 19 403#define R_MIPS_GOT_PAGE 20 404#define R_MIPS_GOT_OFST 21 405/* 406 * The following two relocation types are specified in the MIPS ABI 407 * conformance guide version 1.2 but not yet in the psABI. 408 */ 409#define R_MIPS_GOTHI16 22 410#define R_MIPS_GOTLO16 23 411#define R_MIPS_SUB 24 412#define R_MIPS_INSERT_A 25 413#define R_MIPS_INSERT_B 26 414#define R_MIPS_DELETE 27 415#define R_MIPS_HIGHER 28 416#define R_MIPS_HIGHEST 29 417/* 418 * The following two relocation types are specified in the MIPS ABI 419 * conformance guide version 1.2 but not yet in the psABI. 420 */ 421#define R_MIPS_CALLHI16 30 422#define R_MIPS_CALLLO16 31 423/* 424 * This range is reserved for vendor specific relocations. 425 */ 426#define R_MIPS_LOVENDOR 100 427#define R_MIPS_HIVENDOR 127 428 429 430/* SUN SPARC specific definitions. */ 431 432/* Values for Elf64_Ehdr.e_flags. */ 433 434#define EF_SPARCV9_MM 3 435#define EF_SPARCV9_TSO 0 436#define EF_SPARCV9_PSO 1 437#define EF_SPARCV9_RMO 2 438#define EF_SPARC_LEDATA 0x800000 /* little endian data */ 439#define EF_SPARC_EXT_MASK 0xFFFF00 440#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */ 441#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */ 442#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */ 443#define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */ 444 445/* 446 * Sparc ELF relocation types 447 */ 448#define R_SPARC_NONE 0 449#define R_SPARC_8 1 450#define R_SPARC_16 2 451#define R_SPARC_32 3 452#define R_SPARC_DISP8 4 453#define R_SPARC_DISP16 5 454#define R_SPARC_DISP32 6 455#define R_SPARC_WDISP30 7 456#define R_SPARC_WDISP22 8 457#define R_SPARC_HI22 9 458#define R_SPARC_22 10 459#define R_SPARC_13 11 460#define R_SPARC_LO10 12 461#define R_SPARC_GOT10 13 462#define R_SPARC_GOT13 14 463#define R_SPARC_GOT22 15 464#define R_SPARC_PC10 16 465#define R_SPARC_PC22 17 466#define R_SPARC_WPLT30 18 467#define R_SPARC_COPY 19 468#define R_SPARC_GLOB_DAT 20 469#define R_SPARC_JMP_SLOT 21 470#define R_SPARC_RELATIVE 22 471#define R_SPARC_UA32 23 472#define R_SPARC_PLT32 24 473#define R_SPARC_HIPLT22 25 474#define R_SPARC_LOPLT10 26 475#define R_SPARC_PCPLT32 27 476#define R_SPARC_PCPLT22 28 477#define R_SPARC_PCPLT10 29 478#define R_SPARC_10 30 479#define R_SPARC_11 31 480#define R_SPARC_64 32 481#define R_SPARC_OLO10 33 482#define R_SPARC_HH22 34 483#define R_SPARC_HM10 35 484#define R_SPARC_LM22 36 485#define R_SPARC_WDISP16 40 486#define R_SPARC_WDISP19 41 487#define R_SPARC_7 43 488#define R_SPARC_5 44 489#define R_SPARC_6 45 490 491/* Bits present in AT_HWCAP for ARM. */ 492 493#define HWCAP_ARM_SWP (1 << 0) 494#define HWCAP_ARM_HALF (1 << 1) 495#define HWCAP_ARM_THUMB (1 << 2) 496#define HWCAP_ARM_26BIT (1 << 3) 497#define HWCAP_ARM_FAST_MULT (1 << 4) 498#define HWCAP_ARM_FPA (1 << 5) 499#define HWCAP_ARM_VFP (1 << 6) 500#define HWCAP_ARM_EDSP (1 << 7) 501#define HWCAP_ARM_JAVA (1 << 8) 502#define HWCAP_ARM_IWMMXT (1 << 9) 503#define HWCAP_ARM_CRUNCH (1 << 10) 504#define HWCAP_ARM_THUMBEE (1 << 11) 505#define HWCAP_ARM_NEON (1 << 12) 506#define HWCAP_ARM_VFPv3 (1 << 13) 507#define HWCAP_ARM_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ 508#define HWCAP_ARM_TLS (1 << 15) 509#define HWCAP_ARM_VFPv4 (1 << 16) 510#define HWCAP_ARM_IDIVA (1 << 17) 511#define HWCAP_ARM_IDIVT (1 << 18) 512#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 513#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs */ 514#define HWCAP_LPAE (1 << 20) 515 516/* Bits present in AT_HWCAP for PowerPC. */ 517 518#define PPC_FEATURE_32 0x80000000 519#define PPC_FEATURE_64 0x40000000 520#define PPC_FEATURE_601_INSTR 0x20000000 521#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 522#define PPC_FEATURE_HAS_FPU 0x08000000 523#define PPC_FEATURE_HAS_MMU 0x04000000 524#define PPC_FEATURE_HAS_4xxMAC 0x02000000 525#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 526#define PPC_FEATURE_HAS_SPE 0x00800000 527#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 528#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 529#define PPC_FEATURE_NO_TB 0x00100000 530#define PPC_FEATURE_POWER4 0x00080000 531#define PPC_FEATURE_POWER5 0x00040000 532#define PPC_FEATURE_POWER5_PLUS 0x00020000 533#define PPC_FEATURE_CELL 0x00010000 534#define PPC_FEATURE_BOOKE 0x00008000 535#define PPC_FEATURE_SMT 0x00004000 536#define PPC_FEATURE_ICACHE_SNOOP 0x00002000 537#define PPC_FEATURE_ARCH_2_05 0x00001000 538#define PPC_FEATURE_PA6T 0x00000800 539#define PPC_FEATURE_HAS_DFP 0x00000400 540#define PPC_FEATURE_POWER6_EXT 0x00000200 541#define PPC_FEATURE_ARCH_2_06 0x00000100 542#define PPC_FEATURE_HAS_VSX 0x00000080 543 544#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \ 545 0x00000040 546 547#define PPC_FEATURE_TRUE_LE 0x00000002 548#define PPC_FEATURE_PPC_LE 0x00000001 549 550/* Bits present in AT_HWCAP2 for PowerPC. */ 551 552#define PPC_FEATURE2_ARCH_2_07 0x80000000 553#define PPC_FEATURE2_HAS_HTM 0x40000000 554#define PPC_FEATURE2_HAS_DSCR 0x20000000 555#define PPC_FEATURE2_HAS_EBB 0x10000000 556#define PPC_FEATURE2_HAS_ISEL 0x08000000 557#define PPC_FEATURE2_HAS_TAR 0x04000000 558#define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000 559#define PPC_FEATURE2_HTM_NOSC 0x01000000 560#define PPC_FEATURE2_ARCH_3_00 0x00800000 561#define PPC_FEATURE2_HAS_IEEE128 0x00400000 562#define PPC_FEATURE2_ARCH_3_10 0x00040000 563 564/* Bits present in AT_HWCAP for Sparc. */ 565 566#define HWCAP_SPARC_FLUSH 0x00000001 567#define HWCAP_SPARC_STBAR 0x00000002 568#define HWCAP_SPARC_SWAP 0x00000004 569#define HWCAP_SPARC_MULDIV 0x00000008 570#define HWCAP_SPARC_V9 0x00000010 571#define HWCAP_SPARC_ULTRA3 0x00000020 572#define HWCAP_SPARC_BLKINIT 0x00000040 573#define HWCAP_SPARC_N2 0x00000080 574#define HWCAP_SPARC_MUL32 0x00000100 575#define HWCAP_SPARC_DIV32 0x00000200 576#define HWCAP_SPARC_FSMULD 0x00000400 577#define HWCAP_SPARC_V8PLUS 0x00000800 578#define HWCAP_SPARC_POPC 0x00001000 579#define HWCAP_SPARC_VIS 0x00002000 580#define HWCAP_SPARC_VIS2 0x00004000 581#define HWCAP_SPARC_ASI_BLK_INIT 0x00008000 582#define HWCAP_SPARC_FMAF 0x00010000 583#define HWCAP_SPARC_VIS3 0x00020000 584#define HWCAP_SPARC_HPC 0x00040000 585#define HWCAP_SPARC_RANDOM 0x00080000 586#define HWCAP_SPARC_TRANS 0x00100000 587#define HWCAP_SPARC_FJFMAU 0x00200000 588#define HWCAP_SPARC_IMA 0x00400000 589#define HWCAP_SPARC_ASI_CACHE_SPARING 0x00800000 590#define HWCAP_SPARC_PAUSE 0x01000000 591#define HWCAP_SPARC_CBCOND 0x02000000 592#define HWCAP_SPARC_CRYPTO 0x04000000 593 594/* Bits present in AT_HWCAP for s390. */ 595 596#define HWCAP_S390_ESAN3 1 597#define HWCAP_S390_ZARCH 2 598#define HWCAP_S390_STFLE 4 599#define HWCAP_S390_MSA 8 600#define HWCAP_S390_LDISP 16 601#define HWCAP_S390_EIMM 32 602#define HWCAP_S390_DFP 64 603#define HWCAP_S390_HPAGE 128 604#define HWCAP_S390_ETF3EH 256 605#define HWCAP_S390_HIGH_GPRS 512 606#define HWCAP_S390_TE 1024 607#define HWCAP_S390_VXRS 2048 608#define HWCAP_S390_VXRS_BCD 4096 609#define HWCAP_S390_VXRS_EXT 8192 610#define HWCAP_S390_GS 16384 611#define HWCAP_S390_VXRS_EXT2 32768 612#define HWCAP_S390_VXRS_PDE 65536 613#define HWCAP_S390_SORT 131072 614#define HWCAP_S390_DFLT 262144 615 616/* M68K specific definitions. */ 617/* We use the top 24 bits to encode information about the 618 architecture variant. */ 619#define EF_M68K_CPU32 0x00810000 620#define EF_M68K_M68000 0x01000000 621#define EF_M68K_CFV4E 0x00008000 622#define EF_M68K_FIDO 0x02000000 623#define EF_M68K_ARCH_MASK \ 624 (EF_M68K_M68000 | EF_M68K_CPU32 | EF_M68K_CFV4E | EF_M68K_FIDO) 625 626/* We use the bottom 8 bits to encode information about the 627 coldfire variant. If we use any of these bits, the top 24 bits are 628 either 0 or EF_M68K_CFV4E. */ 629#define EF_M68K_CF_ISA_MASK 0x0F /* Which ISA */ 630#define EF_M68K_CF_ISA_A_NODIV 0x01 /* ISA A except for div */ 631#define EF_M68K_CF_ISA_A 0x02 632#define EF_M68K_CF_ISA_A_PLUS 0x03 633#define EF_M68K_CF_ISA_B_NOUSP 0x04 /* ISA_B except for USP */ 634#define EF_M68K_CF_ISA_B 0x05 635#define EF_M68K_CF_ISA_C 0x06 636#define EF_M68K_CF_ISA_C_NODIV 0x07 /* ISA C except for div */ 637#define EF_M68K_CF_MAC_MASK 0x30 638#define EF_M68K_CF_MAC 0x10 /* MAC */ 639#define EF_M68K_CF_EMAC 0x20 /* EMAC */ 640#define EF_M68K_CF_EMAC_B 0x30 /* EMAC_B */ 641#define EF_M68K_CF_FLOAT 0x40 /* Has float insns */ 642#define EF_M68K_CF_MASK 0xFF 643 644/* 645 * 68k ELF relocation types 646 */ 647#define R_68K_NONE 0 648#define R_68K_32 1 649#define R_68K_16 2 650#define R_68K_8 3 651#define R_68K_PC32 4 652#define R_68K_PC16 5 653#define R_68K_PC8 6 654#define R_68K_GOT32 7 655#define R_68K_GOT16 8 656#define R_68K_GOT8 9 657#define R_68K_GOT32O 10 658#define R_68K_GOT16O 11 659#define R_68K_GOT8O 12 660#define R_68K_PLT32 13 661#define R_68K_PLT16 14 662#define R_68K_PLT8 15 663#define R_68K_PLT32O 16 664#define R_68K_PLT16O 17 665#define R_68K_PLT8O 18 666#define R_68K_COPY 19 667#define R_68K_GLOB_DAT 20 668#define R_68K_JMP_SLOT 21 669#define R_68K_RELATIVE 22 670 671/* 672 * Alpha ELF relocation types 673 */ 674#define R_ALPHA_NONE 0 /* No reloc */ 675#define R_ALPHA_REFLONG 1 /* Direct 32 bit */ 676#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */ 677#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */ 678#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */ 679#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */ 680#define R_ALPHA_GPDISP 6 /* Add displacement to GP */ 681#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */ 682#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */ 683#define R_ALPHA_SREL16 9 /* PC relative 16 bit */ 684#define R_ALPHA_SREL32 10 /* PC relative 32 bit */ 685#define R_ALPHA_SREL64 11 /* PC relative 64 bit */ 686#define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */ 687#define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */ 688#define R_ALPHA_GPREL16 19 /* GP relative 16 bit */ 689#define R_ALPHA_COPY 24 /* Copy symbol at runtime */ 690#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */ 691#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */ 692#define R_ALPHA_RELATIVE 27 /* Adjust by program base */ 693#define R_ALPHA_BRSGP 28 694#define R_ALPHA_TLSGD 29 695#define R_ALPHA_TLS_LDM 30 696#define R_ALPHA_DTPMOD64 31 697#define R_ALPHA_GOTDTPREL 32 698#define R_ALPHA_DTPREL64 33 699#define R_ALPHA_DTPRELHI 34 700#define R_ALPHA_DTPRELLO 35 701#define R_ALPHA_DTPREL16 36 702#define R_ALPHA_GOTTPREL 37 703#define R_ALPHA_TPREL64 38 704#define R_ALPHA_TPRELHI 39 705#define R_ALPHA_TPRELLO 40 706#define R_ALPHA_TPREL16 41 707 708#define SHF_ALPHA_GPREL 0x10000000 709 710 711/* PowerPC specific definitions. */ 712 713/* Processor specific flags for the ELF header e_flags field. */ 714#define EF_PPC64_ABI 0x3 715 716/* PowerPC relocations defined by the ABIs */ 717#define R_PPC_NONE 0 718#define R_PPC_ADDR32 1 /* 32bit absolute address */ 719#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ 720#define R_PPC_ADDR16 3 /* 16bit absolute address */ 721#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ 722#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ 723#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ 724#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ 725#define R_PPC_ADDR14_BRTAKEN 8 726#define R_PPC_ADDR14_BRNTAKEN 9 727#define R_PPC_REL24 10 /* PC relative 26 bit */ 728#define R_PPC_REL14 11 /* PC relative 16 bit */ 729#define R_PPC_REL14_BRTAKEN 12 730#define R_PPC_REL14_BRNTAKEN 13 731#define R_PPC_GOT16 14 732#define R_PPC_GOT16_LO 15 733#define R_PPC_GOT16_HI 16 734#define R_PPC_GOT16_HA 17 735#define R_PPC_PLTREL24 18 736#define R_PPC_COPY 19 737#define R_PPC_GLOB_DAT 20 738#define R_PPC_JMP_SLOT 21 739#define R_PPC_RELATIVE 22 740#define R_PPC_LOCAL24PC 23 741#define R_PPC_UADDR32 24 742#define R_PPC_UADDR16 25 743#define R_PPC_REL32 26 744#define R_PPC_PLT32 27 745#define R_PPC_PLTREL32 28 746#define R_PPC_PLT16_LO 29 747#define R_PPC_PLT16_HI 30 748#define R_PPC_PLT16_HA 31 749#define R_PPC_SDAREL16 32 750#define R_PPC_SECTOFF 33 751#define R_PPC_SECTOFF_LO 34 752#define R_PPC_SECTOFF_HI 35 753#define R_PPC_SECTOFF_HA 36 754/* Keep this the last entry. */ 755#ifndef R_PPC_NUM 756#define R_PPC_NUM 37 757#endif 758 759/* ARM specific declarations */ 760 761/* Processor specific flags for the ELF header e_flags field. */ 762#define EF_ARM_RELEXEC 0x01 763#define EF_ARM_HASENTRY 0x02 764#define EF_ARM_INTERWORK 0x04 765#define EF_ARM_APCS_26 0x08 766#define EF_ARM_APCS_FLOAT 0x10 767#define EF_ARM_PIC 0x20 768#define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */ 769#define EF_NEW_ABI 0x80 770#define EF_OLD_ABI 0x100 771#define EF_ARM_SOFT_FLOAT 0x200 772#define EF_ARM_VFP_FLOAT 0x400 773#define EF_ARM_MAVERICK_FLOAT 0x800 774 775/* Other constants defined in the ARM ELF spec. version B-01. */ 776#define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */ 777#define EF_ARM_DYNSYMSUSESEGIDX 0x08 /* NB conflicts with EF_APCS26 */ 778#define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT */ 779#define EF_ARM_EABIMASK 0xFF000000 780 781/* Constants defined in AAELF. */ 782#define EF_ARM_BE8 0x00800000 783#define EF_ARM_LE8 0x00400000 784 785#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK) 786#define EF_ARM_EABI_UNKNOWN 0x00000000 787#define EF_ARM_EABI_VER1 0x01000000 788#define EF_ARM_EABI_VER2 0x02000000 789#define EF_ARM_EABI_VER3 0x03000000 790#define EF_ARM_EABI_VER4 0x04000000 791#define EF_ARM_EABI_VER5 0x05000000 792 793/* Additional symbol types for Thumb */ 794#define STT_ARM_TFUNC 0xd 795 796/* ARM-specific values for sh_flags */ 797#define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ 798#define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined 799 in the input to a link step */ 800 801/* ARM-specific program header flags */ 802#define PF_ARM_SB 0x10000000 /* Segment contains the location 803 addressed by the static base */ 804 805/* ARM relocs. */ 806#define R_ARM_NONE 0 /* No reloc */ 807#define R_ARM_PC24 1 /* PC relative 26 bit branch */ 808#define R_ARM_ABS32 2 /* Direct 32 bit */ 809#define R_ARM_REL32 3 /* PC relative 32 bit */ 810#define R_ARM_PC13 4 811#define R_ARM_ABS16 5 /* Direct 16 bit */ 812#define R_ARM_ABS12 6 /* Direct 12 bit */ 813#define R_ARM_THM_ABS5 7 814#define R_ARM_ABS8 8 /* Direct 8 bit */ 815#define R_ARM_SBREL32 9 816#define R_ARM_THM_PC22 10 817#define R_ARM_THM_PC8 11 818#define R_ARM_AMP_VCALL9 12 819#define R_ARM_SWI24 13 820#define R_ARM_THM_SWI8 14 821#define R_ARM_XPC25 15 822#define R_ARM_THM_XPC22 16 823#define R_ARM_COPY 20 /* Copy symbol at runtime */ 824#define R_ARM_GLOB_DAT 21 /* Create GOT entry */ 825#define R_ARM_JUMP_SLOT 22 /* Create PLT entry */ 826#define R_ARM_RELATIVE 23 /* Adjust by program base */ 827#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */ 828#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */ 829#define R_ARM_GOT32 26 /* 32 bit GOT entry */ 830#define R_ARM_PLT32 27 /* 32 bit PLT address */ 831#define R_ARM_CALL 28 832#define R_ARM_JUMP24 29 833#define R_ARM_GNU_VTENTRY 100 834#define R_ARM_GNU_VTINHERIT 101 835#define R_ARM_THM_PC11 102 /* thumb unconditional branch */ 836#define R_ARM_THM_PC9 103 /* thumb conditional branch */ 837#define R_ARM_RXPC25 249 838#define R_ARM_RSBREL32 250 839#define R_ARM_THM_RPC22 251 840#define R_ARM_RREL32 252 841#define R_ARM_RABS22 253 842#define R_ARM_RPC24 254 843#define R_ARM_RBASE 255 844/* Keep this the last entry. */ 845#define R_ARM_NUM 256 846 847/* ARM Aarch64 relocation types */ 848#define R_AARCH64_NONE 256 /* also accepts R_ARM_NONE (0) */ 849/* static data relocations */ 850#define R_AARCH64_ABS64 257 851#define R_AARCH64_ABS32 258 852#define R_AARCH64_ABS16 259 853#define R_AARCH64_PREL64 260 854#define R_AARCH64_PREL32 261 855#define R_AARCH64_PREL16 262 856/* static aarch64 group relocations */ 857/* group relocs to create unsigned data value or address inline */ 858#define R_AARCH64_MOVW_UABS_G0 263 859#define R_AARCH64_MOVW_UABS_G0_NC 264 860#define R_AARCH64_MOVW_UABS_G1 265 861#define R_AARCH64_MOVW_UABS_G1_NC 266 862#define R_AARCH64_MOVW_UABS_G2 267 863#define R_AARCH64_MOVW_UABS_G2_NC 268 864#define R_AARCH64_MOVW_UABS_G3 269 865/* group relocs to create signed data or offset value inline */ 866#define R_AARCH64_MOVW_SABS_G0 270 867#define R_AARCH64_MOVW_SABS_G1 271 868#define R_AARCH64_MOVW_SABS_G2 272 869/* relocs to generate 19, 21, and 33 bit PC-relative addresses */ 870#define R_AARCH64_LD_PREL_LO19 273 871#define R_AARCH64_ADR_PREL_LO21 274 872#define R_AARCH64_ADR_PREL_PG_HI21 275 873#define R_AARCH64_ADR_PREL_PG_HI21_NC 276 874#define R_AARCH64_ADD_ABS_LO12_NC 277 875#define R_AARCH64_LDST8_ABS_LO12_NC 278 876#define R_AARCH64_LDST16_ABS_LO12_NC 284 877#define R_AARCH64_LDST32_ABS_LO12_NC 285 878#define R_AARCH64_LDST64_ABS_LO12_NC 286 879#define R_AARCH64_LDST128_ABS_LO12_NC 299 880/* relocs for control-flow - all offsets as multiple of 4 */ 881#define R_AARCH64_TSTBR14 279 882#define R_AARCH64_CONDBR19 280 883#define R_AARCH64_JUMP26 282 884#define R_AARCH64_CALL26 283 885/* group relocs to create pc-relative offset inline */ 886#define R_AARCH64_MOVW_PREL_G0 287 887#define R_AARCH64_MOVW_PREL_G0_NC 288 888#define R_AARCH64_MOVW_PREL_G1 289 889#define R_AARCH64_MOVW_PREL_G1_NC 290 890#define R_AARCH64_MOVW_PREL_G2 291 891#define R_AARCH64_MOVW_PREL_G2_NC 292 892#define R_AARCH64_MOVW_PREL_G3 293 893/* group relocs to create a GOT-relative offset inline */ 894#define R_AARCH64_MOVW_GOTOFF_G0 300 895#define R_AARCH64_MOVW_GOTOFF_G0_NC 301 896#define R_AARCH64_MOVW_GOTOFF_G1 302 897#define R_AARCH64_MOVW_GOTOFF_G1_NC 303 898#define R_AARCH64_MOVW_GOTOFF_G2 304 899#define R_AARCH64_MOVW_GOTOFF_G2_NC 305 900#define R_AARCH64_MOVW_GOTOFF_G3 306 901/* GOT-relative data relocs */ 902#define R_AARCH64_GOTREL64 307 903#define R_AARCH64_GOTREL32 308 904/* GOT-relative instr relocs */ 905#define R_AARCH64_GOT_LD_PREL19 309 906#define R_AARCH64_LD64_GOTOFF_LO15 310 907#define R_AARCH64_ADR_GOT_PAGE 311 908#define R_AARCH64_LD64_GOT_LO12_NC 312 909#define R_AARCH64_LD64_GOTPAGE_LO15 313 910/* General Dynamic TLS relocations */ 911#define R_AARCH64_TLSGD_ADR_PREL21 512 912#define R_AARCH64_TLSGD_ADR_PAGE21 513 913#define R_AARCH64_TLSGD_ADD_LO12_NC 514 914#define R_AARCH64_TLSGD_MOVW_G1 515 915#define R_AARCH64_TLSGD_MOVW_G0_NC 516 916/* Local Dynamic TLS relocations */ 917#define R_AARCH64_TLSLD_ADR_PREL21 517 918#define R_AARCH64_TLSLD_ADR_PAGE21 518 919#define R_AARCH64_TLSLD_ADD_LO12_NC 519 920#define R_AARCH64_TLSLD_MOVW_G1 520 921#define R_AARCH64_TLSLD_MOVW_G0_NC 521 922#define R_AARCH64_TLSLD_LD_PREL19 522 923#define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 924#define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 925#define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525 926#define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 927#define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527 928#define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528 929#define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529 930#define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530 931#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 932#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532 933#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 934#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534 935#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 936#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536 937#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 938#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538 939/* initial exec TLS relocations */ 940#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 941#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 942#define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 943#define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542 944#define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 945/* local exec TLS relocations */ 946#define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 947#define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 948#define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546 949#define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 950#define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548 951#define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 952#define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 953#define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551 954#define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 955#define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553 956#define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 957#define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555 958#define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 959#define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557 960#define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 961#define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559 962/* Dynamic Relocations */ 963#define R_AARCH64_COPY 1024 964#define R_AARCH64_GLOB_DAT 1025 965#define R_AARCH64_JUMP_SLOT 1026 966#define R_AARCH64_RELATIVE 1027 967#define R_AARCH64_TLS_DTPREL64 1028 968#define R_AARCH64_TLS_DTPMOD64 1029 969#define R_AARCH64_TLS_TPREL64 1030 970#define R_AARCH64_TLS_DTPREL32 1031 971#define R_AARCH64_TLS_DTPMOD32 1032 972#define R_AARCH64_TLS_TPREL32 1033 973 974/* s390 relocations defined by the ABIs */ 975#define R_390_NONE 0 /* No reloc. */ 976#define R_390_8 1 /* Direct 8 bit. */ 977#define R_390_12 2 /* Direct 12 bit. */ 978#define R_390_16 3 /* Direct 16 bit. */ 979#define R_390_32 4 /* Direct 32 bit. */ 980#define R_390_PC32 5 /* PC relative 32 bit. */ 981#define R_390_GOT12 6 /* 12 bit GOT offset. */ 982#define R_390_GOT32 7 /* 32 bit GOT offset. */ 983#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */ 984#define R_390_COPY 9 /* Copy symbol at runtime. */ 985#define R_390_GLOB_DAT 10 /* Create GOT entry. */ 986#define R_390_JMP_SLOT 11 /* Create PLT entry. */ 987#define R_390_RELATIVE 12 /* Adjust by program base. */ 988#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */ 989#define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */ 990#define R_390_GOT16 15 /* 16 bit GOT offset. */ 991#define R_390_PC16 16 /* PC relative 16 bit. */ 992#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */ 993#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */ 994#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */ 995#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */ 996#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */ 997#define R_390_64 22 /* Direct 64 bit. */ 998#define R_390_PC64 23 /* PC relative 64 bit. */ 999#define R_390_GOT64 24 /* 64 bit GOT offset. */ 1000#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */
1001#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */ 1002#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */ 1003#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */ 1004#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */ 1005#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */ 1006#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */ 1007#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */ 1008#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */ 1009#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */ 1010#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */ 1011#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */ 1012#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */ 1013#define R_390_TLS_GDCALL 38 /* Tag for function call in general 1014 dynamic TLS code. */ 1015#define R_390_TLS_LDCALL 39 /* Tag for function call in local 1016 dynamic TLS code. */ 1017#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic 1018 thread local data. */ 1019#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic 1020 thread local data. */ 1021#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS 1022 block offset. */ 1023#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS 1024 block offset. */ 1025#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS 1026 block offset. */ 1027#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic 1028 thread local data in LD code. */ 1029#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic 1030 thread local data in LD code. */ 1031#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for 1032 negated static TLS block offset. */ 1033#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for 1034 negated static TLS block offset. */ 1035#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for 1036 negated static TLS block offset. */ 1037#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to 1038 static TLS block. */ 1039#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to 1040 static TLS block. */ 1041#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS 1042 block. */ 1043#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS 1044 block. */ 1045#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */ 1046#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */ 1047#define R_390_TLS_TPOFF 56 /* Negate offset in static TLS 1048 block. */ 1049#define R_390_20 57 1050/* Keep this the last entry. */ 1051#define R_390_NUM 58 1052 1053/* x86-64 relocation types */ 1054#define R_X86_64_NONE 0 /* No reloc */ 1055#define R_X86_64_64 1 /* Direct 64 bit */ 1056#define R_X86_64_PC32 2 /* PC relative 32 bit signed */ 1057#define R_X86_64_GOT32 3 /* 32 bit GOT entry */ 1058#define R_X86_64_PLT32 4 /* 32 bit PLT address */ 1059#define R_X86_64_COPY 5 /* Copy symbol at runtime */ 1060#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */ 1061#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ 1062#define R_X86_64_RELATIVE 8 /* Adjust by program base */ 1063#define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative 1064 offset to GOT */ 1065#define R_X86_64_32 10 /* Direct 32 bit zero extended */ 1066#define R_X86_64_32S 11 /* Direct 32 bit sign extended */ 1067#define R_X86_64_16 12 /* Direct 16 bit zero extended */ 1068#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */ 1069#define R_X86_64_8 14 /* Direct 8 bit sign extended */ 1070#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */ 1071 1072#define R_X86_64_NUM 16 1073 1074/* Legal values for e_flags field of Elf64_Ehdr. */ 1075 1076#define EF_ALPHA_32BIT 1 /* All addresses are below 2GB */ 1077 1078/* HPPA specific definitions. */ 1079 1080/* Legal values for e_flags field of Elf32_Ehdr. */ 1081 1082#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */ 1083#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */ 1084#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */ 1085#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */ 1086#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch 1087 prediction. */ 1088#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */ 1089#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */ 1090 1091/* Defined values for `e_flags & EF_PARISC_ARCH' are: */ 1092 1093#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */ 1094#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */ 1095#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */ 1096 1097/* Additional section indeces. */ 1098 1099#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared 1100 symbols in ANSI C. */ 1101#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */ 1102 1103/* Legal values for sh_type field of Elf32_Shdr. */ 1104 1105#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */ 1106#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */ 1107#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */ 1108 1109/* Legal values for sh_flags field of Elf32_Shdr. */ 1110 1111#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */ 1112#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */ 1113#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */ 1114 1115/* Legal values for ST_TYPE subfield of st_info (symbol type). */ 1116 1117#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */ 1118 1119#define STT_HP_OPAQUE (STT_LOOS + 0x1) 1120#define STT_HP_STUB (STT_LOOS + 0x2) 1121 1122/* HPPA relocs. */ 1123 1124#define R_PARISC_NONE 0 /* No reloc. */ 1125#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */ 1126#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */ 1127#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */ 1128#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */ 1129#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */ 1130#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */ 1131#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */ 1132#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */ 1133#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */ 1134#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */ 1135#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */ 1136#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */ 1137#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */ 1138#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */ 1139#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */ 1140#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */ 1141#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */ 1142#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */ 1143#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */ 1144#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */ 1145#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */ 1146#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */ 1147#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */ 1148#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */ 1149#define R_PARISC_FPTR64 64 /* 64 bits function address. */ 1150#define R_PARISC_PLABEL32 65 /* 32 bits function address. */ 1151#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */ 1152#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */ 1153#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */ 1154#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */ 1155#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */ 1156#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */ 1157#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */ 1158#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */ 1159#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */ 1160#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */ 1161#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */ 1162#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */ 1163#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */ 1164#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */ 1165#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */ 1166#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */ 1167#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */ 1168#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */ 1169#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */ 1170#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */ 1171#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */ 1172#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */ 1173#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */ 1174#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */ 1175#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */ 1176#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */ 1177#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */ 1178#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */ 1179#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */ 1180#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */ 1181#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */ 1182#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */ 1183#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */ 1184#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */ 1185#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */ 1186#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */ 1187#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */ 1188#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */ 1189#define R_PARISC_LORESERVE 128 1190#define R_PARISC_COPY 128 /* Copy relocation. */ 1191#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */ 1192#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */ 1193#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */ 1194#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */ 1195#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */ 1196#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */ 1197#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/ 1198#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */ 1199#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */ 1200#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */ 1201#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */ 1202#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */ 1203#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */ 1204#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */ 1205#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */ 1206#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/ 1207#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/ 1208#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */ 1209#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */ 1210#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */ 1211#define R_PARISC_HIRESERVE 255 1212 1213/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */ 1214 1215#define PT_HP_TLS (PT_LOOS + 0x0) 1216#define PT_HP_CORE_NONE (PT_LOOS + 0x1) 1217#define PT_HP_CORE_VERSION (PT_LOOS + 0x2) 1218#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3) 1219#define PT_HP_CORE_COMM (PT_LOOS + 0x4) 1220#define PT_HP_CORE_PROC (PT_LOOS + 0x5) 1221#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6) 1222#define PT_HP_CORE_STACK (PT_LOOS + 0x7) 1223#define PT_HP_CORE_SHM (PT_LOOS + 0x8) 1224#define PT_HP_CORE_MMF (PT_LOOS + 0x9) 1225#define PT_HP_PARALLEL (PT_LOOS + 0x10) 1226#define PT_HP_FASTBIND (PT_LOOS + 0x11) 1227#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12) 1228#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13) 1229#define PT_HP_STACK (PT_LOOS + 0x14) 1230 1231#define PT_PARISC_ARCHEXT 0x70000000 1232#define PT_PARISC_UNWIND 0x70000001 1233 1234/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */ 1235 1236#define PF_PARISC_SBP 0x08000000 1237 1238#define PF_HP_PAGE_SIZE 0x00100000 1239#define PF_HP_FAR_SHARED 0x00200000 1240#define PF_HP_NEAR_SHARED 0x00400000 1241#define PF_HP_CODE 0x01000000 1242#define PF_HP_MODIFY 0x02000000 1243#define PF_HP_LAZYSWAP 0x04000000 1244#define PF_HP_SBP 0x08000000 1245 1246/* IA-64 specific declarations. */ 1247 1248/* Processor specific flags for the Ehdr e_flags field. */ 1249#define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */ 1250#define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */ 1251#define EF_IA_64_ARCH 0xff000000 /* arch. version mask */ 1252 1253/* Processor specific values for the Phdr p_type field. */ 1254#define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */ 1255#define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */ 1256 1257/* Processor specific flags for the Phdr p_flags field. */ 1258#define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */ 1259 1260/* Processor specific values for the Shdr sh_type field. */ 1261#define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */ 1262#define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */ 1263 1264/* Processor specific flags for the Shdr sh_flags field. */ 1265#define SHF_IA_64_SHORT 0x10000000 /* section near gp */ 1266#define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */ 1267 1268/* Processor specific values for the Dyn d_tag field. */ 1269#define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) 1270#define DT_IA_64_NUM 1 1271 1272/* IA-64 relocations. */ 1273#define R_IA64_NONE 0x00 /* none */ 1274#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */ 1275#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */ 1276#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */ 1277#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */ 1278#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */ 1279#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */ 1280#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */ 1281#define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */ 1282#define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */ 1283#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */ 1284#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */ 1285#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */ 1286#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */ 1287#define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */ 1288#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */ 1289#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */ 1290#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */ 1291#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */ 1292#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */ 1293#define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */ 1294#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */ 1295#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */ 1296#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */ 1297#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */ 1298#define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */ 1299#define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */ 1300#define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */ 1301#define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */ 1302#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */ 1303#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */ 1304#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */ 1305#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */ 1306#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */ 1307#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */ 1308#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */ 1309#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */ 1310#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */ 1311#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */ 1312#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */ 1313#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */ 1314#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */ 1315#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */ 1316#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */ 1317#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */ 1318#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */ 1319#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */ 1320#define R_IA64_REL32MSB 0x6c /* data 4 + REL */ 1321#define R_IA64_REL32LSB 0x6d /* data 4 + REL */ 1322#define R_IA64_REL64MSB 0x6e /* data 8 + REL */ 1323#define R_IA64_REL64LSB 0x6f /* data 8 + REL */ 1324#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */ 1325#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */ 1326#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */ 1327#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */ 1328#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */ 1329#define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */ 1330#define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */ 1331#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */ 1332#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */ 1333#define R_IA64_COPY 0x84 /* copy relocation */ 1334#define R_IA64_SUB 0x85 /* Addend and symbol difference */ 1335#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */ 1336#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */ 1337#define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */ 1338#define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */ 1339#define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */ 1340#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */ 1341#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */ 1342#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */ 1343#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */ 1344#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */ 1345#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */ 1346#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */ 1347#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */ 1348#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */ 1349#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */ 1350#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */ 1351#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */ 1352#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */ 1353#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */ 1354 1355/* RISC-V relocations. */ 1356#define R_RISCV_NONE 0 1357#define R_RISCV_32 1 1358#define R_RISCV_64 2 1359#define R_RISCV_RELATIVE 3 1360#define R_RISCV_COPY 4 1361#define R_RISCV_JUMP_SLOT 5 1362#define R_RISCV_TLS_DTPMOD32 6 1363#define R_RISCV_TLS_DTPMOD64 7 1364#define R_RISCV_TLS_DTPREL32 8 1365#define R_RISCV_TLS_DTPREL64 9 1366#define R_RISCV_TLS_TPREL32 10 1367#define R_RISCV_TLS_TPREL64 11 1368#define R_RISCV_BRANCH 16 1369#define R_RISCV_JAL 17 1370#define R_RISCV_CALL 18 1371#define R_RISCV_CALL_PLT 19 1372#define R_RISCV_GOT_HI20 20 1373#define R_RISCV_TLS_GOT_HI20 21 1374#define R_RISCV_TLS_GD_HI20 22 1375#define R_RISCV_PCREL_HI20 23 1376#define R_RISCV_PCREL_LO12_I 24 1377#define R_RISCV_PCREL_LO12_S 25 1378#define R_RISCV_HI20 26 1379#define R_RISCV_LO12_I 27 1380#define R_RISCV_LO12_S 28 1381#define R_RISCV_TPREL_HI20 29 1382#define R_RISCV_TPREL_LO12_I 30 1383#define R_RISCV_TPREL_LO12_S 31 1384#define R_RISCV_TPREL_ADD 32 1385#define R_RISCV_ADD8 33 1386#define R_RISCV_ADD16 34 1387#define R_RISCV_ADD32 35 1388#define R_RISCV_ADD64 36 1389#define R_RISCV_SUB8 37 1390#define R_RISCV_SUB16 38 1391#define R_RISCV_SUB32 39 1392#define R_RISCV_SUB64 40 1393#define R_RISCV_GNU_VTINHERIT 41 1394#define R_RISCV_GNU_VTENTRY 42 1395#define R_RISCV_ALIGN 43 1396#define R_RISCV_RVC_BRANCH 44 1397#define R_RISCV_RVC_JUMP 45 1398#define R_RISCV_RVC_LUI 46 1399#define R_RISCV_GPREL_I 47 1400#define R_RISCV_GPREL_S 48 1401#define R_RISCV_TPREL_I 49 1402#define R_RISCV_TPREL_S 50 1403#define R_RISCV_RELAX 51 1404#define R_RISCV_SUB6 52 1405#define R_RISCV_SET6 53 1406#define R_RISCV_SET8 54 1407#define R_RISCV_SET16 55 1408#define R_RISCV_SET32 56 1409 1410/* RISC-V ELF Flags. */ 1411#define EF_RISCV_RVC 0x0001 1412#define EF_RISCV_FLOAT_ABI 0x0006 1413#define EF_RISCV_FLOAT_ABI_SOFT 0x0000 1414#define EF_RISCV_FLOAT_ABI_SINGLE 0x0002 1415#define EF_RISCV_FLOAT_ABI_DOUBLE 0x0004 1416#define EF_RISCV_FLOAT_ABI_QUAD 0x0006 1417#define EF_RISCV_RVE 0x0008 1418#define EF_RISCV_TSO 0x0010 1419 1420typedef struct elf32_rel { 1421 Elf32_Addr r_offset; 1422 Elf32_Word r_info; 1423} Elf32_Rel; 1424 1425typedef struct elf64_rel { 1426 Elf64_Addr r_offset; /* Location at which to apply the action */ 1427 Elf64_Xword r_info; /* index and type of relocation */ 1428} Elf64_Rel; 1429 1430typedef struct elf32_rela{ 1431 Elf32_Addr r_offset; 1432 Elf32_Word r_info; 1433 Elf32_Sword r_addend; 1434} Elf32_Rela; 1435 1436typedef struct elf64_rela { 1437 Elf64_Addr r_offset; /* Location at which to apply the action */ 1438 Elf64_Xword r_info; /* index and type of relocation */ 1439 Elf64_Sxword r_addend; /* Constant addend used to compute value */ 1440} Elf64_Rela; 1441 1442typedef struct elf32_sym{ 1443 Elf32_Word st_name; 1444 Elf32_Addr st_value; 1445 Elf32_Word st_size; 1446 unsigned char st_info; 1447 unsigned char st_other; 1448 Elf32_Half st_shndx; 1449} Elf32_Sym; 1450 1451typedef struct elf64_sym { 1452 Elf64_Word st_name; /* Symbol name, index in string tbl */ 1453 unsigned char st_info; /* Type and binding attributes */ 1454 unsigned char st_other; /* No defined meaning, 0 */ 1455 Elf64_Half st_shndx; /* Associated section index */ 1456 Elf64_Addr st_value; /* Value of the symbol */ 1457 Elf64_Xword st_size; /* Associated symbol size */ 1458} Elf64_Sym; 1459 1460 1461#define EI_NIDENT 16 1462 1463/* Special value for e_phnum. This indicates that the real number of 1464 program headers is too large to fit into e_phnum. Instead the real 1465 value is in the field sh_info of section 0. */ 1466#define PN_XNUM 0xffff 1467 1468typedef struct elf32_hdr{ 1469 unsigned char e_ident[EI_NIDENT]; 1470 Elf32_Half e_type; 1471 Elf32_Half e_machine; 1472 Elf32_Word e_version; 1473 Elf32_Addr e_entry; /* Entry point */ 1474 Elf32_Off e_phoff; 1475 Elf32_Off e_shoff; 1476 Elf32_Word e_flags; 1477 Elf32_Half e_ehsize; 1478 Elf32_Half e_phentsize; 1479 Elf32_Half e_phnum; 1480 Elf32_Half e_shentsize; 1481 Elf32_Half e_shnum; 1482 Elf32_Half e_shstrndx; 1483} Elf32_Ehdr; 1484 1485typedef struct elf64_hdr { 1486 unsigned char e_ident[16]; /* ELF "magic number" */ 1487 Elf64_Half e_type; 1488 Elf64_Half e_machine; 1489 Elf64_Word e_version; 1490 Elf64_Addr e_entry; /* Entry point virtual address */ 1491 Elf64_Off e_phoff; /* Program header table file offset */ 1492 Elf64_Off e_shoff; /* Section header table file offset */ 1493 Elf64_Word e_flags; 1494 Elf64_Half e_ehsize; 1495 Elf64_Half e_phentsize; 1496 Elf64_Half e_phnum; 1497 Elf64_Half e_shentsize; 1498 Elf64_Half e_shnum; 1499 Elf64_Half e_shstrndx; 1500} Elf64_Ehdr; 1501 1502/* These constants define the permissions on sections in the program 1503 header, p_flags. */ 1504#define PF_R 0x4 1505#define PF_W 0x2 1506#define PF_X 0x1 1507 1508typedef struct elf32_phdr{ 1509 Elf32_Word p_type; 1510 Elf32_Off p_offset; 1511 Elf32_Addr p_vaddr; 1512 Elf32_Addr p_paddr; 1513 Elf32_Word p_filesz; 1514 Elf32_Word p_memsz; 1515 Elf32_Word p_flags; 1516 Elf32_Word p_align; 1517} Elf32_Phdr; 1518 1519typedef struct elf64_phdr { 1520 Elf64_Word p_type; 1521 Elf64_Word p_flags; 1522 Elf64_Off p_offset; /* Segment file offset */ 1523 Elf64_Addr p_vaddr; /* Segment virtual address */ 1524 Elf64_Addr p_paddr; /* Segment physical address */ 1525 Elf64_Xword p_filesz; /* Segment size in file */ 1526 Elf64_Xword p_memsz; /* Segment size in memory */ 1527 Elf64_Xword p_align; /* Segment alignment, file & memory */ 1528} Elf64_Phdr; 1529 1530/* sh_type */ 1531#define SHT_NULL 0 1532#define SHT_PROGBITS 1 1533#define SHT_SYMTAB 2 1534#define SHT_STRTAB 3 1535#define SHT_RELA 4 1536#define SHT_HASH 5 1537#define SHT_DYNAMIC 6 1538#define SHT_NOTE 7 1539#define SHT_NOBITS 8 1540#define SHT_REL 9 1541#define SHT_SHLIB 10 1542#define SHT_DYNSYM 11 1543#define SHT_NUM 12 1544#define SHT_LOPROC 0x70000000 1545#define SHT_HIPROC 0x7fffffff 1546#define SHT_LOUSER 0x80000000 1547#define SHT_HIUSER 0xffffffff 1548#define SHT_MIPS_LIST 0x70000000 1549#define SHT_MIPS_CONFLICT 0x70000002 1550#define SHT_MIPS_GPTAB 0x70000003 1551#define SHT_MIPS_UCODE 0x70000004 1552 1553/* sh_flags */ 1554#define SHF_WRITE 0x1 1555#define SHF_ALLOC 0x2 1556#define SHF_EXECINSTR 0x4 1557#define SHF_MASKPROC 0xf0000000 1558#define SHF_MIPS_GPREL 0x10000000 1559 1560/* special section indexes */ 1561#define SHN_UNDEF 0 1562#define SHN_LORESERVE 0xff00 1563#define SHN_LOPROC 0xff00 1564#define SHN_HIPROC 0xff1f 1565#define SHN_ABS 0xfff1 1566#define SHN_COMMON 0xfff2 1567#define SHN_HIRESERVE 0xffff 1568#define SHN_MIPS_ACCOMON 0xff00 1569 1570typedef struct elf32_shdr { 1571 Elf32_Word sh_name; 1572 Elf32_Word sh_type; 1573 Elf32_Word sh_flags; 1574 Elf32_Addr sh_addr; 1575 Elf32_Off sh_offset; 1576 Elf32_Word sh_size; 1577 Elf32_Word sh_link; 1578 Elf32_Word sh_info; 1579 Elf32_Word sh_addralign; 1580 Elf32_Word sh_entsize; 1581} Elf32_Shdr; 1582 1583typedef struct elf64_shdr { 1584 Elf64_Word sh_name; /* Section name, index in string tbl */ 1585 Elf64_Word sh_type; /* Type of section */ 1586 Elf64_Xword sh_flags; /* Miscellaneous section attributes */ 1587 Elf64_Addr sh_addr; /* Section virtual addr at execution */ 1588 Elf64_Off sh_offset; /* Section file offset */ 1589 Elf64_Xword sh_size; /* Size of section in bytes */ 1590 Elf64_Word sh_link; /* Index of another section */ 1591 Elf64_Word sh_info; /* Additional section information */ 1592 Elf64_Xword sh_addralign; /* Section alignment */ 1593 Elf64_Xword sh_entsize; /* Entry size if section holds table */ 1594} Elf64_Shdr; 1595 1596#define EI_MAG0 0 /* e_ident[] indexes */ 1597#define EI_MAG1 1 1598#define EI_MAG2 2 1599#define EI_MAG3 3 1600#define EI_CLASS 4 1601#define EI_DATA 5 1602#define EI_VERSION 6 1603#define EI_OSABI 7 1604#define EI_PAD 8 1605 1606#define ELFOSABI_NONE 0 /* UNIX System V ABI */ 1607#define ELFOSABI_SYSV 0 /* Alias. */ 1608#define ELFOSABI_HPUX 1 /* HP-UX */ 1609#define ELFOSABI_NETBSD 2 /* NetBSD. */ 1610#define ELFOSABI_LINUX 3 /* Linux. */ 1611#define ELFOSABI_SOLARIS 6 /* Sun Solaris. */ 1612#define ELFOSABI_AIX 7 /* IBM AIX. */ 1613#define ELFOSABI_IRIX 8 /* SGI Irix. */ 1614#define ELFOSABI_FREEBSD 9 /* FreeBSD. */ 1615#define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */ 1616#define ELFOSABI_MODESTO 11 /* Novell Modesto. */ 1617#define ELFOSABI_OPENBSD 12 /* OpenBSD. */ 1618#define ELFOSABI_ARM_FDPIC 65 /* ARM FDPIC */ 1619#define ELFOSABI_ARM 97 /* ARM */ 1620#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ 1621 1622#define ELFMAG0 0x7f /* EI_MAG */ 1623#define ELFMAG1 'E' 1624#define ELFMAG2 'L' 1625#define ELFMAG3 'F' 1626#define ELFMAG "\177ELF" 1627#define SELFMAG 4 1628 1629#define ELFCLASSNONE 0 /* EI_CLASS */ 1630#define ELFCLASS32 1 1631#define ELFCLASS64 2 1632#define ELFCLASSNUM 3 1633 1634#define ELFDATANONE 0 /* e_ident[EI_DATA] */ 1635#define ELFDATA2LSB 1 1636#define ELFDATA2MSB 2 1637 1638#define EV_NONE 0 /* e_version, EI_VERSION */ 1639#define EV_CURRENT 1 1640#define EV_NUM 2 1641 1642/* Notes used in ET_CORE */ 1643#define NT_PRSTATUS 1 1644#define NT_FPREGSET 2 1645#define NT_PRFPREG 2 1646#define NT_PRPSINFO 3 1647#define NT_TASKSTRUCT 4 1648#define NT_AUXV 6 1649#define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */ 1650#define NT_S390_GS_CB 0x30b /* s390 guarded storage registers */ 1651#define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */ 1652#define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 (lower half) */ 1653#define NT_S390_PREFIX 0x305 /* s390 prefix register */ 1654#define NT_S390_CTRS 0x304 /* s390 control registers */ 1655#define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */ 1656#define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */ 1657#define NT_S390_TIMER 0x301 /* s390 timer register */ 1658#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */ 1659#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */ 1660#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */ 1661#define NT_ARM_VFP 0x400 /* ARM VFP/NEON registers */ 1662#define NT_ARM_TLS 0x401 /* ARM TLS register */ 1663#define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */ 1664#define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */ 1665#define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */ 1666#define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension regs */ 1667 1668/* Defined note types for GNU systems. */ 1669 1670#define NT_GNU_PROPERTY_TYPE_0 5 /* Program property */ 1671 1672/* Values used in GNU .note.gnu.property notes (NT_GNU_PROPERTY_TYPE_0). */ 1673 1674#define GNU_PROPERTY_STACK_SIZE 1 1675#define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2 1676 1677#define GNU_PROPERTY_LOPROC 0xc0000000 1678#define GNU_PROPERTY_HIPROC 0xdfffffff 1679#define GNU_PROPERTY_LOUSER 0xe0000000 1680#define GNU_PROPERTY_HIUSER 0xffffffff 1681 1682#define GNU_PROPERTY_AARCH64_FEATURE_1_AND 0xc0000000 1683#define GNU_PROPERTY_AARCH64_FEATURE_1_BTI (1u << 0) 1684#define GNU_PROPERTY_AARCH64_FEATURE_1_PAC (1u << 1) 1685 1686/* 1687 * Physical entry point into the kernel. 1688 * 1689 * 32bit entry point into the kernel. When requested to launch the 1690 * guest kernel, use this entry point to launch the guest in 32-bit 1691 * protected mode with paging disabled. 1692 * 1693 * [ Corresponding definition in Linux kernel: include/xen/interface/elfnote.h ] 1694 */ 1695#define XEN_ELFNOTE_PHYS32_ENTRY 18 /* 0x12 */ 1696 1697/* Note header in a PT_NOTE section */ 1698typedef struct elf32_note { 1699 Elf32_Word n_namesz; /* Name size */ 1700 Elf32_Word n_descsz; /* Content size */ 1701 Elf32_Word n_type; /* Content type */ 1702} Elf32_Nhdr; 1703 1704/* Note header in a PT_NOTE section */ 1705typedef struct elf64_note { 1706 Elf64_Word n_namesz; /* Name size */ 1707 Elf64_Word n_descsz; /* Content size */ 1708 Elf64_Word n_type; /* Content type */ 1709} Elf64_Nhdr; 1710 1711 1712/* This data structure represents a PT_LOAD segment. */ 1713struct elf32_fdpic_loadseg { 1714 /* Core address to which the segment is mapped. */ 1715 Elf32_Addr addr; 1716 /* VMA recorded in the program header. */ 1717 Elf32_Addr p_vaddr; 1718 /* Size of this segment in memory. */ 1719 Elf32_Word p_memsz; 1720}; 1721struct elf32_fdpic_loadmap { 1722 /* Protocol version number, must be zero. */ 1723 Elf32_Half version; 1724 /* Number of segments in this map. */ 1725 Elf32_Half nsegs; 1726 /* The actual memory map. */ 1727 struct elf32_fdpic_loadseg segs[/*nsegs*/]; 1728}; 1729 1730#ifdef ELF_CLASS 1731#if ELF_CLASS == ELFCLASS32 1732 1733#define elfhdr elf32_hdr 1734#define elf_phdr elf32_phdr 1735#define elf_note elf32_note 1736#define elf_shdr elf32_shdr 1737#define elf_sym elf32_sym 1738#define elf_addr_t Elf32_Off 1739#define elf_rela elf32_rela 1740 1741#ifdef ELF_USES_RELOCA 1742# define ELF_RELOC Elf32_Rela 1743#else 1744# define ELF_RELOC Elf32_Rel 1745#endif 1746 1747#else 1748 1749#define elfhdr elf64_hdr 1750#define elf_phdr elf64_phdr 1751#define elf_note elf64_note 1752#define elf_shdr elf64_shdr 1753#define elf_sym elf64_sym 1754#define elf_addr_t Elf64_Off 1755#define elf_rela elf64_rela 1756 1757#ifdef ELF_USES_RELOCA 1758# define ELF_RELOC Elf64_Rela 1759#else 1760# define ELF_RELOC Elf64_Rel 1761#endif 1762 1763#endif /* ELF_CLASS */ 1764 1765#ifndef ElfW 1766# if ELF_CLASS == ELFCLASS32 1767# define ElfW(x) Elf32_ ## x 1768# define ELFW(x) ELF32_ ## x 1769# else 1770# define ElfW(x) Elf64_ ## x 1771# define ELFW(x) ELF64_ ## x 1772# endif 1773#endif 1774 1775#endif /* ELF_CLASS */ 1776 1777 1778#endif /* QEMU_ELF_H */ 1779