LXR qemu/include/hw/gpio/sifive

   1/*
   2 * SiFive System-on-Chip general purpose input/output register definition
   3 *
   4 * Copyright 2019 AdaCore
   5 *
   6 * Base on nrf51_gpio.c:
   7 *
   8 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
   9 *
  10 * This code is licensed under the GPL version 2 or later.  See
  11 * the COPYING file in the top-level directory.
  12 */
  13
  14#ifndef SIFIVE_GPIO_H
  15#define SIFIVE_GPIO_H
  16
  17#include "hw/sysbus.h"
  18#include "qom/object.h"
  19
  20#define TYPE_SIFIVE_GPIO "sifive_soc.gpio"
  21typedef struct SIFIVEGPIOState SIFIVEGPIOState;
  22DECLARE_INSTANCE_CHECKER(SIFIVEGPIOState, SIFIVE_GPIO,
  23                         TYPE_SIFIVE_GPIO)
  24
  25#define SIFIVE_GPIO_PINS 32
  26
  27#define SIFIVE_GPIO_SIZE 0x100
  28
  29#define SIFIVE_GPIO_REG_VALUE      0x000
  30#define SIFIVE_GPIO_REG_INPUT_EN   0x004
  31#define SIFIVE_GPIO_REG_OUTPUT_EN  0x008
  32#define SIFIVE_GPIO_REG_PORT       0x00C
  33#define SIFIVE_GPIO_REG_PUE        0x010
  34#define SIFIVE_GPIO_REG_DS         0x014
  35#define SIFIVE_GPIO_REG_RISE_IE    0x018
  36#define SIFIVE_GPIO_REG_RISE_IP    0x01C
  37#define SIFIVE_GPIO_REG_FALL_IE    0x020
  38#define SIFIVE_GPIO_REG_FALL_IP    0x024
  39#define SIFIVE_GPIO_REG_HIGH_IE    0x028
  40#define SIFIVE_GPIO_REG_HIGH_IP    0x02C
  41#define SIFIVE_GPIO_REG_LOW_IE     0x030
  42#define SIFIVE_GPIO_REG_LOW_IP     0x034
  43#define SIFIVE_GPIO_REG_IOF_EN     0x038
  44#define SIFIVE_GPIO_REG_IOF_SEL    0x03C
  45#define SIFIVE_GPIO_REG_OUT_XOR    0x040
  46
  47struct SIFIVEGPIOState {
  48    SysBusDevice parent_obj;
  49
  50    MemoryRegion mmio;
  51
  52    qemu_irq irq[SIFIVE_GPIO_PINS];
  53    qemu_irq output[SIFIVE_GPIO_PINS];
  54
  55    uint32_t value;             /* Actual value of the pin */
  56    uint32_t input_en;
  57    uint32_t output_en;
  58    uint32_t port;              /* Pin value requested by the user */
  59    uint32_t pue;
  60    uint32_t ds;
  61    uint32_t rise_ie;
  62    uint32_t rise_ip;
  63    uint32_t fall_ie;
  64    uint32_t fall_ip;
  65    uint32_t high_ie;
  66    uint32_t high_ip;
  67    uint32_t low_ie;
  68    uint32_t low_ip;
  69    uint32_t iof_en;
  70    uint32_t iof_sel;
  71    uint32_t out_xor;
  72    uint32_t in;
  73    uint32_t in_mask;
  74
  75    /* config */
  76    uint32_t ngpio;
  77};
  78
  79#endif /* SIFIVE_GPIO_H */
  80