LXR qemu/include/hw/i386/microvm.h

   1/*
   2 * Copyright (c) 2018 Intel Corporation
   3 * Copyright (c) 2019 Red Hat, Inc.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms and conditions of the GNU General Public License,
   7 * version 2 or later, as published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * You should have received a copy of the GNU General Public License along with
  15 * this program.  If not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18#ifndef HW_I386_MICROVM_H
  19#define HW_I386_MICROVM_H
  20
  21#include "qemu-common.h"
  22#include "exec/hwaddr.h"
  23#include "qemu/notify.h"
  24
  25#include "hw/boards.h"
  26#include "hw/i386/x86.h"
  27#include "hw/acpi/acpi_dev_interface.h"
  28#include "hw/pci-host/gpex.h"
  29#include "qom/object.h"
  30
  31/*
  32 *  IRQ    |  pc        | microvm (acpi=on)
  33 * --------+------------+------------------
  34 *   0     |  pit       |
  35 *   1     |  kbd       |
  36 *   2     |  cascade   |
  37 *   3     |  serial 1  |
  38 *   4     |  serial 0  | serial
  39 *   5     |  -         |
  40 *   6     |  floppy    |
  41 *   7     |  parallel  |
  42 *   8     |  rtc       | rtc (rtc=on)
  43 *   9     |  acpi      | acpi (ged)
  44 *  10     |  pci lnk   | xhci (usb=on)
  45 *  11     |  pci lnk   |
  46 *  12     |  ps2       | pcie
  47 *  13     |  fpu       | pcie
  48 *  14     |  ide 0     | pcie
  49 *  15     |  ide 1     | pcie
  50 *  16-23  |  pci gsi   | virtio
  51 */
  52
  53/* Platform virtio definitions */
  54#define VIRTIO_MMIO_BASE      0xfeb00000
  55#define VIRTIO_CMDLINE_MAXLEN 64
  56
  57#define GED_MMIO_BASE         0xfea00000
  58#define GED_MMIO_BASE_MEMHP   (GED_MMIO_BASE + 0x100)
  59#define GED_MMIO_BASE_REGS    (GED_MMIO_BASE + 0x200)
  60#define GED_MMIO_IRQ          9
  61
  62#define MICROVM_XHCI_BASE     0xfe900000
  63#define MICROVM_XHCI_IRQ      10
  64
  65#define PCIE_MMIO_BASE        0xc0000000
  66#define PCIE_MMIO_SIZE        0x20000000
  67#define PCIE_ECAM_BASE        0xe0000000
  68#define PCIE_ECAM_SIZE        0x10000000
  69
  70/* Machine type options */
  71#define MICROVM_MACHINE_PIT                 "pit"
  72#define MICROVM_MACHINE_PIC                 "pic"
  73#define MICROVM_MACHINE_RTC                 "rtc"
  74#define MICROVM_MACHINE_PCIE                "pcie"
  75#define MICROVM_MACHINE_IOAPIC2             "ioapic2"
  76#define MICROVM_MACHINE_ISA_SERIAL          "isa-serial"
  77#define MICROVM_MACHINE_OPTION_ROMS         "x-option-roms"
  78#define MICROVM_MACHINE_AUTO_KERNEL_CMDLINE "auto-kernel-cmdline"
  79
  80struct MicrovmMachineClass {
  81    X86MachineClass parent;
  82    HotplugHandler *(*orig_hotplug_handler)(MachineState *machine,
  83                                           DeviceState *dev);
  84};
  85
  86struct MicrovmMachineState {
  87    X86MachineState parent;
  88
  89    /* Machine type options */
  90    OnOffAuto pic;
  91    OnOffAuto pit;
  92    OnOffAuto rtc;
  93    OnOffAuto pcie;
  94    OnOffAuto ioapic2;
  95    bool isa_serial;
  96    bool option_roms;
  97    bool auto_kernel_cmdline;
  98
  99    /* Machine state */
 100    uint32_t pcie_irq_base;
 101    uint32_t virtio_irq_base;
 102    uint32_t virtio_num_transports;
 103    bool kernel_cmdline_fixed;
 104    Notifier machine_done;
 105    Notifier powerdown_req;
 106    struct GPEXConfig gpex;
 107
 108    /* device tree */
 109    void *fdt;
 110    uint32_t ioapic_phandle[2];
 111};
 112
 113#define TYPE_MICROVM_MACHINE   MACHINE_TYPE_NAME("microvm")
 114OBJECT_DECLARE_TYPE(MicrovmMachineState, MicrovmMachineClass, MICROVM_MACHINE)
 115
 116#endif
 117