LXR qemu/include/hw/misc/imx

   1/*
   2 * IMX Clock Control Module base class
   3 *
   4 * Copyright (C) 2012 NICTA
   5 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
   6 *
   7 * This work is licensed under the terms of the GNU GPL, version 2 or later.
   8 * See the COPYING file in the top-level directory.
   9 */
  10
  11#ifndef IMX_CCM_H
  12#define IMX_CCM_H
  13
  14#include "hw/sysbus.h"
  15#include "qom/object.h"
  16
  17#define CKIL_FREQ 32768 /* nominal 32khz clock */
  18
  19/* PLL control registers */
  20#define PD(v) (((v) >> 26) & 0xf)
  21#define MFD(v) (((v) >> 16) & 0x3ff)
  22#define MFI(v) (((v) >> 10) & 0xf);
  23#define MFN(v) ((v) & 0x3ff)
  24
  25#define PLL_PD(x)               (((x) & 0xf) << 26)
  26#define PLL_MFD(x)              (((x) & 0x3ff) << 16)
  27#define PLL_MFI(x)              (((x) & 0xf) << 10)
  28#define PLL_MFN(x)              (((x) & 0x3ff) << 0)
  29
  30#define TYPE_IMX_CCM "imx.ccm"
  31OBJECT_DECLARE_TYPE(IMXCCMState, IMXCCMClass, IMX_CCM)
  32
  33struct IMXCCMState {
  34    /* <private> */
  35    SysBusDevice parent_obj;
  36
  37    /* <public> */
  38
  39};
  40
  41typedef enum  {
  42    CLK_NONE,
  43    CLK_IPG,
  44    CLK_IPG_HIGH,
  45    CLK_32k,
  46    CLK_EXT,
  47    CLK_HIGH_DIV,
  48    CLK_HIGH,
  49} IMXClk;
  50
  51struct IMXCCMClass {
  52    /* <private> */
  53    SysBusDeviceClass parent_class;
  54
  55    /* <public> */
  56    uint32_t (*get_clock_frequency)(IMXCCMState *s, IMXClk clk);
  57};
  58
  59uint32_t imx_ccm_calc_pll(uint32_t pllreg, uint32_t base_freq);
  60
  61uint32_t imx_ccm_get_clock_frequency(IMXCCMState *s, IMXClk clock);
  62
  63#endif /* IMX_CCM_H */
  64