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26#ifndef QEMU_PCI_BRIDGE_H
27#define QEMU_PCI_BRIDGE_H
28
29#include "hw/pci/pci.h"
30#include "hw/pci/pci_bus.h"
31#include "qom/object.h"
32
33typedef struct PCIBridgeWindows PCIBridgeWindows;
34
35
36
37
38
39
40struct PCIBridgeWindows {
41 MemoryRegion alias_pref_mem;
42 MemoryRegion alias_mem;
43 MemoryRegion alias_io;
44
45
46
47
48
49
50 MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS];
51};
52
53#define TYPE_PCI_BRIDGE "base-pci-bridge"
54OBJECT_DECLARE_SIMPLE_TYPE(PCIBridge, PCI_BRIDGE)
55
56struct PCIBridge {
57
58 PCIDevice parent_obj;
59
60
61
62 PCIBus sec_bus;
63
64
65
66
67
68
69
70
71 MemoryRegion address_space_mem;
72 MemoryRegion address_space_io;
73
74 PCIBridgeWindows *windows;
75
76 pci_map_irq_fn map_irq;
77 const char *bus_name;
78};
79
80#define PCI_BRIDGE_DEV_PROP_CHASSIS_NR "chassis_nr"
81#define PCI_BRIDGE_DEV_PROP_MSI "msi"
82#define PCI_BRIDGE_DEV_PROP_SHPC "shpc"
83
84int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset,
85 uint16_t svid, uint16_t ssid,
86 Error **errp);
87
88PCIDevice *pci_bridge_get_device(PCIBus *bus);
89PCIBus *pci_bridge_get_sec_bus(PCIBridge *br);
90
91pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type);
92pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type);
93
94void pci_bridge_update_mappings(PCIBridge *br);
95void pci_bridge_write_config(PCIDevice *d,
96 uint32_t address, uint32_t val, int len);
97void pci_bridge_disable_base_limit(PCIDevice *dev);
98void pci_bridge_reset(DeviceState *qdev);
99
100void pci_bridge_initfn(PCIDevice *pci_dev, const char *typename);
101void pci_bridge_exitfn(PCIDevice *pci_dev);
102
103void pci_bridge_dev_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
104 Error **errp);
105void pci_bridge_dev_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
106 Error **errp);
107void pci_bridge_dev_unplug_request_cb(HotplugHandler *hotplug_dev,
108 DeviceState *dev, Error **errp);
109
110
111
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113
114
115void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,
116 pci_map_irq_fn map_irq);
117
118
119#define PCI_BRIDGE_CTL_VGA_16BIT 0x10
120#define PCI_BRIDGE_CTL_DISCARD 0x100
121#define PCI_BRIDGE_CTL_SEC_DISCARD 0x200
122#define PCI_BRIDGE_CTL_DISCARD_STATUS 0x400
123#define PCI_BRIDGE_CTL_DISCARD_SERR 0x800
124
125typedef struct PCIBridgeQemuCap {
126 uint8_t id;
127 uint8_t next;
128 uint8_t len;
129 uint8_t type;
130
131
132 uint32_t bus_res;
133 uint64_t io;
134 uint32_t mem;
135
136
137 uint32_t mem_pref_32;
138 uint64_t mem_pref_64;
139} PCIBridgeQemuCap;
140
141#define REDHAT_PCI_CAP_RESOURCE_RESERVE 1
142
143
144
145
146
147typedef struct PCIResReserve {
148 uint32_t bus;
149 uint64_t io;
150 uint64_t mem_non_pref;
151 uint64_t mem_pref_32;
152 uint64_t mem_pref_64;
153} PCIResReserve;
154
155int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
156 PCIResReserve res_reserve, Error **errp);
157
158#endif
159